JP2003079133A - Dc-dc converter circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To equalize rate of rising of a DC voltage that is impressed to load resistance irrespective of the amount of the load resistance. SOLUTION: This DC-DC converter circuit comprises a first operational amplifier 2 that operates an error voltage signal; a second operational amplifier 13 structured with a voltage-follower, that gives a reference voltage value to the first operational amplifier 2; and a capacitor circuit provided at the output side of the second operational amplifier 13 for soft starting when changing power. The operational amplifier 13 is capable of controlling the rate of rising of the load resistance to a constant rate irrespective of the amount of the load resistance, because it constitutes the operational amplifier for the soft starting that gives the reference voltage value that gradually increases at a prescribed inclination with respect to the first operational amplifier 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention detects a voltage value output from a power source to a load, and performs pulse width modulation (hereinafter, referred to as a pulse width modulation based on an error voltage signal between the voltage value and a reference voltage value of a reference power source). A DC / DC converter circuit in which a constant voltage is applied to the load by controlling it. Particularly, the power supply voltage of an electronic device connected to a power supply whose voltage value is unstable such as a battery is stabilized. The present invention relates to a DC / DC converter circuit used for converting the signal.

[0002]

2. Description of the Related Art First, a conventional DC / DC converter circuit will be described. FIG. 5 is a diagram showing a conventional DC / DC converter circuit configured to supply a constant voltage to a load resistance.

The DC / DC converter circuit has an external terminal 1
It is configured as an integrated circuit (IC) 100 including 01 to 105. 101 of the external terminals 101 to 105
Is supplied with a start signal of the power supply circuit, and 102 and 103 output PWM control signals to the gates of the power MOSs 20 and 30.

The power supply 10 is, for example, an unstable battery, and its + terminal is connected to the drain of the power MOS 20, and the source of the power MOS 20 is connected to the drain of the low-side power MOS 30 and one end of the inductor 40. ing. The source of the power MOS 30 is grounded, and the other end of the inductor 40 is connected to the resistor R2, the capacitor C1 and the load resistor R1.

A pair of resistors R2 and R3 connected in series constitutes a detection resistance circuit, and a capacitor C1 is connected in parallel to the detection resistance circuit, whereby a voltage applied to the load resistance R1. The value is detected as the voltage across the terminals of the capacitor C1. In addition, I which constitutes the converter circuit
In C100, the voltage between the terminals of the load resistor R1 is detected by taking in the potential at the connection point of the resistors R2 and R3 from the external terminal 104. Furthermore, the external terminal 10
A capacitor C3 for soft start is connected to 5.

Next, the structure of the internal circuit of the IC 100 will be described. The IC 100 is configured to supply a stable constant voltage regardless of the size of the load resistance R1 by alternately turning on and off the pair of power MOSs 20 and 30 based on the detected voltage that has been taken in. . That is, the IC 100 is provided with the reference power source 1 which is less affected by the temperature change, and the reference voltage value of a constant voltage is always input to the + side input terminal of the operational amplifier 2 from here. In the operational amplifier 2, the voltage value detected by the detection resistance circuit of the resistors R2 and R3 externally attached is input to the-side input terminal via the external terminal 104, and the deviation of these voltage values is used as an error voltage signal. It is amplified and output.

The oscillation circuit 3 outputs a triangular wave of a predetermined frequency, and its output terminal is connected to the minus side input terminals of the comparators 4 and 9. Comparator 4
Has its + side input terminal connected to the output terminal of the operational amplifier 2, and is configured to compare the output voltage of the oscillation circuit 3 with the deviation output of the operational amplifier 2.

The output terminal of the comparator 4 is connected to the driver circuit 7 through the AND gate 8, and the output terminal of the comparator 4 outputs the external terminal 102.
The power MOS 20 connected to is controlled to be turned on and off.
The output voltage signal of the comparator 4 is inverted by the inverter 5 from the AND gate 8 and supplied to the driver circuit 6, and the inverted voltage signal from the inverter 5 turns on / off the power MOS 30 connected to the external terminal 103. Controlled.

On the other hand, the comparator 9 has an AND gate 8
So that a voltage signal for soft start is supplied to the external terminals 102 and 103 via the external terminal 105.
Connected with. The current source 11 and the NMOS switching device 12 are provided in series between the internal power source and the ground, and the connection point between the current source 11 and the NMOS switching device 12 is connected to the bypass terminal 105 and the NMOS switching device is connected. A soft start start signal is supplied to the gate of the device 12 from the external terminal 101 as a power supply circuit start signal.

Next, the operation of the above-mentioned DC / DC converter circuit at the time of starting will be described. Figure 6 shows the start-up (T
It is a timing diagram which shows the voltage waveform of each part of the DC / DC converter circuit before and after 0).

FIG. 6A shows the error voltage signal V2 of the operational amplifier 2, the triangular wave of the oscillator circuit 3, and the voltage signal V105 for soft start applied to the external terminal 105. Further, FIG. 3B shows the output voltage V9 of the comparator 9, the output voltage V4 of the comparator 4, and the output voltage V8 of the AND gate 8.

When the DC / DC converter circuit is started (T
In 0), when a current starts to flow from the power supply 10 to the load resistance R1 via the power MOS 20 and the inductor 40, a large current should not be suddenly applied to the load resistance R1.
A capacitor C3 for soft start is connected to the external terminal 105. The DC / DC converter circuit maintains a DC output stopped state by applying a high-potential voltage signal to its external terminal 101. In this stopped state, the NMOS switching device 12 is turned on by the voltage signal of the external terminal 101, so that the current source 1
All the current from 1 flows between the drain and the source, and its drain voltage becomes the ground potential. Therefore, the + input terminal of the comparator 9 becomes the ground potential, and
The output voltage V9 of the comparator 9 is maintained at the ground potential as shown in the timing waveform before the activation (T0) in (B).

Before the start of the DC / DC converter circuit (T0), the potential of the load resistance is also the ground potential, and the negative terminal of the operational amplifier 2 from the external terminal 104 is also the ground potential. . On the other hand, + of the operational amplifier 2
Since a constant potential is supplied from the reference power supply 1 to the side input terminal, the error voltage signal V2 of the operational amplifier 2 becomes a high potential and the output voltage V4 of the comparator 4 as shown in FIG. Is maintained at a high potential.

Thus, in the stop state in which the output voltage V8 of the AND gate 8 is maintained at the ground potential, the power MOS 20 is maintained in the off state via the driver circuit 7 and the power MOS 3 via the inverter 5 and the driver circuit 6.
Since 0 is maintained in the ON state, the DC / DC converter circuit will remain in the stopped state.

To start the DC / DC converter circuit, the soft start start signal applied to the external terminal 101 as a start signal may be switched to the ground potential. That is, when the soft start start signal becomes the ground potential, the NMOS switching device 12 is turned off, and the current from the current source 11 charges the soft start capacitor C3. Therefore, the external terminal 10
5, the voltage signal V105 increases linearly with the passage of time according to the capacitance value of the capacitor C3, and the output voltage V9 of the comparator 9 has a ground potential and a high potential as shown in FIG. 6 (B). The waveform will alternate.

In this way, the pair of power MOSs 20 and 3
Since 0 is controlled to be turned on and off alternately, the voltage between the terminals of the load resistor R1 also gradually becomes a high potential, so that the voltage detected through the detection resistors R2 and R3 also becomes high. As a result, the error voltage signal V2 shown in FIG. 6A gradually decreases from the high potential side, so that the pair of power MOS2
ON / OFF of 0 and 30 is the voltage signal V for soft start.
It is controlled by the lower voltage of 105 and the error voltage signal V2. Therefore, immediately after start-up (T0), the voltage signal V105 for soft start controls the amount of current flowing through the load resistor R1 to perform a soft start, and then the two voltage signals V105 and V105.
After the time of the cross point at which 2 intersects, the timing is determined by the error voltage signal V2 of the operational amplifier 2.

[0017]

However, the conventional DC
In the / DC converter circuit, the initial amount of current that flows from the power source 10 via the power MOS 20 and the inductor 40 immediately after startup is the capacitor C3 externally attached to the external terminal 105.
Since it depends on the resistance value of the load resistor R1, there is a problem that the time required to reach a stable output voltage varies.

FIG. 7 shows that, according to the size of the load resistance R1,
It is a figure which shows the time difference from the time of starting (T0) to a cross point. The cross point time T1a at the time of light load is shown in the same figure (A), and the cross point time T1b at the time of heavy load is shown in the same figure (B).

Here, the output voltage waveform of the oscillation circuit 3 and the charging voltage waveform of the capacitor C3 have the same magnitude regardless of the magnitude of the load resistance R1. Therefore,
The timing at which the power MOSs 20 and 30 are turned on and off immediately after startup is the same for both light load and heavy load, and the charging current flowing through the inductor 40 is also the same.

As a result, when the load is light, the voltage of the load resistor R1 rises quickly, but on the contrary, when the load is heavy, the voltage rises slowly. That is, the error voltage signal of the operational amplifier 2 is obtained by amplifying the difference between the voltage between the terminals of the reference power source 1 having a constant voltage and the load resistor R1 detected by the series circuit of the detection resistors R2 and R3. If R1 is a light load, the inter-terminal voltage of the load resistor R1 approaches the voltage value of the reference power supply 1 faster, so that the crosspoint times T1a and T1b at which the error voltage signal V2 intersects the voltage signal V105 for soft start are set. , T1a <T1b.

An object of the present invention is to provide a DC / DC converter circuit capable of equalizing the rising speeds of the DC voltage applied to the load resistance regardless of the size of the load resistance.

[0022]

In order to achieve the above object, a voltage value output from a power source to a load is detected,
A DC / DC converter circuit is provided in which a constant voltage is applied to the load by performing pulse width modulation (PWM) control based on an error voltage signal between the voltage value and the reference voltage value of the reference power source. . This DC / DC converter circuit includes a first operational amplifier that operates the error voltage signal, a second operational amplifier having a voltage follower configuration that gives a reference voltage value to the first operational amplifier, and a power-on state. And a capacitor circuit provided on the output side of the second operational amplifier for soft start.

In the DC / DC converter circuit described above,
The reference voltage supplied to the + side input terminal of the first operational amplifier is held at the ground potential when the power supply is stopped, and is gradually increased from the ground potential to the rated voltage immediately after the start.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a circuit diagram showing a DC / DC converter circuit of the present invention.

An integrated circuit (IC) 100 having external terminals 101 to 104 has the same structure as the conventional circuit described with reference to FIG.
The start signal of the power supply circuit is supplied to the external terminal 101.
From 02 and 103, the control signal for PWM is supplied to the power MOS.
It outputs to the gates of 20 and 30. The power supply 10 that supplies a DC voltage to the load resistor R1 is, for example, an unstable battery, and its + terminal is the power MOS 20.
The source of the power MOS 20 is connected to the drain of the low-side power MOS 30 and one end of the inductor 40. The source of the power MOS 30 is grounded, and the other end of the inductor 40 is connected to the resistor R2, the capacitor C1 and the load resistor R1. Furthermore, in this IC 100, the voltage between the terminals of the load resistor R1 is detected by taking in the potential at the connection point of the resistors R2 and R3 from the external terminal 104.

Next, regarding the configuration of the internal circuit of the IC 100, only the differences from the conventional circuit shown in FIG. 5 will be described. A second operational amplifier 13 having a voltage follower configuration and a soft-start capacitor C2 are connected to the + side input terminal of the first operational amplifier 2 for calculating the error voltage signal. In the second operational amplifier 13, the input signal terminal 13a is connected to the + electrode of the reference power supply 1, the activation control terminal 13b is connected to the external terminal 101, and the soft start control signal output terminal 13c and the first operational amplifier 13 are connected. 2 is connected to the + side input terminal. In addition, the comparator 4
Has its + side input terminal connected to the output terminal of the first operational amplifier 2, compares the output voltage of the oscillation circuit 3 with the deviation output of the first operational amplifier 2, and directly outputs this comparison result. To the driver circuit 7 and to the driver circuit 6 via the inverter 5.

Next, the operation of the DC / DC converter circuit at startup will be described with reference to FIG. FIG. 2 is a timing chart showing signal waveforms of respective parts of the second operational amplifier 13. Va is a reference voltage signal of the reference power source 1, Vb is a soft start start signal for stopping and starting supplied from the external terminal 101, and Vc is T at start-up.
It is an output signal that gradually rises from immediately after 0. When the soft start start signal Vb applied to the start control terminal 13b has a high potential, the output signal Vc of the operational amplifier 13
Is at ground potential and is in a stopped state.

After that, when the soft start start signal Vb becomes the ground potential at time T0, the operational amplifier 13 of the voltage follower structure starts its operation, and its output signal V
c increases linearly from the ground potential to the magnitude of the reference voltage signal Va, and when it exceeds the potential of the signal Va, control is performed so as to return it to the reference voltage. At this time, the slope of the output signal Vc is determined by the capacitance value of the soft start capacitor C2 and the magnitude of the output signal current I0 of the second operational amplifier 13.

As described above, the operational amplifier 13 having the voltage follower structure constitutes a soft-start operational amplifier that gives the first operational amplifier 2 a reference voltage value that gradually increases at a predetermined slope. The rising speed of the load voltage can be controlled to be constant regardless of the size of the load resistance R1. (Second Embodiment) FIG. 3 is a circuit diagram showing a DC / DC converter circuit of the present invention.

The second embodiment differs from the circuit shown in FIG. 1 in that the internal capacitor C2 for soft start is replaced with an external capacitor C3. That is,
By providing the external terminal 105 in the IC 100 and changing the capacitance value of the capacitor C3 connected thereto,
The soft start time immediately after startup is adjusted. By using the external capacitor C3, it becomes possible to set the rising time of the soft start in the range of several tens of milliseconds to several seconds. Since other configurations are the same as those of the above-described embodiment,
Descriptions thereof are omitted.

In this case as well, since the operational amplifier 13 having the voltage follower constitutes the operational amplifier for soft start, the rising speed of the load voltage can be controlled to be constant regardless of the size of the load resistor R1.

The operational amplifier 13 having the voltage follower configuration can be configured in the IC 100 as shown in FIG. 4, for example. In FIG. 4, the current source I, the resistor R4, the capacitor C4, and the MOS transistors M1 to M10 form an operational amplifier, and the switching transistors S1 to S6 form a switch that switches between start and stop by a control signal for soft start. ing.

When the activation control terminal 13b is at a high potential, the switching transistors S1 and S2 are inverters, so the drain of S1 is at the ground potential and S4 is
Is on, and the high potential of the activation control terminal 13b is applied to the gate electrodes of S3, S5, and S6 to be on,
As a result, the operational amplifier 13 is maintained in the stopped state. When the control signal for soft start changes from the high potential to the ground potential, the switching transistors S3 to S6 are all turned off and the operational amplifier 13 starts operating. At this time, control signal output terminal 1 for soft start
The magnitude of the output signal current I0 from 3c is the current value of the current source I being I1, the MOS transistors M1 to M3, and M9.
Each gate width Wn and gate length Ln can be determined as follows.

I0 = {(W2 / L2) × (W9 / L9)
/ (W1 / L1) × (W3 / L3)} × I1 In the above formula, Wn and Ln are the gate width and gate length of the MOS transistor Mn.

[0035]

As described above, the DC of the present invention
According to the / DC converter circuit, + of the first operational amplifier
The reference voltage supplied to the side input terminal is applied to the load resistance regardless of the size of the load resistance by holding it at the ground potential when the power supply is stopped and gradually increasing from the ground potential to the rated voltage immediately after startup. The rising speed of the DC voltage can be equalized.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a DC / DC converter circuit of the present invention.

FIG. 2 is a timing diagram showing a signal waveform of each part of the second operational amplifier.

FIG. 3 is a circuit diagram showing another DC / DC converter circuit.

FIG. 4 is a circuit diagram showing an example of an operational amplifier having a voltage follower configuration.

FIG. 5 is a diagram showing a conventional DC / DC converter circuit.

FIG. 6 is a timing diagram showing voltage waveforms of various parts of the DC / DC converter circuit before and after startup.

FIG. 7 is a diagram showing a difference in time from startup to a cross point according to the magnitude of load resistance.

[Explanation of symbols]

100 ... Integrated circuit (IC) 101-104 ... External terminals 10 ... Power 20, 30 ... Power MOS 20 40 ... Inductor 1 ... Reference power supply 2 ... First operational amplifier 3 ... Oscillation circuit 4 ... Comparator 5 ... Inverter 6, 7 ... Driver circuit 13 ... Second operational amplifier

Claims (4)

[Claims] 1. A voltage value output from a power source to a load is detected, and pulse width modulation (PWM) control is performed based on an error voltage signal between the voltage value and a reference voltage value of a reference power source. D that applies a constant voltage to the load
In a C / DC converter circuit, a first operational amplifier that operates the error voltage signal, a second operational amplifier having a voltage follower configuration that gives a reference voltage value to the first operational amplifier, and A DC / DC converter circuit, comprising: a capacitor circuit provided on the output side of the second operational amplifier for soft start. 2. The capacitor circuit includes the first and second capacitors.
2. The DC / DC converter circuit according to claim 1, wherein the DC / DC converter circuit is formed integrally with the operational amplifier of FIG. 3. The capacitor circuit includes the first and second capacitors.
2. The DC / DC converter circuit according to claim 1, wherein the DC / DC converter circuit is formed by a capacitor external to the integrated circuit constituting the operational amplifier. 4. The DC / DC converter circuit according to claim 1, wherein a soft start signal is input to the second operational amplifier, and the operation is started by the soft start signal.