JP2003046137A - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device

Info

Publication number
JP2003046137A
JP2003046137A JP2001227444A JP2001227444A JP2003046137A JP 2003046137 A JP2003046137 A JP 2003046137A JP 2001227444 A JP2001227444 A JP 2001227444A JP 2001227444 A JP2001227444 A JP 2001227444A JP 2003046137 A JP2003046137 A JP 2003046137A
Authority
JP
Japan
Prior art keywords
light emitting
semiconductor light
electrode
emitting device
wall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001227444A
Other languages
Japanese (ja)
Inventor
Tomio Inoue
登美男 井上
Hisakazu Kawahara
久和 川原
Masafumi Shinahama
政文 尻無濱
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2001227444A priority Critical patent/JP2003046137A/en
Publication of JP2003046137A publication Critical patent/JP2003046137A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Abstract

PROBLEM TO BE SOLVED: To provide a high-luminance semiconductor light emitting device in which a migration is not generated even when Ag is used for a reflecting wall. SOLUTION: A conical through hole 11 is formed in the central part of an insulating substrate 10, and a semiconductor light emitting element 13 which is continuity-mounted on a submount element 12 is inserted into the through hole 11 from the lower part. The through hole 11 has a shape expanded toward the takeout direction of light, and its inner surface is used as the reflecting wall 14 formed by an Ag plating operation. Since the reflecting wall 14 is insulated from a p-electrode 15a and an n-electrode 15b which are connected to the element 13, a voltage is not applied to the electrodes, and an Ag migration is not generated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、面実装型の半導体
発光装置に係り、より詳しくは、半導体発光素子の周囲
に反射壁を備えて高輝度な発光が可能な半導体発光装置
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface mount semiconductor light emitting device, and more particularly, to a semiconductor light emitting device having a reflective wall around a semiconductor light emitting element and capable of emitting light with high brightness.

【0002】[0002]

【従来の技術】面実装型の発光ダイオード(LED)パ
ッケージは、パッケージの素材である白色樹脂を利用し
て半導体発光素子の周囲に反射壁を形成し、半導体発光
素子の横への発光をこの反射壁によって上方に反射する
ようにしたものが主流である。また、反射壁の反射をよ
り良くするため、反射壁にAuめっきを施したものもあ
る。
2. Description of the Related Art A surface-mount type light emitting diode (LED) package uses a white resin, which is a material of the package, to form a reflective wall around the semiconductor light emitting element so that the semiconductor light emitting element emits light laterally. The mainstream is the one that is reflected upward by a reflecting wall. There is also a reflective wall which is plated with Au in order to improve the reflection of the reflective wall.

【0003】図3および図4に、上記従来の面実装型の
LEDパッケージの例を示す。
3 and 4 show an example of the above-mentioned conventional surface mount type LED package.

【0004】図3に示すLEDパッケージ51は、サフ
ァイア基板上にGaN系化合物半導体によりn型層およ
びp型層を形成して構成した半導体発光素子52を、絶
縁性の基板53上のp電極54aおよびn電極54bに
対してフェイスダウン方式によりフリップチップ実装し
たものである。基板53は、その中心部の半導体発光素
子52の周囲に反射壁55を形成し、p電極54aおよ
びn電極54bを反射壁55のほぼ全面に渡ってパター
ン形成し、半導体発光素子52からの横への発光を効率
的に上方へ反射するようにしている。
The LED package 51 shown in FIG. 3 has a semiconductor light emitting device 52 formed by forming an n-type layer and a p-type layer of a GaN-based compound semiconductor on a sapphire substrate, and a p-electrode 54a on an insulating substrate 53. And the n-electrode 54b are flip-chip mounted by a face-down method. The substrate 53 has a reflective wall 55 formed around the semiconductor light emitting element 52 in the central portion thereof, and the p electrode 54a and the n electrode 54b are patterned over almost the entire surface of the reflective wall 55, so that the horizontal direction from the semiconductor light emitting element 52 is reduced. The light emitted to is efficiently reflected upward.

【0005】図4に示すLEDパッケージ61は、絶縁
性の基板63にp電極64aおよびn電極64bのパタ
ーンを形成し、半導体発光素子62をp電極64a上に
導通搭載するともにn電極64bとワイヤボンディング
したものである。このLEDパッケージ61の場合も、
図3に示すLEDパッケージ51と同様、基板63に反
射壁65を形成し、p電極64aおよびn電極64bを
反射壁65のほぼ全面に渡ってパターン形成している。
In an LED package 61 shown in FIG. 4, a pattern of p electrodes 64a and n electrodes 64b is formed on an insulating substrate 63, a semiconductor light emitting element 62 is conductively mounted on the p electrode 64a, and an n electrode 64b and a wire are provided. Bonded. Also in the case of this LED package 61,
Similar to the LED package 51 shown in FIG. 3, the reflective wall 65 is formed on the substrate 63, and the p electrode 64a and the n electrode 64b are formed over almost the entire surface of the reflective wall 65 by patterning.

【0006】[0006]

【発明が解決しようとする課題】上記のように、反射壁
にパターン形成するp電極およびn電極は、従来Auめ
っきによって形成されている。ところが、可視光に対し
て反射率が最も高いのはAgであり、AuはAgよりも
反射率が悪い。特に、緑や青の波長に対しては(表1)
に示すように極端に反射率が悪くなる。
As described above, the p electrode and the n electrode which are patterned on the reflection wall are conventionally formed by Au plating. However, Ag has the highest reflectance with respect to visible light, and Au has a lower reflectance than Ag. Especially for green and blue wavelengths (Table 1)
As shown in, the reflectance is extremely poor.

【0007】[0007]

【表1】 [Table 1]

【0008】したがって、反射壁のp電極およびn電極
はAgにより形成するのが望ましいが、Agを用いた場
合、p電極およびn電極間に電圧がかかっているため、
マイグレーションが問題となる。例えば、図3に示すよ
うに、p電極54aとn電極54bとが半導体発光素子
の部分でかなり接近しているため、マイグレーションが
短時間で発生してしまう。図4に示す例についても同様
である。マイグレーションが発生すると、絶縁劣化や短
絡を招くことになり、LEDが点灯しなくなって使用で
きなくなる。
Therefore, it is desirable that the p-electrode and the n-electrode of the reflecting wall are made of Ag. However, when Ag is used, a voltage is applied between the p-electrode and the n-electrode.
Migration is a problem. For example, as shown in FIG. 3, since the p electrode 54a and the n electrode 54b are considerably close to each other in the semiconductor light emitting element portion, migration occurs in a short time. The same applies to the example shown in FIG. If migration occurs, insulation deterioration or short circuit will be caused, and the LED will not light and cannot be used.

【0009】そこで、本発明においては、反射壁にAg
を使用してもマイグレーションを発生することのない高
輝度な半導体発光装置を提供することを目的とする。
Therefore, in the present invention, Ag is formed on the reflecting wall.
It is an object of the present invention to provide a high-luminance semiconductor light emitting device which does not cause migration even when used.

【0010】[0010]

【課題を解決するための手段】上記課題を解決するため
本発明は、半導体発光素子の周囲に反射壁を形成した半
導体発光装置において、半導体発光素子に接続する電極
と絶縁して反射壁に金属めっきを形成したことを特徴と
する。
SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides a semiconductor light emitting device in which a reflective wall is formed around a semiconductor light emitting element. It is characterized in that plating is formed.

【0011】本発明によれば、反射壁にAgを使用して
もマイグレーションを発生することがないため、Agを
使用して反射率の高い反射壁を形成し、高輝度な半導体
発光装置が得られる。
According to the present invention, even if Ag is used for the reflecting wall, migration does not occur. Therefore, Ag is used to form the reflecting wall having high reflectance, and a semiconductor light emitting device having high brightness is obtained. To be

【0012】[0012]

【発明の実施の形態】請求項1に記載の発明は、半導体
発光素子の周囲に反射壁を形成した半導体発光装置にお
いて、前記半導体発光素子に接続する電極と絶縁して前
記反射壁に金属めっきを形成したことを特徴とする半導
体発光装置であり、電極と反射壁とが絶縁されているた
め、反射壁にAgを使用しても電極の電圧がかかること
なく、マイグレーションが発生することがない。
According to a first aspect of the present invention, in a semiconductor light emitting device in which a reflective wall is formed around a semiconductor light emitting element, the reflective wall is metal-plated by being insulated from an electrode connected to the semiconductor light emitting element. In the semiconductor light emitting device, the electrodes and the reflection wall are insulated from each other. Therefore, even if Ag is used for the reflection wall, the voltage of the electrode is not applied and migration does not occur. .

【0013】請求項2に記載の発明は、前記金属めっき
は、Agめっきとした請求項1記載の半導体発光装置で
あり、Agを使用して反射率の高い反射壁を形成するこ
とができる。
The invention according to claim 2 is the semiconductor light-emitting device according to claim 1, wherein the metal plating is Ag plating, and a reflective wall having a high reflectance can be formed by using Ag.

【0014】以下、本発明の実施の形態について、図面
を参照して説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0015】(実施の形態1)図1は本発明の第1実施
形態における半導体発光装置としてのLEDパッケージ
を示し、(a)は平面図、(b)は縦断面図である。
(First Embodiment) FIG. 1 shows an LED package as a semiconductor light emitting device according to a first embodiment of the present invention, (a) is a plan view and (b) is a longitudinal sectional view.

【0016】図1において、本発明の第1実施形態にお
けるLEDパッケージは、絶縁性の基板10の中心部に
すり鉢状のスルーホール11を設け、サブマウント素子
12に導通搭載した半導体発光素子13をこのスルーホ
ール11の中に下方から差し込んだものである。スルー
ホール11は、上方(光の取り出し方向)に向かって拡
大する形状であって、その内面をAgめっきによって形
成した反射壁14としている。
Referring to FIG. 1, the LED package according to the first embodiment of the present invention includes a semiconductor light emitting element 13 which is provided with a mortar-shaped through hole 11 in the center of an insulating substrate 10 and which is conductively mounted on a submount element 12. It is inserted into the through hole 11 from below. The through hole 11 has a shape that expands upward (in the light extraction direction), and the inner surface thereof is a reflection wall 14 formed by Ag plating.

【0017】基板10の左右両端部には、それぞれAu
によってp電極15aおよびn電極15bを形成し、p
電極15aおよびn電極15bはサブマウント素子12
上に形成した電極パターンによって半導体発光素子13
と接続している。なお、p電極15aおよびn電極15
bと反射壁14とは、図1(b)に示すように離れてお
り絶縁された状態である。
Au is provided on both left and right ends of the substrate 10, respectively.
To form the p-electrode 15a and the n-electrode 15b,
The electrode 15a and the n-electrode 15b are the submount element 12
The semiconductor light emitting device 13 is formed by the electrode pattern formed above.
Connected with. The p electrode 15a and the n electrode 15
The b and the reflection wall 14 are separated and insulated from each other as shown in FIG.

【0018】上記構成のLEDパッケージでは、半導体
発光素子13の上方が主光取り出し面であるが、半導体
発光素子13の側方に抜ける光がAgによって形成され
た反射壁14によって上方へと反射され、効率よく主光
取り出し面側に回収することができる。このとき、反射
壁14は、p電極15aおよびn電極15bと絶縁され
ているため、これらの電極の電圧がかかることがなく、
Agマイグレーションが発生することがない。
In the LED package having the above-mentioned structure, the upper side of the semiconductor light emitting element 13 is the main light extraction surface, but the light passing to the side of the semiconductor light emitting element 13 is reflected upward by the reflecting wall 14 formed of Ag. , Can be efficiently collected on the main light extraction surface side. At this time, since the reflection wall 14 is insulated from the p electrode 15a and the n electrode 15b, no voltage is applied to these electrodes,
Ag migration does not occur.

【0019】なお、本実施の形態においては、反射壁1
4の形状を上方に広がるすり鉢状としているが、本発明
はこれに限定したものではなく、上方に向かって拡大す
る頂部を切り落とした四角錐状としてもよい。
In this embodiment, the reflection wall 1
Although the shape of No. 4 has a mortar shape that expands upward, the present invention is not limited to this, and may have a quadrangular pyramid shape in which the top portion that expands upward is cut off.

【0020】(実施の形態2)図2は、本発明の第2実
施形態における半導体発光装置としてのLEDパッケー
ジを示し、(a)は平面図、(b)は縦断面図である。
(Second Embodiment) FIG. 2 shows an LED package as a semiconductor light emitting device according to a second embodiment of the present invention, (a) is a plan view and (b) is a longitudinal sectional view.

【0021】図2において、本発明の第2実施形態にお
けるLEDパッケージは、絶縁性の基板20の中心部に
傾斜面を有する凹部21を設け、この凹部21の中心に
半導体発光素子22を搭載し、基板20に設けたp電極
23aおよびn電極23bにワイヤ24a,24bによ
って接続したものである。
In FIG. 2, the LED package according to the second embodiment of the present invention is provided with a recess 21 having an inclined surface in the center of an insulating substrate 20, and a semiconductor light emitting element 22 is mounted in the center of the recess 21. The p electrode 23a and the n electrode 23b provided on the substrate 20 are connected by wires 24a and 24b.

【0022】凹部21は、上方(光の取り出し方向)に
向かって拡大する頂部を切り落とした四角錐状であり、
その内面はAgめっきによって形成した反射壁25とす
る。なお、この反射壁25は、p電極23aおよびn電
極23bと離してあり、半導体発光素子22が絶縁性の
サファイア基板上に化合物半導体層を積層したものであ
るため、反射壁25に電極の電圧がかかることはない。
The concave portion 21 is in the shape of a quadrangular pyramid with the top cut off to expand upward (light extraction direction).
Its inner surface is a reflection wall 25 formed by Ag plating. The reflection wall 25 is separated from the p electrode 23a and the n electrode 23b, and the semiconductor light emitting element 22 is a compound semiconductor layer laminated on an insulating sapphire substrate. It does not cost.

【0023】したがって、上記構成のLEDパッケージ
では、第1実施形態のLEDパッケージと同様、半導体
発光素子22の側方に抜ける光がAgによって形成され
た反射壁25によって上方へと反射され、効率よく光取
り出し面側に回収することができる。また、反射壁25
に電圧がかかることがないため、Agマイグレーション
も発生しない。
Therefore, in the LED package having the above-described structure, as in the LED package of the first embodiment, the light that escapes to the side of the semiconductor light emitting element 22 is reflected upward by the reflection wall 25 formed of Ag and efficiently. It can be collected on the light extraction surface side. In addition, the reflection wall 25
Since no voltage is applied to the electrodes, Ag migration does not occur.

【0024】[0024]

【発明の効果】本発明によれば、反射壁にAgを使用し
てもマイグレーションを発生することがないため、Ag
を使用して反射率の高い反射壁を形成し、高輝度な半導
体発光装置が得られる。
According to the present invention, migration does not occur even if Ag is used for the reflecting wall.
Is used to form a reflective wall having high reflectance, and a semiconductor light emitting device having high brightness can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1実施形態におけるLEDパッケー
ジを示し、 (a)は平面図 (b)は縦断面図
FIG. 1 shows an LED package according to a first embodiment of the present invention, in which (a) is a plan view and (b) is a longitudinal sectional view.

【図2】本発明の第2実施形態におけるLEDパッケー
ジを示し、 (a)は平面図 (b)は縦断面図
FIG. 2 shows an LED package according to a second embodiment of the present invention, in which (a) is a plan view and (b) is a longitudinal sectional view.

【図3】従来の面実装型のLEDパッケージの例を示
し、 (a)は平面図 (b)は縦断面図
FIG. 3 shows an example of a conventional surface mount type LED package, (a) is a plan view and (b) is a longitudinal sectional view.

【図4】従来の面実装型のLEDパッケージの別の例を
示し、 (a)は平面図 (b)は縦断面図
FIG. 4 shows another example of a conventional surface mount type LED package, in which (a) is a plan view and (b) is a longitudinal sectional view.

【符号の説明】[Explanation of symbols]

10,20 基板 11 スルーホール 12 サブマウント素子 13,22 半導体発光素子 14,25 反射壁 15a,23a p電極 15b,23b n電極 21 凹部 24a,24b ワイヤ 10, 20 substrate 11 through holes 12 Submount element 13,22 Semiconductor light emitting device 14,25 reflective wall 15a, 23a p electrode 15b, 23b n-electrode 21 recess 24a, 24b wire

フロントページの続き (72)発明者 尻無濱 政文 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Fターム(参考) 5F041 AA44 DA07 DA19 DA33 DA36Continued front page    (72) Inventor Masafumi Shirahama             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. F-term (reference) 5F041 AA44 DA07 DA19 DA33 DA36

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体発光素子の周囲に反射壁を形成し
た半導体発光装置において、前記半導体発光素子に接続
する電極と絶縁して前記反射壁に金属めっきを形成した
ことを特徴とする半導体発光装置。
1. A semiconductor light emitting device in which a reflective wall is formed around a semiconductor light emitting element, wherein a metal plating is formed on the reflective wall so as to be insulated from an electrode connected to the semiconductor light emitting element. .
【請求項2】 前記金属めっきは、Agめっきとした請
求項1記載の半導体発光装置。
2. The semiconductor light emitting device according to claim 1, wherein the metal plating is Ag plating.
JP2001227444A 2001-07-27 2001-07-27 Semiconductor light emitting device Pending JP2003046137A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001227444A JP2003046137A (en) 2001-07-27 2001-07-27 Semiconductor light emitting device

Publications (1)

Publication Number Publication Date
JP2003046137A true JP2003046137A (en) 2003-02-14

Family

ID=19060105

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2003046137A (en)

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JP2004266124A (en) * 2003-03-03 2004-09-24 Matsushita Electric Ind Co Ltd Semiconductor light emitting device
WO2004084319A1 (en) * 2003-03-18 2004-09-30 Sumitomo Electric Industries Ltd. Light emitting element mounting member, and semiconductor device using the same
JP2006156506A (en) * 2004-11-25 2006-06-15 Matsushita Electric Ind Co Ltd Semiconductor light emitting device, lighting device, portable communication apparatus, camera, and method of manufacturing camera
JP2006210724A (en) * 2005-01-28 2006-08-10 Sumitomo Electric Ind Ltd Injection molded circuit component, window frame and package for light emitting diode using same, and manufacturing method the component
KR100665216B1 (en) 2005-07-04 2007-01-09 삼성전기주식회사 Side-view light emitting diode having improved side-wall reflection structure
JP2007189006A (en) * 2006-01-12 2007-07-26 Hitachi Aic Inc Printed wiring board, and led device using it
CN100401540C (en) * 2003-06-11 2008-07-09 罗姆股份有限公司 Optical semiconductor device
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