JP2003037200A - Package for housing semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that the heat generated from a semiconductor element during operation is not efficiently dispersed outside, leading to thermal destruction with the semiconductor element. SOLUTION: The package for housing semiconductor element comprises a base 1 provided with a placement part 1a on the upper surface of which a semiconductor element 4 is placed, a frame-like insulator 2 which is fitted to the upper surface of the base 1 and encloses the placement part 1a, and a lid 3 which is fitted to the frame-like insulator 2 and seals air-tight the inside of the frame-like insulator 2. The frame-like insulator 2 comprises ceramics whose thermal expansion factor is 6.0-8.0 ppm/ deg.C (room temperature-800 deg.C). The base 1 comprises tungsten and copper, and has a 3-layer structure in which upper and lower layers 1b and 1d comprising tungsten by 30-60 wt.% and copper by 40-70 wt.% are disposed on both upper and lower surfaces of an intermediate layer 1c which comprises tungsten by 75-90 wt.% and copper by 10-25 wt.%.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element housing package for housing a semiconductor element such as an LSI (Large Scale Integrated Circuit Element).

[0002]

2. Description of the Related Art Conventionally, a semiconductor element accommodating package for accommodating a semiconductor element is made of a metal material such as a copper-tungsten alloy or a copper-molybdenum alloy having a mounting portion on which the semiconductor element is mounted. A base, a frame-shaped insulator made of an electrically insulating material such as an aluminum oxide sintered body or a glass ceramic sintered body attached to the upper surface of the base so as to surround the mounting portion, and the frame A plurality of wiring layers made of metal powder such as tungsten, molybdenum, copper, silver, etc., which are adhered and led from the inner peripheral portion to the outer peripheral portion of the frame-shaped insulator, and are attached to the upper surface of the frame-shaped insulator for insulation. It is composed of a lid that closes a hole inside the body, and the semiconductor element is adhered and fixed to the semiconductor element mounting portion of the base body through an adhesive such as glass, resin, or brazing material, and each electrode of the semiconductor element is formed. Bonding wire Is electrically connected to the wiring layer formed on the frame-shaped insulator via the glass substrate, and then the frame-shaped insulator is covered with a lid so as to close the inner hole of the insulator from glass, resin, brazing material, or the like. A semiconductor device as a product is obtained by bonding the semiconductor elements through a sealing material and hermetically housing the semiconductor element inside a container composed of a base, a frame-shaped insulator, and a lid.

In the above-mentioned package for housing a semiconductor element, the base on which the semiconductor element is mounted is made of a metal material such as a copper-tungsten alloy or a copper-molybdenum alloy, and the copper-tungsten alloy or copper-tungsten alloy is used. Since the molybdenum alloy has a high thermal conductivity of about 180 W / m · K and is excellent in thermal conductivity, the base body can well absorb the heat generated during the operation of the semiconductor element and can dissipate it into the atmosphere. As a result, the semiconductor element is always kept at an appropriate temperature, and the semiconductor element is effectively prevented from suffering thermal breakdown or thermal deterioration of its characteristics.

Further, copper-tungsten alloys and copper-based materials used as the base body of the above-mentioned package for accommodating semiconductor elements.
The molybdenum alloy is manufactured by firing tungsten powder or molybdenum powder to obtain a sintered porous body, and then melting the sintered porous body in the pores of the sintered porous body. When impregnated with copper, the sintered porous body has a range of 75 to 90% by weight and copper has a range of 10 to 25% by weight. When the sintered porous body made of molybdenum has been impregnated with copper, the sintered porous body has a range of 80 to 90% by weight. % By weight, and copper is in the range of 10 to 20% by weight.

[0005]

However, in this conventional package for accommodating semiconductor elements, the base body fires tungsten powder or molybdenum powder to obtain a sintered porous body, and the sintered porous body has pores inside. It is formed by impregnating molten copper, and the thermal conductivity of the base increases as the amount of copper increases, but the linear thermal expansion coefficient of the base also increases accordingly. The linear thermal expansion coefficient (6.0 ppm / ° C. to 8.0 ppm / ° C .: room temperature to 800 ° C.) of a frame-shaped insulator made of an aluminum oxide sintered body, a glass ceramic sintered body, or the like attached to the upper surface of the substrate. ), The stress generated by the difference in the linear thermal expansion coefficient of the two acts on the joint interface between the two, and the stress causes cracks in the joint interface, or in severe cases, peeling occurs at the joint interface between the two. Or, because the reliability of the hermetic sealing of the semiconductor element housing package is impaired, a problem occurs that the semiconductor element housed inside cannot be reliably and normally operated. The coefficient of linear thermal expansion of the substrate should be close to the coefficient of linear thermal expansion of the frame-shaped insulator, and the content of copper in the substrate is 10 to 25% by weight (when the substrate is made of copper-tungsten alloy). 10 to 25% by weight the content of copper,
When the copper-molybdenum alloy is used, the copper content is limited to the range of 10 to 20% by weight, and the thermal conductivity of the substrate is about 180 W / mK at the maximum.

Therefore, in the conventional package for accommodating semiconductor elements, the density and the degree of integration have greatly increased in recent years, and when a semiconductor element which generates a large amount of heat during operation is accommodated, the heat generated during operation of the semiconductor element is The semiconductor element cannot be completely diffused to the outside, and as a result, the semiconductor element becomes high temperature due to the heat generated by the element itself, causing thermal damage to the semiconductor element or causing a variation in characteristics to operate stably. It had the drawback of not being able to.

The present invention has been devised in view of the above-mentioned drawbacks, and its purpose is to increase the density and integration of semiconductor elements, to keep semiconductor elements that generate a large amount of heat during operation at an appropriate temperature, and to keep the semiconductor elements long. It is to propose a package for housing a semiconductor element, which can function stably over a period of time.

[0008]

According to the present invention, there is provided a base having a mounting portion on which a semiconductor element is mounted, and a frame-shaped insulating member attached to the upper surface of the base and surrounding the mounting portion. A semiconductor element housing package comprising a body and a lid body attached to the frame-shaped insulator to hermetically seal the inside of the frame-shaped insulator, wherein the frame-shaped insulator has a linear thermal expansion coefficient. Is 6.0 ppm /
C. to 8.0 ppm / .degree. C. (room temperature to 800.degree. C.), and the substrate is made of tungsten and copper. Tungsten is 75 to 90% by weight and copper is 1%.
It is characterized by having a three-layer structure in which an upper layer and a lower layer of 30 to 60% by weight of tungsten and 40 to 70% by weight of copper are disposed on both upper and lower surfaces of an intermediate layer of 0 to 25% by weight. is there.

Further, according to the present invention, there is provided a base having a mounting portion on which a semiconductor element is mounted, and the base being attached to the upper surface of the base.
A package for storing a semiconductor element, comprising a frame-shaped insulator surrounding the mounting portion, and a lid attached to the frame-shaped insulator to hermetically seal the inside of the frame-shaped insulator. The frame-shaped insulator has a coefficient of linear thermal expansion of 6.0 ppm / ° C. to 8.0.
ppm / ° C. (room temperature to 800 ° C.), and the substrate is molybdenum and copper. Molybdenum is 80 to 90% by weight and copper is 10 to 20% by weight.
35 to 55 molybdenum is formed on both upper and lower surfaces of the intermediate layer consisting of
It is characterized by having a three-layer structure in which upper and lower layers composed of 45% by weight of copper and 45 to 65% by weight of copper are arranged.

According to the package for accommodating semiconductor elements of the present invention, the base is an intermediate layer consisting of 75 to 90% by weight of tungsten and 10 to 25% by weight of copper. 40 to 70% by weight
A three-layered structure in which upper and lower layers are composed of 80 to 90% by weight of molybdenum and 35 to 55% by weight of molybdenum on both upper and lower surfaces of an intermediate layer of 10 to 20% by weight of copper,
Since the upper and lower layers, which are the semiconductor element mounting portion of the base, have a high thermal conductivity of 250 W / m · K or more, the base has a high thermal conductivity of 250 W / m · K or more. Even if the semiconductor element mounted on the substrate emits a large amount of heat during operation, the heat is quickly spread in the plane direction of the semiconductor element mounting portion of the substrate, and the heat is efficiently transmitted to the outside through the upper layer, the intermediate layer and the lower layer of the substrate in sequence. It is possible to dissipate well and surely, whereby the semiconductor element is always kept at an appropriate temperature, and it becomes possible to operate the semiconductor element stably and normally for a long period of time.

According to the package for accommodating a semiconductor element of the present invention, the base is made of 75 to 90% by weight of tungsten,
A three-layer structure in which an upper layer and a lower layer each containing 30 to 60% by weight of tungsten and 40 to 70% by weight of copper are provided on both upper and lower surfaces of an intermediate layer of 10 to 25% by weight of copper, or 80 to 90% by weight of molybdenum, An upper and lower layer of molybdenum of 35 to 55% by weight and copper of 45 to 65% by weight is provided on both upper and lower surfaces of an intermediate layer of 10 to 20% by weight of copper. 3
It has a layered structure, and an intermediate layer having a small linear thermal expansion coefficient is sandwiched between upper and lower layers having a large linear thermal expansion coefficient, and the linear thermal expansion coefficient of the entire substrate is approximately 6.0 ppm which approximates the linear thermal expansion coefficient of the frame-shaped insulator.
/ ° C to 8.0 ppm / ° C (room temperature to 800 ° C), heat is applied to both the base and the frame-shaped insulator when attaching the frame-shaped insulator to the base or when the semiconductor element is operated. Does not cause a large thermal stress between the substrate and the frame-shaped insulator due to the difference in linear thermal expansion coefficient between the two, the air-tight sealing of the space containing the semiconductor element Is always complete, and the semiconductor element can be operated stably and normally.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will now be described in detail with reference to the embodiments shown in the accompanying drawings. FIG. 1 is a sectional view showing an embodiment of a package for housing a semiconductor device of the present invention. In FIG. 1, 1 is a base, 2 is a frame-shaped insulator, and 3 is a lid. The base 1, the frame-shaped insulator 2 and the lid 3 constitute a container 5 that hermetically houses the semiconductor element 4 therein.

The base 1 has a mounting portion 1a on which the semiconductor element 4 is mounted, and the mounting portion 1 on which the semiconductor element 4 provided on the upper surface of the base 1 is mounted on the outer peripheral portion of the upper surface.
The frame-shaped insulator 2 is attached so as to surround a through an adhesive such as a brazing material, glass, or resin.

The substrate 1 acts as a support member for supporting the semiconductor element 4, and also absorbs heat generated by the semiconductor element 4 during operation and dissipates it efficiently into the atmosphere to keep the semiconductor element 4 at an appropriate temperature. The semiconductor element 4 is fixed on the mounting portion 1a of the base 1 surrounded by the frame-shaped insulator 2 with an adhesive such as glass, resin, or brazing material.

The substrate 1 is made of tungsten and copper, and is manufactured by impregnating molten copper into the pores of a sintered porous body obtained by firing tungsten powder.

Further, on the outer peripheral portion of the upper surface of the base body 1, the base body 1 is provided.
The frame-shaped insulator 2 is attached via an adhesive such as a brazing material, glass, or resin so as to surround the mounting portion 1a on which the semiconductor element 4 mounted on the upper surface of the base 1 is mounted. With the frame-shaped insulator 2, a space for housing the semiconductor element 4 is formed inside.

The frame-shaped insulator 2 attached to the base 1 is made of an aluminum oxide sintered body, a glass ceramic sintered body, or the like and has a linear thermal expansion coefficient of 6.0 ppm / ° C. to 8.0 ppm / ° C. (room temperature to 800 ° C.). ℃) electrical insulating ceramics,
For example, in the case of an aluminum oxide sintered body, a suitable organic binder, a plasticizer, and a solvent are added to and mixed with a raw material powder of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, etc. to form a slurry and the slurry. A ceramic green sheet (ceramic green sheet) is formed by adopting the conventionally well-known doctor blade method or calendar roll method, and then the ceramic green sheet is subjected to appropriate punching processing to form a predetermined shape and necessary. Accordingly, a plurality of sheets are laminated to form a molded body, which is then fired at a temperature of 1600 ° C. When it is made of a glass-ceramic sintered body, an appropriate organic binder, a solvent, etc. are added to and mixed with a raw material powder made of glass powder such as borosilicate glass and ceramic powder such as aluminum oxide to form a sludge. A ceramic green sheet (ceramic green sheet) is formed by adopting a doctor blade method or a calendar roll method to this sludge, and then the ceramic green sheet is subjected to an appropriate punching process to form a predetermined shape. If necessary, a plurality of sheets may be laminated to form a molded body, which is then fired at a temperature of about 900 ° C.

A plurality of wiring layers 6 extending from the inner peripheral portion to the upper surface of the frame-shaped insulator 2 are adhered and formed, and one end of the wiring layer 6 exposed at the inner peripheral portion of the frame-shaped insulator 2 is adhered. The electrodes of the semiconductor element 4 are electrically connected to each other via the bonding wires 7, and the external lead pins 8 connected to an external electric circuit are connected to an external electric circuit at a portion led out to the upper surface of the frame-shaped insulator 2. It is attached by brazing through the brazing material.

The wiring layer 6 acts as a conductive path when connecting each electrode of the semiconductor element 4 to an external electric circuit, and is made of metal powder such as tungsten, molybdenum, manganese, copper, silver or the like.

The wiring layer 6 is a ceramic green sheet which becomes a frame-shaped insulator 2 with a metal paste obtained by adding and mixing an appropriate organic binder, a solvent and the like to a metal powder such as tungsten, molybdenum, manganese, copper and silver. Then, by printing and applying a predetermined pattern by using a printing method such as a conventionally known screen printing method, the frame-shaped insulator 2 is adhered and formed from the inner peripheral portion to the upper surface.

The wiring layer 6 is formed by depositing a metal such as nickel or gold, which has excellent corrosion resistance and wettability with a brazing material, to a thickness of 1 to 20 μm by a plating method. It is possible to effectively prevent oxidative corrosion of the wiring layer 6 and to firmly attach the external lead pin 8, and the wiring layer 6 has excellent corrosion resistance against nickel, gold, etc. on its exposed surface, In addition, it is preferable to deposit a metal having excellent wettability with the brazing material to a thickness of 1 μm to 20 μm.

External lead pins 8 are brazed and attached to the wiring layer 6 through a brazing material such as silver brazing, and the external lead pins 8 connect the electrodes of the semiconductor element housed inside the container 5 to the external electrical connection. It acts to electrically connect to the circuit,
By connecting the external lead pin 8 to an external electric circuit, the semiconductor element 4 housed inside the container 5 is electrically connected to the external electric circuit via the wiring layer 6 and the external lead pin 8.

The external lead pin 8 is made of a metal material such as iron-nickel-cobalt alloy or iron-nickel alloy.
For example, an ingot (lump) made of a metal such as an iron-nickel-cobalt alloy is formed into a predetermined shape by subjecting a conventionally known metal working method such as a rolling working method or a punching working method.

In the package for accommodating semiconductor elements of the present invention, the base 1 is 30 to 60% by weight of tungsten on the upper and lower surfaces of the intermediate layer 1c composed of 75 to 90% by weight of tungsten and 10 to 25% by weight of copper, It is important to have a three-layer structure in which upper and lower layers 1b and 1d composed of 40 to 70% by weight of copper are arranged.

The substrate 1 is made of 75 to 90 tungsten.
30% to 60% by weight of tungsten and 4% of copper on the upper and lower surfaces of the intermediate layer 1c composed of 10% by weight to 10% to 25% by weight of copper.
Upper and lower layers 1b and 1d consisting of 0 to 70% by weight 3
Due to the layered structure, the upper layer 1b, which is the semiconductor element mounting portion 1a of the base 1, has a high thermal conductivity of 250 W / m · K or more, and a large amount of the semiconductor elements 4 mounted on the base 1 are activated during operation. Even if the heat is generated, the heat is quickly spread in the plane direction of the semiconductor element mounting portion 1a of the substrate 1 and efficiently and surely dissipated to the outside through the upper layer 1b, the intermediate layer 1c, and the lower layer 1d of the substrate 1 sequentially. As a result, the semiconductor element 4 is always kept at an appropriate temperature, and the semiconductor element 4 can be stably and normally operated for a long period of time.

The substrate 1 is an intermediate layer 1 composed of 75 to 90% by weight of tungsten and 10 to 25% by weight of copper.
It has a three-layer structure in which upper and lower layers 1b and 1d composed of 30 to 60% by weight of tungsten and 40 to 70% by weight of copper are arranged on both upper and lower sides of c, and the intermediate layer 1c having a small linear thermal expansion coefficient is formed. Sandwiched between the upper and lower layers 1b and 1d having a large thickness, and the linear thermal expansion coefficient of the entire substrate 1 is approximately 6.0 ppm / ° C to 8.0 ppm / ° C (room temperature to 800 ° C) which approximates the linear thermal expansion coefficient of the frame-shaped insulator 2. Therefore, even if heat is applied to both the base 1 and the frame-shaped insulator 2 when the frame-shaped insulator 2 is attached to the base 1 or when the semiconductor element 4 is operated, the base 1 and the frame-shaped insulation 2 Large thermal stress due to the difference in linear thermal expansion coefficient between the two does not occur between the body 2 and the body 2 and the space for accommodating the semiconductor element 4 is always completely hermetically sealed. Can be operated stably and normally

The substrate 1 has an intermediate layer 1c in which the amount of tungsten is less than 75% by weight, or 90% by weight.
If it exceeds, the coefficient of linear thermal expansion of the base body 1 greatly differs from the coefficient of linear thermal expansion of the frame-shaped insulator 2, and as a result, the frame-shaped insulator 2 is firmly attached to the base body 1. I can't keep it. Therefore, the intermediate layer 1c of the substrate 1 has an amount of tungsten of 75 to 9 to form it.
It is specified in the range of 0% by weight.

When the amount of tungsten in the upper and lower layers 1b and 1d is less than 30% by weight, in other words, copper is 70%.
If it exceeds 5% by weight, the linear thermal expansion coefficient of the substrate 1 is greatly different from the linear thermal expansion coefficient of the frame-shaped insulator 2 and the frame-shaped insulator 2 cannot be firmly attached to the substrate 1. If the amount of tungsten exceeds 60% by weight,
In other words, when the copper content is less than 40% by weight, the upper and lower layers 1b,
When the thermal conductivity of 1d cannot be made as high as 250 W / m · K or more and the semiconductor element 4 generates a large amount of heat during operation, the heat is completely dissipated to the outside through the substrate 1. As a result, the semiconductor element 4 is heated to a high temperature to cause thermal damage to the semiconductor element 4, and variations in characteristics occur, and stable operation cannot be performed. Therefore, the upper and lower layers 1b and 1d of the substrate 1 are made of 30 to 60% by weight of tungsten and 40 to 70% by weight of copper.
Specified in.

When the upper and lower layers 1b and 1d are formed to have substantially the same composition and thickness, the stress generated between the upper layer 1b and the intermediate layer 1c and the stress generated between the lower layer 1d and the intermediate layer 1c. Are canceled out, and the flatness of the substrate 1 is improved. As a result, the frame-shaped insulator 2 can be bonded to the substrate 1 extremely strongly, and the reliability of the hermetic sealing of the container 5 is further ensured. 5 The operation reliability of the semiconductor element 4 housed inside 5 can be made stable and reliable.

Furthermore, the upper and lower layers 1b and 1d and the intermediate layer 1
c is the thickness of the upper and lower layers 1b and 1d, and X is the thickness of the intermediate layer 1.
When the thickness of c is Y, the heat generated by the semiconductor element 4 via the base 1 can be radiated to the outside better by setting the range of 0.5Y ≦ X ≦ Y. The upper and lower layers 1b,
When the thickness of 1d is X and the thickness of the intermediate layer 1c is Y,
If 0.5Y> X, the upper and lower layers 1b and 1d having a high thermal conductivity of 250 W / m · K or more become thin, and there is a risk that the heat generated by the semiconductor element 4 cannot be efficiently dissipated to the outside. When <X, the influence on the entire upper and lower base bodies 1 having a large linear thermal expansion coefficient becomes large, and it becomes difficult to approximate the linear thermal expansion coefficient of the base body 1 to the linear thermal expansion coefficient of the frame-shaped insulator 2. Since there is a risk, the thickness of the upper and lower layers 1b, 1d and the intermediate layer 1c is
When the thickness of 1d is X and the thickness of the intermediate layer 1c is Y,
The range of 0.5Y ≦ X ≦ Y is desirable.

The substrate 1 having the three-layer structure is the intermediate layer 1c.
A plate body having a predetermined thickness obtained by impregnating a predetermined amount of tungsten sintered body with a predetermined amount of copper, and a predetermined thickness obtained by impregnating a predetermined amount of tungsten sintered body serving as the upper and lower layers 1b and 1d with a predetermined amount of copper. And the upper and lower plates of the intermediate layer 1c are sandwiched between the upper and lower plates, and then in a vacuum or in a medium at a temperature about 20 ° C. higher than the melting temperature of copper (1083 ° C.). It is manufactured by stacking under pressure in a reducing atmosphere.

Thus, according to the above-mentioned package for housing a semiconductor element, the semiconductor element 4 is adhered and fixed onto the semiconductor element mounting portion 1a of the base body 1 via an adhesive such as glass, resin, or brazing material, and the semiconductor element is mounted. Each electrode 4 is connected to a predetermined wiring layer 6 through a bonding wire 7, and then the lid 3 is attached to the upper surface of the frame-shaped insulator 2 with glass, resin,
A semiconductor device as a product is obtained by airtightly housing the semiconductor element 4 inside a container 5 made up of a base body 1, a frame-shaped insulator 2 and a lid body 3 by joining them through a sealing material made of a brazing material or the like. .

Next, another embodiment of the present invention will be described.

In the above-mentioned package for accommodating semiconductor elements, the base 1 is 30 to 60% by weight of tungsten and 40 to 40% of copper on the upper and lower surfaces of the intermediate layer 1c consisting of 75 to 90% by weight of tungsten and 10 to 25% by weight of copper. A three-layer structure in which upper and lower layers 1b and 1d made of 70% by weight are arranged is used, and this is 80 to 90% by weight of molybdenum and 10 to 2 of copper.
A three-layer structure in which upper and lower layers 1b and 1d composed of 35 to 55% by weight of molybdenum and 45 to 65% by weight of copper may be disposed on the upper and lower surfaces of the intermediate layer 1c of 0% by weight, respectively.

The substrate 1 comprises an intermediate layer 1c comprising 80 to 90% by weight of molybdenum and 10 to 20% by weight of copper, and upper and lower surfaces of the intermediate layer 1c comprising 35 to 55% by weight of molybdenum and 45 to 65% by weight of copper. In the case of a three-layer structure in which 1b and 1d are arranged, the upper layer 1b which is the semiconductor element mounting portion 1a of the base 1 has a high thermal conductivity of 250 W / m · K or more and is mounted on the base 1. Even if the semiconductor element 4 generates a large amount of heat during operation, the heat is quickly spread in the plane direction of the semiconductor element mounting portion 1a of the base 1 and the upper layer 1b, the intermediate layer 1c, and the lower layer 1d of the base 1 are sequentially passed through the outside. Therefore, the semiconductor element 4 is always kept at an appropriate temperature, and the semiconductor element 4 can be stably and normally operated for a long period of time.

Further, on the upper and lower surfaces of the intermediate layer 1c composed of 80 to 90% by weight of molybdenum and 10 to 20% by weight of copper, upper and lower layers 1b of 35 to 55% by weight of molybdenum and 45 to 65% by weight of copper, In the base 1 having a three-layer structure in which 1d is arranged, the intermediate layer 1c having a small linear thermal expansion coefficient is sandwiched between the upper and lower layers 1b and 1d having a large linear thermal expansion coefficient, and the linear thermal expansion coefficient of the entire base 1 is set to the frame-shaped insulator 2. 6.0 ppm / ° C. to 8.0 ppm / ° C. (room temperature to 80
Since the temperature is 0 ° C.), when the frame-shaped insulator 2 is attached onto the substrate 1 or when the semiconductor element 4 operates, the substrate 1
Even if heat is applied to both the frame-shaped insulator 2 and the frame-shaped insulator 2, a large thermal stress due to the difference in linear thermal expansion coefficient between the substrate 1 and the frame-shaped insulator 2 does not occur. As a result, the airtight sealing of the space containing the semiconductor element 4 is always perfect, and the semiconductor element 4 can be operated stably and normally.

When the amount of molybdenum in the intermediate layer 1c of the substrate 1 is less than 80% by weight or more than 90% by weight, the linear thermal expansion coefficient of the substrate 1 is linear thermal expansion of the frame-shaped insulator 2. This greatly differs from the coefficient, and as a result, the frame-shaped insulator 2 cannot be firmly attached to the base body 1. Therefore, the amount of molybdenum forming the intermediate layer 1c of the substrate 1 is specified in the range of 80 to 90% by weight.

When the amount of molybdenum in the upper and lower layers 1b and 1d is less than 35% by weight, in other words, when the amount of copper exceeds 65% by weight, the coefficient of linear thermal expansion of the substrate 1 is the frame-shaped insulator 2.
It is not possible to firmly attach the frame-shaped insulator 2 to the substrate 1 due to a large difference with respect to the linear thermal expansion coefficient of the above, and when the amount of molybdenum exceeds 55% by weight, in other words, copper is When it is less than 45% by weight, the upper and lower layers 1b, 1d
When the semiconductor element 4 emits a large amount of heat during operation, the heat conductivity cannot be as high as 250 W / m · K or more, and the heat is completely dissipated to the outside through the substrate 1. As a result, the semiconductor element 4 is heated to a high temperature to cause thermal damage to the semiconductor element 4, and variations in characteristics occur, and stable operation cannot be achieved. Therefore, the upper and lower layers 1b and 1d of the base 1 are specified to have 35 to 55% by weight of molybdenum and 45 to 65% by weight of copper.

Further, if the upper and lower layers 1b and 1d are formed to have substantially the same composition and thickness, the stress generated between the upper layer 1b and the intermediate layer 1c and the stress generated between the lower layer 1d and the intermediate layer 1c. Are canceled out, and the flatness of the substrate 1 is improved. As a result, the frame-shaped insulator 2 can be bonded to the substrate 1 extremely strongly, and the reliability of the hermetic sealing of the container 5 is further ensured. 5 The operation reliability of the semiconductor element 4 housed inside 5 can be made stable and reliable.

Furthermore, the upper and lower layers 1b and 1d and the intermediate layer 1
c is the thickness of the upper and lower layers 1b and 1d, and X is the thickness of the intermediate layer 1.
When the thickness of c is Y, the heat generated by the semiconductor element 4 via the base 1 can be radiated to the outside better by setting the range of 0.5Y ≦ X ≦ Y. The upper and lower layers 1b,
When the thickness of 1d is X and the thickness of the intermediate layer 1c is Y,
If 0.5Y> X, the upper and lower layers 1b and 1d having a high thermal conductivity of 250 W / m · K or more become thin, and there is a risk that the heat generated by the semiconductor element 4 cannot be efficiently dissipated to the outside. When <X, the influence on the entire upper and lower base bodies 1 having a large linear thermal expansion coefficient becomes large, and it becomes difficult to approximate the linear thermal expansion coefficient of the base body 1 to the linear thermal expansion coefficient of the frame-shaped insulator 2. Since there is a risk, the thickness of the upper and lower layers 1b, 1d and the intermediate layer 1c is
When the thickness of 1d is X and the thickness of the intermediate layer 1c is Y,
The range of 0.5Y ≦ X ≦ Y is desirable.

The substrate 1 having the three-layer structure is the intermediate layer 1c.
A plate body having a predetermined thickness obtained by impregnating a predetermined amount of molybdenum sintered body with a predetermined amount of copper and a predetermined thickness obtained by impregnating a predetermined amount of molybdenum sintered body serving as the upper and lower layers 1b and 1d with a predetermined amount of copper. And the upper and lower plates of the intermediate layer are sandwiched by the plate layers of the upper and lower layers, and then the melting temperature of copper (1083
In vacuum or at a temperature about 20 ° C higher than
It is manufactured by stacking under pressure in a reducing atmosphere.

The present invention is not limited to the above-mentioned embodiments, but various modifications can be made without departing from the gist of the present invention.

[0043]

According to the package for accommodating semiconductor elements of the present invention, the base is an intermediate layer consisting of 75 to 90% by weight of tungsten and 10 to 25% by weight of copper, and 30 to 60% by weight of tungsten is formed on both upper and lower surfaces of the intermediate layer. A three-layer structure in which upper and lower layers of copper are 40 to 70% by weight, or 35 to 55% by weight of molybdenum on both upper and lower surfaces of an intermediate layer of 80 to 90% by weight of molybdenum and 10 to 20% by weight of copper, Top and bottom layers consisting of 45 to 65% by weight of copper 3
Due to the layered structure, the upper layer, which is the semiconductor element mounting portion of the base, has a high thermal conductivity of 250 W / m · K or more, and the semiconductor element mounted on the base emits a large amount of heat during operation. Even so, the heat is quickly spread in the plane direction of the semiconductor element mounting portion of the base, and the upper layer, intermediate layer,
It is possible to efficiently and reliably dissipate the light to the outside through the lower layer in order, whereby the semiconductor element is always kept at an appropriate temperature, and the semiconductor element can be stably and normally operated for a long period of time.

According to the package for accommodating semiconductor elements of the present invention, the base is made of 75 to 90% by weight of tungsten,
A three-layer structure in which an upper layer and a lower layer each containing 30 to 60% by weight of tungsten and 40 to 70% by weight of copper are provided on both upper and lower surfaces of an intermediate layer of 10 to 25% by weight of copper, or 80 to 90% by weight of molybdenum, An upper and lower layer of molybdenum of 35 to 55% by weight and copper of 45 to 65% by weight is provided on both upper and lower surfaces of an intermediate layer of 10 to 20% by weight of copper. 3
It has a layered structure, and an intermediate layer having a small linear thermal expansion coefficient is sandwiched between upper and lower layers having a large linear thermal expansion coefficient, and the linear thermal expansion coefficient of the entire substrate is approximately 6.0 ppm which approximates the linear thermal expansion coefficient of the frame-shaped insulator.
/ ° C to 8.0 ppm / ° C (room temperature to 800 ° C), heat is applied to both the base and the frame-shaped insulator when attaching the frame-shaped insulator to the base or when the semiconductor element is operated. Does not cause a large thermal stress between the substrate and the frame-shaped insulator due to the difference in linear thermal expansion coefficient between the two, the air-tight sealing of the space containing the semiconductor element Is always complete, and the semiconductor element can be operated stably and normally.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor element housing package of the present invention.

[Explanation of symbols] 1 ... Base 1a ... ・ Mounting part 1b ... upper layer 1c ... Middle layer 1d ... Lower layer 2 ... Frame-shaped insulator 3 ... Lid 4 ... Semiconductor element 5 ... Container 6 ... Wiring layer 7 ... Bonding wire 8: External lead pin

Claims (2)

[Claims] 1. A base having a mounting portion on which a semiconductor element is mounted, a frame-shaped insulator attached to the upper surface of the base and surrounding the mounting portion, and the frame-shaped insulator. A package for housing a semiconductor element, which is attached to the top of the frame-shaped insulator and hermetically seals the inside of the frame-shaped insulator, wherein the frame-shaped insulator has a coefficient of linear thermal expansion of 6.0 ppm / ° C to 8 ppm. 0.0 ppm / ° C. (room temperature to 800 ° C.) ceramics, the substrate is made of tungsten and copper, and tungsten is formed on both upper and lower surfaces of an intermediate layer made of 75 to 90% by weight of tungsten and 10 to 25% by weight of copper. Is a 30 to 60% by weight and copper is 40 to 70% by weight, and has a three-layer structure in which upper and lower layers are arranged. 2. A base body having a mounting portion on which a semiconductor element is mounted, a frame-shaped insulator attached to the upper surface of the base body and surrounding the mounting portion, and the frame-shaped insulator. A package for housing a semiconductor element, which is attached to the top of the frame-shaped insulator and hermetically seals the inside of the frame-shaped insulator, wherein the frame-shaped insulator has a coefficient of linear thermal expansion of 6.0 ppm / ° C to 8 ppm. 0.0 ppm / ° C. (room temperature to 800 ° C.) ceramics, and the base body is made of molybdenum and copper.
It has a three-layer structure in which upper and lower layers of molybdenum of 35 to 55% by weight and copper of 45 to 65% by weight are arranged on both upper and lower surfaces of an intermediate layer of 0% by weight and 10 to 20% by weight of copper. A package for semiconductor device storage characterized by.