JP2003037173A - Analog/digital hybrid integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To control a noise caused in an analog circuit, especially a high frequency circuit, and reduce a loss on a transmission line. SOLUTION: Digital circuits, such as an A/D converter 7 and a D/A converter 9, are located on an approximately central portion of an IC chip 20, thereby, a join noise and loss resulted on wiring do not occur much even if wiring which is provided from a pad 23 located on a surrounding portion of the IC chip 20 to the digital circuit on the approximately central portion is long. Moreover, the analog circuits of a RF circuit 21 and IF circuit 22 are located on the surrounding portion of the IC chip 20, thereby, wiring from the pad 23 to the analog circuit is short, then, the join noise and loss resulted on the wiring can be controlled less, and an impedance of a connection with a power supply line and grounding line 24 becomes small, then, a power supply can be carried out at low noise and small loss.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital mixed integrated circuit in which an analog circuit and a digital circuit are integrated on one semiconductor chip.

[0002]

2. Description of the Related Art In recent years, mobile phone devices and PDAs (Personal)
Digital Assistants), entertainment equipment such as radio receivers, digital cameras, game machines, home appliances such as air conditioners and refrigerators, vending machines, factory manufacturing equipment, measuring equipment, car navigation systems and other in-vehicle equipment, office equipment Many electronic devices have a built-in communication means and are used as network terminals.

In such a network environment,
Wireless communication enables "anytime, anywhere, with anyone" communication. The means for wireless communication include
In addition to mobile phone devices and PDAs, there are short distance wireless data communication technology such as Bluetooth and wireless LAN using 5 GHz band.

It is a prerequisite that these wireless communication terminals can be easily carried. Therefore, small size, light weight, and low power consumption are strongly required. Generally, wireless communication terminals tend to be multifunctional and highly functional. Nevertheless, the equipment as a whole is required to be small, lightweight, and low in power consumption. Therefore, further miniaturization, light weight, thinness, and low power consumption are required for the wireless communication function built into the device.

Against this background, multi-functionalization, high integration, and high density of semiconductor integrated circuits are being rapidly advanced. 1 wireless circuit including passive components such as capacitors
Attempts have been made to make chips or one module. Recently, conventionally, analog LSI and digital LSI
The analog and digital mixed LSI
As a result, development is underway to integrate them into one.

For example, a radio circuit (analog circuit) for transmitting and receiving an analog signal and a PLL (Phase Locked L)
oop) A synthesizer circuit (digital circuit) and a baseband signal processing circuit (digital circuit) for digitally processing a signal to be transmitted and received are integrated into one chip or one module.

[0007]

In a highly integrated and highly integrated semiconductor integrated circuit, parasitic capacitance or parasitic inductance is generated between wirings or between components, which causes coupling noise. Radio communication terminals such as radio receivers, mobile phone devices, Bluetooth, and wireless LANs use extremely high frequency bands. At higher frequencies, all parasitic capacitance components begin to form a coupling noise transfer path. Further, the high frequency current flowing through the wiring generates a magnetic field. As a result, dielectric coupling noise becomes apparent.

Further, as the frequency becomes higher, the effective impedance becomes higher and noise is more likely to be picked up. The loss on the transmission line also becomes very large. For example, in the high-frequency signal receiving section, if there is a loss in the high-frequency circuit portion near the entrance of the radio wave, the receiving sensitivity will decrease, and recovery will not be possible no matter how much the gain is increased in the circuits thereafter. Further, in the high frequency signal transmission section, if there is a loss in the high frequency circuit portion near the outlet of the radio wave handling a large amount of power, not only the high frequency power is converted into heat and wasted, but also due to temperature rise It may also cause a breakdown.

Further, in the analog / digital mixed integrated circuit, the analog circuit and the digital circuit are arranged closer to each other as compared with the case where the analog circuit and the digital circuit are formed on different chips. Therefore, large noise of the digital circuit often enters the high-sensitivity analog circuit. In this case, the characteristics of the analog signal are greatly deteriorated. Therefore, how to reduce such coupling noise between the analog circuit and the digital circuit is very important.

The present invention has been made in view of the above circumstances, and it is possible to suppress noise generated in an analog circuit, particularly a high frequency circuit, and to reduce loss on a transmission line. The purpose is to do.
It is another object of the present invention to prevent the inconvenience that the analog circuit receives digital noise from the digital circuit and the quality of the analog signal deteriorates.

[0011]

SUMMARY OF THE INVENTION An analog / digital mixed integrated circuit of the present invention is an analog / digital mixed integrated circuit in which an analog circuit for processing a signal in a desired frequency band and a digital circuit are mixedly mounted on the same semiconductor chip. A circuit, characterized in that a circuit that operates according to a clock is arranged in a substantially central portion of the semiconductor chip.

According to another aspect of the present invention, the circuit that operates according to the clock is a circuit that operates intermittently according to the clock.

In another aspect of the present invention, the circuit operating according to the clock is any one of a D / A converter, an A / D converter, a PLL circuit, a baseband signal processing circuit, or a combination thereof. .

According to another aspect of the present invention, there is provided an analog / digital mixed integrated circuit in which an analog circuit for performing processing on a signal in a desired frequency band and a digital circuit are mixedly mounted on the same semiconductor chip. It is characterized in that a circuit which operates according to a clock having a period long enough to operate the analog circuit between the edges is arranged in substantially the central portion.

In another aspect of the present invention, the analog circuit is arranged in the peripheral portion of the semiconductor chip.

According to another aspect of the present invention, there is provided an analog / digital mixed integrated circuit in which an analog circuit for performing processing on a signal in a desired frequency band and a digital circuit are mixedly mounted on the same semiconductor chip. The analog circuit is arranged in the peripheral portion.

According to another aspect of the present invention, the analog circuit arranged in the peripheral portion of the semiconductor chip is a high frequency circuit for performing processing on a high frequency signal in a desired frequency band.

Since the present invention comprises the above technical means, the wiring length from the pad provided in the peripheral portion of the semiconductor chip to the circuit provided in the substantially central portion of the semiconductor chip is long, but it is arranged in the approximately central portion. Since the circuit is a digital circuit, it is possible to reduce the problems of coupling noise generated on the wiring and loss on the wiring, as compared with the case where the wiring length to the analog circuit, especially to the high frequency circuit becomes long.

According to another feature of the present invention, the circuit arranged substantially in the center of the semiconductor chip is a circuit which operates intermittently in accordance with a clock, so that, for example, when the circuit is not operating, the analog circuit is in operation. Can be operated,
It is also possible to reduce the coupling noise between the analog circuit and the circuit.

According to another aspect of the present invention, the circuit arranged substantially in the center of the semiconductor chip operates in accordance with a clock having a long cycle, so that a transient state change occurs in the transistor at the edge of the clock. It is possible to operate the analog circuit while the clock is stable without operating the analog circuit while the noise occurs, and it is possible to suppress the inconvenience that switching noise due to the clock is superimposed on the signal in the analog circuit. Becomes

According to another feature of the present invention, since the analog circuit, especially the high frequency circuit is arranged in the peripheral portion of the semiconductor chip, the wiring length from the pad provided in the peripheral portion of the semiconductor chip to the analog circuit is shortened. It is possible to suppress the coupling noise generated on the wiring and the loss on the wiring. Further, the impedance of the connection to the power supply line and the ground line can be reduced, and the power supply with low noise and low loss can be performed.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram illustrating a configuration example of a wireless communication device.

The radio communication apparatus shown in FIG.
Antenna switch 2, high frequency amplification circuit 3, mixing circuit (mixer) 4, local oscillation circuit (OSC) 5, intermediate frequency amplification circuit 6, A / D converter 7, baseband signal processing circuit 8,
D / A converter 9, intermediate frequency amplifier circuit 10, mixing circuit 1
1, power amplifier 12 and audio signal processing circuit 1
3 is included.

The high frequency amplifier circuit 3 inputs the radio wave received by the antenna 1 through the antenna switch 2 and selectively amplifies a high frequency signal in a specific frequency band. Mixing circuit 4
And the local oscillator circuit 5 constitutes a frequency converter,
The carrier wave signal of frequency f _C output from the high frequency amplifier circuit 3 and the local oscillation signal of frequency f _L output from the local oscillation circuit 5 are mixed, and frequency conversion is performed without changing the modulation content, and f _L − An intermediate frequency signal of f _C is generated and output.

The intermediate frequency increasing circuit 6 amplifies the intermediate frequency signal passed through the mixing circuit 4. The A / D converter 7 converts the analog intermediate frequency signal output from the intermediate frequency increasing circuit 6 into digital data, and outputs the result to the baseband signal processing circuit 8. The baseband signal processing circuit 8 is
Audio CODEC (Coder-Decoder), DSP (DigitalSi)
gnal Processor), memory, etc., and is configured to perform digital data processing such as baseband modulation and error correction. The audio signal processing circuit 13 performs various kinds of processing regarding audio signals.

The D / A converter 9 D / A converts the digital data generated by the baseband signal processing circuit 8. The intermediate frequency increasing circuit 10 amplifies the analog intermediate frequency signal output from the D / A converter 9. Mixing circuit 11
And the local oscillator circuit 5 constitutes a frequency converter,
The intermediate frequency signal output from the intermediate frequency circuit 10 is frequency-converted without changing the modulation content to generate and output a high-frequency signal.

The power amplifier 12 amplifies the high frequency signal of a specific frequency band that has passed through the mixing circuit 11. The amplified high frequency signal is transmitted from the antenna 1 via the antenna switch 2.

In the above radio communication device, the high frequency amplifier circuit 3, the mixing circuit 4, the local oscillation circuit 5, the mixing circuit 11,
And a power amplifier 12 for a high frequency circuit (Radio Freq
uency: RF circuit). Moreover, the intermediate frequency circuit (Intermediate Frequency
ency: IF circuit).

FIG. 2 is a diagram showing a layout configuration example of each block in an analog / digital mixed IC chip in which the wireless communication device shown in FIG. 1 is integrated. As shown in FIG. 2, a plurality of pads 23 for data input / output and power supply are provided on the periphery of the IC chip 20.

Inside the plurality of pads 23, there is a core portion in which analog circuits and digital circuits are integrated. An RF circuit 21, an IF circuit 22, an A / D converter 7, a baseband signal processing circuit 8, a D / A converter 9 and an audio signal processing circuit 13 are integrated in the core section. In addition, around the core portion (between the core portion and the pad region), the power supply line and the ground line 24 are arranged so as to make one round around the core portion.

The RF circuit 21 includes the high frequency amplifier circuit 3, the mixing circuit 4, the local oscillation circuit 5, the mixing circuit 11 and the power amplifier 12 shown in FIG. In addition, the IF circuit 22
Includes the intermediate frequency amplifier circuits 6 and 10 shown in FIG. It should be noted that the RF circuit 21 does not necessarily have to have all the above-mentioned configurations. For example, the high frequency amplification circuit 3, the local oscillation circuit 5, the power amplifier 12 and the like may be formed as separate chips.

In this embodiment, the A / D converter 7,
Connect the baseband signal processing circuit 8 and the D / A converter 9 to I
It is arranged at a substantially central portion of the C chip 20. These A /
D converter 7, baseband signal processing circuit 8 and D / A
The converter 9 is a digital circuit that does not always operate according to a high-speed clock, that is, operates intermittently.

Such a digital circuit is used in the IC chip 20.
By arranging it in the substantially central portion of the IC chip 20, the wiring length for power supply and grounding drawn from the pad 23 provided in the peripheral portion of the IC chip 20 to the digital circuit via the power supply line and the grounding wire 24 becomes long. There is also. However, since these circuits are digital circuits that operate in a relatively low frequency region of the baseband, even if the wiring length becomes a little long, the coupling noise generated on the wiring and the loss on the wiring do not become so large.

In the present embodiment, the digital circuit having less problems of noise and loss is arranged in the substantially central portion of the IC chip 20, and the analog circuits such as the RF circuit 21 and the IF circuit 22 are arranged in the peripheral portion of the IC chip 20. It is located in. As a result, the pad 2 provided in the peripheral portion of the IC chip 20
The wiring length from 3 to the analog circuit can be shortened, and the coupling noise generated on the wiring and the loss on the wiring can be reduced. In addition, the power line and the ground line 24
Since the wiring length from the power supply line to the analog circuit can be shortened, the impedance of the connection with the power supply line and the ground line 24 can be reduced, and the power supply with low noise and low loss can be realized.

Further, as described above, the A / D converter 7, the baseband signal processing circuit 8 and the D / A converter 9 arranged substantially in the center of the IC chip 20 operate intermittently according to the clock. It is a digital circuit. Therefore, by operating the analog circuits such as the RF circuit 21 and the IF circuit 22 when these digital circuits are not operating, large digital noise generated in the digital circuits is superimposed on the signals in the analog circuits. Inconvenience can be suppressed.

Further, as shown in FIG. 2, the baseband signal processing circuit 8 is arranged on the opposite side of the RF circuit 21 and the IF circuit 22 with the A / D converter 7 and the D / A converter 9 interposed therebetween. There is. The baseband signal processing circuit 8 is a digital circuit, but if the operating speed is high, it is possible that the high-speed digital signal leaks to the outside as a radio wave and interferes with communication.

However, the baseband signal processing circuit 8 is
It is arranged as far as possible from the analog circuits such as the RF circuit 21 and the IF circuit 22. Therefore, the electromagnetic wave generated in the baseband signal processing circuit 8 is sufficiently attenuated at a rate of 1 / square of the distance before reaching the RF circuit 21 and the IF circuit 22. Therefore, a large amount of digital noise from the baseband signal processing circuit 8 is generated by the RF circuit 21 and I.
It is possible to suppress the superposition on the analog signal handled by the F circuit 22, and it is also possible to reduce the coupling noise between the baseband signal processing circuit 8 and the RF circuit 21 or the IF circuit 22.

In the above embodiment, the IC chip 20 is used.
A / D converter 7 as an example of a circuit arranged in the substantially central part of
Although the baseband signal processing circuit 8 and the D / A converter 9 are mentioned, it is not always necessary to arrange all of them in the substantially central portion. In addition to these, if they are digital circuits that operate according to a clock, those circuits may be used as the IC chip 20.
It is possible to arrange it in the substantially central part of the. For example, PL
You may make it arrange | position an L circuit in a substantially central part.

In the above embodiment, the baseband signal processing circuit 8 is also arranged in the substantially central portion of the IC chip 20, but it may be arranged in the peripheral portion of the IC chip 20. .

In the baseband signal processing circuit 8, there is also a logic section which does not need to operate at the highest clock speed. In the case where the number of analog circuits to be arranged in the peripheral portion of the IC chip 20 increases and it is not possible to arrange all of the baseband signal processing circuit 8 in the peripheral portion, the logic portion is cut out and the central portion of the IC chip 20 is cut out. It may be arranged at.

In the case of such a digital circuit which does not operate at high speed, the operation clock is a clock having a long period with a sufficient length between edges. On the other hand, the main cause of noise in the analog / digital mixed circuit is switching noise caused by a transient state change of a transistor that occurs when switching is performed in synchronization with a clock edge in a digital circuit such as a CMOS inverter.

When the digital circuit arranged in the substantially central portion of the IC chip 20 is a digital circuit which operates according to a clock having a long cycle, while the transistor is in a transient state change at the edge portion of the clock, It is possible to operate the analog circuit in a stable clock state without operating the analog circuit. By doing so, it is possible to suppress the inconvenience that the switching noise in the digital circuit is superimposed on the signal in the analog circuit.

Further, in the above embodiment, the circuit for performing the audio signal processing is shown, but the invention can be applied to the circuit for performing the video signal processing. Further, in the above embodiment, the analog / digital mixed integrated circuit including both the transmitting function and the receiving function has been described, but the present invention is also applied to the analog / digital mixed integrated circuit including only the transmitting function or the receiving function. It is possible.

In addition, the above-described embodiment is merely an example of the embodiment for carrying out the present invention, and the technical scope of the present invention should not be limitedly interpreted by this. Is. That is, the present invention can be implemented in various forms without departing from the spirit or the main features thereof.

[0045]

As described above, according to the present invention,
The wiring length from the peripheral part of the semiconductor chip to the circuit provided in the substantially central part becomes long, but since the circuit arranged in the substantially central part is a digital circuit, compared with the case where the wiring length to the analog circuit becomes long. The problems of coupling noise generated on the wiring and loss on the wiring can be reduced.

According to another aspect of the present invention, the circuit arranged substantially in the center of the semiconductor chip is a digital circuit which operates intermittently in accordance with a clock, so that, for example, when the digital circuit is not operating. Moreover, the analog circuit can be operated, and the coupling noise between the analog circuit and the digital circuit can be reduced.

According to another aspect of the present invention, since the circuit arranged in the substantially central portion of the semiconductor chip is a circuit which operates according to a clock having a long cycle, a transient state change in the transistor occurs at the edge portion of the clock. It is possible to operate the analog circuit in a stable state of the clock without operating the analog circuit while the occurrence of the error occurs, and it is possible to suppress the inconvenience that the switching noise due to the clock is superimposed on the signal in the analog circuit. .

According to another feature of the present invention, since the analog circuit, especially the high frequency circuit is arranged in the peripheral portion of the semiconductor chip, the wiring length from the peripheral portion of the semiconductor chip to the analog circuit can be shortened, It is possible to reduce coupling noise generated on the wiring and loss on the wiring. In addition, the connection with the power supply line or the ground line can be made to have a low impedance, and power can be supplied with low noise and low loss.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a configuration example of a wireless communication device.

FIG. 2 is a diagram showing a layout configuration example of each block in an analog / digital mixed IC chip in which the wireless communication device shown in FIG. 1 is integrated.

[Explanation of symbols]

1 antenna 2 antenna switch 3 High frequency amplifier circuit 4 mixing circuit 5 Local oscillator circuit (OSC) 6 Intermediate frequency amplification circuit 7 A / D converter 8 Baseband signal processing circuit 9 D / A converter 10 Intermediate frequency amplifier circuit 11 mixing circuit 12 power amplifier 13 Audio signal processing circuit 20 IC chip 21 RF circuit 22 IF circuit 23 pads 24 Power line and ground line

Claims (10)

[Claims] 1. An analog / digital mixed integrated circuit in which an analog circuit for performing processing on a signal in a desired frequency band and a digital circuit are mixedly mounted on the same semiconductor chip, and a clock is provided at a substantially central portion of the semiconductor chip. An analog / digital mixed integrated circuit characterized in that a circuit that operates according to the above is arranged. 2. The circuit operating according to the clock is
The integrated analog / digital integrated circuit according to claim 1, wherein the integrated circuit is an intermittently operated circuit according to the clock. 3. The circuit operating according to the clock is
The analog / digital mixed integrated circuit according to claim 1, wherein the analog / digital mixed integrated circuit is a D / A converter. 4. The circuit operating according to the clock is
The analog / digital mixed integrated circuit according to claim 1, which is an A / D converter. 5. The circuit operating according to the clock is
The analog / digital hybrid integrated circuit according to claim 1, which is a PLL circuit. 6. The circuit operating according to the clock is
The analog / digital mixed integrated circuit according to claim 1, which is a baseband signal processing circuit. 7. An analog / digital mixed integrated circuit in which an analog circuit for performing processing on a signal in a desired frequency band and a digital circuit are mixedly mounted on the same semiconductor chip, wherein an edge is provided at a substantially central portion of the semiconductor chip. An analog / digital mixed integrated circuit in which a circuit that operates according to a clock having a period long enough to operate the analog circuit between the edge and the edge is arranged. 8. The analog / digital mixed integrated circuit according to claim 1, wherein the analog circuit is arranged in a peripheral portion of the semiconductor chip. 9. An analog / digital mixed integrated circuit in which an analog circuit for performing processing on a signal in a desired frequency band and a digital circuit are mixedly mounted on the same semiconductor chip, and the analog circuit is provided in a peripheral portion of the semiconductor chip. An analog / digital mixed integrated circuit characterized by arranging. 10. The analog circuit arranged in the peripheral portion of the semiconductor chip is a high-frequency circuit that performs a process on a high-frequency signal in a desired frequency band.
Alternatively, the analog / digital mixed integrated circuit described in 9 above.