JP2003017494A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To overcome the problem of there being the risk of malfunction due to heat generation because radiation structure not being sufficient, when packag ing a heat-generation type semiconductor chip in a chip-size package. SOLUTION: Radiation dummy wiring layers 14d, which are not to be connected electrically, are provided between wiring layers 14 extended on an insulation layer 13 and between contact pads 15. Thus, heat, generated from a semiconductor chip 12, is effectively transmitted to the insulation resin layer 16 of a surface layer and made to radiate, thereby heat accumulated within a semiconductor device being suppressed to prevent malfunction.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip-like semiconductor device which can be mounted on a wiring board with high efficiency, enables high-density mounting, and realizes highly reliable board mounting, and a manufacturing method thereof. In particular, the present invention relates to a semiconductor device which can be manufactured at a semiconductor wafer level and can realize a highly reliable semiconductor device structure, and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, as portable devices have become lighter, smaller, and higher in density, semiconductor packages having lead terminals as external terminals have been increasingly densely packed. A technique for mounting a semiconductor device on a wiring board or the like of an electronic device has been developed.

A conventional semiconductor device will be described below with reference to the drawings.

FIG. 4 is a diagram showing a conventional semiconductor device,
4A is a perspective view of the configuration, and FIG. 4B is a perspective view of FIG.
It is sectional drawing of AA1 place of (a).

As shown in FIG. 4, the conventional semiconductor device has a semiconductor chip 2 having a plurality of electrode pads 1 connected to internal semiconductor integrated circuit elements in a peripheral region on one main surface, and each electrode pad 1. An insulating layer 3 made of an insulating low-elasticity resin formed on the main surface region of the semiconductor chip 2 other than the above, and each electrode pad 1 on the formed insulating layer 3 in the main surface of the semiconductor chip 2. A plurality of contact pads 5 two-dimensionally arranged by rewiring by the wiring layer 4 made of the connected metal conductors, and the semiconductor chip 2 excluding the contact pads 5
And an insulating resin layer 6 such as a solder resist that protects the electrode pad 1 and the wiring layer 4 and a protruding electrode 7 such as a solder ball provided on each contact pad 5. .

Next, a conventional method of manufacturing a semiconductor device will be described with reference to FIGS. 5 and 6 are cross-sectional views for each main process showing a conventional method for manufacturing a semiconductor device.

First, as shown in FIG. 5A, a plurality of electrode pads 1 are formed in the peripheral portion on one main surface, and a plurality of semiconductor chips 2 on which semiconductor integrated circuit elements are formed are formed in the surface. The prepared semiconductor wafer 8 is prepared.

Next, as shown in FIG. 5B, on the main surface of each semiconductor chip 2 in the prepared semiconductor wafer 8, the main surface area except for the plurality of peripheral electrode pads 1 is covered. The insulating layer 3 is formed of an insulating low elasticity material.

Next, as shown in FIG. 5C, on the main surface of each semiconductor chip 2 of the semiconductor wafer 8, one end is connected to the electrode pad 1 and the other end is extended onto the insulating layer 3 formed. Then, the wiring layer 4 forming the contact pads 5 is formed in a two-dimensional arrangement.

Next, as shown in FIG. 5 (d), on the substantially entire main surface of each semiconductor chip 2 of the semiconductor wafer 8,
Except for the formed contact pad 5, the wiring layer 4 and the electrode pad 1 are covered with an insulating resin to form an insulating resin layer 6.

Next, as shown in FIG. 6A, a protruding electrode 7 is formed of a conductive material on the contact pad 5 on each semiconductor chip 2 of the semiconductor wafer 8.

Next, as shown in FIG. 6B, with respect to the dicing scribe line 9 between the semiconductor chips 2 of the semiconductor wafer 8, the rotary blade 10 is provided from above the wafer.
By cutting with the insulating resin layer 6, the individual semiconductor devices are obtained.

Next, FIG. 6C shows a semiconductor device separated from a semiconductor wafer into individual pieces, and the structure is the same as that shown in FIG.

Through the above steps, a chip-like high-density type semiconductor device suitable for mounting on a substrate can be manufactured.

[0015]

However, in the above-mentioned conventional semiconductor device, the semiconductor chip itself has a structure in which the main surface of the semiconductor device itself is covered with an insulating layer and wiring is formed thereon, and therefore the semiconductor chip itself is of a heat-generating type. In the case of the power type semiconductor chip, the heat dissipation structure is not taken, and the heat generated from the semiconductor chip is accumulated in the insulating layer on the chip and cannot be efficiently dissipated to the outside. Therefore, when the semiconductor device is mounted on the mounting board,
There was concern about malfunctions due to heat.

The present invention solves the above-mentioned problems of the prior art. Even if a heat-generating type semiconductor chip is packaged, heat can be dissipated efficiently, and a semiconductor package can be manufactured at the semiconductor wafer level. An object of the present invention is to provide a highly reliable semiconductor device and a manufacturing method thereof.

[0017]

In order to solve the above-mentioned conventional problems, a semiconductor device of the present invention is a semiconductor chip having a plurality of electrode pads on its main surface, and a semiconductor chip excluding the plurality of electrode pads. An insulating layer formed on the main surface of
Within the main surface of the semiconductor chip, one end is connected to the plurality of electrode pads on the insulating layer, and the other end is arranged by rewiring connection by an electrical wiring layer extending on the insulating layer. A semiconductor device comprising a plurality of contact pads, an insulating resin formed on the main surface of the semiconductor chip excluding the plurality of contact pads, and projecting electrodes provided on the plurality of contact pads, respectively. The semiconductor device is provided with a dummy wiring layer for heat dissipation that is not electrically connected to the gap between the wiring layers extending on the insulating layer.

More specifically, the dummy wiring layer is a semiconductor device made of the same material as the electrical wiring layer.

The electrode pad is a semiconductor device arranged in the peripheral portion on the main surface of the semiconductor chip.

As described above, the semiconductor device of the present invention is
Since the dummy wiring layer for free heat radiation that is not electrically connected is provided in the gap between the wiring layer extending on the insulating layer on the semiconductor chip, the heat generated from the semiconductor chip It can be efficiently transferred to the insulating resin on the surface layer to dissipate heat, suppressing the heat accumulated in the semiconductor device,
It is possible to prevent malfunction.

The method of manufacturing a semiconductor device according to the present invention comprises the steps of preparing a semiconductor wafer having a plurality of semiconductor chips having a plurality of electrode pads formed on the main surface within the surface, and each of the semiconductor wafers. A step of forming an insulating layer on the main surface area of the semiconductor chip excluding the plurality of electrode pads; one end of each semiconductor chip of the semiconductor wafer is connected to the electrode pad; A step of forming an electric wiring layer having contact pads arranged in a two-dimensional arrangement by extending ends on the insulating layer; and heat dissipation for not electrically connecting to a gap between the formed electric wiring layers. A step of forming a dummy wiring layer, and the wiring layer, the dummy wiring layer, and the electrode pad on the main surface of each semiconductor chip of the semiconductor wafer except for the contact pad portion of the wiring layer. Individual semiconductor chips by blade cutting with a step of coating with an insulating resin, a step of forming a protruding electrode with a conductive material on the contact pad, and a dicing scribe line between the semiconductor chips of the semiconductor wafer. It is a method of manufacturing a semiconductor device, which comprises a step of obtaining a semiconductor device by dividing it into units.

More specifically, in the step of forming a dummy wiring layer for heat dissipation that is not electrically connected in the gap between the formed electrical wiring layers, the dummy wiring is made of the same material as the electrical wiring layer. And a method for manufacturing a semiconductor device.

The step of forming the bump electrodes is a method of manufacturing a semiconductor device, which is a step of mounting solder ball electrodes as the bump electrodes.

As described above, the semiconductor device manufacturing method of the present invention is a wafer level semiconductor device manufacturing method, in which one end of each semiconductor chip of the semiconductor wafer is connected to the electrode pad, and A step of extending the end on the insulating layer to form a wiring layer in which contact pads are two-dimensionally arranged and a dummy wiring layer for heat dissipation that is not electrically connected to the gap between the formed wiring layers are formed. This is an efficient method for manufacturing a semiconductor device at a wafer level, in which each wiring layer can be formed of the same material and a heat dissipation structure can be realized without requiring a separate step in manufacturing.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a semiconductor device and a method of manufacturing the same according to the present invention will be described below with reference to the drawings.

First, the semiconductor device of this embodiment will be described.

FIG. 1 is a diagram showing a semiconductor device of this embodiment. In FIG. 1, FIG. 1A is a configuration perspective view,
FIG. 1B is a sectional view taken along the line B-B1 in FIG.

As shown in FIG. 1, the semiconductor device of this embodiment is a real chip size package (RCS).
P), a semiconductor chip 12 having a plurality of electrode pads 11 on its main surface, for example, a surface, an insulating layer 13 formed on the main surface of the semiconductor chip 12 excluding the plurality of electrode pads 11, and a semiconductor In the main surface of the chip 12, a plurality of contact pads 15 arranged by rewiring by the wiring layer 14 connected to each electrode pad 11 of the plurality of electrode pads 11 on the insulating layer 13, and a plurality of contact pads 15
A semiconductor device comprising an insulating resin layer 16 such as a solder resist formed on the main surface of the semiconductor chip 12 except for the above, and a protruding electrode 17 provided on each of the plurality of contact pads 15, Wiring layer 1 extending upward
In the semiconductor device, a dummy wiring layer 14d for heat radiation that is not electrically connected is provided in the gap between the wirings 4 and between the contact pads 15.

In the semiconductor device of the present embodiment, the electrical wiring layer 14 extending on the insulating layer 13 on the semiconductor chip 12 is electrically connected to the wiring layer 14 and the gaps between the contact pads 15 are electrically connected. Since the free heat-dissipating dummy wiring layer 14d that is not connected to the semiconductor chip is provided, the heat generated from the semiconductor chip 12 can be efficiently transmitted to the surface insulating resin layer 16 to dissipate heat. It is possible to suppress the heat accumulated in the and to prevent malfunction. In the present embodiment, the insulating resin layer 1 is formed on the dummy wiring layer 14d layer.
However, the dummy wiring layer 14d may not be covered depending on the size of the gap between the wiring layers and the amount of heat generated from the semiconductor chip 12. The dummy wiring layer 14d is a wiring layer made of the same material as the electrical wiring layer 14.

As shown in the figure, in the semiconductor device of this embodiment, the electrode pads 11 are arranged in the peripheral portion on the main surface of the semiconductor chip 12 (peripheral arrangement). The arrangement may be area arrangement, peripheral arrangement, or combination of both.

Further, in this embodiment, the insulating layer 13 is a low elastic body layer and has an elastic modulus (Young's modulus) of 10 to 2.
000 [kg / mm ² ] is preferable,
More preferably, it is in the range of 10 to 1000 [kg / mm ² ]. The linear expansion coefficient of the insulating layer 13 is 5 to
It is preferably in the range of 200 [ppm / ° C.], and more preferably in the range of 10 to 100 [ppm / ° C.]. For example, a polymer such as an ester-bonded polyimide or an acrylate epoxy may be used as long as it has a low elastic modulus and is insulative. Moreover, as the thickness,
It is 100 [μm], preferably 30 [μm].

In this embodiment, the solder balls are used as the bump electrodes 17, but bump electrodes made of a metal material may be used.

Further, since the wiring layer 14 is provided on the insulating layer 13 as a base, the wiring layer is accompanied by heating and cooling of the semiconductor device when mounting the semiconductor device on a wiring substrate such as a printed circuit board. Even if a stress such as a thermal stress is applied to the wiring layer 14, the stress applied to the wiring layer 14 is relaxed. Therefore, disconnection of the wiring layer 14 at the time of mounting on a substrate can be prevented, and a highly reliable wiring structure can be realized.

Since the contact pads 15 which are two-dimensionally external terminals are arranged on the main surface of the semiconductor device, it is possible to provide a large number of external terminals in a small area and to form a pattern. The wiring layer 14 has a structure capable of connecting the electrode pad 11 and the contact pad 15. Therefore, the semiconductor device is small and thin, and is capable of coping with an increase in the number of pins. Moreover, it is a semiconductor device suitable for microfabrication and capable of handling a large number of pins.

Further, the protruding electrode 17 such as a solder ball is provided on the contact pad 15 connected to the wiring layer 14, so that the process of mounting the semiconductor device on the wiring substrate can be performed very easily and quickly. But
Also in this case, the insulating layer 13 can absorb the thermal stress generated from the solder ball having a large heat capacity.

As described above, the semiconductor device of this embodiment is
For free heat dissipation that is not electrically connected to the gap between the electrical wiring layers 14 extending over the insulating layer 13 on the semiconductor chip 12 and the wiring layer 14 and the contact pad 15, that is, the empty space. Since the dummy wiring layer 14d is provided, the heat generated from the semiconductor chip 12 can be efficiently transmitted to the surface insulating resin layer 16 to be radiated, and the heat accumulated in the semiconductor device can be suppressed. The malfunction can be prevented.

Next, a method of manufacturing the semiconductor device of this embodiment will be described.

2 and 3 are cross-sectional views for each main step showing the method of manufacturing the semiconductor device of this embodiment. The method for manufacturing a semiconductor device according to the present embodiment is a method for manufacturing a semiconductor device (semiconductor package) at a semiconductor wafer level,
It is a highly reliable method of manufacturing a real chip size package.

First, as shown in FIG. 2A, a semiconductor wafer 18 is prepared in which a plurality of semiconductor chips 12 each having a plurality of electrode pads 11 formed on its main surface are formed in the surface.

Next, as shown in FIG. 2B, the insulating layer 13 is formed on the main surface of each semiconductor chip 12 of the prepared semiconductor wafer 18 in the main surface area excluding the plurality of electrode pads 11.
To form.

Specifically, first, an insulating low-elasticity material having a photosensitivity of 100 [μm is formed on the electrode pad 11 and the passivation film (not shown) respectively formed on the main surface of the semiconductor chip 12. ] The insulating layer film is formed by applying a film having a thickness of about 5 and drying. Then, the dried insulating layer film is successively exposed and developed to open the electrode pad 11 portion of the semiconductor chip 12 to the insulating layer 13.
To form. In this case, for example, by using scattered light instead of parallel light in the exposure, the insulating layer 13 in the opening is formed to have a cross-sectional shape that is not perpendicular to the main surface of the semiconductor chip 12 and has no acute angle portion. To do. In the present embodiment, by forming the end portion of the opening of the insulating layer 13 so as to be inclined so as to be smoothly connected to the surface of the semiconductor chip 12, a wiring layer in a post process is easily formed and a structure that is not easily broken is configured. can do.

In order to reduce the thermal stress when the semiconductor device is mounted on the substrate, the thickness of the insulating layer 13 should be as large as possible without impairing the steps after coating, for example, 500.
It may be about [μm] or about 1 [mm]. The low elastic material having photosensitivity may be, for example, a polymer such as ester bond type polyimide or acrylate epoxy, and may have a low elastic modulus and may be insulating. Further, the low-elasticity material having photosensitivity does not need to be formed by drying a liquid material, and a material previously formed in a film shape may be used. In that case, an opening can be formed in the low-elasticity material by adhering a film-like low-elasticity material onto the semiconductor chip, exposing and developing it, and the electrode pad on the semiconductor chip can be exposed. . Furthermore, the insulating low-elasticity material forming the insulating layer 13 does not need to have photosensitivity. When a material having no photosensitivity is used, the electrode pad on the semiconductor chip can be exposed by mechanical processing such as laser or plasma or chemical processing such as etching.

Next, as shown in FIG. 2C, one end of each semiconductor chip 12 of the semiconductor wafer 18 is connected to the electrode pad 11, and the other end of the semiconductor chip 12 is extended onto the insulating layer 13 having the other end formed. An electrical wiring layer 14 having a two-dimensional arrangement of contact pads 15 is formed. Further, in this case, a dummy wiring layer 14d for heat dissipation that is not electrically connected is formed in the gap between the formed electrical wiring layers 14 and the gap between the contact pads 15 by utilizing the empty space. The dummy wiring layer 14d is the electrical wiring layer 1
4. The contact pad 15 is made of the same material.

Specifically, first, on the main surface of the semiconductor chip 12 on the semiconductor wafer 18, titanium (about 0.2 [μm] in thickness, for example, is formed by vacuum deposition, sputtering, CVD or electroless plating. Ti) film and copper (Cu) having a thickness of about 0.5 [μm] formed thereon
A thin film metal layer made of a film is formed. Then, a negative type photosensitive resist is applied on the formed thin film metal layer, the portion other than the desired pattern portion of the finished product is cured, and the reaction portion is removed to form a plating resist film. Although the negative type photosensitive resist is used here when forming the plating resist film, it goes without saying that a positive type photosensitive resist may be used. Then, by electrolytic plating, for example, C on the thin-film metal layer other than the portion where the plating resist film is formed.
A thick metal layer made of a u film is selectively formed with a thickness of, for example, about 20 [μm]. After the thick metal layer is formed, the plating resist film is melted and removed. Then, an etching solution capable of melting the thin film metal layer and the thick film metal layer, for example, a cupric chloride solution for the Cu film and an EDTA solution for the Ti film, is used to completely etch the thick film metal layer. The thin metal layer, which has a smaller layer thickness than that, is removed first. By this step, a predetermined metal wiring pattern including the electrode pad 11, the wiring layer 14, and the contact pad 15 can be formed on the main surface of the semiconductor chip 12.

Although Cu was used as the material for forming the thin film metal layer and the thick film metal layer, Cr, W,
Ti / Cu, Ni or the like may be used. Alternatively, the thin film metal layer and the thick film metal layer may be made of different metal materials, and an etchant that selectively etches only the thin film metal layer may be used in the final etching step.

Next, as shown in FIG. 2D, each wiring layer 14 is formed on the main surface of each semiconductor chip 12 of the semiconductor wafer 18 except the contact pad 15 of the formed wiring layer 14. Each electrode pad 11, dummy wiring layer 14d
Is covered with an insulating resin layer 16.

Specifically, after applying a photosensitive solder resist (insulating resin) on the insulating layer 13, a photolithography technique is used so that the contact pad 15 is exposed so that the solder resist film is formed. (Insulating resin layer) is formed. The solder resist film protects the electrode pad 11 other than the contact pad 15, the wiring layer 14, and the dummy wiring layer 14d from the molten solder during mounting.

Next, as shown in FIG. 3A, a protruding electrode 17 is formed on the contact pad 15 with a conductive material.

Specifically, solder, solder-plated copper,
Contact pads 15 made of metal balls made of nickel, etc.
Then, the metal ball and the contact pad 15 are fusion-bonded to each other to form the protruding electrode 17.

Next, as shown in FIG. 3B, the dicing scribe line 19 between the semiconductor chips 12 of the semiconductor wafer 18 is cut into individual semiconductor chips 12 by cutting with a rotary blade 20.

Then, as shown in FIG. 3C, a high heat dissipation chip size type semiconductor device having a heat dissipation dummy wiring layer 14d between the electrical wiring layers 14 and between the contact pads 15 can be obtained. it can.

As described above, the semiconductor device manufacturing method of this embodiment is a wafer level semiconductor device manufacturing method,
For each semiconductor chip of the semiconductor wafer, one end is connected to an electrode pad on the chip, and the other end is extended to an insulating layer to form a wiring layer in which contact pads are two-dimensionally arranged. A dummy wiring layer for heat dissipation that is not electrically connected is formed in the gap between the formed wiring layers, and each wiring layer can be formed of the same material.
This is an efficient method of manufacturing a semiconductor device at a wafer level, which can realize a heat dissipation structure without requiring a separate process.

As described above, as in the present embodiment, a free heat dissipation dummy that is not electrically connected by utilizing the empty space between the wiring layers extending over the insulating layer on the semiconductor chip. Since the wiring layer is provided, the heat generated from the semiconductor chip can be efficiently transferred to the insulating resin on the surface layer to dissipate the heat, and the heat accumulated in the semiconductor device can be suppressed to prevent malfunction. Is.

[0054]

The semiconductor device of the present invention is provided with a free heat dissipation dummy wiring layer which is not electrically connected to the gap between the wiring layers extending over the insulating layer on the semiconductor chip. Therefore, the heat generated from the semiconductor chip can be efficiently transmitted to the insulating resin on the surface layer to radiate the heat, and the heat accumulated in the semiconductor device can be suppressed to prevent malfunction.

According to the method of manufacturing a semiconductor device of the present invention,
A method of manufacturing a semiconductor device at a wafer level, wherein one end of each semiconductor chip of a semiconductor wafer is connected to the electrode pad and the other end is extended onto the insulating layer to form contact pads in a two-dimensional arrangement. Along with the step of forming the constituent wiring layers, a dummy wiring layer for heat dissipation that is not electrically connected is formed in the gap between the formed wiring layers, and each wiring layer can be formed of the same material. This is an efficient wafer-level semiconductor device manufacturing method that can realize a heat dissipation structure without requiring any steps.

[Brief description of drawings]

FIG. 1 is a diagram showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 4 is a diagram showing a conventional semiconductor device.

FIG. 5 is a sectional view showing a conventional method of manufacturing a semiconductor device.

FIG. 6 is a sectional view showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

1 electrode pad 2 semiconductor chips 3 insulating layers 4 wiring layers 5 contact pads 6 Insulating resin layer 7 protruding electrode 8 Semiconductor wafer 9 Dicing Scribe Line 10 rotating blades 11 electrode pad 12 semiconductor chips 13 Insulation layer 14 wiring layer 14d dummy wiring layer 15 contact pads 16 Insulating resin layer 17 Projection electrode 18 Semiconductor wafer 19 Dicing Scribe Line 20 rotating blades

Claims (6)

[Claims] 1. A semiconductor chip having a plurality of electrode pads on its main surface, an insulating layer formed on the main surface of the semiconductor chip excluding the plurality of electrode pads, and within the main surface of the semiconductor chip. There is a plurality of contact pads arranged at the one end with the plurality of electrode pads on the insulating layer, and the other end is arranged by rewiring by an electrical wiring layer extending on the insulating layer, A semiconductor device comprising an insulating resin formed on a main surface of a semiconductor chip excluding a plurality of contact pads, and projecting electrodes respectively provided on the plurality of contact pads, the semiconductor device extending on the insulating layer. A semiconductor device characterized in that a dummy wiring layer for heat dissipation that is not electrically connected is provided in the gap between the wiring layers. 2. The semiconductor device according to claim 1, wherein the dummy wiring layer is made of the same material as the electrical wiring layer. 3. The semiconductor device according to claim 1, wherein the electrode pad is arranged in a peripheral portion on the main surface of the semiconductor chip. 4. A step of preparing a semiconductor wafer having a plurality of semiconductor chips having a plurality of electrode pads formed on a main surface thereof, the method comprising: A step of forming an insulating layer in the main surface area excluding the plurality of electrode pads, and for each semiconductor chip of the semiconductor wafer, one end is connected to the electrode pad and the other end is extended on the insulating layer. Forming an electrical wiring layer having contact pads arranged in a two-dimensional arrangement; forming a dummy wiring layer for heat dissipation that is not electrically connected to a gap between the formed electrical wiring layers. A step of covering the wiring layer, the dummy wiring layer, and the electrode pad on the main surface of each semiconductor chip of the semiconductor wafer except for the contact pad portion of the wiring layer with an insulating resin; Forming a protruding electrode on the contact pad with a conductive material; and dividing a dicing scribe line between the semiconductor chips of the semiconductor wafer into individual semiconductor chips by blade cutting to obtain a semiconductor device. A method of manufacturing a semiconductor device, comprising the steps of: 5. The step of forming a dummy wiring layer for heat dissipation that is not electrically connected to a gap between the formed electrical wiring layers, the dummy wiring is formed of the same material as the electrical wiring layer. The method for manufacturing a semiconductor device according to claim 4. 6. The method of manufacturing a semiconductor device according to claim 4, wherein the step of forming the bump electrode is a step of mounting a solder ball electrode as the bump electrode.