JP2003008224A - Multilayer substrate - Google Patents
Multilayer substrateInfo
- Publication number
- JP2003008224A JP2003008224A JP2001191967A JP2001191967A JP2003008224A JP 2003008224 A JP2003008224 A JP 2003008224A JP 2001191967 A JP2001191967 A JP 2001191967A JP 2001191967 A JP2001191967 A JP 2001191967A JP 2003008224 A JP2003008224 A JP 2003008224A
- Authority
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- Japan
- Prior art keywords
- multilayer substrate
- conductors
- conductor
- area
- face
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体素子等が搭
載されるセラミック多層基板等から成る多層基板に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-layer substrate including a ceramic multi-layer substrate on which semiconductor elements and the like are mounted.
【0002】[0002]
【従来の技術】従来、セラミック多層基板から成る多層
基板は、セラミックグリーンシートに配線導体や貫通導
体となる導体ペーストを印刷塗布し、複数枚のセラミッ
クグリーンシートを積層し焼成することによって作製さ
れる。例えば、アルミナ(Al 2O3)セラミックスから
成る多層基板の場合、配線導体や貫通導体となる導体ペ
ーストとして、タングステン(W),モリブデン(M
o),マンガン(Mn)等の高融点金属を主成分として
含む導体ペーストを用い、これをセラミックグリーンシ
ートの所定の部位に印刷塗布し、次にセラミックグリー
ンシートを複数枚積層し、1600℃程度の還元雰囲気
中で焼成することによって作製される。2. Description of the Related Art Conventionally, a multilayer consisting of a ceramic multilayer substrate
The board is a ceramic green sheet with wiring conductors and through conductors.
Apply the conductor paste that will become the body by printing, and
It is made by stacking green sheets and firing.
Be done. For example, alumina (Al 2O3) From ceramics
In the case of a multilayer board consisting of
As tungsten, tungsten (W), molybdenum (M
o), manganese (Mn) and other refractory metals as the main component
Use a conductive paste containing
It is applied by printing on the designated area of the board, and then ceramic green
A stack of multiple sheets, reducing atmosphere at about 1600 ℃
It is made by baking in.
【0003】また、ガラスセラミックスから成る多層基
板の場合、配線導体や貫通導体となる導体ペーストとし
て、銀(Ag)や銅(Cu)を主成分とする導体ペース
トを用い、これをガラスセラミックスのグリーンシート
の所定の部位に印刷塗布し、次にこのグリーンシートを
複数枚積層し、800〜1000℃程度の還元雰囲気中
で焼成することによって作製される。Further, in the case of a multi-layer substrate made of glass ceramics, a conductor paste containing silver (Ag) or copper (Cu) as a main component is used as a conductor paste which becomes a wiring conductor or a through conductor, and is made of glass ceramic green. It is produced by printing and applying to a predetermined portion of the sheet, then laminating a plurality of the green sheets, and firing in a reducing atmosphere at about 800 to 1000 ° C.
【0004】このような多層基板において、アルミナセ
ラミックスから成るものの場合、配線導体や貫通導体の
材料であるW,Moの電気抵抗率はそれぞれ5.5μΩ
・cm,5.7μΩ・cmであり、Agの1.6μΩ・
cm、Cuの1.67μΩ・cmに比較して数倍以上の
大きさである。従って、配線を細線化して高密度配線を
行なうもの、また信号の高速伝送化が進んでいるIC,
LSI等の半導体素子を搭載するものに対しては、W,
Moの電気抵抗率が大きいため、W,Moから成る配線
導体は高密度配線や高速伝送には不向きである。In the case of such a multilayer substrate made of alumina ceramics, the electric resistivities of W and Mo, which are materials for the wiring conductor and the through conductor, are 5.5 μΩ, respectively.
・ Cm, 5.7μΩ ・ cm, Ag 1.6μΩ ・
cm, which is several times or more the size of Cu, which is 1.67 μΩ · cm. Therefore, the wiring is thinned to achieve high-density wiring, and the high-speed signal transmission IC,
For those equipped with semiconductor elements such as LSI, W,
Since the electric resistivity of Mo is large, the wiring conductor made of W and Mo is not suitable for high-density wiring and high-speed transmission.
【0005】また、ガラスセラミックスから成る多層基
板の場合、Ag,Cu等の抵抗の小さい配線導体を形成
できるが、高速伝送化が進んでいるコンピュータ等の分
野では不十分な配線抵抗である。Further, in the case of a multilayer substrate made of glass ceramics, a wiring conductor having a low resistance such as Ag and Cu can be formed, but the wiring resistance is insufficient in the field of computers and the like where high speed transmission is advanced.
【0006】このような問題を解消するものとして、図
2に示すように、複数の絶縁層1a,1b,1cが積層
されて成る多層基板1において、上下に重なり合う絶縁
層1a,1b,1cの各々に開口の一部分が互いにオー
バーラップするように設けられてなる貫通孔2,3,4
が設けられ、これらの貫通孔2,3,4に配線材料が充
填されてなることにより、配線抵抗値を低減化するもの
が提案されている(特開平10−4266号公報参
照)。In order to solve such a problem, as shown in FIG. 2, in a multilayer substrate 1 formed by laminating a plurality of insulating layers 1a, 1b, 1c, the insulating layers 1a, 1b, 1c which are vertically overlapped with each other are formed. Through holes 2, 3, 4 each having a part of opening overlapping each other
It has been proposed that the through hole 2, 3, 4 is provided with a wiring material to reduce the wiring resistance value (see Japanese Patent Laid-Open No. 10-4266).
【0007】[0007]
【発明が解決しようとする課題】しかしながら、上記従
来においては、配線抵抗値を小さくしようとして貫通孔
2,3,4のオーバーラップ(重ね合わせ)の度合いを
大きくすると、電流の通路面積が大きくなって配線抵抗
値は小さくなるが、同じ絶縁層1a,1b,1cにある
貫通孔2,3,4間の間隔が小さくなり、絶縁層1a,
1b,1cおよび多層基板1の強度が低下するという問
題があった。従って、徒に貫通孔2,3,4のオーバー
ラップの度合いを大きくすることはできず、配線抵抗値
の低下には限度があった。However, in the above-mentioned prior art, if the degree of overlap (overlap) of the through holes 2, 3, 4 is increased in order to reduce the wiring resistance value, the current passage area increases. Although the wiring resistance value becomes smaller, the distance between the through holes 2, 3, 4 in the same insulating layer 1a, 1b, 1c becomes smaller and the insulating layer 1a,
There is a problem that the strength of the multilayer substrates 1 and 1b and 1c is reduced. Therefore, the degree of overlap between the through holes 2, 3 and 4 cannot be increased unduly, and the reduction of the wiring resistance value is limited.
【0008】従って、本発明は上記事情に鑑みて完成さ
れたものであり、その目的は、多層基板の内部に形成さ
れ上下で重ね合わされた貫通導体による内部配線導体の
配線抵抗値を十分に低下させ得るとともに、多層基板の
強度の低下を防ぐことができるものとすることにある。Therefore, the present invention has been completed in view of the above circumstances, and an object thereof is to sufficiently reduce the wiring resistance value of an internal wiring conductor formed by through conductors formed inside a multilayer substrate and vertically stacked. It is possible to prevent the deterioration of the strength of the multilayer substrate.
【0009】[0009]
【課題を解決するための手段】本発明の多層基板は、複
数の絶縁層が積層され、上下に重なり合う2層の前記絶
縁層の各々に、前記絶縁層に形成した貫通孔に導体が充
填されて成る貫通導体がそれぞれ複数個、端面をその一
部分が互いに重なるようにして順次対向させて設けられ
て成る多層基板において、前記端面は略長方形状または
略長円形状であり、その長手方向で一部分が互いに重な
っており、かつ重なっている側の前記端面の面積が反対
側の端面よりも大きいことを特徴とする。In a multilayer substrate of the present invention, a plurality of insulating layers are laminated, and in each of the two insulating layers which are vertically stacked, a through hole formed in the insulating layer is filled with a conductor. A plurality of through conductors each having a plurality of through conductors, the end faces of which are sequentially opposed to each other so that a part thereof overlaps each other, wherein the end faces have a substantially rectangular shape or a substantially oval shape, and a part thereof in a longitudinal direction thereof. Overlap each other, and the area of the end surface on the overlapping side is larger than the area of the end surface on the opposite side.
【0010】本発明は、上記の構成により、多層配線基
板の内部に形成され上下で重ね合わされた貫通導体によ
って構成された内部配線導体の配線抵抗値を十分に低下
させることができる。また、貫通導体の重なっている側
の端面の面積が反対側よりも大きいことにより、電流の
通路面積が大きくなって配線抵抗値が小さくなるととも
にインダクタンスも低減される。また、上下の貫通導体
によって形成される形状が略波形になり、滑らかで短縮
化された電流経路となるため、例えば高周波信号等を低
損失で伝送するのに適したものとなる。さらに、貫通導
体の重なっている側の端面の面積が反対側の端面よりも
大きいことにより、貫通導体間の絶縁層の体積が大きく
なり絶縁層および多層基板の強度の低下が抑えられる。With the above structure, the present invention can sufficiently reduce the wiring resistance value of the internal wiring conductor formed by the through conductors which are formed inside the multilayer wiring substrate and which are vertically stacked. Further, since the area of the end surface on the overlapping side of the through conductor is larger than that on the opposite side, the area of the current passage is increased, the wiring resistance value is reduced, and the inductance is also reduced. Further, since the shape formed by the upper and lower penetrating conductors becomes substantially wavy and forms a smooth and shortened current path, it is suitable for transmitting, for example, a high frequency signal with low loss. Furthermore, since the area of the end surface on the side where the through conductors overlap is larger than the area of the end surface on the opposite side, the volume of the insulating layer between the through conductors increases and the reduction in strength of the insulating layer and the multilayer substrate is suppressed.
【0011】本発明において、好ましくは、前記端面の
重なっている側の面積が反対側よりも面積比で10〜6
0%大きいことを特徴とする。In the present invention, preferably, the area of the side where the end faces overlap is 10 to 6 in terms of area ratio than the opposite side.
It is characterized by being 0% larger.
【0012】本発明は、上記の構成により、上下の貫通
導体によって形成される形状が略波形になり、滑らかで
短縮化された電流経路となるため、例えば高周波信号等
を低損失で伝送するのに適したものとなり、また、貫通
導体間の絶縁層の体積が大きくなり絶縁層および多層基
板の強度の低下が抑制されるという作用効果がさらに向
上したものとなる。According to the present invention, since the shape formed by the upper and lower penetrating conductors is substantially corrugated and the current path is smooth and shortened, the present invention can transmit, for example, a high frequency signal with low loss. In addition, the volume of the insulating layer between the penetrating conductors is increased, and the reduction in strength of the insulating layer and the multilayer substrate is suppressed.
【0013】また本発明において、好ましくは、前記端
面の重なっている部分の長手方向における長さが前記端
面の長手方向の長さの5分の2以上4分の3未満である
ことを特徴とする。In the present invention, preferably, the length of the overlapping portion of the end faces in the longitudinal direction is not less than ⅕ and less than ⅓ of the length of the end faces in the longitudinal direction. To do.
【0014】本発明は、上記の構成により、電流の通路
面積が大きくなって配線抵抗値が小さくなるとともに、
貫通導体間の絶縁層の体積が確保されて絶縁層および多
層基板の強度の低下が抑制される。According to the present invention, due to the above-mentioned constitution, the passage area of the current becomes large and the wiring resistance value becomes small, and
The volume of the insulating layer between the penetrating conductors is secured, and the reduction in strength of the insulating layer and the multilayer substrate is suppressed.
【0015】[0015]
【発明の実施の形態】本発明の多層基板について以下に
説明する。本発明の多層基板の断面図を図1に示す。同
図において、11は、複数の絶縁層が積層され、上下に
重なり合う2層の絶縁層の各々に、絶縁層に形成した貫
通孔に導体が充填されて成る貫通導体がそれぞれ複数
個、端面をその一部分が互いに重なるようにして順次対
向させて設けられて成る多層基板である。11a,11
bは絶縁層、12は貫通孔、13は貫通孔12に充填さ
れた導体である。BEST MODE FOR CARRYING OUT THE INVENTION The multilayer substrate of the present invention will be described below. A cross-sectional view of the multilayer substrate of the present invention is shown in FIG. In the figure, reference numeral 11 denotes a plurality of through-hole conductors formed by laminating a plurality of insulating layers, and filling the through-holes formed in the insulating layers with conductors in each of the two vertically overlapping insulating layers. It is a multi-layer substrate which is provided so as to be sequentially opposed to each other so that portions thereof overlap each other. 11a, 11
Reference numeral b is an insulating layer, 12 is a through hole, and 13 is a conductor filled in the through hole 12.
【0016】本発明の絶縁層11a,11bは、アルミ
ナ(Al2O3)セラミックス,窒化アルミニウム(Al
N)セラミックス,ムライト(3Al2O3・2Si
O2)セラミックス,炭化珪素(SiC)セラミック
ス,ガラスセラミックス,窒化珪素(Si3N4)セラミ
ックス等のセラミックス材料から成る。The insulating layers 11a and 11b of the present invention are made of alumina (Al 2 O 3 ) ceramics, aluminum nitride (Al
N) ceramics, mullite (3Al 2 O 3 · 2Si
It is made of a ceramic material such as O 2 ) ceramics, silicon carbide (SiC) ceramics, glass ceramics, and silicon nitride (Si 3 N 4 ) ceramics.
【0017】絶縁層11a,11bがアルミナセラミッ
クスから成る場合、以下のようにして作製される。ま
ず、例えばAl2O3,酸化珪素(SiO2),酸化マグ
ネシウム(MgO),酸化カルシウム(CaO)などの
原料粉末に適当なバインダー、溶剤等を添加混合してス
ラリーとなす。このスラリーをドクターブレード法やカ
レンダーロール法を採用することによってセラミックグ
リーンシートとし、次いでセラミックグリーンシートに
貫通孔12を形成するための打ち抜き加工等を施すとと
もに、導体13となる導体ペーストをスクリーン印刷法
や圧入法で貫通孔12内に充填する。このセラミックグ
リーンシートを複数枚積層し、約1600℃の温度で焼
成することによって作製される。When the insulating layers 11a and 11b are made of alumina ceramics, they are manufactured as follows. First, for example, a suitable binder, a solvent, etc. are added to and mixed with a raw material powder such as Al 2 O 3 , silicon oxide (SiO 2 ), magnesium oxide (MgO), and calcium oxide (CaO) to form a slurry. This slurry is made into a ceramic green sheet by adopting a doctor blade method or a calendar roll method, and then punching processing or the like for forming the through holes 12 is performed on the ceramic green sheet, and a conductor paste to be the conductor 13 is screen-printed. Then, the through hole 12 is filled by a press fitting method. It is produced by laminating a plurality of ceramic green sheets and firing them at a temperature of about 1600 ° C.
【0018】貫通孔12内に充填される導体13の導体
ペーストは、W,Mo,Mn,Cu,Ag等の粉末に有
機溶剤,溶媒を添加混合して得られる。この導体ペース
トは、絶縁層11a,11bがセラミックスから成る場
合、そのセラミックス成分を所定量(1〜50重量%程
度)含有していてもよく、その場合絶縁層11a,11
bと導体13との接合性が向上する。The conductor paste of the conductor 13 filled in the through holes 12 is obtained by adding and mixing an organic solvent and a solvent to powders of W, Mo, Mn, Cu, Ag and the like. When the insulating layers 11a and 11b are made of ceramics, the conductor paste may contain a predetermined amount (about 1 to 50% by weight) of the ceramic component. In that case, the insulating layers 11a and 11b may be contained.
The bondability between b and the conductor 13 is improved.
【0019】貫通孔12に導体13を充填して成る貫通
導体の端面は略長方形状または略長円形状であり、その
長手方向で一部分が互いに重なっており、かつ重なって
いる側の端面の面積が反対側よりも大きい。その様子を
図1(a)〜(c)に示す。図1(b)は貫通孔12a
に導体13を充填して成る貫通導体の端面が略長方形状
の場合で重なっている側の端面の平面図である。この場
合貫通孔12aは、底面が略長方形状の四角錐台状にな
る。この場合貫通孔12aの開口は正方形であってもよ
い。図1(c)は貫通孔12bに導体13を充填して成
る貫通導体の端面が略長円状(楕円を含む)の場合で重
なっている側の端面の平面図である。この場合貫通孔1
2bは、底面が略長円状の長円錐台状になる。The end face of the through conductor formed by filling the through hole 12 with the conductor 13 has a substantially rectangular shape or a substantially oval shape, and parts of the end face overlap each other in the longitudinal direction, and the area of the end face on the overlapping side. Is larger than the other side. This is shown in FIGS. 1 (a) to 1 (c). FIG. 1B shows a through hole 12a.
FIG. 6 is a plan view of an end surface of a side surface of a through conductor formed by filling a conductor 13 with the conductor 13 and having an approximately rectangular shape. In this case, the through hole 12a has a quadrangular pyramid shape with a substantially rectangular bottom surface. In this case, the opening of the through hole 12a may be square. FIG. 1C is a plan view of an end surface on the overlapping side when the end surfaces of the through conductor formed by filling the through hole 12b with the conductor 13 are substantially oval (including an ellipse). In this case through hole 1
2b has an elliptical truncated cone shape whose bottom surface is substantially oval.
【0020】このような四角錐台状、長円錐台状の貫通
孔12a,12bは、前述したセラミックグリーンシー
トに貫通孔12を形成するための打ち抜き加工を施すと
きに、貫通孔12の重なる側の大きい開口と反対側の小
さい開口側から上金型のパンチで打ち抜くようにする。
そして、四角錘台状、長円錘台状の貫通孔12と成すに
は、上金型のパンチとセラミックグリーンシートを載置
した下金型の貫通孔12形成用の穴との隙間(パンチの
直径の2〜10%程度)を調整するという方法により形
成できる。The quadrangular truncated pyramid-shaped and long truncated cone-shaped through holes 12a and 12b are overlapped with the through holes 12 when the above-mentioned ceramic green sheet is punched to form the through holes 12. Punch from the small opening side opposite to the large opening side.
Then, in order to form the through holes 12 having the shape of a quadrangular pyramid and the shape of an elliptic cone, a gap between the punch of the upper die and the hole for forming the through hole 12 of the lower die on which the ceramic green sheet is placed (punch) is formed. It can be formed by a method of adjusting 2 to 10% of the diameter).
【0021】そして、貫通導体の大きい方の端面を長手
方向で一部分が互いに重なるようにして、絶縁層11
a,11bを重ね合わせて接合させることによって、多
層基板11が作製される。絶縁層11a,11bがセラ
ミックグリーンシートの場合、積層した後約1600℃
で焼成することにより焼結接合させる。Then, the larger end face of the through conductor is made to partially overlap each other in the longitudinal direction, and the insulating layer 11 is formed.
The multilayer substrate 11 is manufactured by superposing and joining a and 11b. When the insulating layers 11a and 11b are ceramic green sheets, about 1600 ° C after stacking
Sintering is performed by firing at.
【0022】本発明において、貫通導体の端面の重なっ
ている側の面積が反対側よりも面積比で10〜60%大
きいことが好ましい。10%よりも小さいと、電流の通
路面積が小さくなり易く、その結果配線抵抗値が大きく
なるとともに、電流経路がなめらかな曲線となりにくく
電流の流れが悪くなるため、インダクタンスが増加する
こととなる。また、上下の貫通導体12によって形成さ
れる形状が角形のジグザグ状となり、図1(a)のよう
な滑らかで短縮化された電流経路Cとならず、例えば高
周波信号等を低損失で伝送するのに不向きなものとな
る。さらに、同じ絶縁層11a,11bで、貫通孔12
間の絶縁層11a,11bの体積が小さくなり、絶縁層
11a,11bおよび多層基板11の強度が低下し易く
なる。60%を超えると、貫通孔12の内面の傾斜角が
大きくなってしまい、貫通孔12を打ち抜き金型にて加
工形成するのが困難になる。In the present invention, it is preferable that the area on the side where the end faces of the through conductors overlap is larger by 10 to 60% than the area on the opposite side. If it is less than 10%, the current passage area tends to be small, and as a result, the wiring resistance value becomes large, and the current path is hard to form a smooth curve, and the current flow becomes poor, so that the inductance increases. In addition, the shape formed by the upper and lower penetrating conductors 12 is a square zigzag shape, and the current path C is not smooth and shortened as shown in FIG. 1A, and for example, a high frequency signal is transmitted with low loss. It is not suitable for. Further, the through holes 12 are formed in the same insulating layers 11a and 11b.
The volume of the insulating layers 11a and 11b between them becomes small, and the strengths of the insulating layers 11a and 11b and the multilayer substrate 11 are likely to decrease. If it exceeds 60%, the inclination angle of the inner surface of the through hole 12 becomes large, and it becomes difficult to process and form the through hole 12 with a punching die.
【0023】また、図1(a)に示すように、貫通導体
の端面の重なっている部分の長手方向における長さ(W
1−W2)が端面の長手方向の長さW1の5分の2以上
4分の3未満であることが好ましい。5分の2未満で
は、電流の通路面積が小さくなって配線抵抗値が大きく
なる傾向にある。4分の3を超えると、同じ絶縁層11
a,11bで、貫通孔12間の絶縁層11a,11bの
体積が小さくなり、絶縁層11a,11bおよび多層基
板11の強度が低下し易くなる。Further, as shown in FIG. 1 (a), the length (W in the longitudinal direction of the overlapping portion of the end faces of the through conductor).
1-W2) is preferably 2/5 or more and less than 3/4 of the length W1 of the end face in the longitudinal direction. If it is less than ⅕, the passage area of the current tends to be small and the wiring resistance value tends to be large. Above 3/4, the same insulating layer 11
With a and 11b, the volume of the insulating layers 11a and 11b between the through holes 12 becomes small, and the strength of the insulating layers 11a and 11b and the multilayer substrate 11 is likely to decrease.
【0024】具体的には貫通導体の大きい端面の長手方
向の長さW1は0.1〜5mm程度であり、貫通導体の
小さい端面の長手方向の長さW2は0.05〜4.5m
m程度である。Specifically, the length W1 in the longitudinal direction of the large end surface of the through conductor is about 0.1 to 5 mm, and the length W2 in the longitudinal direction of the small end surface of the through conductor is 0.05 to 4.5 m.
It is about m.
【0025】本発明の多層基板は、個々の絶縁層11
a,11bを作製した後貼り合せることもできる。その
場合、貫通導体の大きい端面の算術平均粗さは3μm以
下が好ましく、3μmを超えると、上下の貫通導体の接
合面に隙間が多くなり、接合面における電気抵抗が大き
くなる。貫通導体の大きい端面を平滑化するために、貫
通導体の大きい端面を研磨してもよい。また、その端面
を含む絶縁層11a,11bの全面を研磨することもで
きる。The multi-layer substrate according to the present invention includes individual insulating layers 11
It is also possible to bond them after manufacturing a and 11b. In that case, the arithmetic mean roughness of the end surface of the large through conductor is preferably 3 μm or less, and when it exceeds 3 μm, the gap between the upper and lower through conductors becomes large and the electric resistance at the connecting surface becomes large. In order to smooth the large end surface of the through conductor, the large end surface of the through conductor may be polished. Alternatively, the entire surfaces of the insulating layers 11a and 11b including the end faces can be polished.
【0026】また本発明の構成の貫通導体が形成された
絶縁層11a,11bは2層を1組とするものであり、
多層基板11は、2層の絶縁層11a,11bから成る
構成、3層以上の中に2層の絶縁層11a,11bが挿
入された構成、2層で1組の絶縁層11a,11bが複
数組存在する構成のいずれであってもよい。Further, the insulating layers 11a and 11b formed with the through conductors of the present invention have two layers as one set,
The multilayer substrate 11 has a structure including two insulating layers 11a and 11b, a structure in which two insulating layers 11a and 11b are inserted in three or more layers, and two insulating layers 11a and 11b each have a plurality of layers. Any of the configurations that exist in pairs may be used.
【0027】絶縁層11aに形成される貫通孔12の形
状は、貫通孔12の重なっている側の開口の面積が反対
側よりも大きいものであり、具体的には図3に示すよう
な種々の形状とし得る。図3(a)は、貫通孔12の開
口面に平行な面の面積が、開口が小さい側から途中まで
同じであり、途中から漸次大きくなっている形状であ
る。図3(b)は貫通孔12の側面が外側に凸の曲面に
なっている形状であり、図3(c)は貫通孔12の側面
がくぼんだ曲面になっている形状である。The shape of the through-hole 12 formed in the insulating layer 11a is such that the area of the opening on the side where the through-hole 12 overlaps is larger than that on the opposite side. Specifically, various shapes as shown in FIG. Can have any shape. FIG. 3A shows a shape in which the area of the surface parallel to the opening surface of the through hole 12 is the same from the side where the opening is small to the middle and gradually increases from the middle. FIG. 3B shows a shape in which the side surface of the through hole 12 is a convex curved surface to the outside, and FIG. 3C shows a shape in which the side surface of the through hole 12 is a concave curved surface.
【0028】かくして、本発明は、貫通導体間の電流の
通路面積が大きくなって配線抵抗値が小さくなるととも
にインダクタンスも低減される。また、上下の貫通導体
によって形成される形状が略波形になり、滑らかで短縮
化された電流経路となるため、例えば高周波信号等を低
損失で伝送するのに適したものとなる。さらに、貫通導
体の重なっている側の端面の面積が反対側よりも大きい
ことにより、同じ絶縁層で貫通導体間の絶縁層の体積が
大きくなり絶縁層および多層基板の強度が保持される。Thus, according to the present invention, the current passage area between the through conductors is increased, the wiring resistance value is reduced, and the inductance is also reduced. Further, since the shape formed by the upper and lower penetrating conductors becomes substantially wavy and forms a smooth and shortened current path, it is suitable for transmitting, for example, a high frequency signal with low loss. Further, since the area of the end surface on the overlapping side of the through conductor is larger than that on the opposite side, the volume of the insulating layer between the through conductors in the same insulating layer is increased, and the strength of the insulating layer and the multilayer substrate is maintained.
【0029】なお、本発明は上記実施の形態に限定され
るものではなく、本発明の要旨を逸脱しない範囲内にお
いて種々の変更を行なうことは何等差し支えない。The present invention is not limited to the above embodiment, and various modifications may be made without departing from the gist of the present invention.
【0030】[0030]
【発明の効果】本発明は、複数の絶縁層が積層され、上
下に重なり合う2層の絶縁層の各々に、絶縁層に形成し
た貫通孔に導体が充填されて成る貫通導体がそれぞれ複
数個、端面をその一部分が互いに重なるようにして順次
対向させて設けられて成る多層基板において、端面は略
長方形状または略長円形状であり、その長手方向で一部
分が互いに重なっており、かつ重なっている側の端面の
面積が反対側の端面よりも大きいことにより、多層配線
基板の内部に形成され上下で重ね合わされた貫通導体に
よって構成された内部配線導体の配線抵抗値を十分に低
下させることができる。According to the present invention, a plurality of insulating layers are laminated, and a plurality of through-hole conductors formed by filling the through-holes formed in the insulating layers with conductors are formed in each of the two vertically overlapping insulating layers. In a multi-layer substrate in which end faces are sequentially opposed to each other so that portions thereof overlap each other, the end faces have a substantially rectangular shape or a substantially oval shape, and portions thereof overlap each other in the longitudinal direction and overlap each other. Since the area of the end face on the side is larger than the end face on the opposite side, it is possible to sufficiently reduce the wiring resistance value of the internal wiring conductor formed by the penetrating conductors formed inside the multilayer wiring board and stacked vertically. .
【0031】また、貫通導体の重なっている側の端面の
面積が反対側よりも大きいことにより、電流の通路面積
が大きくなって配線抵抗値が小さくなるとともにインダ
クタンスも低減される。また、上下の貫通導体によって
形成される形状が略波形になり、滑らかで短縮化された
電流経路となるため、例えば高周波信号等を低損失で伝
送するのに適したものとなる。さらに、貫通導体の重な
っている側の端面の面積が反対側よりも大きいことによ
り、同じ絶縁層で貫通導体間の絶縁層の体積が大きくな
り絶縁層および多層基板の強度が保持される。Further, since the area of the end surface on the side where the through conductors overlap is larger than that on the opposite side, the area of the passage of current increases, the wiring resistance value decreases, and the inductance also decreases. Further, since the shape formed by the upper and lower penetrating conductors becomes substantially wavy and forms a smooth and shortened current path, it is suitable for transmitting, for example, a high frequency signal with low loss. Further, since the area of the end surface on the overlapping side of the through conductor is larger than that on the opposite side, the volume of the insulating layer between the through conductors in the same insulating layer is increased, and the strength of the insulating layer and the multilayer substrate is maintained.
【0032】本発明は、好ましくは端面の重なっている
側の面積が反対側よりも面積比で10〜60%大きいこ
とにより、上下の貫通導体によって形成される形状が略
波形になり、滑らかで短縮化された電流経路となるた
め、例えば高周波信号等を低損失で伝送するのに適した
ものとなり、また、同じ絶縁層で貫通導体間の絶縁層の
体積が大きくなり絶縁層および多層基板の強度が保持さ
れるという作用効果がさらに向上したものとなる。In the present invention, the area of the side where the end faces are overlapped is preferably 10 to 60% larger than that of the opposite side, so that the shape formed by the upper and lower penetrating conductors becomes substantially wavy and smooth. Since the current path is shortened, it is suitable for transmitting high-frequency signals, etc. with low loss, and the volume of the insulating layer between the through conductors is large in the same insulating layer, so that the insulating layer and the multilayer substrate The function and effect of maintaining the strength is further improved.
【0033】また本発明は、好ましくは端面の重なって
いる部分の長手方向における長さが端面の長手方向の長
さの5分の2以上4分の3未満であることにより、電流
の通路面積が大きくなって配線抵抗値が小さくなるとと
もに、同じ絶縁層で貫通導体間の絶縁層の体積が確保さ
れて絶縁層および多層基板の強度の低下が抑制される。Further, according to the present invention, preferably, the length in the longitudinal direction of the overlapping portion of the end faces is not less than ⅕ and less than ¾ of the length of the end faces in the longitudinal direction, so that the passage area of the electric current is reduced. Becomes large, the wiring resistance value becomes small, and the volume of the insulating layer between the through conductors is secured in the same insulating layer, so that the reduction in strength of the insulating layer and the multilayer substrate is suppressed.
【図1】(a)は本発明の多層基板について実施の形態
の例を示す断面図、(b)は貫通導体の端面が略長方形
状の場合で重なっている側の端面の平面図、(c)は貫
通導体の端面が略長円状の場合で重なっている側の端面
の平面図である。FIG. 1A is a cross-sectional view showing an example of an embodiment of a multilayer substrate of the present invention, FIG. 1B is a plan view of an end surface on the overlapping side when the end surfaces of a through conductor are substantially rectangular, FIG. 3C is a plan view of the end surface of the through conductor in the case where the end surfaces of the through conductors are substantially oval and are overlapped with each other.
【図2】従来の多層基板の例の断面図である。FIG. 2 is a cross-sectional view of an example of a conventional multilayer substrate.
【図3】本発明の多層基板について実施の形態の他の例
を示し、(a)〜(c)は貫通孔の各種形状を示す断面
図である。FIG. 3 shows another example of the embodiment of the multilayer substrate of the present invention, and (a) to (c) are cross-sectional views showing various shapes of through holes.
11:多層基板 11a,11b:絶縁層 12:貫通孔 13:導体 11: Multilayer substrate 11a, 11b: insulating layer 12: Through hole 13: Conductor
Claims (3)
合う2層の前記絶縁層の各々に、前記絶縁層に形成した
貫通孔に導体が充填されて成る貫通導体がそれぞれ複数
個、端面をその一部分が互いに重なるようにして順次対
向させて設けられて成る多層基板において、前記端面は
略長方形状または略長円形状であり、その長手方向で一
部分が互いに重なっており、かつ重なっている側の前記
端面の面積が反対側の端面よりも大きいことを特徴とす
る多層基板。1. A plurality of insulating layers are laminated, and a plurality of through conductors are formed by filling conductors in through holes formed in the insulating layer in each of the two vertically overlapping insulating layers. In a multi-layer substrate formed by sequentially facing each other so that portions thereof overlap each other, the end faces have a substantially rectangular shape or a substantially elliptical shape, and portions that overlap each other in a longitudinal direction thereof and overlap each other. The multilayer substrate, wherein the area of the end face is larger than that of the opposite end face.
側よりも面積比で10〜60%大きいことを特徴とする
請求項1記載の多層基板。2. The multilayer substrate according to claim 1, wherein the area of the side where the end faces overlap is larger than the area of the opposite side by 10 to 60% in area ratio.
における長さが前記端面の長手方向の長さの5分の2以
上4分の3未満であることを特徴とする請求項1または
請求項2記載の多層基板。3. The length of the overlapping portion of the end faces in the longitudinal direction is not less than two fifths and less than three quarters of the length of the end faces in the longitudinal direction. Item 2. The multilayer substrate according to item 2.
Priority Applications (1)
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JP2001191967A JP4974422B2 (en) | 2001-06-25 | 2001-06-25 | Multilayer board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2001191967A JP4974422B2 (en) | 2001-06-25 | 2001-06-25 | Multilayer board |
Publications (2)
Publication Number | Publication Date |
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JP2003008224A true JP2003008224A (en) | 2003-01-10 |
JP4974422B2 JP4974422B2 (en) | 2012-07-11 |
Family
ID=19030494
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JP2001191967A Expired - Fee Related JP4974422B2 (en) | 2001-06-25 | 2001-06-25 | Multilayer board |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010078541A (en) * | 2008-09-29 | 2010-04-08 | Kyocera Corp | Wiring board, manufacturing method therefor, multilayer wiring board, and probe card |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5998596A (en) * | 1982-11-27 | 1984-06-06 | 株式会社日立製作所 | Multilayer ceramic board |
JPH0482881U (en) * | 1990-11-28 | 1992-07-20 | ||
JPH104266A (en) * | 1997-03-27 | 1998-01-06 | Denso Corp | Multilayer substrate |
-
2001
- 2001-06-25 JP JP2001191967A patent/JP4974422B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5998596A (en) * | 1982-11-27 | 1984-06-06 | 株式会社日立製作所 | Multilayer ceramic board |
JPH0482881U (en) * | 1990-11-28 | 1992-07-20 | ||
JPH104266A (en) * | 1997-03-27 | 1998-01-06 | Denso Corp | Multilayer substrate |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010078541A (en) * | 2008-09-29 | 2010-04-08 | Kyocera Corp | Wiring board, manufacturing method therefor, multilayer wiring board, and probe card |
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