JP2002530888A - テクスチャ化されたBiを基にした酸化セラミック膜 - Google Patents

テクスチャ化されたBiを基にした酸化セラミック膜

Info

Publication number
JP2002530888A
JP2002530888A JP2000584524A JP2000584524A JP2002530888A JP 2002530888 A JP2002530888 A JP 2002530888A JP 2000584524 A JP2000584524 A JP 2000584524A JP 2000584524 A JP2000584524 A JP 2000584524A JP 2002530888 A JP2002530888 A JP 2002530888A
Authority
JP
Japan
Prior art keywords
ferroelectric
composition
metal oxide
ratio
ferroelectric device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000584524A
Other languages
English (en)
Japanese (ja)
Inventor
エー デスロチャーズ デブラ
シー ヘンドリックス ブライアン
エフ ローダー ジェフリー
エス ヒンターマイアー フランク
Original Assignee
インフィネオン テクノロジース アクチエンゲゼルシャフト
アドヴァンスト テクノロジー マテリアルズ インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/197,984 external-priority patent/US6713797B1/en
Application filed by インフィネオン テクノロジース アクチエンゲゼルシャフト, アドヴァンスト テクノロジー マテリアルズ インコーポレイテッド filed Critical インフィネオン テクノロジース アクチエンゲゼルシャフト
Publication of JP2002530888A publication Critical patent/JP2002530888A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B53/00Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/55Capacitors with a dielectric comprising a perovskite structure material

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Compositions Of Oxide Ceramics (AREA)
  • Formation Of Insulating Films (AREA)
JP2000584524A 1998-11-23 1999-11-22 テクスチャ化されたBiを基にした酸化セラミック膜 Pending JP2002530888A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/197,984 1998-11-23
US09/197,984 US6713797B1 (en) 1998-06-30 1998-11-23 Textured Bi-based oxide ceramic films
PCT/US1999/027683 WO2000031791A1 (fr) 1998-11-23 1999-11-22 Films en ceramique d'oxyde texture a base de bismuth

Publications (1)

Publication Number Publication Date
JP2002530888A true JP2002530888A (ja) 2002-09-17

Family

ID=22731532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000584524A Pending JP2002530888A (ja) 1998-11-23 1999-11-22 テクスチャ化されたBiを基にした酸化セラミック膜

Country Status (6)

Country Link
EP (1) EP1135797A1 (fr)
JP (1) JP2002530888A (fr)
KR (1) KR20010080544A (fr)
CN (1) CN1333918A (fr)
TW (1) TW475220B (fr)
WO (1) WO2000031791A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014227335A (ja) * 2013-05-27 2014-12-08 コリア・インスティテュート・オブ・サイエンス・アンド・テクノロジー 高誘電率と低誘電損失特性を持つニオブ酸ビスマス誘電体組成物

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0302655D0 (en) * 2003-02-05 2003-03-12 Univ Cambridge Tech Deposition of layers on substrates
KR100967110B1 (ko) * 2003-06-30 2010-07-05 주식회사 하이닉스반도체 하부층의 배향성을 따르는 강유전체막 형성 방법 및 그를이용한 강유전체 캐패시터 형성 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014227335A (ja) * 2013-05-27 2014-12-08 コリア・インスティテュート・オブ・サイエンス・アンド・テクノロジー 高誘電率と低誘電損失特性を持つニオブ酸ビスマス誘電体組成物

Also Published As

Publication number Publication date
KR20010080544A (ko) 2001-08-22
WO2000031791A1 (fr) 2000-06-02
EP1135797A1 (fr) 2001-09-26
CN1333918A (zh) 2002-01-30
TW475220B (en) 2002-02-01

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