JP2002374069A - High-frequency module device and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce high-frequency element layer of a high-frequency module device in area and size by forming a thin-film pattern with accuracy. SOLUTION: The high-frequency module device comprises a base substrate 2 made of a multilayered organic printed substrate, in which the main surface of the uppermost layer is planarized, a first high-frequency circuit 15 having a first thin film pattern 14, in which a part of the main surface of the uppermost layer of the substrate 2 as a high-frequency passive element via a first insulating layer, and a second high-frequency circuit 19 having a second thin-film pattern 18, in which part of the first high-frequency circuit 15 is formed as a high-frequency passive element as a second thin-film pattern 18 via a second insulating layer 17, in such a manner that a build-up forming surface 15a of the circuit 15, formed with the second circuit 19, is planarized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency module device constituting, for example, a high-frequency front end for communication and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, various types of information such as music, voice, images, etc., can be easily handled by a personal computer, a mobile computer, and the like with the digitization of data. In addition, such information is band-compressed by an audio codec technology or an image codec technology, and an environment for easily and efficiently distributing to various communication terminal devices by digital communication or digital broadcasting is being prepared. . For example, audio / video data (AV data) can be received outdoors by a mobile phone.

[0003] By the way, a data transmission / reception system includes:
Proposal of a suitable network system even in a small area such as a home has been utilized in various ways. As the network system, for example, a narrow-band wireless communication system in a 5 GHz band as proposed in IEEE 802.11a, a wireless LAN system in a 2.45 GHz band as proposed in IEEE 802.11b, or
Various next-generation wireless systems such as a short-range wireless communication system called Bluetooth are receiving attention.

A data transmission / reception system makes effective use of such a wireless network system to easily transmit and receive various data at various places such as at home and outdoors without using a relay device or the like, and to an Internet network. Access and data transmission / reception.

On the other hand, in a data transmission / reception system, it is essential to realize a communication terminal device which is small, lightweight, portable and has the above-described communication function. In a communication terminal device, since it is necessary to perform a modulation / demodulation process of an analog high-frequency signal in a transmission / reception unit, generally, FIG.
A high-frequency transmission / reception circuit 100 based on a super heterodyne system for temporarily converting a transmission / reception signal as shown in FIG.

The high-frequency transmission / reception circuit 100 includes an antenna unit 101 having an antenna and a changeover switch for receiving or transmitting an information signal, and a transmission / reception switch 102 for switching between transmission and reception. The high-frequency transmission / reception circuit 100 includes a reception circuit unit 105 including a frequency conversion circuit unit 103, a demodulation circuit unit 104, and the like. The high frequency transmitting / receiving circuit 100 includes a power amplifier 106 and a drive amplifier 10
And a transmission circuit unit 109 including a modulation circuit unit 108 and the like. The high-frequency transmission / reception circuit 100 includes a reference frequency generation circuit that supplies a reference frequency to the reception circuit 105 and the transmission circuit 109.

The high-frequency transmission / reception circuit 10 having the above configuration
At 0, various filters, local oscillators (VCOs), and SAWs inserted between the respective stages are omitted in detail.
The configuration is such that the number of passive components such as inductors, resistors, and capacitors specific to large functional components such as filters and high-frequency analog circuits such as matching circuits or bias circuits is extremely large. Therefore, the high-frequency transmitting / receiving circuit 100
Have become large in size as a whole, which has been a major obstacle to reducing the size and weight of communication terminal equipment.

On the other hand, as shown in FIG. 34, a high frequency transmission / reception circuit 110 of a direct conversion system for transmitting / receiving information signals without conversion to an intermediate frequency is used for the communication terminal equipment. In the high-frequency transmission / reception circuit 110, the information signal received by the antenna unit 111 is transmitted to the demodulation circuit unit 1 via the transmission / reception switch 112.
13 for direct baseband processing. In the high-frequency transmission / reception circuit 110, the information signal generated by the source is directly modulated into a predetermined frequency band without being converted to an intermediate frequency in the modulation circuit section 114, and is transmitted to the antenna section via the amplifier 115 and the transmission / reception switch 112. 1
11 is transmitted.

The high-frequency transmission / reception circuit 11 having the above configuration
0, the information signal is transmitted and received by performing direct detection without converting the intermediate frequency, so that the number of components such as filters is reduced, the overall configuration is simplified, and one chip is achieved. It is expected that a structure close to the structure will be realized. However, the high-frequency transmission / reception circuit 110 also needs to correspond to a filter or a matching circuit arranged at a subsequent stage. In addition, since the high-frequency transmitting / receiving circuit 110 performs amplification once in the high-frequency stage, it is difficult to obtain a sufficient gain, and it is necessary to perform an amplification operation also in the baseband section. Therefore, the high-frequency transmitting / receiving circuit 110 requires a DC offset canceling circuit and an extra low-pass filter, and further has a problem that the entire power consumption increases.

[0010]

As described above, the conventional high frequency transmission / reception circuit has sufficient characteristics in both the superheterodyne system and the direct conversion system to meet the required specifications such as miniaturization and weight reduction of communication terminal equipment. Was not satisfied. For this reason, various attempts have been made for a high-frequency transmitting / receiving circuit to be modularized with a simple configuration based on, for example, a Si-CMOS circuit or the like to reduce the size. That is, one of the attempts is to form a passive element having good characteristics on a Si substrate, to form a filter circuit, a resonator, and the like on an LSI, and to integrate a logic LSI in a baseband portion, so-called, This is a method of manufacturing a one-chip high-frequency module.

However, in such a single-chip high-frequency module, as shown in FIG.
It is extremely important how to form a high-performance inductor 120 on an LSI. In such a high-frequency module, a large concave portion 124 is formed corresponding to the inductor forming portion 123 of the Si substrate 121 and the SiO ₂ insulating layer 122. The first high-frequency module is
And a second wiring layer 126 for closing the recess 124 is formed to form the coil portion 127. In the high-frequency module, the inductor 120 is formed by taking another measure such as raising a part of the wiring pattern from the substrate surface and floating it in the air. However, in each of these high-frequency modules, the process of forming the inductor 120 is extremely troublesome, and there is a problem that the cost increases due to an increase in the number of processes.

In this high-frequency module,
The electrical interference of the Si substrate interposed between the high-frequency circuit section of the analog circuit and the baseband circuit section of the digital circuit has become a serious problem.

As a high-frequency module for improving the above-mentioned disadvantages, for example, a high-frequency module 130 using a Si substrate as a base substrate as shown in FIG. 36 or a high-frequency module using a glass substrate as a base substrate as shown in FIG. 1
Forty have been proposed.

The high-frequency module 130 is formed by forming a high-frequency element layer 133 by lithography after forming an SiO ₂ layer 132 on a Si substrate 131.

Although not described in detail, the high-frequency element layer 133 is formed with a multi-layered passive element such as an inductor, a resistor or a capacitor together with a wiring pattern by a thin film forming technique or a thick film forming technique.

In the high-frequency module 130, terminals connected to an internal wiring pattern via vias (relay through holes) and the like are formed on the high-frequency element layer 133, and these terminals are mounted on a high-frequency IC or a flip-chip mounting method. LSI
And the like are directly mounted. By mounting this high-frequency module 130 on, for example, a mother board, it is possible to separate the high-frequency circuit section and the baseband circuit section and suppress electrical interference between them.

In the high-frequency module 130, the Si substrate 131 having conductivity functions when forming each passive element in the high-frequency element layer 133.
There is a problem that it hinders good high-frequency characteristics of each passive element.

On the other hand, in the high-frequency module 140, a glass substrate 141 is used as a base substrate in order to solve the problem of the Si substrate 131 in the high-frequency module 130 described above. The high-frequency module 140 is also provided on the glass substrate 141 by lithography technology.
42 is formed as a film. In the high-frequency element layer 142,
Although not described in detail, a passive element such as an inductor, a resistor, or a capacitor is formed in a multilayer in the inside thereof by a thin film forming technique or a thick film forming technique together with a wiring pattern.

In the high-frequency module 140, terminals connected to the internal wiring pattern via vias and the like are formed on the high-frequency element layer 142, and circuit elements such as high-frequency ICs and LSIs are formed on these terminals by flip-chip mounting or the like. 133 is directly mounted. This high frequency module 14
Reference numeral 0 denotes that a passive element having good high-frequency characteristics is formed in the high-frequency element layer 142 by suppressing the degree of capacitive coupling between the glass substrate 141 and the high-frequency element layer 142 by using the glass substrate 141 having no conductivity. It is possible.

However, the high-frequency module 13
0, 140, the Si substrate 131 as described above.
A high-frequency signal pattern is formed via a wiring layer formed on the glass substrate 141, and a power supply or ground supply wiring or a control signal wiring is performed. For this reason, in the high-frequency modules 130 and 140, electrical interference may occur between the wirings, and a problem such as an increase in cost due to the formation of multiple wiring layers and an increase in size due to the layout of the wirings may occur.

As shown in FIG. 38, in the high-frequency module 200, as described above, a high-frequency element layer 202 is formed in multiple layers on a base substrate 201 made of Si, glass, or the like. Specifically, the high-frequency module 200 has a surface on which the high-frequency element layer 202 of the base substrate 201 is formed,
That is, the high-frequency element layer 202 is formed on the high-frequency element layer forming surface 201a, and the wiring layer 204 is partially a passive element 203 or the like.
a and a high-frequency circuit unit 207 and the like in which the insulating layer 205a and the insulating layer 205a are formed in multiple layers.

In this case, in the high-frequency module 200, when the first high-frequency circuit section 206 formed on the high-frequency element layer forming surface 201a of the base substrate 201 is formed, the passive element 203, the wiring layer 204a, etc. Irregularities may occur on the surface on which the second high-frequency circuit portion 207 is formed, that is, on the build-up forming surface 206a of the first high-frequency circuit portion 206.

For this reason, in the high-frequency module 200,
If the second high-frequency circuit portion 207 is formed on the build-up forming surface 206a having the uneven surface, the passive element forming layer 202 has a problem that the thickness thereof varies and the thickness thereof becomes large.

Further, in the high-frequency module 200, the unevenness of the surface of the build-up forming surface 206a causes
Irregularities also occur on the surface of the insulating layer 205b of the second high-frequency circuit portion 207, which makes it difficult to accurately form the wiring layer 204b of the second high-frequency circuit portion 207 formed on the insulating layer 205b. There is also a problem.

Further, in the high-frequency module 200, the wiring layers 204a and 204b are electrically connected by the vias 208 and the like, but the surface of the insulating layer 205b of the second high-frequency circuit section 207 has irregularities. , Via 2
08 becomes difficult to form accurately, and the via 208
Also, there is a problem that the aperture diameter and the like of the liquid crystal display vary, resulting in an increase in size.

Therefore, the present invention has been proposed to provide a high-frequency module device in which a thin film pattern is accurately formed on a high-frequency element layer to reduce the area and size, and a method of manufacturing the same. .

[0027]

A high-frequency module device according to the present invention comprises a multilayer substrate portion in which a conductor pattern is laminated via a dielectric layer, and the main surface of the uppermost layer is flattened; A first high-frequency circuit portion in which a first thin film pattern partially having a high-frequency passive element is formed on a main surface of the uppermost layer via a first insulating layer; and an uppermost layer of the first high-frequency circuit portion The main surface is flattened to form a build-up forming surface, and a second thin film pattern partially formed as a high-frequency passive element is formed on the build-up forming surface via a second insulating layer. And a second high-frequency circuit section.

In this high-frequency module device, since the build-up forming surface of the first high-frequency circuit portion is flattened, the second high-frequency circuit portion is formed on the build-up forming surface.
The surface of the insulating layer has a structure having high smoothness. Thus, in the high-frequency module device, since the surface of the second insulating layer has high smoothness, the second thin film pattern formed via the second insulating layer can be formed with high accuracy.

Further, in the method of manufacturing a high-frequency module device according to the present invention, a multilayer substrate portion in which a conductor pattern is laminated via a dielectric layer and a main surface of the uppermost layer is flattened is formed. A forming step, a first step of forming a first thin film pattern which partially becomes a high-frequency passive element on the multilayer substrate portion via a first insulating layer, and a main step of forming an uppermost layer of the first high-frequency circuit portion A second step of forming a build-up formation surface by performing a planarization process on the surface, and a second thin-film pattern, a part of which serves as a high-frequency passive element, is formed on the build-up formation surface of the first high-frequency circuit unit. Forming a high-frequency element layer portion through a third step of forming via the insulating layer.

In this method of manufacturing a high-frequency module device, the surface of the second insulating layer formed on the flattened build-up forming surface can be made more smooth, so that the second insulating layer is formed via the second insulating layer. A high-frequency module in which the second thin film pattern to be formed can be formed with high precision and variation in the thickness of the high-frequency element layer is suppressed is manufactured.

[0031]

Embodiments of the present invention will be described below in detail with reference to the drawings. A high-frequency module 1 to which the present invention is applied as shown in FIG. 1 as an embodiment has a high-frequency element layer forming surface 3 in which the uppermost layer of a base substrate 2 formed in a base substrate manufacturing process, which will be described in detail later, is a high-precision flat surface. The high-frequency element layer 4 is formed on the high-frequency element layer forming surface 3 by a high-frequency element layer manufacturing process described in detail later.

In the high-frequency module 1, the base substrate 2
A power supply wiring section, a control system wiring section, or a ground section for the high-frequency element layer 4 formed in the upper layer. In the high-frequency module 1, a high-frequency IC 90 and a chip component 91 are mounted on the upper surface of the high-frequency element layer 4 and are sealed by a shield cover 92. The high-frequency module 1 includes a mother board 93 as a so-called one-chip component.
Implemented above.

The base substrate 2 includes a core substrate 5 composed of a double-sided substrate and a first main surface 5 having the core substrate 5 as a core.
It has a first wiring layer 6 formed on the side a, and a second wiring layer 7 formed on the side of the second main surface 5b. In the base board part 2, the first copper foil with resin 8 and the second copper foil with resin 9 are joined to the core board 5.

The core substrate 5 has a low dielectric constant and a low Tan δ,
That is, materials having excellent high-frequency characteristics, such as polyphenylene ether (PPE), bismaleide triazine (BT)
-Resin), polytetrafluoroethylene (trade name: Teflon), polyimide, liquid crystal polymer (LCP), polynorbornene (PNB), ceramic, or a mixture of ceramic and organic materials. Also,
The core substrate 5 has heat resistance and chemical resistance as well as mechanical rigidity. For example, an epoxy-based substrate FR-5 or the like, which is more inexpensive than a substrate formed of the above-described material, is also used.

The first wiring layer 6 and the second wiring layer 7 are made of a highly conductive metal such as Cu, for example, and are formed by a plating method or the like.

The first resin-coated copper foil 8 is formed on the first substrate
The copper foil layer 8a becomes the third wiring layer 8a.

The second copper foil with resin 9 is formed on the second
The copper foil layer 9a becomes the fourth wiring layer 9a.

The base substrate 2 has a first main surface 5a.
The uppermost layer on the side is polished until the third wiring layer 8a is exposed, so that the high-frequency element layer forming surface 3 is flattened with high precision.

The high-frequency element layer 4 is partially formed on the high-frequency element layer forming surface 3 of the base substrate 2 which has been flattened with high precision via a first insulating layer 10, such as a capacitor 11, a resistor 12, and an inductor 13. A first high-frequency circuit section 15 on which a first thin film pattern 14 to be a high-frequency passive element is formed, and a part of the first high-frequency circuit section 15 is provided on the first high-frequency circuit section 15 via a second insulating layer 17 as described above. And a second high-frequency circuit section 19 on which a second thin film pattern 18 as a high-frequency passive element is formed.

The first high-frequency circuit section 15 is provided with a via 16 for electrically connecting the base substrate 2 and the first thin film pattern 14 to the first insulating layer 10. Also, the first
In the high-frequency circuit section 15, the first insulating layer 10 is formed of an organic material having excellent high-frequency characteristics used for the core substrate 5 described above. The first high-frequency circuit section 15 has a build-up forming surface 15a in which the surface on which the second high-frequency circuit section 19 is formed is flattened with high precision.

In the second high-frequency circuit section 19, a via 20 for electrically connecting the first thin film pattern 14 and the second thin film pattern 18 to the second insulating layer 17 is provided.
In the second high-frequency circuit section 19, the second insulating layer 17 is formed of an organic material having excellent high-frequency characteristics used for the core substrate 5 described above.

The high-frequency module 1 configured as described above is provided on the build-up forming surface 1 of the first high-frequency circuit unit 15.
Since the surface 5a is flattened with high precision, the surface of the second insulating layer 17 formed on the build-up forming surface 15a has a structure having high smoothness.

Thus, in the high-frequency module 1 to which the present invention is applied, since the surface of the second insulating layer 17 has high smoothness, the accuracy of forming the second thin film pattern 18 formed on this surface is improved. In addition to the improvement, variation in the thickness of the high-frequency element layer 4 can be suppressed.

Therefore, in the high-frequency module 1, the second wiring pattern 18 is formed with high accuracy, and the variation in the thickness of the high-frequency element layer 4 is suppressed, so that the area, the thickness, and the size can be reduced. it can.

Further, in the high-frequency module 1 to which the present invention is applied, since the base substrate 2 including the core substrate 5 and the like is formed of the above-described organic base material, a relatively expensive Si substrate or glass substrate is used. It is inexpensive as compared with the case where it is used for a substrate, and the material cost can be reduced.

Next, a method of manufacturing the high-frequency module 1 to which the present invention is applied will be described in detail.

When manufacturing the high-frequency module 1,
First, the base substrate 2 is formed. The configuration and manufacturing process of the base substrate 2 will be described in detail below with reference to FIGS.

In the manufacturing process of the base substrate 2, as shown in FIG. 2, the first and second wiring layers 6, 7 and the core substrate 5 are appropriately penetrated on the front and back main surfaces 5 a and 5 b of the core substrate 5. First wiring layer forming step s-1 for forming a plurality of via holes 21
And a first copper foil bonding step s-2 for bonding the first resin-coated copper foil 8 and the second resin-coated copper foil 9 to the front and back main surfaces 5a and 5b of the core substrate 5, respectively. Copper foil with resin 8, 9
Forming step s-3 for forming vias 22a and 22b at the same time
And The manufacturing process of the base substrate 2 includes a step of forming an appropriate third wiring layer 8 on the pair of resin-attached copper foils 8 and 9 respectively.
a and a second wiring layer forming step s-4 for forming the fourth wiring layer 9a to manufacture the base substrate intermediate body 23.

The manufacturing process of the base substrate 2 is based on the third wiring layer 8 a and the fourth wiring layer 9
and a second copper foil bonding step s-5 for bonding the third resin-coated copper foil 24 and the fourth resin-coated copper foil 25 covering a. In the manufacturing process of the base substrate part 2, the third copper foil with resin 24 and the fourth copper foil with resin 25 are polished to form a high-frequency element layer on the uppermost layer on the first main surface 5a side. Face 3
The base substrate unit 2 is manufactured through a polishing step s-6 for forming the substrate.

When the base substrate 2 is manufactured by the above steps, first, the copper foil layer 6 serving as the first wiring layer 6 and the copper foil layer 7 serving as the second wiring layer 7 shown in FIG. A first wiring layer forming step s-1 is performed on the core substrates 5 formed on both main surfaces.

Next, as shown in FIG. 4, a hole is formed in the core substrate 5 in a predetermined position by drilling or laser drilling as a first wiring layer forming step s-1 to form via holes 21 respectively. Is done. Then, conduction processing is performed on the inner wall of the via hole 14 by plating, for example, on the core substrate 5, and after the conductive paste 26 is embedded, a lid is formed by plating. By subjecting the copper foil layers 6 and 7 to photolithographic processing, the core substrate 5 has a predetermined first wiring layer on each of the first main surface 5a and the second main surface 5b. 6 and the second wiring layer 7 are formed.

Next, the core substrate 5 having undergone the above steps is provided with:
In the first copper foil bonding step s-2, as shown in FIG. 5, a first resin-coated copper foil 8 and a second resin-coated copper foil 8 that cover the first wiring layer 6 and the second wiring layer 7, respectively. Copper foil 9 is the first
Are joined to the main surface 5a side and the second main surface 5b side, respectively. The first resin-coated copper foil 8 and the second resin-coated copper foil 9 each include a so-called resin-coated copper foil in which the resin layers 8b, 9b are lined with the entirety of one main surface of the copper foil layers 8a, 9a. Used. Of these, the copper foil layers 8a and 9a are the third wiring layers 8
a and the fourth wiring layer.

Next, the first resin-attached copper foil 8 and the second resin-attached copper foil 9 are connected to the first principal surface 5a of the core substrate 5 and the second And a main surface 5b side thereof by an adhesive resin (prepreg). The first copper foil with resin 8 and the second copper foil with resin 9
When the resin layers 8b and 9b are formed of a thermoplastic resin, they are bonded to the core substrate 5 without using an adhesive resin.

Next, the first resin-coated copper foil 8 and the second resin-coated copper foil 9 are subjected to a via forming step s-3 in a state of being bonded to the core substrate 5, respectively, as shown in FIG. like,
Photolithographic processing is performed on a portion corresponding to each via hole 21 described above, thereby forming vias 22a and 22b, respectively. This via forming step s-3
After performing photolithographic processing on the formation regions of the vias 22a and 22b, wet etching is performed to form openings 27a and 27b in the first resin-coated copper foil 8 and the second resin-coated copper foil 9, By performing laser processing using these openings 27a and 27b as masks, vias 22a and 22 receiving the lands of the first wiring layer 6 or the second wiring layer 7 are received.
b is formed.

Next, the first resin-coated copper foil 8 and the second resin-coated copper foil 9 are subjected to conduction treatment on the inner walls of the vias 22a and 22b by via plating or the like, as shown in FIG. Conductive material 28a by the method or embedding of conductive paste,
28b is filled.

Next, in the first resin-coated copper foil 8 and the second resin-coated copper foil 9, predetermined patterning is applied to the copper foil layers 8a and 9a, respectively, in the second wiring layer forming step s-4. As a result, a third wiring layer 8a and a fourth wiring layer 9a are formed. Specifically, in the second wiring layer forming step s-4, the copper foil layer 8a,
By subjecting the third wiring layer 8a and the fourth wiring layer 9b to the resin layers 8b and 9b, respectively,
Is formed, and the base substrate intermediate body 23 is manufactured.

Next, as shown in FIG. 8, the third pattern wiring layer 8a and the fourth pattern wiring layer 9a are respectively coated on the base substrate intermediate body 23 by the second copper foil bonding step s-5. Then, the third resin-coated copper foil 24 and the fourth resin-coated copper foil 25 are joined to the front and back main surfaces 5a and 5b, respectively. The third resin-coated copper foil 24 and the fourth resin-coated copper foil 25 also have copper foil layers 24a and 25a, respectively, similarly to the first resin-coated copper foil 8 and the second resin-coated copper foil 9 described above. A so-called resin-coated copper foil in which resin layers 24b and 25b are lined over the entire one main surface is used.

Next, as shown in FIG. 9, the third resin-coated copper foil 24 and the fourth resin-coated copper foil 25 are
5b is used as a bonding surface and bonded to the front and back main surfaces of the base substrate intermediate body 23 with an adhesive resin (prepreg). In addition,
When the resin layers 24b and 25b are formed of a thermoplastic resin, the third resin-coated copper foil 24 and the fourth resin-coated copper foil 25 do not require an adhesive resin, and the base substrate intermediate member 23 is unnecessary.
Joined to.

Next, the third resin-coated copper foil 24 and the fourth
Is polished. In this polishing step s-6, the entirety of the third resin-coated copper foil 24 and the fourth resin-coated copper foil 25 is polished with an abrasive made of, for example, a mixed solution of alumina and silica, thereby forming the base substrate intermediate 23. Both sides are formed on a highly accurate flat surface.

In the polishing step s-6, as shown in FIG. 10, the third resin-coated copper foil 24 side, in other words, the high-frequency element layer forming surface 3 is exposed until the third wiring layer 8a is exposed. Is polished. In the polishing step s-6, the fourth wiring layer 9 is formed on the fourth resin-coated copper foil 25 side.
Polishing is performed such that the resin layer 25b leaves a predetermined thickness Δx without exposing a.

As described above, the high-frequency element layer forming surface 3
Produces the base substrate 2 which is flattened with high precision.

The base substrate 2 is formed by forming the high-frequency element layer portion 4 on the third wiring layer 8a in a high-frequency element layer manufacturing step described later, so that the third wiring layer 8a can be made chemical, mechanical or thermal. This eliminates the need for the resin layer 24b that protects against a mechanical load. Then, in the high-frequency element layer manufacturing process described below, the base substrate 2 has the third wiring layer 8a
Constitute a power supply wiring section, a control system wiring section, or a ground section with respect to the high-frequency element layer section.

The base substrate 2 is protected by a resin layer 25b having the fourth wiring layer 9a from the chemical or mechanical or thermal load in the high-frequency element layer manufacturing process described later. Has become. And
After forming the high-frequency element layer 4, the fourth wiring layer 9a
The above-mentioned resin layer 25b is exposed by being cut and removed to form the input / output terminal portion 29.

In the above-described base substrate manufacturing process, by making the process of manufacturing the base substrate intermediate body 23 the same as the conventional process of manufacturing a multilayer substrate, the manufacturing process of the multilayer substrate can be applied as it is, and It has the characteristic that it is also high. It should be noted that the base substrate manufacturing process is not limited to the above-described process, and it is a matter of course that various conventionally-used manufacturing processes of a multilayer substrate may be employed.

Next, a high-frequency element layer 4 is formed on the high-frequency element layer forming surface 3 of the base substrate 2 manufactured in the above-described base substrate manufacturing step.

The structure and manufacturing process of the high-frequency element layer 4 will be described below in detail with reference to FIGS.

As shown in FIG. 11, the high-frequency element layer 4 is formed on the high-precision planarized high-frequency element layer forming surface 3 of the base substrate 2 manufactured through the above-described base substrate manufacturing step. A first insulating layer forming step s-7 for forming the first insulating layer 10; and a groove for forming a first thin film pattern 14 on the surface of the first insulating layer 10 by masking and etching. A forming step s-8, a base film forming step s-9 of forming a base film for forming a first thin film pattern on the surface of the first insulating layer 10 in which the groove is formed,
A first thin-film pattern forming step s- for forming a first thin-film pattern 14 on the first insulating layer 10 which has been subjected to the base treatment;
10, and a build-up forming surface forming step s for forming a build-up forming surface 15a by flattening the surface of the first thin film pattern 14 formed on the first insulating layer 10 with high precision.
Go through -11.

The manufacturing process of the high-frequency element layer 4 includes a high-frequency passive element forming step s-1 for forming high-frequency passive elements such as the capacitor 11 and the resistor 12 in the first thin film pattern 14.
2, an upper electrode film forming step s-13 of forming an upper electrode on the capacitor 11, and a second step of forming a second insulating layer 17 for forming a second thin film pattern 18 on the build-up forming surface 15a. A second thin film pattern forming step s-14 having a predetermined high-frequency passive element or the like on the second insulating layer 17;
The high-frequency element layer 4 is manufactured through -15.

The high-frequency element layer 4 is formed by the above steps.
First, in a first insulating layer forming step s-7, an insulating dielectric material is supplied onto the high-frequency element layer forming surface 3 of the base substrate 2 manufactured through the above-described base substrate manufacturing step. Thus, a first insulating layer 10 is formed. As the insulating dielectric material to be the first insulating layer 10, a material having a low dielectric constant and a low Tan δ, that is, a material having excellent high-frequency characteristics and excellent heat resistance and chemical resistance is used as in the core substrate 5. Specifically, for example, benzocyclobutene (BC) is used as the insulating dielectric material.
B), polyimide, polynorbornene (PNB), liquid crystal polymer (LCP), epoxy resin, acrylic resin, or the like is used. As a method of forming the first insulating layer 10, for example, a spin coating method, a curtain coating method, a low coating method, a dip coating method, or the like, which is easy to control the thickness or the like, is applied.

Next, as shown in FIG.
A plurality of vias 16 are formed on the first insulating layer 10 formed thereon. These vias 16 are formed corresponding to the lands 30 of the third wiring layer 8a exposed on the high-frequency element layer formation surface 3, and expose the lands 30 to the outside. When a photosensitive resin is used as the insulating dielectric material, these vias 16 are formed by forming a mask formed in a predetermined pattern on the first insulating layer 10 and using a photolithographic method. It is not limited to this method, and may be formed by other appropriate methods.

Next, a groove for forming the first thin film pattern 14 is formed by performing a groove forming step s-8 on the surface of the first insulating layer 10 in which the via 16 is formed.

When forming a groove for forming the first thin film pattern 14, first, the first thin film pattern 14 is formed on the first insulating layer 10, as shown in FIG. A mask 31 for opening a portion is formed by patterning. The mask 31 is formed for etching the first insulating layer 10 and is masked with, for example, a resist film, but is not limited thereto, and is not limited to reactive ion etching (Reactive Ion Etching). It may be masked with a dry-etchable metal film or the like.

Next, the first insulating layer 10 on which the mask 31 is formed is etched.

Next, the mask 31 formed on the etched first insulating layer 10 is removed.

As described above, as shown in FIG.
A groove 32 having a predetermined depth is formed on the surface of the first insulating layer 10. The depth of the groove 32 becomes the thickness of the first thin film pattern 14 formed in a later step.

Next, as shown in FIG. 15, a base film forming step s is formed on the surface of the first insulating layer 10 in which the groove 32 has been formed.
Apply -9. By this base film forming step s-9, the first
A base film 34 for improving the adhesion of the thin film pattern 14 is formed on the surface of the first insulating layer 10. This base film 33
Is formed by forming a barrier metal such as Ni, Cr, Ti or the like by a sputtering method, an evaporation method, or the like.

Next, as shown in FIG. 16, in a first thin film pattern forming step s-10, a first thin film made of, for example, Cu is formed on the first insulating layer 10 on which the base film 33 is formed. The pattern 14 is formed. Thus, the first thin film pattern 14 is formed on the high-frequency element layer forming surface 3 via the first insulating layer 10 to form a first high-frequency circuit section 15.

At this time, if the first thin film pattern 14 is formed thicker than the thickness of the first insulating layer 10, the via 16 becomes
It is formed in a state embedded with u. In this case, when the build-up forming surface 15a is flattened with high precision in the subsequent build-up forming surface forming step s-11, even the end of the via 16 exposed on the build-up forming surface 15a is flattened with high precision. Will be done. In addition, such a thick first
The thin film pattern 14 is desirably formed by, for example, a plating method or the like.

On the other hand, if the first thin film pattern 14 is formed to be thinner than the thickness of the first insulating layer 10, it becomes difficult to fill the via 16 with Cu. However, in the subsequent build-up forming surface forming step s-11, When the first thin film pattern 14 is polished to form the build-up forming surface 15a, the amount of polishing can be reduced. It is desirable that such a thin first thin film pattern 14 is formed by, for example, a sputtering method or a CVD (Chemical Vapor deposition) method.

Next, as shown in FIG. 17, a build-up forming surface forming step s-
11 is performed to form a build-up forming surface 15a that is flattened with high precision. Specifically, the build-up forming surface 15a is formed by performing a polishing process on the main surface of the uppermost layer of the first high-frequency circuit unit 15 until the first insulating layer 10 is exposed.

The polishing process for forming the build-up forming surface 15a is performed by an appropriate polishing method. Among them, particularly, a chemical mechanical polishing (hereinafter, referred to as CMP: Chemical-M
Called ecanical porishing. It is preferable to carry out by the method. In this CMP method, it is possible to selectively polish only Cu and to polish while preventing dishing (dents) that may be caused by polishing on the ground portion 34 and the like of the first thin film pattern 14.

Next, the first thin film pattern 14 is subjected to a high-frequency passive element forming step s-12,
1. High-frequency passive elements such as the register 12 are formed.

When forming these high-frequency passive elements on the first thin film pattern 14, first, as shown in FIG.
Tantalum nitride (Ta) is formed on the entire surface of the build-up formation surface 15a.
N) The film 35 is formed. The TaN film 35 is a base film of a tantalum oxide (TaO) dielectric film that becomes the capacitor 11 by anodic oxidation. This TaN film 3
The film forming method 5 is preferably, for example, a sputtering method capable of forming a film to a thickness of about 2000 °.

Next, as shown in FIG. 19, in order to anodize only a desired portion of the TaN layer 35 formed on the build-up formation surface 15a, a mask 3 is formed on the TaN layer 35.
6 is formed. As a result, only the TaN layer 35 facing outward from the opening 37 of the mask 36 is anodized.

Next, the TaN layer 35 facing outward from the opening 37 of the mask 36 is anodized. In this anodizing treatment, for example, a voltage of 50 to 200 V is applied so that TaN becomes an anode in an electrolytic solution such as ammonium borate, so that the TaN layer 35 is oxidized.
A TaO layer 38 is formed. Note that the voltage applied to TaN can be adjusted to form the TaO layer 38 to a predetermined thickness.

Next, as shown in FIG. 20, the mask 36 formed on the anodized TaN layer 35 is removed. Thereby, the TaO layer 38 in which the surface of the TaN layer 35 is selectively oxidized can be used as the dielectric material of the capacitor 11.

Next, as shown in FIG.
Then, dry etching or the like is performed in a state where the formation sites of the capacitor 11 and the resistor 12 are masked with a resist or the like. Thereby, the capacitor 11 and the resistor 1
2 can be patterned at the same time.

As described above, high-frequency passive elements such as the capacitor 11 and the resistor 12 are formed on the first thin film pattern.

Next, as shown in FIG.
The upper electrode 39 is formed by performing an upper electrode film forming step s-13 on the substrate 1. The upper electrode 39 is, for example, A
A metal material such as l, Cu, Pt, or Au is formed through a base layer such as Cr, Ni, or Ti for improving adhesion. For example, when Al and Cu are used as the material of the upper electrode 39, the upper electrode 39 is formed by sputtering or the like.
After the film is formed to a thickness of about 000 °, the film is formed in a predetermined pattern shape by masking, etching and the like. Further, it is also possible to form a film by a lift-off method or the like.

Next, the second on the build-up forming surface 15a
By performing the insulating layer forming step s-14, the second insulating layer 17 made of an insulating dielectric material is formed. Second
As the insulating dielectric material to be the insulating layer 17, a material having a low dielectric constant and a low Tanδ like the core substrate 5 and the first insulating layer 10, that is, a material excellent in high-frequency characteristics and excellent in heat resistance and chemical resistance is used. Used. Specifically, for example, benzocyclobutene (BCB), polyimide, polynorbornene (PNB), liquid crystal polymer (LCP), epoxy resin, acrylic resin, or the like is used as the insulating dielectric material.

Since the second insulating layer 17 is formed on the build-up forming surface 15a that has been flattened with high precision, the second insulating layer 17 is a layer having a high smoothness and a uniform thickness. Note that the second insulating layer 17 is formed on the build-up formation surface 15a by the same method as that of the first insulating layer 10.

Next, as shown in FIG. 23, a plurality of vias 20 are formed in the second insulating layer 17 formed on the build-up formation surface 15a. These vias 20
Is the via 1 exposed on the build-up forming surface 15a.
6. The upper electrode 39 formed on the capacitor 11 and the land 14a of the first thin film pattern 14 are formed corresponding to the via 16, the upper electrode 39, and the land 14a.
To the outside.

Further, when these vias 20 are formed by a photolithographic method, a mask with no pattern shift can be formed on the surface of the second insulating layer 17 having high smoothness, so that the vias 20 are formed with high precision. be able to. The via 20 is not limited to being formed by the photolithographic method, but may be formed by any other appropriate method.

Next, a second thin film pattern 18 is formed on the second insulating layer 17 by a second thin film pattern forming step s-15.

When the second thin film pattern 18 is formed on the second insulating layer 17, first, as shown in FIG.
A base film 40 made of Cu or Ni for improving the adhesion of the second thin film pattern 18 is formed on the highly smooth surface of the second insulating layer 17 by a sputtering method or the like for 250 to 5,000.
The film is formed to a thickness of Å.

Next, as shown in FIG. 25, a thickness of 12 μm is formed on the second insulating layer 17 on which the base film 40 is formed by photolithography to open a portion where the second thin film pattern 18 is to be formed. A mask 41 of about a degree is formed by patterning. At this time, the mask 41 is made of a second material having high smoothness.
Is formed on the surface of the insulating layer described above, so that a pattern in which the dimensional deviation is suppressed is obtained. The mask 41 is not limited to being formed by the photolithographic method, but may be formed by any other appropriate method or material.

Next, as shown in FIG. 26, a Cu layer 42 having a thickness of about 10 μm is formed on the second insulating layer 17 on which the mask 41 is formed, for example, by plating.

Next, as shown in FIG. 27, the mask 41 is removed from the second insulating layer 17 and the mask 41 is removed.
The underlying film 40 exposed after the removal is also removed by performing etching or the like.

As described above, the second thin film pattern 18 is formed on the second insulating layer 17. Thereby, the second high-frequency circuit section 19 is formed in which the second thin film pattern 18 is formed on the build-up forming surface 15a via the twenty-first insulating layer 14.

The second thin film pattern 18 can be formed with high precision because it is patterned by the mask 41 having a pattern in which the dimensional deviation is suppressed. Also, the second thin film pattern 18
The inductor 13 is partially formed, and it is preferable that the inductor 13 be formed to have a thickness of 5 μm or more so as to function sufficiently even at a low frequency.

Through the steps described above, the high-frequency element layer 4 can be manufactured on the base substrate 2.

Next, in order to form a resist layer, the surface of the base substrate 2 on the side of the second main surface 5b of the core substrate 5 is changed to the fourth surface.
Is polished until the wiring layer 9a is exposed.

Next, as shown in FIG. 28, permanent resist layers 43a and 43b are formed on the entire surface of the high-frequency element layer 4 and the entire surface of the base substrate 2 where the fourth wiring layer 9a is exposed. At this time, the openings 4 are formed at predetermined positions in the permanent resist layers 43a and 43b by photolithography or the like.
4a and 44b are provided. One of the openings 44a has the second thin film pattern 18 facing the outside, and the other opening 44b has the fourth wiring layer 9a facing the outside.

Next, as shown in FIG. 29, electrode openings 45a made of Au or Ni are formed in these openings 44a and 44b.
45b is formed by plating or the like.

As described above, the high-frequency module 1 to which the present invention is applied can be manufactured.

In the high-frequency module 1 manufactured as described above, the build-up forming surface 15 which is flattened with high precision is provided.
Since the smoothness of the surface of the second insulating layer 17 formed on the second insulating layer 17 is improved, the formation accuracy of the second thin film pattern 18 formed on the second insulating layer 17 is improved, and Variations in the thickness of the passive element layer 4 can be suppressed.

Therefore, in the high-frequency module 1, the second wiring pattern 18 is formed with high accuracy, and variations in the thickness of the high-frequency element layer 4 are suppressed, so that the area, the thickness, and the size are reduced. Can be.

In the high-frequency module 1 to which the present invention is applied, since the smoothness of the surface of the second insulating layer 17 is enhanced, the vias 20 formed in the second insulating layer 17 can be precisely formed. Can be formed. Thus, in the high-frequency module 1, the vias 20 are appropriately formed without variation in the radial dimension, so that the area can be reduced.

Furthermore, in the high-frequency module 1 to which the present invention is applied, the build-up forming surface 15a is highly accurately formed so that even the end surface of the via 16 exposed on the build-up forming surface 15a becomes a uniform flat surface. It has been flattened. Thus, in the high-frequency module 1, the vias 20 can be formed on the end surfaces of the vias 16 exposed on the build-up forming surface 15a, so that the area can be reduced.

Furthermore, in the high-frequency module 1 to which the present invention is applied, the main surface of the uppermost layer of the second high-frequency passive element section 19 is flattened with high precision in the same manner as the method of forming the build-up formation surface 15a. A second buildup formation surface can be formed. By repeating this one by one,
In the high-frequency module 1, a thin film pattern of which a part is a high-frequency passive element in the high-frequency element layer 4 can be accurately formed over three or more layers.

Furthermore, in the high-frequency module 1 to which the present invention is applied, the core substrate 5 of the base substrate 2 and the insulating layer of the high-frequency element layer 4 are formed of a relatively inexpensive organic material having excellent high-frequency characteristics. Thus, material costs can be significantly reduced.

In the high-frequency module 1 described above, the electrode terminal 45 formed on the high-frequency element layer 4 side is used.
a constitutes a connection terminal connected to the high-frequency IC 90 and the chip component 91. In this high-frequency module 1, the electrode terminals 45 b formed on the second wiring pattern layer 13 side of the base substrate part 2 constitute, for example, connection terminals and input / output terminal parts 29 when mounted on a mother substrate 93. High frequency I
C90 is, for example, a flip chip 9 as shown in FIG.
4 is implemented by a flip-chip method.

As shown in FIG. 1, the high-frequency module 1 has a high-frequency IC 90 and a chip component 91 mounted on the surface of the high-frequency element layer 4 by a flip-chip method or the like, and is entirely covered by a shield cover 92. I have. For this reason, in the high-frequency module 1, it is preferable to provide a heat radiation structure in order to generate heat from the high-frequency IC 90 and the chip component 91 in the shield cover 92.

Then, in the high-frequency module 1,
For example, as shown in FIG.
The space between the upper surface of the cover 0 and the inner surface of the shield cover 92 is filled with a thermally conductive resin material 95. In the high-frequency module 1, the high-frequency IC
The heat generated from 90 is transmitted to the shield cover 92 and is radiated to the outside through the shield cover 92. As a result, in the high-frequency module 1, the relatively large-sized high-frequency IC 90 includes the heat conductive resin 95 and the shield cover 92.
Thus, the mechanical rigidity is improved.

The heat radiation structure of the high-frequency module 1 is not necessarily limited to the structure using the heat conductive resin material 95 described above, but may be a structure having a cooling via or the like therein. Is also good.

In the high-frequency module 1 described above,
A first z-resin-coated copper foil 8 and a third resin-coated copper foil 24 are provided on the first main surface 5a side of the core substrate 5 composed of a double-sided substrate as a core, and a second Although the process of manufacturing the four-layer base substrate 2 in which the resin-attached copper foil 9 and the fourth resin-attached copper foil 25 are joined is employed, the present invention is limited to such a process of manufacturing the base substrate 2. Of course it is not.

The manufacturing process of the base substrate 50 shown in FIG.
Using 1b, a base substrate 50 similar to the above-described base substrate 2 is manufactured. In the manufacturing process of the base substrate 50, since the individual processes are the same as those of the above-described manufacturing process of the base substrate 2, detailed description thereof will be omitted.

When manufacturing the base substrate 50, first, a predetermined pattern is formed on the double-sided substrate 51 shown in FIG. 31 (a) by subjecting the conductor portions 52a and 52b on the front and back main surfaces to photolithographic processing. Then, predetermined circuit patterns 53a and 53b are formed by etching as shown in FIG.

Next, as shown in FIG. 13C, two double-sided boards 51a and 51b on which predetermined circuit patterns 53a and 53b are formed are joined via, for example, an intermediate resin material.

Next, as shown in FIG. 14D, via connection is made to each of the circuit patterns 53a and 53b of the double-sided substrates 51a and 51b to produce a base substrate intermediate 55.

Next, as shown in FIG. 14E, the front and back main surfaces of the base substrate intermediate body 55 are first pressed by hot pressing.
Is bonded to the second resin-coated copper foil 57.

Next, the first resin-coated copper foil 56 and the second
Is polished with the resin-coated copper foil 57.

Next, as shown in FIG. 17F, the first resin-coated copper foil 56 is polished on the first double-sided board 51a side so that the circuit pattern 53a is exposed to the outside. As a result, the high-frequency element layer formation surface 58 that is flattened with high precision is formed.

Next, on the first double-sided board 51b side, the second double-sided board 51b is so protected that the circuit pattern 53b is not exposed to the outside.
Is applied to the resin-coated copper foil 57.

As described above, the base substrate 50 can be manufactured.

The manufacturing process of the base substrate 60 shown in FIG.
The method is characterized in that a liquid resin material 61 is applied by a dip coating method on the base substrate intermediate 55 shown in FIG.

When manufacturing the base substrate 60, first, a liquid resin material 61 dissolved by an appropriate solvent is stored in a dip tank 62, and as shown in FIG. The base substrate intermediate 55 is immersed.

Next, after dipping the base substrate intermediate 55 for a predetermined time, it is taken out of the dipping tank 62 at a predetermined pulling speed. Thus, the resin layers 63a and 63b of the liquid resin material 61 are simultaneously formed on the front and back main surfaces of the base substrate intermediate 55 as shown in FIG.

Next, the resin layers 63a, 63
The base substrate intermediate body 55 with b is held in a horizontal state and subjected to a baking process to evaporate excess organic components.

Next, as shown in FIG.
Polishing is performed on the 3a side so that the circuit pattern 53a is exposed to the outside. As a result, the high-frequency element layer formation surface 64 that is flattened with high precision is formed.

Next, the resin layer 63b is polished so that the circuit pattern 53b is not exposed to the outside.

As described above, the base substrate 60 can be manufactured.

In the manufacturing process of the base substrate 60, the thickness of the resin layers 63a and 63b can be obtained by controlling the concentration of the liquid resin material 61, the immersion time or the pulling speed. The resin layers 63a, 6
For 3b, for example, a directional chemical etching method (RIE:
Reactive Ion Etching) or plasma etching (P
E: Plasma Etching) and other dry etching methods
The flattening may be performed.

[0134]

As described above in detail, according to the present invention, the build-up forming surface of the first high-frequency circuit section in the high-frequency element layer section is flattened with high precision. Since the surface of the second insulating layer formed on the surface has a structure with high smoothness, the accuracy of forming the second thin film pattern formed via the second insulating layer is improved. At the same time, variation in the thickness of the high-frequency element layer can be suppressed. Further, according to the present invention, since the smoothness of the surface of the second insulating layer is enhanced, it is possible to accurately form a via formed in the second insulating layer. Further, according to the present invention, in the high-frequency element layer portion, the main surface of the uppermost layer of the second high-frequency circuit portion is flattened with high precision in the same manner as in the method of forming the build-up formation surface of the first high-frequency circuit portion. By repeating this, a thin film pattern can be accurately formed over three or more layers. Further, according to the present invention, the dielectric layer and the insulating layer constituting the multilayer substrate portion and the high-frequency element layer portion are formed of a relatively inexpensive organic material having excellent high-frequency characteristics. Can be planned. Thus, according to the present invention,
A high-frequency module device with a small area, a small thickness, a small size, and a low cost can be obtained.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view of a high-frequency module according to the present invention.

FIG. 2 is a process chart for manufacturing a base substrate of the high-frequency module.

FIG. 3 is a view for explaining a method of manufacturing a base substrate used in the high-frequency module, and is a longitudinal sectional view showing a state where a copper foil layer is formed on a core substrate.

FIG. 4 is a view for explaining a method of manufacturing a base substrate used in the high-frequency module, and is a longitudinal sectional view showing a state where first and second wiring layers are formed on a core substrate.

FIG. 5 is a view for explaining the method for manufacturing the base substrate used in the high-frequency module, and is a longitudinal sectional view showing a state where the first and second resin-coated copper foils are joined.

FIG. 6 is a view for explaining the method of manufacturing the base substrate used in the high-frequency module, and is a longitudinal sectional view showing a state in which a via is formed in the resin layer.

FIG. 7 is a view for explaining the method for manufacturing the base substrate used in the high-frequency module, and is a longitudinal sectional view showing a base substrate intermediate.

FIG. 8 is a view for explaining the method of manufacturing the base substrate used in the high-frequency module, and is a longitudinal sectional view showing a state where third and fourth copper foils with resin are joined.

FIG. 9 is a view for explaining the method for manufacturing the base substrate used in the high-frequency module, and is a longitudinal sectional view showing a state where third and fourth resin-coated copper foils are joined.

FIG. 10 is a view for explaining the method of manufacturing the base substrate used in the high-frequency module, and is a longitudinal sectional view showing the completed base substrate.

FIG. 11 is a process chart for manufacturing a high-frequency element layer of the high-frequency module.

FIG. 12 is a view for explaining the method for manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where the first insulating layer is formed on the base substrate.

FIG. 13 is a view for explaining the method of manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where a mask is formed on the first insulating layer.

FIG. 14 is a view for explaining the method of manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where a groove is formed in the first insulating layer.

FIG. 15 is a view for explaining the method of manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state in which a base film is formed on the first insulating layer.

FIG. 16 is a view for explaining the method of manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where the first thin film pattern is formed on the first insulating layer.

FIG. 17 is a view for explaining the method of manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where the first high-frequency circuit portion having the build-up forming surface is formed on the base substrate. It is.

FIG. 18 is a view for explaining the method of manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where a tantalum nitride film is formed on the build-up formation surface.

FIG. 19 is a view for explaining the method of manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where a mask is formed on the tantalum nitride film.

FIG. 20 is a view for explaining the method for manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where the tantalum nitride film has been subjected to the anodic oxidation treatment.

FIG. 21 is a view for explaining the method of manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where the high-frequency passive element is formed on the build-up formation surface.

FIG. 22 is a view for explaining the method for manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where the upper electrode is formed on the capacitor.

FIG. 23 is a view for explaining the method for manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where the second insulating layer is formed on the build-up formation surface.

FIG. 24 is a view for explaining the method for manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal cross-sectional view showing a state in which a base film is formed on the second insulating layer.

FIG. 25 is a view for explaining the method for manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where a mask is formed on the second insulating layer.

FIG. 26 is a view for explaining the method of manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where a Cu layer is formed on the second insulating layer.

FIG. 27 is a view for explaining the method for manufacturing the high-frequency element layer used in the high-frequency module, and is a longitudinal sectional view showing a state where the second high-frequency circuit section is formed on the first high-frequency circuit section. .

FIG. 28 is a view for explaining the method for manufacturing the high-frequency module, and is a longitudinal sectional view showing a state where a permanent resist layer is formed.

FIG. 29 is a view for explaining the method for manufacturing the high-frequency module, and is a longitudinal sectional view showing the completed high-frequency module.

FIG. 30 is a longitudinal sectional view of a high-frequency module provided with a heat dissipation structure.

31A and 31B are views for explaining another method of manufacturing the base substrate, wherein FIG. 31A is a longitudinal sectional view showing a double-sided board, and FIG. 31B is a longitudinal section showing a state in which a circuit pattern is formed. (C) is a longitudinal sectional view showing a state where the two-sided substrates are joined together, (d) is a longitudinal sectional view showing a base substrate intermediate, and (e) is a first and a second. FIG. 4F is a longitudinal sectional view showing a state in which the resin-attached copper foil is joined, and FIG. 4F is a longitudinal sectional view showing a base substrate.

32A and 32B are views for explaining a method of manufacturing a base substrate by dip coating, wherein FIG. 32A is a longitudinal sectional view showing a base substrate intermediate, and FIG. A diagram showing a state in which a resin material is dip-coated,
FIG. 4C is a longitudinal sectional view showing a state in which a liquid resin material is dip-coated on the base substrate intermediate, and FIG. 4D is a longitudinal sectional view showing the base substrate.

FIG. 33 is a configuration diagram of a high-frequency transmission / reception circuit based on a super heterodyne system.

FIG. 34 is a configuration diagram of a high-frequency transmitting / receiving circuit using a direct conversion method.

FIGS. 35A and 35B are explanatory views of an inductor portion provided in a conventional high-frequency module. FIG. 35A is a perspective view of a main part, and FIG. 35B is a longitudinal sectional view of the main part.

FIG. 36 is a longitudinal sectional view showing a configuration in which a silicon substrate is used as a base substrate of the high-frequency module.

FIG. 37 is a longitudinal sectional view showing a configuration in which a glass substrate is used as a base substrate of the high-frequency module.

FIG. 38 is a longitudinal sectional view showing a state where the build-up forming surface of the high-frequency module has irregularities.

[Explanation of symbols]

1 high frequency module, 2,50,60 base substrate,
3 high-frequency element layer forming surface, 4 high-frequency element layer, 5 core substrate, 6 first wiring layer, 7 second wiring layer, 8 first
Copper foil with resin, 8a third wiring layer, 9 second copper foil with resin, 9a fourth wiring layer, 10 first insulating layer, 11
Capacitor, 12 resistor, 13 inductor, 14
1st thin film pattern, 15 1st high frequency circuit section, 1
5a Build-up forming surface, 16, 20 via, 17 second insulating layer, 18 second thin film pattern, 19 second high-frequency circuit section, 23 base substrate intermediate, 24 third copper foil with resin, 25th 4, copper foil with resin 43a, 43b
Permanent resist layer, 45a, 45b electrode terminal

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H05K 3/46 H05K 3/46 X F-term (Reference) 5E346 AA02 AA12 AA13 AA15 AA43 BB20 CC08 CC09 CC10 CC21 CC32 DD12 DD22 EE31 EE33 FF17 GG40

Claims (14)

[Claims] 1. A multi-layer substrate portion in which a conductor pattern is laminated via a dielectric layer and a main surface of an uppermost layer thereof is flattened; A first high-frequency circuit portion in which a first thin film pattern as an element is formed via a first insulating layer; and a main surface of the uppermost layer of the first high-frequency circuit portion is flattened to build. And a second high-frequency circuit portion having a second thin-film pattern partially formed as a high-frequency passive element formed on the build-up formation surface via a second insulating layer. A high-frequency module device characterized by the above-mentioned. 2. The first high-frequency circuit section has a first via electrically connected to the multilayer substrate section, and the second high-frequency circuit section has the first via and the first high-frequency circuit section. 2. The high-frequency module device according to claim 1, wherein a second via electrically connected is formed, and the first via and the second via are connected to each other. 3. 3. The high-frequency module device according to claim 1, wherein a build-up forming surface of said first high-frequency circuit portion is flattened by chemical mechanical polishing. 4. The high-frequency passive element formed on a part of the first thin-film pattern and the second thin-film pattern is one or more of an inductor, a capacitor, and a resistor. The high-frequency module device according to claim 1. 5. The high-frequency module device according to claim 1, wherein the first thin film pattern and the second thin film pattern are formed by a plating method and / or a thin film technology. 6. The method according to claim 1, wherein the dielectric layer is made of one or more of benzocyclobutene, polyimide, polynorbornene, bismaleidotriazine, polyphenolethylene, liquid crystal polymer, epoxy resin, and acrylic resin. The high-frequency module device according to claim 1. 7. The method according to claim 1, wherein the first insulating layer and the second insulating layer are made of any one of benzocyclobutene, polyimide, polynorbornene, bismaleidotriazine, polyphenolethylene, liquid crystal polymer, epoxy resin, and acrylic resin. 2. The high-frequency module device according to claim 1, comprising one or more types. 8. A multi-layer board portion forming step of forming a multi-layer board portion in which a conductor pattern is laminated via a dielectric layer and a main surface of the uppermost layer is flattened, and a part of the multi-layer board portion is formed on the multi-layer board portion. Builds by performing a first step of forming a first thin film pattern to be a high-frequency passive element via a first insulating layer, and performing a flattening process on a main surface of an uppermost layer of the first high-frequency circuit section. A second step of forming an up-formed surface; and forming a second thin film pattern partially forming a high-frequency passive element on the build-up formed surface of the first high-frequency circuit section via a second insulating layer. Forming a high-frequency element layer section through the third step and a high-frequency element layer section forming step. 9. The step of forming a high-frequency element layer portion includes the steps of: forming a first via electrically connected to the multilayer substrate portion with the first high-frequency circuit portion; and forming the first via into the second high-frequency circuit portion. 9. The method for manufacturing a high-frequency module device according to claim 8, further comprising a step of forming a second via electrically connected to the first high-frequency circuit unit while being connected to the via. 10. The method according to claim 8, wherein in the second step, a flattening process for forming a build-up forming surface of the first high-frequency circuit portion is performed by chemical mechanical polishing.
A manufacturing method of the high-frequency module device according to the above. 11. In the high-frequency element layer forming step, at least one of a capacitor, a resistor, and an inductor is provided as a high-frequency passive element in a part of the first thin film pattern and the second thin film pattern. The method for manufacturing a high-frequency module device according to claim 8, wherein the method is performed. 12. The high frequency device according to claim 8, wherein in the high frequency element layer forming step, the first thin film pattern and the second thin film pattern are formed by plating and / or thin film technology. Manufacturing method of module device. 13. The multi-layer substrate section forming step, wherein the dielectric layer is formed of one or more of benzocyclobutene, polyimide, polynorbornene, bismaleidotriazine, polyphenolethylene, liquid crystal polymer, epoxy resin, and acrylic resin. The method for manufacturing a high-frequency module device according to claim 8, wherein the seeds are formed by mixing. 14. In the high-frequency element layer forming step, the first insulating layer and the second insulating layer are made of benzocyclobutene, polyimide, polynorbornene, bismaleidotriazine, polyphenolethylene, liquid crystal polymer, epoxy resin. The method for manufacturing a high-frequency module device according to claim 8, wherein one or a plurality of acrylic resins are mixed and formed.