JP2002353602A - Conductive paste for mounting work with bumps - Google Patents

Conductive paste for mounting work with bumps

Info

Publication number
JP2002353602A
JP2002353602A JP2002059939A JP2002059939A JP2002353602A JP 2002353602 A JP2002353602 A JP 2002353602A JP 2002059939 A JP2002059939 A JP 2002059939A JP 2002059939 A JP2002059939 A JP 2002059939A JP 2002353602 A JP2002353602 A JP 2002353602A
Authority
JP
Japan
Prior art keywords
conductive paste
bumps
work
inspection
flip chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002059939A
Other languages
Japanese (ja)
Inventor
Toshio Nishi
壽雄 西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2002059939A priority Critical patent/JP2002353602A/en
Publication of JP2002353602A publication Critical patent/JP2002353602A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Conductive Materials (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide conductive paste for mounting a work with bumps by which, the work mounted on a board can be easily repaired, if the work is not accepted by a functional test. SOLUTION: The conductive paste 3 which is conductive even in uncured state at ordinary temperature is applied to the bumps 2 on a flip chip 1, and the bumps 2 are placed on pads 11 on a board 10. The probes 21 of an inspecting means 20 are brought into contact with pads 12 for inspection to conduct a functional test on the flip chip 1. When the result of the inspection is acceptable, underfill is injected into between the flip chip 1 and the board 10, and the conductive paste 3 and the underfill are cured by heating. If the result of the inspection is not acceptable, the flip chip 1 is removed from the board 10, and the residual conductive paste 3 sticking on the pads 11 on the board 10 is wiped off.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、バンプ付きワーク
のバンプを基板のパッド上に接合するバンプ付きワーク
の実装用導電性ペーストに関するものである。[0001] 1. Field of the Invention [0002] The present invention relates to a conductive paste for mounting a bumped work, which joins a bump of the bumped work to a pad of a substrate.

【０００２】[0002]

【従来の技術】フリップチップなどのバンプ付きワーク
を基板に実装する方法として、銀ペーストのような導電
性ペーストを用いる方法が知られている。従来の導電性
ペーストは、未硬化状態では導電性を有しておらず、加
熱処理を行って硬化させると導電性を発揮することか
ら、従来は次のようにしてバンプ付きワークを実装して
いた。2. Description of the Related Art As a method for mounting a work with a bump such as a flip chip on a substrate, a method using a conductive paste such as a silver paste is known. Conventional conductive paste does not have conductivity in the uncured state, and exhibits conductivity when cured by heat treatment.Therefore, conventionally, a work with bumps is mounted as follows. Was.

【０００３】すなわち、バンプ付きワークのバンプ若し
くは基板のパッド上に導電性ペーストを付着させた後、
バンプをパッド上に着地させてバンプ付きワークを基板
に搭載する。次に加熱処理を行って導電性ペーストを硬
化させることによりバンプをパッド上に固着する。導電
性ペーストを硬化させたことにより、導電性ペーストは
はじめて導電性を発揮することとなる。そこで基板の検
査用パッドに検査手段のプローブを接触させ、バンプ付
きワークの機能検査を行う。そして検査結果が合格であ
れば、バンプ付きワークと基板の間に必要に応じてアン
ダーフィルを注入した後、再度加熱処理を行ってアンダ
ーフィルを硬化させる。以上により実装は終了する。That is, after a conductive paste is deposited on bumps of a work with bumps or pads of a substrate,
The bump is landed on the pad, and the work with the bump is mounted on the substrate. Next, heat treatment is performed to cure the conductive paste to fix the bumps on the pads. By hardening the conductive paste, the conductive paste will exhibit conductivity for the first time. Then, the probe of the inspection means is brought into contact with the inspection pad of the substrate, and the function inspection of the work with bumps is performed. If the inspection result is acceptable, an underfill is injected between the work with bumps and the substrate as necessary, and a heating process is performed again to cure the underfill. Thus, the implementation ends.

【０００４】[0004]

【発明が解決しようとする課題】上記検査の結果が不合
格の場合には、バンプ付きワークを基板から取りはずし
てリペアすることが行われる。ところが従来方法は、導
電性ペーストを硬化させた後でなければ上記検査を行え
なかったため、リペア作業を行うには、バンプをパッド
に固着する硬化した導電性ペーストを治具を用いるなど
して剥がさねばならず、リペア作業に多大な手間を要す
るという問題点があった。If the result of the above inspection is rejected, the work with bumps is removed from the substrate and repaired. However, in the conventional method, the above-described inspection was performed only after the conductive paste was cured. However, there is a problem that the repair work requires a great deal of trouble.

【０００５】また上記従来方法では、検査結果が合格で
あれば、アンダーフィルを注入して再度加熱処理を行
い、アンダーフィルを硬化させる場合が多いため、かな
りの時間を要する加熱工程が前後２回必要であって生産
性があがらないだけでなく、バンプ付きワークは２回加
熱されるので熱ダメージを受けやすく、さらにはアンダ
ーフィルを加熱して硬化させる際に、その熱応力のため
に、先にパッドに固着されたバンプがパッドからはがれ
てしまうことがあるという問題点があった。In the above conventional method, if the inspection result is acceptable, the underfill is often injected and heat-treated again to cure the underfill. Not only is it necessary to reduce the productivity, but also the work with bumps is heated twice so that it is susceptible to thermal damage. In addition, there is a problem that the bump fixed to the pad may come off from the pad.

【０００６】したがって本発明は、上記従来方法の問題
点を解消し、バンプ付きワークの機能検査の結果が不合
格の場合には、バンプ付きワークのリペアを容易に行う
ことができるバンプ付きワークの実装用導電性ペースト
を提供することを目的とする。Therefore, the present invention solves the problems of the above-described conventional method, and when the result of the function test of the work with bumps is rejected, the work with bumps can be easily repaired. An object is to provide a conductive paste for mounting.

【０００７】[0007]

【課題を解決するための手段】本発明は、バンプ付きワ
ークのバンプを基板のパッドに接合する導電性ペースト
であって、常温の未硬化状態で導電性を有するものであ
る。SUMMARY OF THE INVENTION The present invention is a conductive paste for bonding bumps of a work with bumps to pads on a substrate, and has conductivity in an uncured state at room temperature.

【０００８】本発明の導電性ペーストは、常温の未硬化
状態で導電性を有するので、導電性ペーストを加熱処理
して硬化させる前にバンプ付きワークの機能検査を行う
ことが可能となり、したがって検査結果が不合格の場合
でも、バンプ付きワークのリペアを容易に行うことがで
きる。Since the conductive paste of the present invention has conductivity in an uncured state at room temperature, it is possible to perform a function test of a work with bumps before heating and curing the conductive paste. Even if the result is unacceptable, the work with bumps can be easily repaired.

【０００９】またバンプ付きワークと基板の間にアンダ
ーフィルを注入し、加熱処理を行って導電性ペーストと
アンダーフィルを共に硬化させる場合には、導電性ペー
ストとアンダーフィルを一緒に加熱処理してこれらを硬
化させることができ、したがって加熱処理は１回でよい
ので工程数を削減して生産性をあげることができ、さら
には導電性ペーストと共にアンダーフィルが硬化するこ
とにより、熱応力によってバンプがパッドからはがれる
のを防止し、バンプをパッド上に確実に固着することが
できる。When an underfill is injected between a work having bumps and a substrate and a heat treatment is performed to cure the conductive paste and the underfill together, the conductive paste and the underfill are heat-treated together. These can be cured, and therefore, only one heat treatment is required, so that the number of steps can be reduced and productivity can be increased. Further, the underfill is cured together with the conductive paste, so that the bumps can be formed by thermal stress. The bump can be prevented from peeling off, and the bump can be securely fixed on the pad.

【００１０】[0010]

【発明の実施の形態】図１、図２、図３、図４、図５、
図６、図７、図８、図９は本発明の一実施の形態におけ
るバンプ付きワークの実装工程図であって、実装順に示
している。なお本実施の形態のバンプ付きワークはフリ
ップチップである。以下、図１〜図９を参照してフリッ
プチップの実装工程を説明する。FIG. 1, FIG. 2, FIG. 3, FIG. 4, FIG.
FIGS. 6, 7, 8, and 9 are mounting process diagrams of a work with bumps according to an embodiment of the present invention, which are shown in the order of mounting. The work with bumps in the present embodiment is a flip chip. The flip chip mounting process will be described below with reference to FIGS.

【００１１】図１において、１はフリップチップであ
り、その下面にバンプ２を有している。３は導電性ペー
ストであり、浅い容器４に貯溜されている。導電性ペー
スト３の表面は、スキージ（図示せず）により平滑され
ている。この導電性ペースト３は、未硬化でも導電性を
有するものであり、その詳細は後述する。In FIG. 1, reference numeral 1 denotes a flip chip, which has bumps 2 on its lower surface. Reference numeral 3 denotes a conductive paste, which is stored in a shallow container 4. The surface of conductive paste 3 is smoothed by a squeegee (not shown). The conductive paste 3 has conductivity even when it is not cured, and will be described later in detail.

【００１２】図１〜図３に示すように、フリップチップ
１をノズル５の下端部に真空吸着して保持し、導電性ペ
ーストに対して下降・上昇動作を行わせることにより、
バンプ２の下面に導電性ペースト３を付着させる。As shown in FIGS. 1 to 3, the flip chip 1 is held at the lower end of the nozzle 5 by vacuum suction, and the lowering and raising operations are performed on the conductive paste.
The conductive paste 3 is attached to the lower surface of the bump 2.

【００１３】図４において、１０は基板であり、その上
面にはパッド１１と検査用パッド１２が形成されてい
る。パッド１１と検査用パッド１２は配線１３で接続さ
れている。図示するように、ノズル５に保持されたフリ
ップチップ１を基板１０の上方へ移動させ、そこでノズ
ル５を下降させることによりバンプ２をパッド１１上に
着地させ、次いで真空吸着状態を解除してノズル５を上
昇させることにより、フリップチップ１は基板１０に搭
載される。In FIG. 4, reference numeral 10 denotes a substrate on which pads 11 and test pads 12 are formed. The pad 11 and the inspection pad 12 are connected by a wiring 13. As shown in the figure, the flip chip 1 held by the nozzle 5 is moved above the substrate 10, and the nozzle 5 is lowered there to land the bump 2 on the pad 11. Then, the vacuum suction state is released and the nozzle 5 is released. By raising 5, flip chip 1 is mounted on substrate 10.

【００１４】次に、図５に示すようにフリップチップ１
の機能検査が行われる。この機能検査は、検査手段２０
のプローブ２１を検査用パッド１２に接触させ、フリッ
プチップ１に電流を流すことにより行われる。導電性ペ
ースト３は未硬化であるが、この導電性ペースト３は本
発明のために開発されたものであって未硬化でも導電性
を有する新規なものであり、この検査を行うことができ
る。なお後で図１１を参照して述べるように、実験結果
によれば、この機能検査は、４０℃〜６０℃程度に導電
性ペースト３を暖めて行うと、良い検査結果が得られ
た。その理由は不明である。但し、４０℃〜６０℃程度
では、導電性ペースト３は未硬化状態のままである。Next, as shown in FIG.
Is performed. This function inspection is performed by the inspection unit 20.
This is performed by bringing the probe 21 into contact with the inspection pad 12 and passing a current through the flip chip 1. Although the conductive paste 3 is uncured, the conductive paste 3 has been developed for the present invention and is a new material having conductivity even when uncured, so that this inspection can be performed. As will be described later with reference to FIG. 11, according to the experimental results, a good inspection result was obtained when the conductive paste 3 was warmed to about 40 ° C. to 60 ° C. The reason is unknown. However, at about 40 ° C. to 60 ° C., the conductive paste 3 remains uncured.

【００１５】図６および図７はこの検査結果が合格の場
合を示している。すなわち検査の結果が合格であれば、
図６に示すように注入器３０のニードル３１からアンダ
ーフィル３２を注出し、フリップチップ１と基板１０の
間に注入する。このアンダーフィル３２は熱硬化性の樹
脂である。次に加熱炉（図示せず）内で加熱処理を行っ
て導電性ペースト３とアンダーフィル３２を同時に加熱
することにより、これらを共に硬化させれば実装は終了
する（図７）。FIGS. 6 and 7 show a case where the inspection result is acceptable. In other words, if the result of the inspection passes,
As shown in FIG. 6, the underfill 32 is poured out from the needle 31 of the injector 30 and injected between the flip chip 1 and the substrate 10. The underfill 32 is a thermosetting resin. Next, a heating process is performed in a heating furnace (not shown) to simultaneously heat the conductive paste 3 and the underfill 32, so that they are cured together, thereby completing the mounting (FIG. 7).

【００１６】このように本方法は、上記検査結果が合格
の場合には、導電性ペースト３とアンダーフィル３２は
同時に加熱処理を行って一緒に硬化させることができ
る。したがって加熱処理は１回で済み、前後２回の加熱
処理が必要であった従来方法よりも工程数を削減して生
産性をあげることができ、またフリップチップ１が受け
る熱ダメージも小さくなる。さらには、アンダーフィル
３２が硬化することにより、熱応力によってバンプ２が
パッド４からはがれるのを防止でき、バンプ２をパッド
４上に確実に接合して固着することができる。As described above, according to the present method, if the above inspection result is acceptable, the conductive paste 3 and the underfill 32 can be simultaneously heated and cured together. Therefore, only one heat treatment is required, the number of steps can be reduced and productivity can be improved as compared with the conventional method which requires two heat treatments before and after, and the heat damage to the flip chip 1 is reduced. Furthermore, by curing the underfill 32, the bump 2 can be prevented from peeling off from the pad 4 due to thermal stress, and the bump 2 can be securely bonded and fixed on the pad 4.

【００１７】図８および図９は、上記検査結果が不合格
の場合を示している。この場合、図８に示すようにフリ
ップチップ１を基板１０から取りはずし、次に図９に示
すように基板１０のパッド１１上に残存付着する導電性
ペースト３を拭きとる。図８の工程は、導電性ペースト
３が未硬化の状態で行われるので、フリップチップ１を
難なく基板１０から取りはずし、またパッド１１上の導
電性ペースト３をきれいに拭きとることができる。なお
基板１０は一般に高価であり、導電性ペースト３をきれ
いに拭きとることにより再使用できる。FIGS. 8 and 9 show a case where the inspection result is rejected. In this case, the flip chip 1 is removed from the substrate 10 as shown in FIG. 8, and then the conductive paste 3 remaining on the pads 11 of the substrate 10 is wiped off as shown in FIG. Since the process of FIG. 8 is performed in a state where the conductive paste 3 is uncured, the flip chip 1 can be easily removed from the substrate 10 and the conductive paste 3 on the pad 11 can be wiped clean. The substrate 10 is generally expensive and can be reused by wiping the conductive paste 3 clean.

【００１８】次に、未硬化状態で導電性を有する上記導
電性ペースト３について説明する。（表１）は上記導電
性ペースト３の材料および配合比（重量％）を示すもの
である。また（表２）は、硬化しないと導電性を有しな
い従来の導電性ペーストの成分および配合比を示すもの
である。Next, the conductive paste 3 having conductivity in an uncured state will be described. Table 1 shows the materials and the mixing ratio (% by weight) of the conductive paste 3. Table 2 shows the components and the mixing ratio of the conventional conductive paste which does not have conductivity unless cured.

【００１９】[0019]

【表１】 [Table 1]

【００２０】[0020]

【表２】 [Table 2]

【００２１】（表２）において、従来は硬化剤としてジ
シアンジアミド及びイミダゾールを用いていた。これに
対し（表１）に示す本実施の形態の導電性ペーストの硬
化剤は、トリエタノールアミン及びイミダゾールを用い
ている。なお硬化剤としては、一般にアミン系の物質が
用いられる。In Table 2, dicyandiamide and imidazole were conventionally used as curing agents. On the other hand, as the curing agent for the conductive paste of the present embodiment shown in (Table 1), triethanolamine and imidazole are used. In addition, as a curing agent, an amine-based substance is generally used.

【００２２】図１０は、本発明の一実施の形態における
測定対象基板の断面図、図１１は本発明の一実施の形態
における導電性ペーストの導電性特性図である。図１０
において、パッド１１は銅パッドであり、パッド間隔Ｌ
は６０μｍ、パッドピッチＰは１２０μｍである。また
基板１０はガラエポ基板である。抵抗計３３によりパッ
ド間の抵抗値を測定した結果を図１１に示している。FIG. 10 is a cross-sectional view of a substrate to be measured in one embodiment of the present invention, and FIG. 11 is a diagram showing the conductive characteristics of the conductive paste in one embodiment of the present invention. FIG.
, The pad 11 is a copper pad and the pad interval L
Is 60 μm, and the pad pitch P is 120 μm. The substrate 10 is a glass epoxy substrate. FIG. 11 shows the result of measuring the resistance value between the pads by the resistance meter 33.

【００２３】図１１において、ａは（表１）に示す本実
施の形態の導電性ペースト，ｂは（表２）に示す従来の
導電性ペーストの導電性特性をそれぞれ示している。図
１１に示すように、従来の導電性ペーストは１００℃以
下の未硬化状態では抵抗値はきわめて大きく、１００℃
以上に加熱して硬化が始まらないと抵抗値は小さくなら
ない。これに対し本実施の形態の導電性ペーストは低温
（常温）の未硬化状態でも抵抗値は小さく、十分な導電
性を有している。なお図１１に示すように、本実施の形
態の導電性ペーストは、特に４０℃以上で抵抗値がより
小さくなるので、図５に示す検査は、４０〜６０℃程度
で行うことが望ましく、この程度の温度であれば、フリ
ップチップが熱ダメージを受けたり、バンプがパッドか
ら剥がれたりすることはない。In FIG. 11, a indicates the conductive property of the present embodiment shown in (Table 1), and b indicates the conductive property of the conventional conductive paste shown in (Table 2). As shown in FIG. 11, the conventional conductive paste has an extremely large resistance value in an uncured state at 100 ° C. or lower,
The resistance value does not decrease unless curing is started by heating as described above. On the other hand, the conductive paste of the present embodiment has a small resistance value even in an uncured state at a low temperature (normal temperature) and has sufficient conductivity. As shown in FIG. 11, the resistance of the conductive paste of the present embodiment becomes smaller particularly at 40 ° C. or higher. Therefore, the inspection shown in FIG. 5 is desirably performed at about 40 to 60 ° C. At such temperatures, the flip chip is not thermally damaged and the bumps do not peel off the pads.

【００２４】本発明は上記実施の形態に限定されないの
であって、例えば導電性ペースト３は図２および図３に
示す転写方式でバンプ２に付着させているが、スクリー
ン印刷法により基板１０のパッド１１上に付着させても
よい。The present invention is not limited to the above embodiment. For example, the conductive paste 3 is adhered to the bumps 2 by the transfer method shown in FIGS. 11 may be attached.

【００２５】[0025]

【発明の効果】本発明の導電性ペーストは、常温の未硬
化状態で導電性を有するので、導電性ペーストを加熱処
理して硬化させる前にバンプ付きワークの機能検査を行
うことが可能となり、したがって検査結果が不合格の場
合でも、バンプ付きワークのリペアを容易に行うことが
できる。Since the conductive paste of the present invention has conductivity in an uncured state at room temperature, it is possible to perform a function test of a work with bumps before heating and curing the conductive paste. Therefore, even if the inspection result is rejected, the work with bumps can be easily repaired.

【００２６】また導電性ペーストとアンダーフィルを一
緒に加熱処理してこれらを硬化させることができ、した
がって加熱処理は１回でよいので工程数を削減して生産
性をあげることができ、さらにはアンダーフィルが硬化
することにより、熱応力によってバンプがパッドからは
がれるのを防止し、バンプをパッド上に確実に固着する
ことができる。Further, the conductive paste and the underfill can be heat-treated together to cure them. Therefore, only one heat-treatment is required, so that the number of steps can be reduced and the productivity can be increased. By curing the underfill, it is possible to prevent the bump from peeling off from the pad due to thermal stress, and to securely fix the bump on the pad.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の一実施の形態におけるバンプ付きワー
クの実装工程図FIG. 1 is a mounting process diagram of a work with bumps according to an embodiment of the present invention.

【図２】本発明の一実施の形態におけるバンプ付きワー
クの実装工程図FIG. 2 is a mounting process diagram of a work with bumps according to an embodiment of the present invention.

【図３】本発明の一実施の形態におけるバンプ付きワー
クの実装工程図FIG. 3 is a mounting process diagram of a work with bumps according to an embodiment of the present invention.

【図４】本発明の一実施の形態におけるバンプ付きワー
クの実装工程図FIG. 4 is a mounting process diagram of a work with bumps according to an embodiment of the present invention.

【図５】本発明の一実施の形態におけるバンプ付きワー
クの実装工程図FIG. 5 is a mounting process diagram of a work with bumps according to an embodiment of the present invention.

【図６】本発明の一実施の形態におけるバンプ付きワー
クの実装工程図FIG. 6 is a mounting process diagram of a work with bumps according to an embodiment of the present invention.

【図７】本発明の一実施の形態におけるバンプ付きワー
クの実装工程図FIG. 7 is a mounting process diagram of a work with bumps according to an embodiment of the present invention.

【図８】本発明の一実施の形態におけるバンプ付きワー
クの実装工程図FIG. 8 is a mounting process diagram of a work with bumps according to an embodiment of the present invention.

【図９】本発明の一実施の形態におけるバンプ付きワー
クの実装工程図FIG. 9 is a mounting process diagram of a work with bumps according to an embodiment of the present invention.

【図１０】本発明の一実施の形態における測定対象基板
の断面図FIG. 10 is a cross-sectional view of a measurement target substrate according to an embodiment of the present invention.

【図１１】本発明の一実施の形態における導電性ペース
トの導電性特性図FIG. 11 is a diagram showing the conductivity characteristics of a conductive paste according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

１ フリップチップ ２ バンプ ３ 導電性ペースト １０ 基板 １１ パッド １２ 検査用パッド ２０ 検査手段 ２１ プローブ ３２ アンダーフィル DESCRIPTION OF SYMBOLS 1 Flip chip 2 Bump 3 Conductive paste 10 Substrate 11 Pad 12 Inspection pad 20 Inspection means 21 Probe 32 Underfill

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】バンプ付きワークのバンプを基板のパッド
に接合する導電性ペーストであって、常温の未硬化状態
で導電性を有することを特徴とするバンプ付きワークの
実装用導電性ペースト。1. A conductive paste for bonding bumps of a work with bumps, said conductive paste having a conductivity in an uncured state at room temperature, said bump being attached to a pad of a substrate.
JP2002059939A 2002-03-06 2002-03-06 Conductive paste for mounting work with bumps Pending JP2002353602A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002059939A JP2002353602A (en) 2002-03-06 2002-03-06 Conductive paste for mounting work with bumps

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002059939A JP2002353602A (en) 2002-03-06 2002-03-06 Conductive paste for mounting work with bumps

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP1086697A Division JP3307256B2 (en) 1997-01-24 1997-01-24 Mounting method of work with bump

Publications (1)

Publication Number Publication Date
JP2002353602A true JP2002353602A (en) 2002-12-06

Family

ID=19192985

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002059939A Pending JP2002353602A (en) 2002-03-06 2002-03-06 Conductive paste for mounting work with bumps

Country Status (1)

Country Link
JP (1) JP2002353602A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009526403A (en) * 2006-02-10 2009-07-16 ウィンテック インダストリーズ、インク． Electronic assembly with removable parts
JP2011114083A (en) * 2009-11-25 2011-06-09 Panasonic Electric Works Co Ltd Method and device for inspecting mounting structure for led

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009526403A (en) * 2006-02-10 2009-07-16 ウィンテック インダストリーズ、インク． Electronic assembly with removable parts
JP2011114083A (en) * 2009-11-25 2011-06-09 Panasonic Electric Works Co Ltd Method and device for inspecting mounting structure for led

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