JP2002344297A - Driver of electric load - Google Patents

Abstract

PROBLEM TO BE SOLVED: To match conduction time of an electrical load being command to an actual conduction time, regardless of the magnitude of impedance of the electrical load. SOLUTION: A current control circuit 20 controls the gate potential of a transistor Q11, such that a load current IL and a trapezoidal wave signal Sb coincide with each other. When a drive command signal Sa goes to H, the trapezoidal wave signal Sb increases with a constant inclination, and when the transistor Q11 operates in a linear region due to increase of the load current IL, the gate voltage VGS increases abruptly. A saturation state detecting circuit 21 brings a current saturation signal Sc to L, at a moment when the gate voltage VGS exceeds a reference voltage Vr, and in response thereto, a trapezoidal wave generating circuit 19 stops increase of the trapezoidal wave signal Sb and holds the trapezoidal wave signal Sb. When the drive command signal Sa goes to L, the trapezoidal wave signal Sb decreases with a fixed slope, and the load current IL follows up the trapezoidal wave signal Sb and decreases.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving apparatus for driving an electric load for supplying trapezoidal current to the electric load.

[0002]

2. Description of the Related Art The impedance (resistance) of an electric load such as a lamp or a coil changes due to heat generated by energization. And immediately after the start of energization with low resistance,
A larger current flows and noise is more likely to occur than during steady-state energization. The electric load driving device disclosed in Japanese Patent Application Laid-Open No. 2000-138570 has been made for the purpose of solving the above problem, and has an electric configuration shown in FIG.

That is, the load driving circuit 1 includes a resistor 4 and a MOS transistor 5 interposed on an energizing path from a battery 2 to a load 3 such as a lamp, and a trapezoidal wave generation circuit for generating a trapezoidal wave signal Sb according to a drive command signal Sa. It comprises a circuit 6 and a current control circuit 7 for controlling the gate voltage of the MOS transistor 5 by comparing the trapezoidal wave signal Sb with the voltage value detected by the resistor 4.

The trapezoidal wave generating circuit 6 comprises a capacitor (not shown), a constant current circuit for charging, a constant current circuit for discharging, and the like. Voltage (hereinafter referred to as upper side voltage)
Is a constant value. The current control circuit 7 inverts the trapezoidal wave signal Sb based on the ground potential to generate a trapezoidal wave signal Sd based on the battery potential VB, and the trapezoidal wave signal Sd after the inversion. An error amplifier circuit 9 controls the gate potential of the MOS transistor 5 so as to compare the voltage between both ends of the resistor 4 and match the two voltages.

[0005] According to this configuration, the current flowing through the lamp as the load 3 (hereinafter, referred to as a lamp current) gradually increases as the voltage of the trapezoidal wave signal Sb increases at the start of driving the lamp, When the driving of the lamp is stopped, the voltage gradually decreases as the voltage of the trapezoidal wave signal Sb decreases. If the drive command signal Sa is a periodic pulse signal, the lamp can be dimmed by changing its duty ratio.

[0006]

In the case where the load 3 is a lamp mounted on an automobile, the same type of lamp is not always installed at the time of lamp replacement. Different lamps, ie lamps with different impedance, may be installed.

In the driving circuit 1, a specific lamp having the largest rated current (for example, a lamp having a rated current of 6A) is connected with the lamps expected to be used.
The upper side voltage is determined so that the MOS transistor 5 operates in the saturation region until the trapezoidal wave signal Sb reaches the upper side voltage, and the MOS transistor 5 operates in the linear region when the trapezoidal wave signal Sb reaches the upper side voltage. ing. By determining the upper side voltage in this way, it is possible to prevent an increase in drain loss of the MOS transistor 5 when a lamp having a rated current smaller than 6 A is connected.

However, when a lamp having a smaller rated current than the specific lamp, that is, a lamp having a large impedance is connected, a problem occurs in dimming control. Hereinafter, this will be described with reference to FIG.

FIG. 6 shows waveforms at various parts when a specific lamp having a rated current of 6 A or another type of lamp having a rated current of 3 A is connected to the drive circuit 1.
The waveforms (a) to (f) represent the following signals, currents, and voltages, respectively. (A): drive command signal Sa (b): trapezoidal wave signal Sb (c): lamp current when a lamp with a rated current of 6 A is connected (d): lamp voltage when a lamp with a rated current of 6 A is connected (e) Lamp current when a lamp with a rated current of 3A is connected (f) ... Voltage across the lamp when a lamp with a rated current of 3A is connected

When a lamp having a rated current of 6 A is connected to the drive circuit 1, the voltage between both ends of the lamp (hereinafter, referred to as a lamp voltage) is a trapezoidal wave signal Sb based on the drive command signal Sa.
Increases or decreases with the rise or fall, and becomes substantially equal to the battery voltage VB while the trapezoidal wave signal Sb is at the upper side voltage. Therefore, if the duty ratio is defined as an energization threshold (indicated by a two-dot chain line in FIG. 6) for the trapezoidal lamp current, the intermediate level (3 A) of the current amplitude is always the drive command signal. It becomes equal to the duty ratio of Sa, and the dimming according to the command becomes possible.

On the other hand, when a lamp having a rated current of 3 A is connected to the drive circuit 1, the lamp voltage increases with the rise of the trapezoidal wave signal Sb, but before the trapezoidal wave signal Sb reaches the upper side voltage. At the time (time tb), the voltage becomes substantially equal to the battery voltage VB and stops increasing. Further, the lamp voltage starts decreasing a while after the trapezoidal wave signal Sb starts decreasing at the time td (time te). As a result, a waveform shift occurs between the lamp current and the trapezoidal wave signal Sb in the period from the time tb to tc and the period from the time td to te shown in FIG. 6, and the duty ratio of the lamp current (effective Is longer than the duty ratio of the drive command signal Sa (commanded energization time).

As described above, when a lamp having a smaller rated current than the specific lamp is connected to the drive circuit 1, the effective energizing time for determining the duty ratio of the lamp current, that is, the brightness of the lamp, is a drive command signal Sa. Will not match the dimming command. Further, the duty ratio of the lamp current cannot be sufficiently reduced, and the lamp cannot be sufficiently dimmed.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to supply a trapezoidal wave-like current to an electric load, regardless of the magnitude of the impedance of the electric load. The present invention provides a drive device for an electric load in which the energization time to the electric load and the actual energization time instructed by Eq.

[0014]

According to the first aspect of the present invention, a voltage proportional to the load current flowing through the electric load is generated in the detection resistor, and the current control means outputs a trapezoidal signal from the signal generation means. And the voltage value detected by the detection resistor is compared to control the switch means, so that a trapezoidal wave-like current flows through the electric load according to the trapezoidal wave signal. As a result, it is possible to prevent the load current from suddenly increasing at the start of energization of the electric load, and to suppress the generation of noise due to a sharp change in the load current.

The load current that can flow from the DC power supply to the electric load via the switch means has an upper limit determined by the voltage of the DC power supply, the impedance of the electric load, and the open / close state of the switch means. The saturated state detecting means detects a state (current saturated state) in which an upper limit current that can flow through the switch means flows within a switchable range of the switch means by the current control means. Then, the signal generating means starts a voltage change corresponding to the gradual increase of the load current when the drive start command signal is input, and stops the voltage change when the saturated state detecting means detects the current saturated state.

That is, according to this means, the upper side voltage of the trapezoidal wave signal is not controlled to a constant value, but to a value corresponding to the upper limit current determined by the voltage of the DC power supply and the impedance of the electric load. For this reason, the trapezoidal wave signal does not instruct a current exceeding the upper limit current that cannot actually flow, and the electric load always flows the current as instructed by the trapezoidal wave signal. As a result, when the drive stop command signal is input and the trapezoidal wave signal starts a voltage change corresponding to the gradual decrease of the load current, the load current immediately starts decreasing according to the trapezoidal wave signal.

Therefore, regardless of the magnitude of the impedance of the electric load to be connected, the load current always follows the trapezoidal wave signal generated based on the drive command signal, and the energizing time commanded by the drive command signal The effective conduction time of the trapezoidal load current (for example, the conduction time when an intermediate level of the current amplitude of the load current is set as the conduction threshold) matches.

According to the second aspect of the present invention, the ON state of the transistor is set so that the trapezoidal wave signal from the signal generating unit matches the voltage value detected by the detection resistor by the error amplification of the operational amplifier. As a result, the electric current always flows through the electric load as commanded by the trapezoidal wave signal.

According to the third aspect of the present invention, when the trapezoidal wave signal attempts to change beyond a value corresponding to the upper limit current that can flow through the electric load, the deviation of the load current with respect to the trapezoidal wave signal increases, The feedback control by the operational amplifier sharply increases the control voltage of the transistor. The comparator constituting the saturation state detecting means compares the control voltage of the transistor with a predetermined reference voltage,
This steep voltage rise, that is, the current saturation state can be detected. According to this means, even when the voltage of the DC power supply fluctuates, the current saturation state can be reliably detected.

According to the means described in claim 4, when the drive start command signal is input to the signal generation means when the drive stop command signal and the current saturation signal are not input, the second signal is output.
Since the constant current operation of the third constant current circuit is stopped, a constant charging current flows from the first constant current circuit to the capacitor, and the voltage across the capacitor starts a voltage change corresponding to the gradual increase of the load current. I do. Thereafter, when a current saturation signal is input, the third constant current circuit inputs the output current of the first constant current circuit, so that the charging current to the capacitor is cut off and the change in the voltage across the capacitor stops. . afterwards,
When the drive stop command signal is input, the second
Discharge current flows through the constant current circuit, and the voltage across the capacitor starts a voltage change corresponding to the gradual decrease of the load current. As a result, the trapezoidal signal described above is generated between both terminals of the capacitor.

According to the fifth aspect of the present invention, the upper side voltage of the trapezoidal wave signal is limited to a predetermined voltage. Therefore, when the voltage of the DC power supply is too high or the impedance of the electric load is too small, When the load current in the saturated state becomes excessive, it is possible to prevent an excessive load current exceeding a current corresponding to the predetermined voltage from flowing.

According to the sixth aspect, the drive start command signal and the drive stop command signal are PWM signals having a duty ratio according to the load current, and are commanded by the drive command signal as described above. Since the energization time is controlled so that the effective energization time of the load current matches, a current having a duty ratio equal to the duty ratio of the PWM signal flows through the electric load.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. FIG. 1 shows an electric configuration of a load driving circuit which is a driving device of an electric load. The load drive circuit 11 is configured as one IC together with a power supply circuit, a control circuit, and the like (not shown), and based on a drive command signal Sa input from the outside, a load 12 (corresponding to an electric load), for example, a head of a vehicle. Lights, various lamps provided on the instrument panel, interior lights, and the like are controlled to be turned on / off and dimmed.

A positive terminal and a negative terminal of a battery 13 (corresponding to a DC power supply) are connected to the power terminals 14 and 15 of the IC, respectively. Between load 1 described above
2 are connected. The drive command signal Sa is input to the input terminal 17 of the IC.

In the IC, a current flowing through the load 12 (load current IL) is provided between the power supply terminal 14 and the output terminal 16.
) And an N-channel type power MOS transistor Q11 (corresponding to switch means) functioning as a high-side switch, which is connected in series with a resistor R11 (corresponding to a detection resistor). .

The load driving circuit 11 includes a trapezoidal wave generating circuit 19 in addition to the resistor R11 and the MOS transistor Q11.
(Corresponding to a signal generating means), a current control circuit 20 (corresponding to a current controlling means), and a saturated state detecting circuit 21 (corresponding to a saturated state detecting means). Here, the trapezoidal wave generation circuit 19 and the saturation detection circuit 21 are characteristic circuit portions of the present invention. Hereinafter, a specific configuration of each circuit will be described.

FIG. 2 shows an electrical configuration of the trapezoidal wave generation circuit 19. In FIG. 2, a diode-connected PNP transistor Q12 and a resistor R12 are connected in series between a power supply line 22 connected to the power supply terminal 14 and a ground line 23 connected to the power supply terminal 15. I have. The base of the transistor Q12 is connected to each base of the PNP transistors Q13 to Q17 connected to the power supply line 22, and constitutes a current mirror circuit 24 as a whole. Here, transistors Q12-Q
17 have the same emitter area, and the collectors of the transistors Q14 and Q15 and the transistor Q14 have the same emitter area.
Collectors 16 and Q17 are connected to each other.

The trapezoidal wave generation circuit 19 comprises three constant current circuits 25, 26, 2 using the current mirror circuit 24.
7 is provided. The constant current circuit 26 (corresponding to a second constant current circuit) includes the transistors Q14, Q15,
A current mirror circuit 28 including NPN transistors Q18 and Q19, a PNP transistor Q20 connected between transistors Q14 and Q15 and transistor Q18, and an N connected in parallel with transistor Q18.
It is composed of a channel type MOS transistor Q21. The drive command signal Sa is input to the gate of the MOS transistor Q21.

The collector of the transistor Q19 is an output node n1 of the trapezoidal wave generation circuit 19, and a capacitor C11 is connected between the output node n1 and the ground line 23. As described later, a trapezoidal wave signal Sb having a trapezoidal voltage is generated at the output node n1 (between both terminals of the capacitor C11). A PNP transistor Q22 is connected between the collector of the transistor Q13 and this output node n1, and the constant current circuit 2 is connected by the transistors Q13 and Q22.
5 (corresponding to the first constant current circuit).

The constant current circuit 27 (corresponding to a third constant current circuit) includes a current mirror circuit 29 comprising the transistors Q16 and Q17, NPN transistors Q23 and Q24, transistors Q16 and Q17 and a transistor Q2.
3 and an N-channel MOS transistor Q26 connected in parallel with the transistor Q23. MO
A current saturation signal Sc described later is input to the gate of the S transistor Q26.

Here, the transistors Q20, Q22, Q
Numeral 25 is used to suppress the Early effect of the transistors Q13 to Q17. The bases of the transistors Q13 to Q17 are connected in common and the diodes D1 and D2 having the illustrated polarities are connected.
Is connected to the power supply line 22 via the. The common base line is connected to the power supply line 22 via a resistor R13 and to the ground line 23 via a resistor R14.

Further, in order to prevent an excessive load current IL from flowing due to a rise in the battery voltage VB or the like, the trapezoidal wave generating circuit 19 has a voltage limiting circuit 30 for limiting the voltage of the output node n1 (a voltage limiting circuit 30). Equivalent) is provided. That is, P is applied between both terminals of the capacitor C11.
The emitter and the collector of the NP transistor Q27 are connected to each other, and the base thereof is connected to the ground line 23 via the resistor R15.
28 emitters. Transistor Q28
Is connected to the power supply line 31, and the base is connected to the power supply line 3.
1 and a resistor R1 connected in series between the ground line 23
6, connected to the voltage dividing point of R17. The power supply line 3
1 is a control power supply voltage V using the battery voltage VB as an input.
This is an output line of a power supply circuit (not shown) that generates dd (for example, 5 V).

The current control circuit 20 shown in FIG. 1 includes a voltage conversion circuit 32 and an error amplifier circuit 33. The voltage conversion circuit 32 inverts the trapezoidal wave signal Sb having the ground line 23 as a reference potential and generates a trapezoidal wave signal Sd having the power supply line 22 as a reference potential.
The operational amplifier 34 supplies the control power supply voltage Vdd from the power supply line 31.
, And its non-inverting input terminal is connected to the output node n1 of the trapezoidal wave generating circuit 19. The output terminal and the inverted input terminal of the operational amplifier 34 are
Each is connected to the base and emitter of NPN transistor Q29. The collector of the transistor Q29 is connected to the power supply line 22 via the resistor R18, and the emitter is connected to the ground line 23 via the resistor R19.

The error amplifier circuit 33 compares the inverted trapezoidal wave signal Sd with the voltage across the resistor R11 and controls the gate potential of the MOS transistor Q11 so that the two voltages match. The error amplifying circuit 33 is connected between the power supply line 35 and the ground line 23, and an operational amplifier 36 that operates by receiving the supply of the boosted voltage Vcp from the charge pump circuit (not shown) via the power supply line 35. And a push-pull circuit 37. Push-pull circuit 3
7 comprises an NPN transistor Q30 and a PNP transistor Q31.

The non-inverting input terminal of the operational amplifier 36 is a resistor R
11 is connected to a common connection point between the drain of the MOS transistor Q11 and an inverting input terminal is connected to a common connection point between the resistor R18 and the collector of the transistor Q29. The common base of the transistors Q30 and Q31 is connected to the output terminal of the operational amplifier 36, and the common emitter is connected to the gate of the MOS transistor Q11 via the resistor R20.

If the offset voltage of the operational amplifier 36 appears on the positive side, a small load current IL may flow even if the trapezoidal wave signal Sb is 0V. Therefore, in the present embodiment, in the differential amplifier circuit (not shown) constituting the input stage of the operational amplifier 36, the size of the load transistor corresponding to each input terminal is set to a different value, whereby the offset voltage is reduced. It always appears on the negative side.

The saturation state detection circuit 21 outputs an L level current saturation to the trapezoidal wave generation circuit 19 while the current flowing through the load 12 via the MOS transistor Q11 is in a saturation state (hereinafter referred to as a current saturation state). The signal Sc is output. When the MOS transistor Q11 operates in the saturation region, the load current IL increases as the gate potential rises. However, when the MOS transistor Q11 reaches the linear region, the load current IL increases even if the gate potential rises.
Does not increase. This non-increased state, that is, a state where the upper limit current that can flow through the MOS transistor Q11 within the range of the ON state that the MOS transistor Q11 can take is flowing to the load 12 is a current saturation state, and the resistance of the load 12 is If the value is RL, the current in the current saturation state (hereinafter, referred to as the saturation current Is) is approximately VB / RL
Becomes

Since the current control circuit 20 controls the gate potential of the MOS transistor Q11 by feedback control, the gate-source voltage (hereinafter, referred to as gate voltage VGS) sharply rises when the current saturation state is reached. . The saturation detection circuit 21 is configured to detect the rapid rise of the gate voltage VGS. That is, the gate voltage detection circuit 38 detects the gate voltage VGS by subtracting the source potential from the gate potential of the MOS transistor Q11, and this gate voltage VGS is input to the inverting input terminal of the comparator 39. . A resistor R2 is connected between the control power supply voltage Vdd and the ground line 23.
1 and R22 are connected in series, and this divided voltage (for example, 2.5 V) is input to the non-inverting input terminal of the comparator 39 as the reference voltage Vr. The output of the comparator 39 is the current saturation signal Sc.

Next, the operation of the load drive circuit 11 will be described with reference to FIGS. 3 and 4
Shows waveforms of various parts when a PWM signal having a predetermined duty ratio is input as a drive command signal Sa for dimming control of a lamp when a lamp having a rated current of 3 A and 6 A is connected as the load 12, respectively. ing.
The waveforms (a) to (f) in the figures represent the following signals, currents, and voltages, respectively. (A) drive command signal Sa (b) trapezoidal wave signal Sb (c) trapezoidal wave signal Sd (d) load current IL (voltage VL across load 12) (e) gate voltage VGS of MOS transistor Q11 (F): Current saturation signal Sc

First, referring to FIG. 3, FIGS.
The operation of the load drive circuit 11 shown in FIG. The drive command signal Sa is a PWM signal having a constant cycle T, and FIG. 3 shows a case where the duty ratio is switched to change the lamp from a high luminance state to a low luminance state. The dashed line drawn in FIG. 3 shows each waveform when the load drive circuit 1 having the conventional configuration shown in FIG. 5 is used.

(1) Before time t1 Since the drive command signal Sa is at L level (corresponding to the drive stop command), the transistor Q in the trapezoidal wave generation circuit 19
21 is turned off, and a current of (2 · Ia) flows from the transistors Q14 and Q15 to the transistor Q18. Here, Ia is a current value generated by a series circuit of the transistor Q12 and the resistor R12. This current of (2 · Ia) becomes the collector current of the transistor Q19 that forms the current mirror circuit 28 together with the transistor Q18.

On the other hand, since the gate voltage VGS of the MOS transistor Q11 is 0, the current saturation signal Sc output from the saturation detection circuit 21 is at the H level, and the transistor Q26 in the trapezoidal wave generation circuit 19 is turned on.
The transistors Q23 and Q24 are turned off. Focusing on the output node n1, a current of Ia flows from the transistor Q13 to the output node n1, and a current of (2 · Ia) flows from the output node n1 to the transistor Q19.
A discharge current of Ia flows from the capacitor C11 to the transistor Q19. This discharge current is equal to the output node n1
Becomes zero when the voltage (trapezoidal wave signal Sb) becomes 0V.

(2) Period from time t1 to time t2 When the drive command signal Sa is inverted to the H level (corresponding to the drive start command) at the time t1, the transistor Q21 is turned on in the trapezoidal wave generation circuit 19, and the transistor Q18,
Q19 turns off. Thereby, the transistor Q13
All the current of Ia flowing out of the capacitor flows into the capacitor C11, and the voltage of the output node n1 (trapezoidal signal Sb) rises with a substantially constant slope.

The current control circuit 20 controls the gate potential (that is, the gate voltage VGS) of the MOS transistor Q11 so that the trapezoidal wave signal Sd obtained by inverting the trapezoidal wave signal Sb and the voltage across the resistor R11 match. Load current IL
Gradually increases according to the trapezoidal wave signal Sb. At time t1, gate voltage VGS increases by threshold voltage Vt of MOS transistor Q11.

(3) Period from time t2 to time t3 The load current IL increases in accordance with the trapezoidal wave signal Sb. When the current saturation state is reached at time t2, the load is increased despite the rise of the trapezoidal wave signal Sb. The current IL stops increasing. At this time, since a deviation occurs between the trapezoidal wave signal Sd and the voltage across the resistor R11, the output voltage of the operational amplifier 36, that is, the gate potential of the MOS transistor Q11 rises sharply. Then, at time t3, the gate voltage VGS exceeds the reference voltage Vr (indicated by a two-dot chain line in FIG. 3).
Is inverted, and the current saturation signal Sc changes from H level to L level. The time from time t2 to time t3 is an operation delay time of the operational amplifier 36 and the comparator 39, which is a very short time.

(4) Period from time t3 to time t4 When the current saturation signal Sc becomes L level at time t3, the transistor Q26 in the trapezoidal wave generation circuit 19 is turned off, and (2 · The current Ia) flows. This (2
The current Ia) becomes the collector current of the transistor Q24 that forms the current mirror circuit 29 together with the transistor Q23. As a result, all the current of Ia flowing from the transistor Q13 flows into the transistor Q24, the charge / discharge current to the capacitor C11 becomes 0, and the voltage of the output node n1 (trapezoidal signal Sb) is kept constant. . This holding voltage is the upper side voltage of the trapezoidal wave signal Sb, and the above-described saturation current Is continues to flow through the load 12. In the case of the load drive circuit 1 shown in FIG. 5, the trapezoidal wave signal Sb continues to rise until reaching the constant upper side voltage Vp even after the current saturation state is reached.

(5) Period from time t4 to time t5 When the drive command signal Sa is inverted to L level at time t4, the transistor Q21 in the trapezoidal wave generation circuit 19
Is turned off, the transistors Q18 and Q19 are turned on, and (2 · Ia) is applied from the capacitor C11 to the transistor Q19.
Discharge current flows. Therefore, the voltage of the output node n1 (trapezoidal signal Sb) decreases, and the current control circuit 20 lowers the gate potential of the MOS transistor Q11 accordingly.

Then, at time t5, when the gate voltage VGS drops below the reference voltage Vr by exiting the current saturation state, the output voltage of the comparator 39 of the saturation state detection circuit 21 is inverted, and the current saturation signal Sc becomes L From level to H level. The time from time t4 to time t5 is an operation delay time of the operational amplifier 36 and the comparator 39, which is a very short time.

(6) Period from time t5 to time t6 When the current saturation signal Sc becomes H level at time t5, in the trapezoidal wave generation circuit 19, the transistor Q26 is turned on, and the transistors Q23 and Q24 are turned off. The state is the same as the period (1). Therefore, a discharge current of Ia flows from the capacitor C11 to the transistor Q19, and the voltage of the output node n1 (trapezoidal signal Sb) becomes 0.
It descends with a substantially constant slope until it reaches V. This allows
The load current IL gradually decreases in accordance with the trapezoidal wave signal Sb. At time t6 when the trapezoidal wave signal Sb becomes 0V, the gate voltage VGS decreases by the threshold voltage Vt to 0V. In the case of the load drive circuit 1 shown in FIG. 5, the load current IL starts to decrease later than the time when the trapezoidal signal Sb starts to fall.

The operations described in the above (1) to (6) are realized irrespective of the magnitude of the duty ratio of the drive command signal Sa or the impedance of the load 12. FIG. 4 shows waveforms when a lamp whose impedance is 1/2 (the rated current is twice as large) as the lamp used in the operation shown in FIG. In FIG. 4, at time t
Period from time 1 to time t3 and time t4 to time t6
The slope of the trapezoidal wave signal Sb during the period up to FIG.
The load current IL also increases and decreases at the same rate as in FIG. In this case, the slope of the voltage VL between both ends of the load 12 becomes 1/2 as compared with that in FIG. 3, and the time until the voltage VL between both ends reaches the current saturation state in which the voltage VL becomes VB (time from time t1 to time t2) becomes longer. . Since the trapezoidal wave signal Sb continues to increase until the current saturation state is reached, the upper side voltage of the trapezoidal wave signal Sb is almost twice (corresponding to the 6A command) as compared with FIG.

As described above, when the drive command signal Sa goes high and the drive of the load 12 is commanded,
The trapezoidal wave signal Sb for instructing the load current IL is equal to the load current IL.
Until the current becomes saturated (until the current saturation state is reached), and when the current saturation state is reached, the voltage value is held at that time. That is, in the load drive circuit 11 of the present embodiment, the upper side voltage of the trapezoidal wave signal Sb is not controlled to a constant value, but to a value corresponding to the saturation current Is.

As a result, the trapezoidal wave signal Sb does not command a current exceeding the saturation current Is that cannot actually flow, the drive command signal Sa becomes L level, and the trapezoidal wave signal Sb decreases from the upper side voltage. Starts, the load current IL immediately starts decreasing according to the trapezoidal wave signal Sb. As described above, by using the load driving circuit 11, the trapezoidal wave signal Sb is always supplied to the load 12 regardless of the impedance of the load 12 and the magnitude of the battery voltage VB.
Makes it possible to flow the current as instructed by the drive command signal Sa.
The effective energizing time of L (for example, energizing time when the intermediate level of the amplitude of the load current IL is set as the energizing threshold) matches.

Therefore, when the drive command signal Sa is given as a PWM signal for dimming control of the lamp as the load 12, the effective duty ratio of the trapezoidal load current IL is always the duty ratio of the drive command signal Sa. Will match. As a result, regardless of the fluctuation of the rated current (impedance) of the connected lamp and the battery voltage VB,
The lamp can be dimmed to the brightness as instructed.

Since the saturation state detection circuit 21 detects the rise of the gate voltage VGS of the MOS transistor Q11 under the feedback control of the current control circuit 20, even if the battery voltage VB fluctuates. The current saturation state can be reliably detected.

In the case of the present embodiment, the trapezoidal wave signal Sb continues to increase until the current saturation state is reached. For example, when the battery voltage VB becomes excessively large or when the impedance of the load 12 becomes excessively small, the saturation occurs. It is feared that the current Is becomes excessive. Therefore, a voltage limiting circuit 30 is provided in the trapezoidal wave generating circuit 19 to limit the upper side voltage of the trapezoidal wave signal Sb to a voltage value corresponding to the overcurrent protection level even before the current saturation state is reached. ing.
Thereby, the MOS transistor Q11 and the load 12 can be protected from overcurrent.

The impedance (resistance value) of the lamp changes due to heat generation or the like due to energization, and the lamp has a relatively low resistance value at the start of driving. Therefore, when a drive voltage is applied to the lamp in a stepwise manner, an excessively large current tends to flow transiently. On the other hand, in the present embodiment, since a trapezoidal wave-like current flows through the lamp in accordance with the trapezoidal wave signal Sb, an excessive load current IL can be prevented from flowing at the start of driving, and
The generation of noise due to the steep change of the load current IL can be suppressed. As a result, noise given to a radio or another control device mounted on the vehicle is reduced, so that the radio noise can be reduced and the other control device can be operated more stably. In addition, the life of the lamp can be extended.

The present invention is not limited to the embodiment described above and shown in the drawings. For example, the present invention can be modified or expanded as follows. MOS as switch means
The transistor Q11 may be provided on the current path from the load 12 to the ground line so as to function as a low-side switch. In this case, if the resistor R11 is provided between the MOS transistor Q11 and the ground line,
As in the above embodiment, the current control circuit 20 uses the load current I
The circuit configuration for acquiring the voltage value representing L can be simplified. Further, a bipolar transistor or IGBT may be used as the switch means.

In the trapezoidal wave generating circuit 19, the current of Ia is generated by a series circuit of the transistor Q12 and the resistor R12. In order to suppress the current fluctuation due to the battery voltage VB, a self-biased constant current is generated. A circuit may be employed.

[Brief description of the drawings]

FIG. 1 is an electrical configuration diagram of a load drive circuit according to an embodiment of the present invention.

FIG. 2 is an electrical configuration diagram of a trapezoidal wave generation circuit.

FIG. 3 is a waveform diagram of each part when a lamp having a rated current of 3A is connected.

FIG. 4 is a waveform diagram of each part when a lamp having a rated current of 6 A is connected.

FIG. 5 is a diagram corresponding to FIG. 1 showing a conventional technique.

FIG. 6 is a waveform diagram of each part when a lamp having a rated current of 6A or 3A is connected.

[Explanation of symbols]

11 is a load drive circuit, 12 is a load (electric load), 13 is a battery (DC power supply), 18 is a conduction path, 19 is a trapezoidal wave generation circuit (signal generation means), 20 is a current control circuit (current control means), 21 is a saturated state detecting circuit (saturated state detecting means), 25 is a constant current circuit (first constant current circuit), 26 is a constant current circuit (second constant current circuit), and 27 is a constant current circuit (third current circuit). Constant current circuit), 30 is a voltage limiting circuit (limiting circuit), 36 is an operational amplifier, 39 is a comparator, Q11
Is a MOS transistor (switch means), R11 is a resistor (detection resistor), and C11 is a capacitor.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Norimasa Ueda 1-1-1, Showa-cho, Kariya-shi, Aichi Prefecture Inside Denso Corporation (72) Inventor Hiroshi Fujimoto 1-1-1, Showa-cho, Kariya-shi, Aichi Co., Ltd. F term in DENSO (reference) 5J055 AX15 AX66 BX16 CX13 CX22 DX13 DX22 DX53 DX54 EX01 EX02 EX07 EX10 EX11 EY01 EY03 EY10 EY17 EY21 EZ00 EZ07 EZ09 EZ10 EZ57 FX04 FX07 FX13 FX31 GX01 GX04

Claims (6)

[Claims] 1. A switch provided on an energizing path from a DC power supply to an electric load, connected in series with the switch, and detecting a load current flowing through the electric load via the switch as a voltage value. And a saturation state detection unit that outputs a current saturation signal during a period in which an upper limit current that can flow through the switch unit flows in the electric load within a range of an open / close state that the switch unit can take. When a drive start command signal is input from the outside, a voltage change corresponding to the gradual increase of the load current is started, and the voltage change is stopped when the saturation state detecting means outputs the current saturation signal. Signal generation means for generating a trapezoidal wave signal for starting a voltage change corresponding to the gradual decrease of the load current when a drive stop command signal is input; Current control means for comparing the trapezoidal wave signal from the means with the voltage value detected by the detection resistor, and controlling the switch means based on the trapezoidal wave signal so that a trapezoidal current flows through the electric load. A driving device for an electric load, comprising: 2. The switch means comprises a transistor capable of controlling the load current according to an input voltage to a control terminal. The current control means includes a trapezoidal wave signal from the signal generation means and the detection signal. An operational amplifier that outputs a voltage corresponding to a potential difference from a voltage value detected by a resistor is provided, and an output voltage from the operational amplifier is configured to control an input voltage to a control terminal of the transistor. The drive device for an electric load according to claim 1, wherein 3. The electric load driving device according to claim 2, wherein the saturation state detecting means includes a comparator for comparing a control voltage of the transistor with a predetermined reference voltage. 4. The capacitor according to claim 1, wherein the signal generating means includes: a capacitor for outputting the trapezoidal wave signal; a first constant current circuit connected in series to the capacitor; A second constant current circuit that performs a constant current operation during a period in which the command signal is being input; and a second constant current circuit that is connected in series to the first constant current circuit, wherein the saturation state detection unit outputs the current saturation signal. 4. The electric load driving device according to claim 1, further comprising a third constant current circuit for inputting an output current of the first constant current circuit during a period. 5. The electric load driving device according to claim 4, wherein said signal generating means includes a limiting circuit for limiting a voltage between both ends of said capacitor to a predetermined voltage. 6. The electric device according to claim 1, wherein the drive start command signal and the drive stop command signal are PWM signals having a duty ratio according to the load current. Drive of the load.