JP2003008368A - Current mirror circuit and trapezoidal wave voltage generating circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a current mirror circuit which can obtain always a constant mirror ratio and operate in the vicinity of a ground potential, and a trapezoidal wave voltage generating circuit using the current mirror circuit. SOLUTION: When a control signal Sc becomes H, a transistor Q18 turns to a saturated on-state, and transistors Q16, Q17 are turned off. A capacitor C11 is charged by a current Ia outputed from a constant current circuit 21. When the control signal Sc becomes L, an operational amplifier 22 performs negative feedback control of a voltage of a common base line 24, in such a manner that collector voltages of the transistors Q16 and Q17 become equal. Early effect appears equally in the transistors Q16, Q17, so that currents flowing in the transistors Q16, Q17 become equal without depending on an output voltage Vo. At this time, the capacitor C11 is discharged by a difference current Ia of an output current (2.Ia) of a constant current circuit 20 and an output current Ia of the constant current circuit 21.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current mirror circuit for outputting a current according to an input current and a trapezoidal wave voltage generating circuit using the current mirror circuit.

[0002]

2. Description of the Related Art FIG. 3 shows an electrical configuration of a trapezoidal wave generation circuit using a current mirror circuit. The trapezoidal wave generation circuit 1 includes transistors 3 and 4 which are grounded with respect to the power supply line 2.
A current mirror circuit 5, a constant current circuit 7 connected between the power supply line 6 and the transistor 3, a constant current circuit 8 connected between the power supply line 6 and the transistor 4, between the collector and the emitter of the transistor 3. And a capacitor 10 connected between the collector and emitter of the transistor 4. Here, the emitter areas of the transistors 3 and 4 are equal. The constant current circuits 7 and 8 are (2 · Ia) and Ia, respectively.
It is designed to output the current of.

FIG. 4 shows the waveforms of the control signal Sc input to the base of the transistor 9 and the output voltage Vo generated between both terminals of the capacitor 10. Control signal Sc
When H is H, the capacitor 10 is charged by the current Ia of the constant current circuit 8. When the control signal Sc is L, the current of (2 · Ia) of the constant current circuit 7 folded by the current mirror circuit 5 and the I of the constant current circuit 8 are I.
The current of Ia which is the difference from the current of
0 is discharged. As a result, a trapezoidal wave-shaped output voltage Vo synchronized with the control signal Sc is generated.

[0004]

By the way, when the transistor is used with the grounded emitter, the Early effect appears significantly, and the collector current changes depending on the collector-emitter voltage. In FIG. 3, the collector-emitter voltage of the transistor 3 is fixed to the base-emitter voltage VBE, but the collector-emitter voltage (output voltage Vo) of the transistor 4 changes in a trapezoidal waveform. Therefore, the influences of the Early effect are different between the transistors 3 and 4, and the ratio of the collector current of the transistor 3 and the collector current of the transistor 4 (mirror ratio) depends on the output voltage Vo.
Will change.

When the collector-emitter voltage of the transistor 4 is higher than VBE, the collector current of the transistor 4 becomes larger than the collector current of the transistor 3.
As a result, the discharging current of the capacitor 10 becomes the charging current (= I
a), the output voltage Vo becomes larger as shown in FIG.
The slope (absolute value) of the ascending value and the ascending value will be different. Such trapezoidal wave voltage has rise time ta and fall time t
b has an asymmetric waveform different from that of b, which is unsuitable for applications requiring a trapezoidal wave voltage having a symmetrical waveform.

Wilson constant current circuits and cascode constant current circuits are known as current mirror circuits for eliminating the influence of the Early effect. However, since the output side of each of the constant current circuits is composed of vertically stacked transistors, if the saturation voltage of the transistor is VCE (sat), it will not operate unless the output voltage is (VBE + VCE (sat)) or more.
It could not be used for applications that require a bottom voltage near V (ground potential).

The present invention has been made in view of the above circumstances, and an object thereof is to provide a current mirror circuit which can always obtain a constant mirror ratio and can operate even near the ground potential, and a trapezoidal wave voltage generation using the current mirror circuit. To provide a circuit.

[0008]

According to the means described in claim 1, the operational amplifier includes a voltage of a second main terminal (collector, drain) of the first transistor which is an input terminal of the current mirror circuit, The voltage of the control terminal (base, gate) common to both transistors is controlled so that the voltage of the second main terminal of the second transistor, which is the output terminal of the current mirror circuit, becomes equal. For example, in a configuration using an NPN transistor or an N-channel transistor, when the voltage of the second main terminal of the second transistor rises, the operational amplifier lowers the voltage of the common control terminal to Increase the voltage at the second main terminal.

As a result, with respect to the first and second transistors in which the first main terminals (emitter, source) and the control terminals are commonly connected, the voltages between the main terminals of both transistors are always equal. As a result, both transistors operate in the same bias state and the Early effect appears equally, so that the ratio of the currents flowing through both transistors (mirror ratio) becomes constant regardless of the voltage at the output terminal. Further, since the output transistor of the current mirror circuit is composed of only the second transistor, the voltage at the output terminal is 0.
It is possible to operate up to near V (ground potential).

When the means according to claim 2 is described by using a configuration using an NPN type transistor or an N channel type transistor, when the switching circuit is closed, the second main terminal of the first transistor becomes almost 0V. , The operational amplifier lowers the voltage of the common control terminal to turn off the first and second transistors. At this time, the capacitor is charged by the constant current output from the second constant current circuit, and the voltage across the capacitor increases linearly.

When the switching circuit is opened, the voltages between the main terminals of the first and second transistors become equal due to the negative feedback control of the operational amplifier. At this time, the output current of the first constant current circuit is accurately folded back by the current mirror circuit and flows into the second transistor. Therefore, the capacitor is discharged by the difference current between the output current of the first constant current circuit and the output current of the second constant current circuit.

According to this means, since the mirror ratio of the current mirror circuit is constant, the slopes when the voltage across the capacitor rises and falls are set accurately according to the output currents of the first and second constant current circuits. It will be possible. Also,
It is possible to output up to the bottom voltage near 0 V (ground potential).

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment in which the present invention is applied to a load drive circuit will be described below with reference to FIGS. FIG. 1 shows an electrical configuration of a load drive circuit used in a vehicle. This load drive circuit 11
Is configured as one IC together with a power supply circuit, a control circuit and the like (not shown), and based on a control signal Sc input from the outside, the load 12 such as a headlight of a vehicle and various lamps provided on an instrument panel. It controls lighting / extinguishing of indoor lights and dimming control.

The load driving circuit 11 is a trapezoidal wave generating circuit 13.
(It corresponds to a trapezoidal wave voltage generating circuit) and a current control circuit 14. In the trapezoidal wave generation circuit 13, a diode-connected PNP transistor Q1 is connected between the power supply lines 15 and 16 to which the power supply voltage Vdd for control is supplied.
1 and constant current circuit 17 in series circuit and constant voltage circuit 18
And a constant current circuit 19 are connected in series.

The power supply line 15 is connected to PNP type transistors Q12 and Q13 which form a current mirror circuit together with the transistor Q11. The bases of the PNP transistors Q14 and Q15 are connected to the negative terminal of the constant voltage circuit 18, and the cascode-connected transistors Q12 and Q14 and Q13 and Q15 are the constant current circuits 20 and 21 (first and first current circuits, respectively). 2 equivalent to the constant current circuit). Constant current circuits 20 and 21
Outputs a constant current of (2 · Ia) and Ia, respectively.

Transistors Q14, Q15 and power supply line 16
, And a current mirror circuit 2 including NPN transistors Q16 and Q17 (corresponding to first and second transistors) having the same emitter area and an operational amplifier 22.
3 is connected. The operational amplifier 22 operates with the power supply voltage Vdd, and can output a voltage from approximately 0 V to the power supply voltage Vdd (so-called rail-rail operation). The bases (corresponding to control terminals) of the transistors Q16 and Q17 are connected to the common base line 24, and the emitters (corresponding to the first main terminal) are grounded to the power supply line 16. The collector of the transistor Q16 (corresponding to the second main terminal and the input terminal) is connected to the collector of the transistor Q14 and the non-inverting input terminal of the operational amplifier 22, and the collector of the transistor Q17 (corresponding to the output terminal) is connected to the transistor Q15. It is connected to the collector and the inverting input terminal of the operational amplifier 22. The output terminal of the operational amplifier 22 is connected to the common base line 24.

An NPN transistor Q18 (corresponding to a switching circuit) is provided between the collector and emitter of the transistor Q16.
Are connected in parallel, and the base of the transistor Q18 is connected to the terminal 25 of the IC via the resistor R11. The terminal 25 is for inputting the control signal Sc. A capacitor C11 for generating a trapezoidal wave-shaped output voltage Vo is connected between the collector and the emitter of the transistor Q17.

On the other hand, the current control circuit 14 is constructed as follows. That is, the positive and negative terminals of the battery 28 are connected to the IC terminals 26 and 27, respectively, and the load 12 is connected between the IC terminal 29 and the ground line connected to the negative terminal of the battery 28. There is.

In the IC, the terminal 27 is connected to the power supply line 16. Between the terminals 26 and 29, the load 12
Resistor R for detecting the current (load current IL) flowing through
12 and an N-channel type power MOS transistor Q19 which functions as a high side switch are connected in series. A resistor R13, a diode D11, and an NPN transistor Q2 are provided between the terminal 26 and the power supply line 16.
A collector-emitter of 0 and a resistor R14 are connected in series.

The operational amplifier 30 for voltage-current conversion is operated by the power supply voltage Vdd, its non-inverting input terminal is supplied with the output voltage Vo, and its inverting input terminal and output terminal are connected to the emitter and base of the transistor Q20, respectively. Has been done. Further, the operational amplifier 31 for performing the current negative feedback control operates by the boosted voltage Vcp generated by the charge pump circuit (not shown), the inverting input terminal of which is connected to the anode of the diode D11, and the non-inverting input terminal and the output terminal. Are respectively connected to the drain and gate of the MOS transistor Q19.

Next, the operation of this embodiment will be described with reference to FIG. Output voltage V of trapezoidal wave generation circuit 13
When o is given to the current control circuit 14, the voltage across the resistor R13 becomes a voltage proportional to the output voltage Vo. The operational amplifier 31 controls the gate voltage of the MOS transistor Q19 so that the voltage across the resistor R12 is equal to the voltage across the resistor R13. As a result, a trapezoidal wave-shaped load current IL proportional to the output voltage Vo of the trapezoidal wave generation circuit 13 flows through the load 12.

Here, according to the output voltage Vo, the load current I
The trapezoidal waveform of L is to suppress the generation of radio noise when the load current IL is turned on and off, and the slope when the current increases and the slope when the current decreases are equal in absolute value and trapezoidal. It is preferable that the bottom current of the load current IL is zero. Therefore, the trapezoidal wave generation circuit 13 generates the output voltage Vo having a symmetrical trapezoidal waveform in which the rising slope and the falling slope are equal in absolute value and the lower bottom voltage is almost 0V.

FIG. 2 shows the waveforms of the control signal Sc and the output voltage Vo. In the trapezoidal wave generation circuit 13, when the control signal Sc changes from the L level to the H level, the transistor Q18 enters the saturation ON state, and the current (2 · Ia) output from the constant current circuit 20 flows through the transistor Q18. At this time, the collector voltage of the transistor Q16 becomes the saturation voltage VCE (sat) of the transistor Q18, which is lower than the collector voltage (output voltage Vo) of the transistor Q17. As a result, the operational amplifier 22 operates so as to reduce the voltage of the common base line 24, and the transistors Q16 and Q1 are operated.
Both 7 are turned off. Therefore, the capacitor C11
Is charged by the constant current Ia output from the constant current circuit 21.

On the other hand, when the control signal Sc changes from H level to L level, the transistor Q18 is turned off. The operational amplifier 22 performs negative feedback control on the voltage of the common base line 24 so that the collector voltages of the transistors Q16 and Q17 become equal. As a result, regarding the base-emitter voltages VBE (Q16) and VBE (Q17) and the collector-emitter voltages VCE (Q16) and VCE (Q17) of the transistors Q16 and Q17, the following formulas (1) and (2) are obtained. To establish. VBE (Q16) = VBE (Q17) (1) VCE (Q16) = VCE (Q17) (2)

At this time, the Early effect appears equally in both transistors Q16 and Q17, and the collector current IC (Q1
The following equation (3) holds for 6) and IC (Q17). That is, regardless of the output voltage Vo, both transistors Q1
6, the ratio of the currents flowing through Q17 (mirror ratio) becomes constant. IC (Q16) = IC (Q17) (3)

As a result, the output current (2 · Ia) of the constant current circuit 20 flowing through the transistor Q16 is accurately folded back by the current mirror circuit 23 and flows through the transistor Q17. Then, the output current of the constant current circuit 20 (2 · I
current Ia which is the difference between a) and the output current Ia of the constant current circuit 21.
This causes the capacitor C11 to be discharged. Therefore, the charging / discharging current for the capacitor C11 is both Ia, and the rising slope and the falling slope of the output voltage Vo are equal in absolute value as shown in FIG.

As described above, the trapezoidal wave generation circuit 13
Since the current mirror circuit 23 used for the above is controlled by the operational amplifier 22 so that the collector voltages of the transistors Q16 and Q17 become equal, there is no change in the mirror ratio due to the effect of the Early effect, and the transistors Q16 and Q1 are not changed.
The collector currents of 7 are always equal. Therefore, the output currents of the constant current circuits 20 and 21 are (2 · Ia) and Ia, respectively.
The trapezoidal wave generation circuit 13 set to 1 can generate a trapezoidal wave voltage having a symmetrical waveform with the rising time ta and the falling time tb being equal. Further, since the constant current circuits 20 and 21 are configured by cascode connection, they are less susceptible to the Early effect, and can output a constant current regardless of the collector potentials of the transistors Q14 and Q15.

Further, since the output transistor of the current mirror circuit 23 is composed of only the transistor Q17, the output terminal Vo of the current mirror circuit 23 is a voltage equal to or higher than the saturation voltage VCE (sat) of the transistor Q17 (that is, substantially equal to or higher than 0V). It becomes operable in the area. Therefore, the bottom voltage of the output terminal Vo can be set to approximately 0 V, and in the case of the present embodiment used in combination with the current control circuit 14,
The bottom current of the load current IL can be set to approximately 0A. This can prevent a current that does not contribute to light emission from flowing through the load 12 such as a lamp and reduce current consumption.

The present invention is not limited to the embodiments described above and shown in the drawings, and other types of transistors such as MOS transistors may be used as the transistors forming the current mirror circuit 23, for example. Also,
The current mirror circuit 23 can be applied not only to the trapezoidal wave generation circuit 13 but also to other circuits.

[Brief description of drawings]

FIG. 1 is an electrical configuration diagram of a load drive circuit showing an embodiment of the present invention.

FIG. 2 is a waveform diagram of a control signal Sc and an output voltage Vo.

FIG. 3 is an electrical configuration diagram of a trapezoidal wave generation circuit showing a conventional technique.

FIG. 4 is a view corresponding to FIG.

[Explanation of symbols]

13 is a trapezoidal wave generation circuit (trapezoidal wave voltage generation circuit), 20 is a constant current circuit (first constant current circuit), 21 is a constant current circuit (second constant current circuit), 22 is an operational amplifier, and 23 is a current mirror. A circuit, Q16 is a transistor (first transistor), Q17 is a transistor (second transistor), Q18 is a transistor (open / close circuit), and C11 is a capacitor.

Continued front page    F term (reference) 5H420 NA17 NA36 NB03 NB12 NB25                       NC32 NE03 NE06                 5J091 AA01 AA43 CA20 CA36 FA17                       HA08 HA19 HA25 HA29 HA39                       KA01 KA05 KA09 KA11 KA47                       MA13 MA17 MA21 TA06

Claims (2)

[Claims] 1. A first and a second transistor having a first main terminal commonly grounded and a control terminal commonly connected, and a non-inverting input terminal connected to a second main terminal of the first transistor. And an inverting input terminal connected to a second main terminal of the second transistor and an output terminal connected to a common control terminal of the first and second transistors. A second mirror terminal of the first transistor is used as an input terminal, and a second main terminal of the second transistor is used as an output terminal. 2. A current mirror circuit according to claim 1, a first constant current circuit connected to a second main terminal of a first transistor of the current mirror circuit, and a main terminal of the first transistor. A switching circuit connected between them; a second constant current circuit connected to the second main terminal of the second transistor of the current mirror circuit; and a capacitor connected between the main terminals of the second transistor. A trapezoidal wave voltage generating circuit characterized in that it is composed of and.