JP2002305266A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To display a faulty semiconductor device on a package, to remove the faulty semiconductor device before a selection process, and to manufacture a semiconductor device efficiently at a low cost. SOLUTION: An image in a device region 8a on a multiple machining substrate 8 where wire bonding is completed is taken in, and a faulty device region is detected by inspecting the misalignment of a semiconductor chip, the presence or the absence of the semiconductor chip, the improper connection and disconnection of bonding wire, or the like. After that, a batch mold section 9 is formed by collective molding, and a fault mark FM is marked onto the surface of the batch mold section 9, where the detected faulty device region 8a is positioned. Then, a soldering bump is formed in an electrode for connection, that is formed on the back of the multiple machining substrate 8, and the batch mold section 9 is divided into pieces by dicing, thus completing the semiconductor device. The semiconductor device with the faulty mark FM is eliminated in advance, and only a conforming semiconductor device is selected for inspecting.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing technique, and more particularly, to a batch molding method (MAP: Mol).
The present invention relates to a technique which is effective when applied to increase the efficiency of sorting of semiconductor devices formed by (d Array Package).

[0002]

2. Description of the Related Art For example, CSP (Chip Size)
2. Description of the Related Art In a semiconductor device of a surface mount type package such as a package, a so-called batch molding method is known as a technique for improving production efficiency and reducing cost.

According to studies made by the present inventors, the collective molding method uses a multi-cavity printed wiring board formed by connecting a plurality of device regions and forming a plurality of device regions.
This is a method in which a plurality of device regions on each of which a semiconductor chip is mounted are collectively sealed with a resin in a state of covering a plurality of device regions, thereby forming a collectively sealed portion.

After resin encapsulation, external terminals such as solder bumps are formed, and dicing is performed to divide the printed wiring board and the encapsulation part into individual device regions (individualization). Form a package. After that, in the sorting process, non-defective products and defective products are determined for the individualized semiconductor devices.

[0005] Japanese Patent Application Laid-Open No. 12-12745 discloses an example of this type of semiconductor device in detail, which describes a semiconductor device assembled using a collective molding method.

[0006]

However, it has been found by the present inventor that the following problems are encountered in the manufacturing technology of the MAP type semiconductor device as described above.

That is, since semiconductor devices in a defective device area where no semiconductor chip is mounted become unclear after resin sealing is performed collectively, all the semiconductor devices are sorted in the sorting step. Therefore, there is a problem that the time required for the sorting step is increased, and the manufacturing efficiency of the semiconductor device is reduced.

Further, solder bumps are also formed on a defective semiconductor device on which no semiconductor chip is mounted.
There is also a problem that the solder bumps are wasted and the product cost increases.

SUMMARY OF THE INVENTION It is an object of the present invention to display a defective semiconductor device on a package after collective molding and remove the defective semiconductor device before a selection step, thereby improving the efficiency and cost of selecting the semiconductor device. It is an object of the present invention to provide a method of manufacturing a semiconductor device that can be used.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0011]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, in the method of manufacturing a semiconductor device according to the present invention, a step of preparing a multi-piece substrate having a plurality of device regions and a semiconductor chip to be mounted on the plurality of device regions is provided. A step of connecting a surface electrode of a semiconductor chip to a bonding electrode of a corresponding device region by a connecting member; a step of detecting a defect in the device region; and a process of molding a plurality of device regions in a multi-cavity substrate. Collectively covering with a resin, sealing the semiconductor chip with the resin and forming a collectively sealed portion, marking a defect mark on the surface of the collectively sealed portion of the device region where a defect is detected, along a dicing line, To divide the multi-cavity substrate and batch sealing part into individual devices for each device area,
Forming individual sealing portions.

Further, a method of manufacturing a semiconductor device according to the present invention
A step of preparing a multi-piece substrate having a plurality of device regions and a semiconductor chip mounted in the plurality of device regions; a step of mounting the semiconductor chip in the device regions; a surface electrode of the semiconductor chip and a device corresponding thereto A step of connecting the bonding electrode in the region with the connection member, and inspecting the position shift of the semiconductor chip mounted in the device region, the presence or absence of the semiconductor chip in the device region, poor connection of the connection member, or disconnection of the connection member,
A step of detecting a defect, a step of collectively covering a plurality of device regions on the multi-piece substrate with a mold resin, sealing the semiconductor chip with a resin, and forming a collectively sealed portion, and a step of detecting the defect in the device region. A step of marking a defect mark on the surface of the collectively sealed portion, a step of dividing the multi-cavity substrate and the collectively sealed portion for each device region along the dicing line into individual pieces, and forming individual sealed portions. It has.

Further, according to the method of manufacturing a semiconductor device of the present invention, a step of preparing a multi-piece substrate having a plurality of device regions and a semiconductor chip to be mounted on the plurality of device regions is provided. And connecting the front surface electrode of the semiconductor chip and the bonding electrode of the corresponding device region by a connecting member, capturing images of a plurality of device regions, and mounting the images on the individual device regions from the captured images. Inspection of semiconductor chip misalignment, presence / absence of semiconductor chip in device area, connection failure of connection member, disconnection of connection member, etc. to detect failure, and molding of multiple device areas on multi-cavity substrate with mold resin And collectively seal the semiconductor chip with resin and form a collectively sealed part The process of marking a defect mark on the surface of the collectively sealed portion of the device region where the defect is detected, and dividing the multi-cavity substrate and the collectively sealed portion for each device region along the dicing line into individual pieces. ,
Forming individual sealing portions.

Further, a method of manufacturing a semiconductor device according to the present invention
A step of preparing a multi-piece substrate having a plurality of device areas and a semiconductor chip mounted on the plurality of device areas; a step of mounting the semiconductor chip on the device areas; a surface electrode of the semiconductor chip and a device corresponding thereto A step of connecting the bonding electrodes in the region with the connection member, capturing images of the plurality of device regions, respectively, displacing the semiconductor chips mounted on the individual device regions from the captured images, the presence or absence of the semiconductor chip in the device region, Inspect the connection failure of the connection member, or the disconnection of the connection member, etc., and detect the failure, collectively cover a plurality of device regions on the multi-piece substrate with the mold resin, seal the semiconductor chip with the resin, and collectively Step of forming a sealing portion, and a batch sealing portion of a device region where a defect is detected Remove a surface by laser irradiation, a step of marking the bad marks by printing, or ink coating, singulated by dividing the multi-chip substrate and block molding unit for each device region along the dicing line,
Forming individual sealing portions.

As described above, by marking the defective mark on the surface of the encapsulation portion, the defective semiconductor device can be removed in advance before the selection step, so that the selection time can be shortened and the semiconductor device can be shortened. Manufacturing cost can be reduced.

[0017]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is an external perspective view of the semiconductor device of FIG. 1, and FIGS. 3 to 9 are manufacturing steps of the semiconductor device of FIG. 10, FIG. 10 is an explanatory view of a molding device for resin-sealing the semiconductor device of FIG. 1, and FIG. 11 is a flowchart of a manufacturing process in the semiconductor device of FIG.

In the present embodiment, the semiconductor device 1
Made of BGA, one of the surface mount type packages,
It is formed by the AP method. This semiconductor device 1
As shown in FIG. 1 and FIG. 2, a printed wiring board 2 made of, for example, glass epoxy resin is provided. Here, the printed wiring board 2 may be other than a printed board, and may be configured using, for example, a tape board made of polyimide or the like.

On the back surface of the printed wiring board 2, connection electrodes and wiring patterns arranged in an array are formed. A semiconductor chip 4 is mounted at the center of the main surface (semiconductor chip mounting surface) of the printed wiring board 2 via an adhesive 3 such as an insulating resin.

On the main surface of the printed wiring board 2, a bonding electrode 2a and a wiring pattern are formed near the periphery of two opposing sides of the semiconductor chip 4. The bonding electrode 2a and the connection electrode are electrically connected by wiring patterns formed on both surfaces of the printed wiring board, through holes, and the like.

Solder bumps 5 made of spherical solder are formed on the connection electrodes on the back surface of the printed wiring board 2 respectively. On the main surface of the semiconductor chip 4, a plurality of electrodes (surface electrodes) 4a are formed near the outer peripheral portion of the semiconductor chip 4. These electrodes 4a are connected to predetermined bonding electrodes 2a via bonding wires (connection members) 6, respectively.

The semiconductor chip 4, the periphery of the bonding electrode 2a of the printed wiring board 2, and the bonding wires 6 are sealed with a sealing resin 7 to form a package.

Further, when the semiconductor device 1 is mounted on a printed circuit board on which electronic components and the like are mounted, solder bumps 5 are superimposed on electrodes such as lands formed on the printed circuit board and mounted on the printed circuit board. The connection is made electrically.

Next, the semiconductor device 1 in the present embodiment
1 will be described with reference to FIGS. 1, 2, and 3 to 9, a description of the molding apparatus of FIG. 10, and a flowchart of FIG. 11.

First, the multi-piece board 8 and the semiconductor chip 4 mounted on the multi-piece board 8 are prepared (step S101). As shown in FIG. 3, a plurality of device regions 8a arranged in a matrix and dicing lines 8b separating these device regions are formed on the multi-piece substrate 8, and the plurality of device regions 8a are collectively formed. A batch molding is performed in a state of being covered with the resin.

The semiconductor device 1 is obtained by dicing the collectively molded portion formed by the collective molding into individual pieces. The dicing line 8b is a region that separates the device region 8a to be paired and the multi-cavity substrate 8 from the device region 8a.

In the device region 8a, the bonding electrodes 2a, wiring patterns, through holes, connection electrodes, and the like described above are formed, and after being diced into individual pieces, the above-described printed wiring board 2 is formed.
(FIG. 1).

Then, the adhesive 3 is applied to the surface of the multi-piece substrate 8 on which the semiconductor chip 4 is mounted, and the semiconductor chip 4 is mounted and bonded and fixed as shown in FIG. 4 (step S102).

Thereafter, as shown in FIG.
The electrode 4a is bonded to the bonding electrode 2a formed on the multi-piece substrate 8 by the bonding wire 6, and is electrically connected (Step S103). After this wire bonding, collective molding is performed by the molding apparatus M.

Here, the molding apparatus M will be described.

As shown in FIG. 10, the molding apparatus M
Loader M1, image recognition means M2, mold press M3
M4, marking means M5, unloader M6 and the like.

The loader M1 stores a multi-piece substrate 8 to be collectively molded. The image recognizing means M2 includes a camera for capturing an image in each device area 8a, and a defect detection unit for inspecting non-defective products and defective products from the image captured by the camera.
, A defect such as a bonding defect or a broken bonding wire, and a defect such as the device region 8a where the semiconductor chip 4 is not mounted.

The mold presses M3 and M4 press the heat-plasticized molding material into the mold cavity and mold and harden it with heat and pressure, and collectively mold the multi-piece substrate 8 after detecting a defect in the device area 8a. Is carried out to form the collective molding section 9.

The marking means M5 includes the collective molding section 9
The defective mark FM is marked on the defective device area 8a detected by the image recognizing means M2. In the unloader M6, the multi-piece substrate 8 in which the defective mark FM is marked on the defective device area 8a by the marking means M5 is stored.

Then, the defective device area is detected by the image recognizing means M2 of the molding apparatus M on the multi-piece substrate 8 after the processing of step S103 is completed (step S104). Thereafter, collective molding is performed by the mold presses M3 and M4 (step S105), and FIG.
As shown in FIG.
Are sealed with a sealing resin 7 to form a collective molded portion 9. As the mold resin, for example, an epoxy-based thermosetting resin is used.

As shown in FIG. 7, the multi-piece substrate 8 on which the collective molding section 9 is formed is moved by the marking means M5 to the position of the collective molding section 9 where the defective device region 8a detected by the image recognition means M2 is located. A square defect mark FM is marked on the surface (step S106) and stored in the unloader M6.

In this case, if the defective mark FM is recognized as a defective semiconductor device, the defective mark FM may have any shape such as a polygon other than a quadrangle or a circle. Or marking by laser irradiation.

Thereafter, as shown in FIG. 8, the solder bumps 5 are respectively formed on the connection electrodes formed on the back surface of the multi-piece substrate 8 (Step S107). The solder bumps 5 may be arranged, for example, such that the semiconductor chip 4 mounting surface of the multi-piece board 8 faces downward, and a ball mounting jig holding the plurality of solder bumps 5 by vacuum suction is arranged above the solder bumps 5. From above, mounted on connection electrodes on each device region 8a.

After the collective mold portion 9 is formed, as shown in FIG. 9, the collective mold portion 9 is divided into individual pieces by dicing using a blade B, which is a cutting blade for dicing, to form individual pieces (step). S108), and by forming individual packages (sealing portions), the semiconductor device 1 shown in FIGS. 1 and 2 is completed (step S10).
9).

[0041] Of these individualized packages, the package marked with the defective mark FM by the marking means M5 is a defective product and is therefore removed in advance. After that, the completed semiconductor device 1 on which the defect mark FM is not displayed is sorted by a sorting process.

Thus, according to the present embodiment, by displaying the defective mark FM on the package surface, the defective semiconductor device can be removed in advance before the selection step, so that the selection time can be reduced. At the same time, the manufacturing cost of the semiconductor device 1 can be reduced.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in the above embodiment, after forming solder bumps on the back surface of the multi-piece substrate, respectively,
Although the manufacturing process was performed in which the collectively molded portion was separated into individual pieces by dicing, dicing was performed after the formation of the collectively molded portion, and after removing the semiconductor device on which the defective mark was marked, solder bumps were formed only on non-defective semiconductor devices. You may do so.

As a result, formation of solder bumps on a defective semiconductor device can be prevented, and costs such as material costs can be reduced.

In the above embodiment, the semiconductor device manufactured by the batch molding method has been described. For example, a plurality of islands, leads and the like are arranged in a matrix vertically or horizontally per pitch of a lead frame. The manufacturing efficiency of the semiconductor device can also be improved by applying the method to a manufacturing process of a semiconductor device using a lead frame, which is a so-called matrix frame.

[0047]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) Since defective semiconductor devices can be removed in advance, it is not necessary to perform a 100% inspection of the semiconductor devices in the selection process, and the time required for the selection inspection can be greatly reduced.

(2) According to the above (1), the manufacturing efficiency of the semiconductor device can be increased and the manufacturing cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is an external perspective view of the semiconductor device of FIG. 1;

FIG. 3 is an explanatory diagram of a manufacturing process in the semiconductor device of FIG. 1;

FIG. 4 is an explanatory view of the semiconductor device manufacturing process following FIG. 3;

FIG. 5 is an explanatory view of the semiconductor device manufacturing process following FIG. 4;

FIG. 6 is an explanatory view of the manufacturing process of the semiconductor device, following FIG. 5;

FIG. 7 is an explanatory view of the semiconductor device manufacturing process following FIG. 6;

FIG. 8 is an explanatory view of the manufacturing process of the semiconductor device, following FIG. 7;

FIG. 9 is an explanatory view of the semiconductor device manufacturing process following FIG. 8;

FIG. 10 is an explanatory diagram of a molding device for resin-sealing the semiconductor device of FIG. 1;

FIG. 11 is a flowchart of a manufacturing process in the semiconductor device of FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Printed wiring board 2a Bonding electrode 3 Adhesive material 4 Semiconductor chip 4a Electrode (surface electrode) 5 Solder bump 6 Bonding wire (connection member) 7 Sealing resin 8 Multi-piece substrate 8a Device area 8b Dicing line 9 Batch molding Part M Molding device M1 Loader M2 Image recognition means M3, M4 Mold press M5 Marking means M6 Unloader FM Failure mark

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Kenichi Imura 5-20-1, Josuihoncho, Kodaira-shi, Tokyo Within the Semiconductor Group, Hitachi, Ltd. (72) Inventor Fukumi Shimizu 3-chome, Fujibashi, Ome-shi, Tokyo No. 2 Hitachi Tokyo Electronics Co., Ltd. (72) Inventor Yoichi Kawata 5-2-1, Kamimizuhonmachi, Kodaira-shi, Tokyo F-term in the Semiconductor Group, Hitachi, Ltd. F-term (reference) 4M109 AA01 BA03 CA21 DA09 DB17 GA06

Claims (4)

[Claims] A step of preparing a multi-piece substrate having a plurality of device regions and a semiconductor chip mounted on the plurality of device regions; a step of mounting the semiconductor chip on the device regions; A step of connecting a surface electrode and a bonding electrode of the device region corresponding to the surface electrode by a connection member; a step of detecting a defect in the device region; and a plurality of device regions in the multi-piece substrate are collectively formed by molding resin. Covering, sealing the semiconductor chip with a resin, and forming a collective sealing portion; marking a defect mark on a surface of the collective sealing portion in the device region where the defect is detected; The multi-cavity substrate and the collectively sealed portion are divided into individual pieces for each device region, and individual sealing is performed. Forming a portion. A step of preparing a multi-piece substrate having a plurality of device regions and a semiconductor chip mounted on the plurality of device regions; a step of mounting the semiconductor chip on the device regions; Connecting a surface electrode and a bonding electrode of the device region corresponding to the surface electrode by a connecting member; and a position shift of the semiconductor chip mounted on the device region, the presence or absence of a semiconductor chip in the device region,
Inspecting the connection failure of the connection member, or disconnection of the connection member, and detecting the failure; and covering a plurality of device regions on the multi-cavity substrate collectively with mold resin, and sealing the semiconductor chip with resin. Forming a batch sealing portion, marking a defect mark on the surface of the batch sealing portion of the device region in which the defect has been detected, and forming the multi-piece substrate for each device region along a dicing line. And a step of dividing the batch sealing portion into individual pieces to form individual sealing portions. A step of preparing a multi-piece substrate having a plurality of device regions and a semiconductor chip to be mounted on the plurality of device regions; a step of mounting the semiconductor chip on the device regions; A step of connecting a surface electrode and a bonding electrode of the device region corresponding to the surface electrode by a connecting member; capturing the images of the plurality of device regions, respectively, of the semiconductor chip mounted on each device region from the captured image; Inspecting the position shift, the presence or absence of the semiconductor chip in the device area, the connection failure of the connection member, or the disconnection of the connection member, and detecting the failure; and molding resin to the plurality of device areas in the multi-cavity substrate. And collectively seal the semiconductor chip with resin and collectively seal Forming, a step of marking a defect mark on the surface of the collective sealing portion of the device region in which the defect is detected, and forming the multi-piece substrate and the collective sealing portion for each device region along a dicing line. Dividing the semiconductor device into individual pieces to form individual sealing portions. 4. A method for manufacturing a resin-encapsulated semiconductor device, comprising the steps of: preparing a multi-piece substrate having a plurality of device regions and a semiconductor chip mounted on the plurality of device regions; Mounting the semiconductor chip on the semiconductor chip, connecting the surface electrodes of the semiconductor chip and the corresponding bonding electrodes of the device region by a connecting member, and capturing and capturing images of the plurality of device regions, respectively. Inspection of the position shift of the semiconductor chip mounted on each device region from the image, the presence or absence of the semiconductor chip in the device region, a connection failure of the connection member, or a disconnection of the connection member, etc., and detecting a failure. A plurality of device regions on the multi-cavity substrate are collectively covered with mold resin; Forming a batch sealing portion while sealing the body chip with a resin, and marking a defect mark by removing, printing, or applying ink on the surface of the batch sealing portion in the device region where the defect is detected by laser irradiation. And a step of dividing the multi-cavity substrate and the collective sealing portion for each device region along a dicing line to singulate and form individual sealing portions. Manufacturing method.