JP2002299679A - Photodiode manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photodiode manufacturing method which takes a simple manufacturing process, ensures a high speed response and can deal with large- diameter semiconductor substrates. SOLUTION: The method comprises providing a damage buffer layer 18 on an n-type InP cap layer 16, forming a mask layer 23 and a ZnO layer 20 thereon, diffusing Zn in the ZnO layer 20 into the cap layer 16 to form a p-type diffused region 22 forming a guard ring, similarly diffusing Zn in other ZnO layer into the cap layer 16 through other mask layer on the damage buffer layer 18 and the damage buffer layer 18 to form a p-type diffused region forming a light receiving region, and removing the damage suppression layer 18.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor light receiving device, and more particularly, to a method for manufacturing a photodiode having a guard ring.

[0002]

2. Description of the Related Art FIG. 8 is a cross-sectional view of a main part showing the structure of a conventional avalanche photodiode 110.

[0003] In FIG. 8, on the surface of the n ⁺ -type InP substrate 111, an n-type InP buffer layer 112, n-type InG
aAs light absorbing layer 113, n-type InGaAsP pile-up suppressing layer 114, n ⁺ -type InP multiplying layer 115,
The type InP cap layer 116 is laminated in this order. On the n-type InP cap layer 116, a passivation layer 117 for protecting these stacked bodies is formed.

[0004] Inside the n-type InP cap layer 116,
A p-type region 125 having a circular planar shape is formed. External light passes through the passivation layer 117 and passes through the p-type region 1.
25. That is, the p-type region 125 is a “light receiving region”.

The pn junction 126 of the photodiode 110
Is defined as p-type region 125 and n ⁺Type InP multiplication layer 1
15 is formed at the interface.

Further, a p-type region 122 a having a circular planar shape is formed inside the n-type InP cap layer 116 so as to surround the p-type region 121. Also, n
Inside the ⁺ type InP multiplication layer 115, along the outer edge of the p-type region 121, the p-type region 12 having a circular ring-shaped planar shape is formed.
2b is formed. The upper end of the p-type region 122b is
It is connected to the lower end of p-type region 122a. Two p
The mold regions 122a and 122b are concentric with each other and the region 1
22b is located outside and the region 122a is located inside. These two p-type regions 122a and 122b
A so-called "double guard ring" is formed.

On the n-type InP cap layer 116, a ring-shaped p-side electrode 131 is formed penetrating the passivation layer 117. The lower end of the p-side electrode 131 is in contact with the p-type region 121 which is a light receiving region.

An n-side electrode 132 is formed on the back surface of the n ⁺ -type InP substrate 111. The n-side electrode 132 covers the entire back surface of the substrate 111.

The conventional avalanche photodiode having the above configuration is manufactured as follows.

First, on the surface of an n ⁺ type InP substrate 111,
n ⁺ -type InP buffer layer 112, n-type InGaAs light absorption layer 113, n-type InGaAsP pile-up suppressing layer 114, n ⁺ -type InP multiplication layer 115, n-type InP
The cap layer 116 is grown in this order to obtain a laminated structure shown in FIG. For forming these layers, a known vapor phase growth method or liquid phase growth method is used.

Next, on the n-type InP cap layer 116,
Next, a mask layer (not shown) for selective implantation is formed. This
Is a SiN layer, SiO 2_TwoLayer, or P
After forming SG (PhosphorSilicate Glass) layer,
The layer is formed by patterning with photolithography.
You. Then, using the mask layer, the n-type InP
Be ions are selectively implanted into the
And a p-type region 122a having a circular ring-shaped planar shape.
To form At this time, the bottom of the p-type region 122a is n ⁺Type
Injection conditions are set so as not to reach the InP multiplication layer 115.
You.

Subsequently, after removing the mask layer for selective implantation, a mask layer (not shown) for selective implantation is formed on the n-type InP cap layer 116. Then, using the mask layer, Be ions are selectively introduced into the p-type region 122a by an ion implantation method to form a circular ring-shaped p-type region 122b. As a result, the portion into which the Be ions are implanted twice becomes the p-type region 122b. At this time, Be ions are implanted only into the inside of p-type region 122a, and the bottom of p-type region 122b is n ⁺
The implantation conditions are set so as to enter the type InP multiplication layer 115.

Then, the implanted Be ions are activated by performing a heat treatment by a predetermined method. Thus,
Two p-type regions 122a and 12 serving as a double guard ring
2b is formed.

Thereafter, after removing the mask layer, a mask layer (not shown) for selective diffusion is newly formed on the n-type InP cap layer 116. This mask layer is also made of Si
It is formed of an N layer, a SiO ₂ layer, or a PSG layer. Then, using the mask layer, a diffusion source is put into the diffusion tube evacuated, and then heat treatment is performed, so that Zn is formed inside the p-type regions 122a and 122b serving as a double guard ring.
Is selectively diffused. In other words, the so-called "sealed tube diffusion"
I do. As the diffusion source, for example, Zn ₃ P ₂ is used. Thus, the p-type region 125 functioning as a light receiving region
Is formed.

Thereafter, a passivation layer 117 is formed on the n-type InP cap layer 116 by a usual method, and a contact hole is formed in the passivation layer 117. After forming a metal film on the passivation layer 117, the unnecessary portion is removed, and p
The side electrode 131 is formed. A metal film is also formed on the back surface of the n ⁺ -type InP substrate 111 to form an n-side electrode 132.

As described above, the conventional avalanche
The photodiode 110 is manufactured.

[0017]

The above-mentioned conventional avalanche photodiode 110 has the following problems.

First, in order to form two p-type regions 122a and 122b forming a double guard ring, Be ions are introduced by "ion implantation" to form a p-type region 125 for forming a light receiving region. Since Zn atoms are introduced by “sealed tube diffusion” for forming, the manufacturing process becomes complicated.

Second, in order to ensure a high-speed response of the photodiode, it is desirable that the concentration distribution of the donor and the acceptor near the pn junction 126 has a steep slope. Z by "sealed tube diffusion"
Realization is difficult because n atoms are introduced in the gas phase.

Third, in order to manufacture a photodiode using a large-diameter semiconductor substrate (wafer), it is necessary to use “sealed tube diffusion”.
It is desired to increase the diameter of the tube used in the process, but it is difficult to realize the above-described conventional manufacturing method because so-called “sealed tube diffusion” is performed.

The present invention has been made to solve these problems, and an object of the present invention is to provide a method of manufacturing a photodiode which does not require the use of an ion implantation method and simplifies the manufacturing process. To provide.

Another object of the present invention is to provide a method of manufacturing a photodiode which can ensure a high-speed response by making the concentration distribution of the donor and acceptor near the pn junction steep.

Still another object of the present invention is to provide a method of manufacturing a photodiode which can easily cope with the use of a large-diameter semiconductor substrate (wafer).

Still another object of the present invention is to provide a method of manufacturing a photodiode which can avoid inconveniences (such as an increase in dark current and surface roughness) due to damage to a semiconductor layer caused in a process of forming a guard ring and a light receiving region. Is to do.

[0025] Other objects of the present invention will become clear from the following description.

[0026]

(1) A method of manufacturing a photodiode according to the present invention comprises the steps of: (a) forming the first and second semiconductor layers of the first conductivity type on a semiconductor substrate of the first conductivity type; Forming a stacked layer; (b) forming a damage buffer layer on the second semiconductor layer; and (c) forming the first conductivity type on the damage buffer layer via a first mask layer. Forming a first diffusion source layer containing a second conductivity type dopant having a polarity opposite to that of the first diffusion source layer; and (d) changing the second conductivity type dopant contained in the first diffusion source layer to the first diffusion source layer. The second through a mask layer and the damage buffer layer;
Forming a first diffusion region of the second conductivity type, which is selectively diffused into a semiconductor layer, thereby forming a guard ring; and (e) removing the first diffusion source layer and the first mask layer. (F) forming a second diffusion source layer containing the dopant of the second conductivity type on the damage buffer layer via a second mask layer; and (g) forming the second diffusion source. The second conductivity type dopant contained in the second mask layer and the damage buffer layer via the second mask layer and the damage buffer layer.
Forming a second diffusion region of the second conductivity type, which is selectively diffused into a semiconductor layer, thereby becoming a light receiving region;
(H) removing the second diffusion source layer and the second mask layer; and (i) removing the damage buffer layer.

(2) In the method for manufacturing a photodiode of the present invention, after forming a damage buffer layer on a second semiconductor layer of the first conductivity type, a first mask layer for selective diffusion is formed thereon. To form a first diffusion source layer containing a second conductivity type dopant, and then selectively diffuse the dopant contained in the first diffusion source layer into the second semiconductor layer via the first mask layer. . Thus, a first diffusion region of the second conductivity type serving as a guard ring is formed inside the second semiconductor layer.

Subsequently, after removing the first diffusion source layer and the first mask layer, the second diffusion layer containing the dopant of the second conductivity type is placed on the damage buffer layer via the second mask layer for selective diffusion. Form a source layer. After that, the dopant contained in the second diffusion source layer is selectively diffused into the second semiconductor layer via the second mask layer. Thus, the second light receiving area
A conductive type second diffusion region is formed. Finally, the second diffusion source layer, the second mask layer, and the damage buffer layer are removed. This eliminates the need for an ion implantation step when forming the guard ring and the light receiving region, thereby simplifying the manufacturing process.

The pn junction has a second diffusion region of the second conductivity type serving as a light receiving region formed in the second semiconductor layer;
It is formed at the interface with the first conductivity type first semiconductor layer adjacent thereto. In addition, the first of the second conductivity type serving as a guard ring
The formation of the diffusion region and the formation of the second diffusion region of the second conductivity type serving as the light receiving region are performed by diffusing the dopant of the second conductivity type contained in the first and second diffusion source layers. ing. Therefore, by adjusting the diffusion conditions, the concentration distribution of the donor and the acceptor in the vicinity of the pn junction can be made to have a steep gradient, and the high-speed response of the photodiode can be secured.

Further, the formation of the first diffusion region of the second conductivity type serving as a guard ring and the formation of the second diffusion region of the second conductivity type serving as a light receiving region are performed in the first and second diffusion source layers. Since the diffusion is performed by diffusing the second conductivity type dopant contained therein, so-called “open tube diffusion” can be performed. Therefore, it is possible to easily cope with the use of a large-diameter semiconductor substrate (wafer).

In addition, during the steps (c) to (h), since the surface of the second semiconductor layer is covered with the damage buffer layer, the second semiconductor layer is damaged in those steps. Fear is gone. For this reason, it is possible to avoid inconveniences caused by damage to the second semiconductor layer (such as an increase in dark current and surface roughness).

(3) In a preferred example of the method for manufacturing a photodiode according to the present invention, the first semiconductor layer is a multiplication layer, and the second semiconductor layer is a cap layer. Alternatively, the first semiconductor layer is an n-type InP multiplication layer, and the second semiconductor layer is an n-type InP cap layer.

In another preferred example of the method for manufacturing a photodiode according to the present invention, the first diffusion region serving as a guard ring is entirely inside the second semiconductor layer at the end of the step (d). The step (g) for forming the second diffusion region serving as a light receiving region is enlarged, and the bottom of the first diffusion region is located inside the first semiconductor layer.

In still another preferred embodiment of the method for manufacturing a photodiode according to the present invention, the second conductive type dopant contained in the first diffusion source layer and the second conductive type dopant contained in the second diffusion source layer are provided. The type dopant is Zn.

In still another preferred embodiment of the method for manufacturing a photodiode according to the present invention, a compound semiconductor layer is used as the damage buffer layer.

(4) JP-A-3-297173 discloses a semiconductor light receiving element such as a photodiode. The semiconductor light-receiving element disclosed in the publication is a semiconductor light-receiving element in which a light absorption layer or an avalanche multiplication layer is formed of a ternary or more compound semiconductor. At least stoichiometry is provided thereon, and a light absorption layer or an avalanche multiplication layer with less mixed crystal scattering and metal scattering is provided. Therefore, there is no disclosure of "forming a guard ring and a light receiving region in two diffusion steps using a damage buffer layer" of the present invention, which is apparently different from the present invention.

Japanese Patent Application Laid-Open No. Hei 9-186357 discloses an avalanche photodiode and a method for manufacturing the same. The avalanche photodiode of this publication includes a stacked body of an n-type InP multiplication (region) layer having a high concentration of impurity ions and an n-type InP multiplication (region) layer having a low concentration of impurity ions. This corresponds to a structure in which a concentration gradient of impurity ions is provided inside the n-type InP multiplication (region) layer. By doing so, desired multiplication characteristics can be obtained in the n-type InP multiplication (region) layer. Therefore, the same publication does not disclose anything about “the formation of the guard ring and the light receiving region in two diffusion steps using the damage buffer layer” of the present invention, which is different from the present invention. Is evident.

[0038]

Preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a cross-sectional view of a principal part showing a schematic configuration of an avalanche photodiode 10 according to one embodiment of the present invention.

As shown in FIG. 1, the avalanche photodiode 10 of this embodiment has an n ⁺ -type InP substrate 1.
1 and n-type InP laminated on the surface of the substrate 11
Buffer layer 12, n-type InGaAs light absorbing layer 13, n-type InGaAsP pile-up suppressing layer 14, n ⁺ -type InP
A multiplication layer 15 and an n-type InP cap layer 16 are provided. On the n-type InP cap layer 16, a passivation layer 17 for protecting these stacked bodies is formed.

The n-type InP cap layer 16 and the underlying n ⁺
Inside the p-type InP multiplication layer 15, a p-type diffusion region 25 having a circular planar shape is formed. External light is made to enter the p-type diffusion region 25 through the circular window of the passivation layer 17. That is, the p-type diffusion region 25 is a “light receiving region”.

The pn junction 26 of the diode 10 is formed at the interface between the p-type diffusion region 25 and the n ⁺ -type InP multiplication layer 15 immediately below the p-type diffusion region 25.

A circular ring-shaped p-type diffusion region 22 is formed inside the n-type InP cap layer 16 so as to surround the p-type diffusion region 25. This p-type diffusion region 22 forms a “guard ring”,
It functions to suppress the occurrence of edge breakdown at the n-junction 26.

A circular ring-shaped p-side electrode 31 is formed on the n-type InP cap layer 16 so as to pass through a window of the passivation layer 17. The lower end of the p-side electrode 31 is in contact with the p-type diffusion region 25 which is a light receiving region. External light is applied to the p-type diffusion region 25 through the circular window at the center of the passivation layer 17 and the p-side electrode 31.

On the back surface of the n ⁺ type InP substrate 11, an n-side electrode 32 is formed. The n-side electrode 32 covers the entire back surface of the substrate 11.

Next, a method of manufacturing the avalanche photodiode 10 having the above configuration will be described with reference to FIGS.

First, n⁺N-type InP substrate 11
InP buffer layer 12 and n-type InGaAs light absorbing layer
13 and an n-type InGaAsP pile-up suppressing layer 14
And n ⁺InP multiplication layer 15 and n-type InP cap layer
16 are grown in this order to form a laminated structure as shown in FIG.
Get. For forming these layers, there is a known vapor deposition method.
Alternatively, a liquid phase growth method is used.

Next, on the n-type InP cap layer 16,
The damage buffer layer 18 is formed. The state at this time is as shown in FIG.

Various layers of the damage buffer layer 18 are formed above the n-type InP cap layer 16 in a subsequent step, and are removed by etching or the like, so that the surface of the n-type InP cap layer 16 is damaged. (Damage) is intended not to suffer. Therefore, any layer having such a function can be used as the damage buffer layer 18. For example, an InGaAs layer can be suitably used.

Next, as shown in FIG. 3, a mask layer 19 for selective diffusion is formed on the damage buffer layer 18. The mask layer 19 has an opening 19a having a circular ring shape in a plan view at a substantially central portion. The mask layer 19 is formed by forming, for example, a SiN layer, a SiO ₂ layer, or a PSG layer on the damage buffer layer 18 and then patterning the layer by photolithography.

Next, as shown in FIG. 4, a ZnO layer 20 and a SiO ₂ layer 21 are sequentially formed on the mask layer 19 for selective diffusion. For forming the ZnO layer 20 and the SiO ₂ layer 21, for example, a sputtering method is used. The ZnO layer 20
"Zn diffusion source" for selectively diffusing Zn atoms as p-type dopants into n-type InP cap layer 16
Function as The SiO ₂ layer 21 functions as a protective film for the ZnO layer 20. The state at this time is as shown in FIG. 4, and the ZnO layer 20 is in contact with the n-type InP cap layer 16 through the opening 19a of the mask layer 19.

Next, the structure having the state shown in FIG. 4 is placed in a predetermined furnace and heated at a predetermined temperature for a predetermined time. Thus, the Zn atoms contained in the ZnO layer 20 are selectively thermally diffused into the n-type InP cap layer 16. At this time, ZnO
The Zn atoms in the layer 20 pass through the opening 19a of the mask layer 19, further penetrate the damage buffer layer 17, and then pass through the n-type In layer.
It diffuses into the P cap layer 16. As a result, as shown in FIG. 5, a p-type diffusion region 22 serving as a guard ring is formed inside the n-type InP cap layer 16. That is, the p-type diffusion region 22 serving as a guard ring is formed using a thermal diffusion method instead of an ion implantation method. The planar shape of the p-type diffusion region 22 is substantially the same as the circular ring shape of the opening 19 a of the mask layer 19. The heating temperature and the heating time at this time are such that the bottom of the p-type diffusion region 22 is the n-type InP multiplication layer 115.
It is adjusted so that it does not reach inside.

[0053] Subsequently, by wet etching using a hydrofluoric acid (HF) or buffered hydrofluoric acid, SiO ₂ layer 21 and Zn
The entire O layer 20 is removed. At this time, damage buffer layer 1
Since 7 covers the surface of n-type InP cap layer 16, the etching action does not directly affect cap layer 16. Therefore, there is an advantage that the n-type InP cap layer 16 is not likely to be damaged in this etching step. The state at the time of completion of the etching is as shown in FIG. Since the damage buffer layer 17 is also slightly etched, the thickness of the damage buffer layer 17 is slightly reduced in the state of FIG.

Next, as shown in FIG. 7, a mask layer 23 for selective diffusion is formed on the damage buffer layer 18. The mask layer 23 has an opening 23 having a circular planar shape at a substantially central portion.
a. The mask layer 23 is formed in the same manner as the mask layer 19, that is, after forming a SiN layer, a SiO ₂ layer, a PSG layer, or the like, and then patterning the layer by photolithography.

Next, on the mask layer 23 for selective diffusion,
A ZnO layer 24 is formed. For forming the ZnO layer 24, for example, a sputtering method is used. The ZnO layer 24 is made of n-type In.
It functions as a “Zn diffusion source” for selectively diffusing Zn atoms into the P cap layer 16. ZnO layer 24
Is in contact with the n-type InP cap layer 16 through the opening 23a of the mask layer 23.

The opening 23a of the mask layer 23 is formed such that the p-type diffusion region 25 serving as a light receiving region is
What is necessary is just to set so that it may be formed in a desired shape inside the type | mold diffusion region 22. In this embodiment, the opening 23a
Is set so that the outer edge of the p-type diffusion region 22 substantially coincides with the inner edge of the p-type diffusion region 22 serving as a guard ring.

Next, the structure having the state shown in FIG. 7 is placed in a furnace and heated at a predetermined temperature for a predetermined time. Thus, Zn
Zn atoms contained in the O layer 24 are selectively diffused into the n-type InP cap layer 16. At this time, Zn atoms in the ZnO layer 24 diffuse through the opening 23 a of the mask layer 23, further penetrate the damage buffer layer 17, and diffuse into the n-type InP cap layer 16. The Zn atoms thus diffused into the n-type InP cap layer 16 are not only inside the p-type diffusion region 22 serving as a guard ring but also in the p-type diffusion region 22.
A little into the inner edge of the. As a result, as shown in FIG. 7, a p-type diffusion region 25 having a circular planar shape is formed inside the n-type InP cap layer 16. That is, the p-type diffusion region 25 serving as a light receiving region is formed inside and concentric with the p-type diffusion region 22 serving as a guard ring.

As described above, the method of forming the p-type diffusion region 25 serving as a light receiving region is based on the p-type diffusion region 2 serving as a guard ring.
This is the same thermal diffusion method as in the case of No. 2. The heating temperature and the heating time at this time are adjusted so that the bottom of the p-type diffusion region 25 does not reach the n-type InP multiplication layer 15.

In this thermal diffusion step, Zn atoms contained in the p-type diffusion region 22 serving as a guard ring are also diffused, so that the p-type diffusion region 22 slightly spreads outward and inward from the state shown in FIG. Spread a little below. Therefore,
As shown in FIG. 7, the inner end of the p-type diffusion region 22 slightly overlaps the outer end of the p-type diffusion region 25, and
The bottom of the type diffusion region 22 enters the n ⁺ type InP multiplication layer 15.

Subsequently, wet etching is performed using hydrofluoric acid or buffered hydrofluoric acid to remove the mask layer 23 and the ZnO layer 24. Also at this time, the damage buffer layer 17 is made of n-type InP.
Since the surface of the cap layer 16 is covered, the etching action does not reach the cap layer 16. Therefore, there is no risk that the n-type InP cap layer 16 is damaged here.

Thereafter, a passivation layer 17 is formed on the n-type InP cap layer 16 by a usual method, and a circular window is formed in the passivation layer 17. At this time, as shown in FIG.
7 denotes a p-type diffusion region 22 serving as a guard ring and the remaining n-type diffusion region 22.
Only the p-type diffusion region 25 serving as a light receiving region covers the entire surface of the type InP cap layer 16.
It is exposed from the window.

Further, a metal film is also formed on the back surface of the n ⁺ -type InP substrate 11 to form an n-side electrode 32. n-side electrode 32
Covers the entire back surface of the substrate 11.

Thus, the avalanche photodiode 10 according to one embodiment of the present invention is manufactured.

As is clear from the above description,
In the method of manufacturing the avalanche photodiode 10 according to one embodiment of the present invention, the damage buffer layer 17 is first formed on the n-type InP cap layer 16, and the selective buffer is formed on the damage buffer layer 17. Mask layers 19, 23 and Z
After forming the nO layers 20 and 24, a p-type dopant (here, Zn atom) is selectively added to the n-type InP cap layer 16.
Are formed, and a p-type diffusion region 22 serving as a guard ring and a p-type diffusion region 25 serving as a light receiving region are formed. Then, the mask layers 19 and 23 and ZnO
Layers 20, 24 have been removed by etching.

Therefore, unlike the case where the mask layers 19 and 23 and the ZnO layers 20 and 24 are formed directly on the damage buffer layer 17, the n-type InP cap layer 16 may be damaged during these steps. There is no. Therefore, n-type In
The alloying of the P cap layer 16 can be suppressed and the n-type
Problems such as an increase in dark current and surface roughness due to damage to the nP cap layer 16 can be avoided.

Further, p-type dopants (here, Zn atoms) are selectively introduced into the n-type InP cap layer 16 by thermal diffusion to form the p-type diffusion regions 22 and 25. The Be ion implantation step used in the conventional method of manufacturing the photodiode 110 is not required. Therefore, the manufacturing process is simplified.

In addition, since the p-type dopant (Zn atom in this case) is introduced into the n-type InP cap layer 16 by thermal diffusion, so-called “open tube diffusion” becomes possible. It can easily handle semiconductor substrates (wafers).

The present invention is not limited to the above embodiment. For example, in the above embodiment, the n-type InP
On the substrate, an n-type InP buffer layer and an n-type InGaAs
Light absorption layer, n-type InGaAsP pile-up suppression layer, n
Although a multi-layered InP multiplication layer and an n-type InP cap layer are formed, semiconductor substrates other than InP can also be used.
The laminated structure formed on the semiconductor substrate can be arbitrarily changed as long as a diode function is obtained. Needless to say, any toppane other than Zn can be used.

[0069]

As described above, according to the method for manufacturing a photodiode of the present invention, it is not necessary to use an ion implantation method, so that the manufacturing process can be simplified and the donor and acceptor in the vicinity of the pn junction can be formed. High-speed response can be ensured by making the concentration distribution have a steep slope. Further, it can easily cope with the use of a large-diameter semiconductor substrate (wafer). Further, inconveniences (such as an increase in dark current and surface roughness) due to damage to the semiconductor layer caused by the process of forming the guard ring and the light receiving region can be avoided.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view of a main part showing a configuration of an avalanche photodiode according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of a main part showing each step of a method for manufacturing the avalanche photodiode of FIG.

3 is a fragmentary schematic cross-sectional view showing each step of a method for manufacturing the avalanche photodiode of FIG. 1, and is a continuation of FIG. 2;

4 is a fragmentary schematic cross-sectional view showing each step of the method for manufacturing the avalanche photodiode of FIG. 1, and is a continuation of FIG.

5 is a fragmentary schematic cross-sectional view showing each step of the method for manufacturing the avalanche photodiode of FIG. 1, and is a continuation of FIG.

6 is a fragmentary schematic cross-sectional view showing each step of the method for manufacturing the avalanche photodiode of FIG. 1, and is a continuation of FIG. 5;

7 is a fragmentary schematic cross-sectional view showing each step of the method for manufacturing the avalanche photodiode of FIG. 1, and is a continuation of FIG. 6;

FIG. 8 is a schematic sectional view of a main part showing a configuration of a conventional avalanche photodiode.

[Explanation of symbols]

Reference Signs List 10 avalanche photodiode 11 n ⁺ -type InP substrate 12 n-type InP buffer layer 13 n-type InGaAs light absorption layer 14 n-type InGaAsP pile-up suppression layer 15 n ⁺ -type InP multiplication layer 16 n-type InP cap layer 17 passivation layer 18 Damage buffer layer 19 Selective diffusion mask layer 20 ZnO layer 21 SiO ₂ layer 22 P-type diffusion region (guard ring) 23 Selective diffusion mask layer 24 ZnO layer 25 P-type diffusion region (light receiving region) 31 p-side electrode 32 n side electrode

Continuation of the front page F term (reference) 5F045 AB10 AB12 AB17 AB40 BB05 BB16 CA13 DA53 DB02 HA20 5F049 MA07 MB07 MB12 NA03 NA05 NA18 PA02 PA03 PA09 PA14 QA12 SS02

Claims (6)

[Claims] 1. (a) On a semiconductor substrate of a first conductivity type,
A step of laminating the first and second semiconductor layers of the first conductivity type; (b) a step of forming a damage buffer layer on the second semiconductor layer; and (c) a step of forming a damage buffer layer on the second semiconductor layer. Forming a first diffusion source layer containing a second conductivity type dopant having a polarity opposite to the first conductivity type via a first mask layer; and (d) the first diffusion source layer. Is selectively diffused into the second semiconductor layer through the first mask layer and the damage buffer layer, and the first diffusion region of the second conductivity type that serves as a guard ring (E) removing the first diffusion source layer and the first mask layer; and (f) forming the second conductive layer on the damage buffer layer via a second mask layer. Forming a second diffusion source layer containing a type dopant; The dopant contained in the second diffusion source layer is selectively diffused into the second semiconductor layer through the second mask layer and the damage buffer layer, so that the second conductivity type that becomes a light receiving region is formed. Forming a second diffusion region, (h) removing the second diffusion source layer and the second mask layer, and (i) removing the damage buffer layer. Manufacturing method. 2. The method according to claim 1, wherein the first semiconductor layer is a multiplication layer, and the second semiconductor layer is a cap layer. 3. The method according to claim 1, wherein the first semiconductor layer is an n-type InP multiplication layer, and the second semiconductor layer is an n-type InP cap layer. 4. The first diffusion region serving as a guard ring is entirely inside the second semiconductor layer at the end of the step (d), but the second diffusion region serving as a light receiving region is formed. 4. The method of manufacturing a photodiode according to claim 1, wherein in the step (g), the bottom of the first diffusion region is located inside the first semiconductor layer. 5. 5. The dopant of the second conductivity type included in the first diffusion source layer and the dopant of the second conductivity type included in the second diffusion source layer are both Zn. 5. The method for manufacturing a photodiode according to any one of items 4. 6. The method according to claim 1, wherein a compound semiconductor layer is used as the damage buffer layer.