JP2002299234A - For manufacturing polycrystalline semiconductor layer method - Google Patents
For manufacturing polycrystalline semiconductor layer methodInfo
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- JP2002299234A JP2002299234A JP2001096557A JP2001096557A JP2002299234A JP 2002299234 A JP2002299234 A JP 2002299234A JP 2001096557 A JP2001096557 A JP 2001096557A JP 2001096557 A JP2001096557 A JP 2001096557A JP 2002299234 A JP2002299234 A JP 2002299234A
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- silicon film
- amorphous silicon
- film
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は薄膜トランジスタ
（ＴＦＴ）型液晶表示装置のための、トランジスタを形
成する半導体層の製造方法に関する。The present invention relates to a method for manufacturing a semiconductor layer for forming a transistor for a thin film transistor (TFT) type liquid crystal display device.
【０００２】[0002]
【従来の技術】近年、半導体回路の利用範囲が広がり、
例えば薄膜トランジスタ（ＴＦＴ）型液晶表示装置はパ
ーソナルコンピュータおよび電子式カメラなどに広く使
用されている。さらに、その使いやすさから使用環境が
広がり、高密度・高性能のＴＦＴ型液晶表示装置が要求
されている。2. Description of the Related Art In recent years, the use range of semiconductor circuits has expanded,
For example, thin film transistor (TFT) type liquid crystal display devices are widely used in personal computers, electronic cameras, and the like. Further, because of its ease of use, the use environment has expanded, and a high-density and high-performance TFT-type liquid crystal display device has been demanded.
【０００３】また、さらなる特性向上のため、非晶質珪
素膜を用いたＴＦＴ型液晶表示装置から多結晶珪素膜を
用いたＴＦＴ型液晶表示装置へと開発が進み、近年では
周辺回路を取り込んだＮチャンネル型トランジスタとＰ
チャンネル型トランジスタを併せ持つ相補型電界効果ト
ランジスタ（ＣＭＯＳ）型のＴＦＴ液晶表示装置が主流
になりつつある。In order to further improve the characteristics, the development of a TFT type liquid crystal display device using an amorphous silicon film to a TFT type liquid crystal display device using a polycrystalline silicon film has been advanced. In recent years, peripheral circuits have been incorporated. N-channel transistor and P
A complementary field effect transistor (CMOS) type TFT liquid crystal display device having a channel type transistor is becoming mainstream.
【０００４】以下に、図面を参照しながら、上述の多結
晶珪素膜を用いた従来のＴＦＴ型液晶表示装置の製造方
法を説明する。図３（ａ）〜（ｂ）は、従来の多結晶珪
素膜を用いたＴＦＴ型液晶表示装置の製造方法を説明す
るための工程図であって、各工程におけるＴＦＴ素子を
形成するための半導体層を形成する概略断面図を表して
いる。ＴＦＴ素子を形成するための半導体層の形成は、
図３（ａ）に示すように、まずガラス基板１の表面に厚
さ約５００ｎｍの二酸化珪素膜２を形成し、その表面に
厚さ約６０ｎｍの非晶質珪素膜３を化学気相蒸着方法
（ＣＶＤ法）で形成する。その後、非晶質珪素膜３に含
まれる水素の量を減少させるため、真空中４５０℃で約
１時間の熱処理を行う。そして、非晶質珪素膜３の表面
からエキシマレーザーを照射して、非晶質珪素膜３を多
結晶珪素膜３’に変えてから、図３（ｂ）に示すよう
に、フォトレジスト４で所定のパターンを形成し、ドラ
イエッチング方法で多結晶珪素膜３をエッチングして、
トランジスタを形成するための半導体層を形成する。別
の方法として、真空中４５０℃で約１時間の熱処理を行
った後、図３（ｂ）に示すように、フォトレジスト４で
所定のパターンを形成し、ドライエッチング方法で非晶
質珪素膜３のエッチング断面形状がテーパー状になるよ
うなコントロールをせずに、エッチングして所定のパタ
ーンを形成した後、非晶質珪素膜３の表面からエキシマ
レーザーを照射して、非晶質珪素膜３を多結晶珪素膜に
変えて、トランジスタを形成するための半導体層を形成
する。Hereinafter, a method of manufacturing a conventional TFT type liquid crystal display device using the above-described polycrystalline silicon film will be described with reference to the drawings. FIGS. 3A and 3B are process diagrams for explaining a conventional method of manufacturing a TFT type liquid crystal display device using a polycrystalline silicon film, and show a semiconductor for forming a TFT element in each process. FIG. 3 shows a schematic sectional view of forming a layer. Formation of a semiconductor layer for forming a TFT element is as follows.
As shown in FIG. 3A, first, a silicon dioxide film 2 having a thickness of about 500 nm is formed on the surface of a glass substrate 1, and an amorphous silicon film 3 having a thickness of about 60 nm is formed on the surface thereof by a chemical vapor deposition method. (CVD method). Thereafter, in order to reduce the amount of hydrogen contained in the amorphous silicon film 3, a heat treatment is performed at 450 ° C. for about 1 hour in a vacuum. Then, an excimer laser is irradiated from the surface of the amorphous silicon film 3 to change the amorphous silicon film 3 into a polycrystalline silicon film 3 ′. Then, as shown in FIG. A predetermined pattern is formed, and the polycrystalline silicon film 3 is etched by a dry etching method.
A semiconductor layer for forming a transistor is formed. As another method, after performing a heat treatment at 450 ° C. for about 1 hour in a vacuum, as shown in FIG. 3B, a predetermined pattern is formed with a photoresist 4 and an amorphous silicon film is formed by a dry etching method. After forming a predetermined pattern by etching without controlling the etching cross-sectional shape of the amorphous silicon film 3 to be tapered, the amorphous silicon film is irradiated with an excimer laser from the surface of the amorphous silicon film 3. 3 is changed to a polycrystalline silicon film, and a semiconductor layer for forming a transistor is formed.
【０００５】しかし、このような製造方法により形成さ
れた多結晶珪素膜は、結晶性にバラツキが大きく、トラ
ンジスタ特性のバラツキが大きいという問題があった。[0005] However, the polycrystalline silicon film formed by such a manufacturing method has a problem that the crystallinity is largely varied and the transistor characteristics are largely varied.
【０００６】[0006]
【発明が解決しようとする課題】本発明は、前記従来の
問題を解決するため、多結晶珪素膜の結晶性のバラツキ
を小さくし、トランジスタ特性のバラツキが小さくでき
る半導体層を形成する方法を提供することを目的とす
る。SUMMARY OF THE INVENTION In order to solve the above-mentioned conventional problems, the present invention provides a method for forming a semiconductor layer capable of reducing variation in crystallinity of a polycrystalline silicon film and variation in transistor characteristics. The purpose is to do.
【０００７】[0007]
【課題を解決するための手段】前記目的を達成するた
め、本発明の多結晶半導体層の製造方法は、電気絶縁膜
上に非晶質珪素膜を形成し、前記非晶質珪素膜の断面形
状がテーパー状になるようにエッチングしてパターン形
成し、エキシマレーザーを照射して前記非晶質珪素膜を
多結晶化することを特徴とする。In order to achieve the above object, a method of manufacturing a polycrystalline semiconductor layer according to the present invention comprises forming an amorphous silicon film on an electric insulating film, and forming a cross section of the amorphous silicon film. A pattern is formed by etching so as to have a tapered shape, and the amorphous silicon film is polycrystallized by excimer laser irradiation.
【０００８】前記方法においては、非晶質珪素膜をパタ
ーン形成したときの断面形状のテーパー角度が５０度以
下であることが好ましい。このようにすると、非晶質珪
素膜がエキシマレーザーで、加熱・溶融されたあと、ま
ず、テーパー部分の膜厚が薄い部分から冷却・結晶化さ
れることにより、安定した結晶化を得ることができる。
さらに好ましいテーパー角度は、３０〜４５度の範囲で
ある。In the above method, the taper angle of the cross-sectional shape when the amorphous silicon film is patterned is preferably 50 degrees or less. In this manner, after the amorphous silicon film is heated and melted by the excimer laser, first, the tapered portion is cooled and crystallized from the thin portion, so that stable crystallization can be obtained. it can.
A more preferred taper angle is in the range of 30 to 45 degrees.
【０００９】また、非晶質珪素膜の膜厚は４０ｎｍ〜１
００ｎｍの範囲であることが好ましい。この範囲である
と、テーパー部分と平坦部分の冷却の差により結晶性の
バラツキが出るが、これを改善できるからである。The thickness of the amorphous silicon film is 40 nm to 1 nm.
It is preferably in the range of 00 nm. Within this range, the crystallinity varies due to the difference in cooling between the tapered portion and the flat portion, but this can be improved.
【００１０】また、非晶質珪素膜のパターン幅が、エキ
シマレーザー１回の照射幅の２倍以下であることが好ま
しい。パターン幅が前記よりも大きいと、平坦部分で結
晶化が進むためバラツキは大きくなる傾向となる。[0010] It is preferable that the pattern width of the amorphous silicon film is twice or less the irradiation width of one excimer laser. If the pattern width is larger than the above, the variance tends to increase because crystallization proceeds in a flat portion.
【００１１】[0011]
【発明の実施の形態】上述のように、本発明の本発明の
多結晶半導体層は、非晶質珪素膜がエキシマレーザー
で、加熱・溶融されたあと、まず、テーパー部分の膜厚
が薄い部分から冷却・結晶化されることにより、安定し
た結晶化を得ることができる。そのために、電気絶縁膜
上に、非晶質珪素膜を形成する工程と、その非晶質珪素
膜の断面形状がテーパー状になるようにエッチングして
パターン形成する工程と、エキシマレーザーを照射して
前記非晶質珪素膜を多結晶化する工程とを有することに
より製造できる。本発明の多結晶珪素膜は、上記した構
成によって、結晶性のバラツキを小さくすることによ
り、その半導体層で形成するトランジスタの特性バラツ
キを小さくできる。As described above, in the polycrystalline semiconductor layer of the present invention, after the amorphous silicon film is heated and melted by an excimer laser, first, the thickness of the tapered portion is thin. Stable crystallization can be obtained by cooling and crystallization from the part. For this purpose, a step of forming an amorphous silicon film on the electric insulating film, a step of forming a pattern by etching so that the cross-sectional shape of the amorphous silicon film becomes tapered, and irradiating an excimer laser And polycrystallizing the amorphous silicon film. In the polycrystalline silicon film of the present invention, with the above-described structure, variation in crystallinity is reduced, so that variation in characteristics of a transistor formed using the semiconductor layer can be reduced.
【００１２】以下に、本発明の一実施例に係る多結晶半
導体層の製造方法について、図面を参照しながら説明す
る。Hereinafter, a method for manufacturing a polycrystalline semiconductor layer according to an embodiment of the present invention will be described with reference to the drawings.
【００１３】図１（ａ）〜（ｃ）は、本発明の一実施例
に係るＴＦＴ型液晶表示装置の製造方法を説明するため
の工程図であって、各工程におけるＴＦＴ素子の概略断
面図を示している。FIGS. 1A to 1C are process diagrams for explaining a method of manufacturing a TFT type liquid crystal display device according to one embodiment of the present invention, and are schematic sectional views of a TFT element in each process. Is shown.
【００１４】ＴＦＴ素子の形成は、図１（ａ）に示すよ
うに、まずガラス基板１の表面に厚さ約５００ｎｍの二
酸化珪素膜１２を形成し、その表面に非晶質珪素膜１３
を例えばプラズマＣＶＤ方法で（例えば、厚さ約５０ｎ
ｍ）を形成する。As shown in FIG. 1A, a TFT device is formed by first forming a silicon dioxide film 12 having a thickness of about 500 nm on the surface of a glass substrate 1, and forming an amorphous silicon film 13 on the surface.
By, for example, a plasma CVD method (for example, a thickness of about 50 n
m).
【００１５】その後、真空排気しながら、例えば約４５
０℃、１時間の熱処理を行って非晶質珪素膜１３中に含
まれている水素の量を減少させる。なお、熱処理の条件
は、非晶質珪素の状態でプロセス全体のバランスを損な
わず、脱水素を行うことのできる範囲で適宜選択するこ
とが可能である。Thereafter, for example, about 45
By performing a heat treatment at 0 ° C. for one hour, the amount of hydrogen contained in the amorphous silicon film 13 is reduced. Note that the conditions of the heat treatment can be appropriately selected within a range where dehydrogenation can be performed without deteriorating the balance of the entire process in the state of amorphous silicon.
【００１６】そして、フォトリソグラフィー方法でレジ
ストパターン１４を形成し、たとえば１３０℃で約５分
の熱処理を行うことにより、フォトレジスト１４を収縮
させて、パターンエッジが円弧状になるようにする。
（図１（ｂ））この後、フォトレジスト１４と非晶質珪
素膜１３のエッチング速度がほぼ同じである条件でドラ
イエッチングを行うことにより、非晶質珪素膜の断面形
状が約４５度のテーパーで、所定のパターンに形成でき
る（レジスト後退法）。この後、たとえば５００ｍＪ／
ｃｍ2のエネルギー強度のエキシマレーザーを照射する
ことによって、非晶質珪素を多結晶珪素膜１３’に転化
させる（図１（ｃ）） 上記した構成によって、非晶質珪素膜がエキシマレーザ
ーで、加熱・溶融されたあと、まず、テーパー部分の膜
厚が薄い部分から冷却・結晶化されることにより、安定
した結晶化を得ることができ、その半導体層で形成する
トランジスタの特性バラツキを小さくすることができ
る。Then, a resist pattern 14 is formed by a photolithography method, and a heat treatment is performed at, for example, 130 ° C. for about 5 minutes to shrink the photoresist 14 so that the pattern edge becomes an arc shape.
(FIG. 1B) Thereafter, dry etching is performed under the condition that the etching rates of the photoresist 14 and the amorphous silicon film 13 are substantially the same, so that the amorphous silicon film has a cross-sectional shape of about 45 degrees. It can be formed in a predetermined pattern with a taper (resist receding method). Thereafter, for example, 500 mJ /
By irradiating an excimer laser having an energy intensity of cm 2 , the amorphous silicon is converted into a polycrystalline silicon film 13 ′ (FIG. 1C). After being heated and melted, first, the tapered portion is cooled and crystallized from a thin portion, whereby stable crystallization can be obtained, and the variation in characteristics of a transistor formed using the semiconductor layer is reduced. be able to.
【００１７】これをより具体的に説明すると、図２
（ａ）に示すとおり、例えば約２００μｍ幅のエキシマ
レーザーで最初の照射を行い、次に約１０μｍ右に移動
させて第２番目の照射を行う。図２（ａ）において、Ｌ
1は最初の照射幅であり、Ｌ2は第２番目の照射幅であ
り、ｌ1は移動距離である。非晶質珪素膜１３の幅はエ
キシマレーザー１回の照射幅Ｌ1またはＬ2の２倍以下で
あり、非晶質珪素膜１３の２つのテーパー部分はガラス
基板１へ放熱しやすいので、前記２つのテーパー部分か
ら結晶化が進みやすくなる。This will be described in more detail with reference to FIG.
As shown in (a), for example, the first irradiation is performed with an excimer laser having a width of about 200 μm, and then the irradiation is performed to the right by about 10 μm to perform the second irradiation. In FIG. 2A, L
1 is the first irradiation width, L 2 is a second irradiation width, l 1 is the distance traveled. The width of the amorphous silicon film 13 is not more than twice the irradiation width L 1 or L 2 of one excimer laser, and the two tapered portions of the amorphous silicon film 13 can easily radiate heat to the glass substrate 1. Crystallization proceeds easily from the two tapered portions.
【００１８】これに対して非晶質珪素膜１３の幅が広い
と、図２（ｂ）に示すとおり、非晶質珪素膜１３のテー
パーではない平坦な部分１５で結晶化が進むため、この
部分の結晶化のバラツキが大きくなる。図２（ｂ）にお
いて、Ｌ1-4は最初から第４番目までのレーザーの照射
幅、ｌ1-3はそれぞれの移動距離である。On the other hand, if the width of the amorphous silicon film 13 is wide, as shown in FIG. 2B, crystallization proceeds in a flat portion 15 of the amorphous silicon film 13 which is not tapered. Variation in crystallization of the portion is increased. In FIG. 2B, L 1-4 is the irradiation width of the laser from the beginning to the fourth, and l 1-3 is the moving distance of each.
【００１９】以上のとおり、非晶質珪素膜のパターン幅
が、エキシマレーザー１回の照射幅の２倍以下であるこ
とが好ましい。As described above, it is preferable that the pattern width of the amorphous silicon film is not more than twice the irradiation width of one excimer laser.
【００２０】なお、発明の実施の形態において、非晶質
珪素膜の膜厚を５０ｎｍとしたが、４０ｎｍから１００
ｎｍの間であれば、同じ効果が得られる。In the embodiment of the present invention, the thickness of the amorphous silicon film is set to 50 nm.
The same effect can be obtained if it is between nm.
【００２１】また、非晶質珪素膜のテーパーエッチング
方法をいわゆるレジスト後退法のドライエッチングで行
ったが、これに限定されるものではなく、他の方法であ
っても５０度以下のテーパーを形成すれば、同様な効果
が得られる。The taper etching method of the amorphous silicon film is performed by dry etching of a so-called resist receding method. However, the present invention is not limited to this method. Then, a similar effect can be obtained.
【００２２】[0022]
【発明の効果】以上のように本発明は上記した構成によ
って、非晶質珪素膜がエキシマレーザーで、加熱・溶融
されたあと、まず、テーパー部分の膜厚が薄い部分から
冷却・結晶化が進むことにより、安定した結晶化を得る
ことができ、その半導体層で形成するトランジスタの特
性バラツキを小さくすることができ、この半導体層を用
いてトランジスタを形成することにより、歩留まりおよ
び信頼性の高いＴＦＴ型液晶表示装置を実現することが
できる。As described above, according to the present invention, after the amorphous silicon film is heated and melted by the excimer laser, cooling and crystallization are first performed from the thin portion of the tapered portion. By proceeding, stable crystallization can be obtained, and variation in characteristics of a transistor formed using the semiconductor layer can be reduced. By forming a transistor using the semiconductor layer, high yield and high reliability can be obtained. A TFT liquid crystal display device can be realized.
【図１】（ａ）〜（ｃ）本発明の一実施例における多結
晶半導体層の製造方法の説明図FIGS. 1A to 1C are explanatory views of a method for manufacturing a polycrystalline semiconductor layer according to an embodiment of the present invention.
【図２】（ａ）〜（ｂ）は本発明の一実施例におけるエ
キシマレーザーの照射幅と多結晶半導体層の幅の関係を
説明する図FIGS. 2A and 2B are diagrams illustrating the relationship between the irradiation width of an excimer laser and the width of a polycrystalline semiconductor layer in one embodiment of the present invention.
【図３】（ａ）〜（ｂ）は従来の多結晶半導体層の製造
方法の説明図FIGS. 3A and 3B are explanatory views of a conventional method for manufacturing a polycrystalline semiconductor layer.
１ ガラス基板 ２，１２ 二酸化珪素膜 ３，１３ 非晶質珪素膜 ３’，１３’ 多結晶珪素膜 ４，１４ フォトレジスト １５ 非晶質珪素膜の平坦な部分 DESCRIPTION OF SYMBOLS 1 Glass substrate 2,12 Silicon dioxide film 3,13 Amorphous silicon film 3 ', 13' Polycrystalline silicon film 4,14 Photoresist 15 Flat part of amorphous silicon film
───────────────────────────────────────────────────── フロントページの続き Ｆターム(参考） 5F052 AA02 BB07 CA07 DA02 DB03 FA04 FA22 JA01 5F110 BB02 BB04 CC01 DD02 DD13 GG02 GG13 GG22 GG25 GG45 PP03 PP05 PP06 PP35 QQ04 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F052 AA02 BB07 CA07 DA02 DB03 FA04 FA22 JA01 5F110 BB02 BB04 CC01 DD02 DD13 GG02 GG13 GG22 GG25 GG45 PP03 PP05 PP06 PP35 QQ04
Claims (4)
記非晶質珪素膜の断面形状がテーパー状になるようにエ
ッチングしてパターン形成し、エキシマレーザーを照射
して前記非晶質珪素膜を多結晶化することを特徴とする
多結晶半導体層の製造方法。An amorphous silicon film is formed on an electrical insulating film, and the amorphous silicon film is etched and patterned so that the cross-sectional shape of the amorphous silicon film is tapered. A method for manufacturing a polycrystalline semiconductor layer, comprising polycrystallizing a crystalline silicon film.
面形状のテーパー角度が５０度以下である請求項１に記
載の多結晶半導体層の製造方法。2. The method for manufacturing a polycrystalline semiconductor layer according to claim 1, wherein the taper angle of the cross-sectional shape when the amorphous silicon film is patterned is 50 degrees or less.
ｍの範囲である請求項１または２に記載の多結晶半導体
層の製造方法。3. The amorphous silicon film has a thickness of 40 nm to 100 n.
3. The method for manufacturing a polycrystalline semiconductor layer according to claim 1, wherein m is in a range of m.
ーザー１回の照射幅の２倍以下である請求項１〜３のい
ずれかに記載の多結晶半導体層の製造方法。4. The method of manufacturing a polycrystalline semiconductor layer according to claim 1, wherein the pattern width of the amorphous silicon film is not more than twice the irradiation width of one excimer laser.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001096557A JP2002299234A (en) | 2001-03-29 | 2001-03-29 | For manufacturing polycrystalline semiconductor layer method |
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| JP2001096557A JP2002299234A (en) | 2001-03-29 | 2001-03-29 | For manufacturing polycrystalline semiconductor layer method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7642605B2 (en) | 2004-02-10 | 2010-01-05 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06314698A (en) * | 1993-03-05 | 1994-11-08 | Semiconductor Energy Lab Co Ltd | Thin-film semiconductor device and its manufacture |
| JPH06342912A (en) * | 1993-05-31 | 1994-12-13 | Sanyo Electric Co Ltd | Thin-film semiconductor device and manufacture thereof |
| JPH0766415A (en) * | 1993-08-23 | 1995-03-10 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device and thin-film transistor |
| JPH07176752A (en) * | 1993-12-17 | 1995-07-14 | Semiconductor Energy Lab Co Ltd | Thin-film semiconductor device and its manufacture |
| JPH09199729A (en) * | 1996-01-12 | 1997-07-31 | Seiko Epson Corp | Crystallizing method for semiconductor film, active matrix substrate and liquid crystal display |
| JPH10107291A (en) * | 1996-09-30 | 1998-04-24 | Sharp Corp | Semiconductor device and its manufacture |
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- 2001-03-29 JP JP2001096557A patent/JP2002299234A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06314698A (en) * | 1993-03-05 | 1994-11-08 | Semiconductor Energy Lab Co Ltd | Thin-film semiconductor device and its manufacture |
| JPH06342912A (en) * | 1993-05-31 | 1994-12-13 | Sanyo Electric Co Ltd | Thin-film semiconductor device and manufacture thereof |
| JPH0766415A (en) * | 1993-08-23 | 1995-03-10 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device and thin-film transistor |
| JPH07176752A (en) * | 1993-12-17 | 1995-07-14 | Semiconductor Energy Lab Co Ltd | Thin-film semiconductor device and its manufacture |
| JPH09199729A (en) * | 1996-01-12 | 1997-07-31 | Seiko Epson Corp | Crystallizing method for semiconductor film, active matrix substrate and liquid crystal display |
| JPH10107291A (en) * | 1996-09-30 | 1998-04-24 | Sharp Corp | Semiconductor device and its manufacture |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7642605B2 (en) | 2004-02-10 | 2010-01-05 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
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