JP2002299202A - Method for fabricating semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate fine-lining of the resist pattern of a semiconductor device. SOLUTION: At first, a primary pattern 1 is formed on a substrate 2 using a chemically amplified resist. The primary pattern 1 is has a width thicker than that of a desired resist pattern. A reforming material 3 is applied onto a substrate such that the primary pattern 1 is covered and then baked. A reforming material 3 is diffused to the sidewall part of the primary pattern (part A) which is rendered soluble. Subsequently, it is rinsed and the soluble part of the primary pattern is removed together with the reforming material 3 thus fine-lining the resist pattern.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device in the manufacture of a semiconductor device, and more particularly to a method of manufacturing a semiconductor device by lithography.

[0002]

2. Description of the Related Art As the size and complexity of semiconductor devices increase, photolithography technology requires transfer of finer patterns and transfer technology of a larger area.

Therefore, conventionally, a fine pattern has been formed by shortening the wavelength of the exposure light source and increasing the resolution.
There is also a method of shrinking a hole-based pattern to form fine pores. In this method, a resist pattern having an opening larger than a desired hole diameter is formed, a shrink material containing a crosslinking agent is applied thereon, and the inner wall surface of the hole is crosslinked to reduce the hole diameter to a desired size. Further, there is a method of thinning the line resist pattern by plasma ashing.

[0004]

However, the above-mentioned method requires a change and development of an exposure apparatus, and the method using a shrink material makes the line pattern thick and difficult to form a fine line pattern. The ashing method induces plasma damage to the substrate.

The present invention has been made in view of the above points, and does not require a change or development of an exposure apparatus, does not make it difficult to form a fine line pattern, and forms a fine line pattern which does not affect the substrate. It is an object of the present invention to provide a method for manufacturing a semiconductor device.

[0006]

According to the present invention, in a method of manufacturing a semiconductor device for manufacturing a semiconductor device, a resist pattern is formed using a chemically amplified resist, and the resist pattern is made soluble in the resist pattern. Applying a modifying material, making the sidewalls of the resist pattern dissolvable by baking with the modifying material, and dissolving the modifying material and the sidewalls of the resist pattern by baking with the modifying material And a method of manufacturing a semiconductor device.

According to the above configuration, the resist pattern is coated with a modifier to make the side wall surface of the resist pattern dissolvable, and the dissolvable portion is removed to thin the resist pattern.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a flow of a method for manufacturing a semiconductor device of the present invention. FIG. 1A shows a state after forming a primary pattern, FIG. 1B shows a state after application of a modifier, FIG. 1C shows a state after baking, and FIG.

FIG. 1 shows a primary pattern 1, a substrate 2,
The modifier 3 is shown. Primary pattern 1 is a resist pattern. The substrate 2 has a line pattern of a semiconductor device,
It is a layer to be processed that forms an element.

The modifying material 3 is a substance for modifying a primary pattern which is a resist pattern. Hereinafter, the flow of the resist pattern thinning method will be described. First, as shown in FIG. 1A, a primary pattern 1 is formed on a substrate 2 using a chemically amplified resist. At this time, the primary pattern 1 is
It is formed with a width wider than the width of a desired resist pattern.

Next, the modifying material 3 is applied on the substrate 2. At this time, as shown in FIG. 1B, the modifying material 3 is applied to such an extent that the primary pattern 1 is covered. Next, baking is performed. At this time, as shown in FIG.
It diffuses into the side wall portion of the next pattern 1 (portion A), and the diffused portion can be dissolved.

Next, rinsing is performed. The soluble portion (A portion) of the primary pattern 1 and the modifying material 3 are removed. As described above, the thickly formed primary pattern 1 has a soluble portion (A portion) formed by the modifying material 3, and this portion is removed to obtain a desired resist pattern line width. At this time, since the denatured layer is formed on the top of the primary pattern 1 by the formation process using the chemically amplified resist, the height direction of the primary pattern 1 is not soluble (B direction) and cannot be removed. For this reason, the primary pattern 1 can be reduced only in the width direction (C direction) without decreasing in the height direction (B direction).

Next, an embodiment of the present invention will be described. First, a resist pattern thicker than a desired resist pattern is formed on a substrate.

FIG. 2 is a diagram showing a resist pattern formed on a wafer substrate. The resist pattern 4 is 1
It comprises a next pattern 4a and a wafer substrate 4b.

The primary pattern 4a is a resist pattern formed using a chemically amplified positive resist.
The line width is formed larger than a desired line width. For example, finally 500 nm in height (D direction) and 100 nm in width (E direction)
When forming a resist pattern of 500 nm in height,
A resist pattern having a width of 150 nm is formed.

The wafer substrate 4b is a layer to be processed on which line patterns, elements, etc. of a semiconductor device are formed. As an example of this embodiment, a chemically amplified positive resist is applied to a thickness of 500 nm on the wafer substrate 4b. Using a reduction projection exposure apparatus, 150
After exposing and transferring a line pattern having a width of nm,
Next pattern 4a is formed.

Next, a modifier is applied. FIG. 3 shows a diagram in which a modifying material is applied to a resist pattern formed on a wafer substrate.

The modifier 4c is a mixture of a water-soluble polymer such as polyvinyl alcohol and an acidic substance such as carboxylic acid or sulfonic acid. Alternatively, it is made of polyvinylphenylsulfonic acid in which an acidic group is bonded to the water-soluble polymer itself.

As an example of this embodiment, an aqueous solution of polyvinyl alcohol to which carboxylic acid has been added is applied as a modifier 4c. At this time, application is performed so that the primary pattern 4a is covered.

Next, baking is performed to diffuse the modifying material into the resist pattern. FIG. 4 shows a view when the resist pattern to which the modifier has been applied is baked. Baking is performed at 100 ° C. for 60 seconds using a hot plate oven to diffuse the acid of the modifier 4c into the primary pattern. This acid decomposes the reactive group of the primary pattern to make it soluble. The baking temperature and time are determined in consideration of the acid diffusion distance. The acid diffusion enters from the side wall of the primary pattern, but the top of the primary pattern is the first primary pattern 4
Since the deteriorated layer is formed during the development of the formation a, no acid diffusion from the top occurs. Therefore, a soluble portion (F portion) is formed on the side wall portion of the primary pattern 4a.

Next, the modifying material and the portion where the resist pattern can be dissolved by the modifying material are removed. FIG. 5 is a diagram showing the shape of the resist pattern after rinsing.

An alkaline aqueous solution is used as a rinsing material for removing the soluble portion of the modifying material 4c and the primary pattern 1.
As the alkaline aqueous solution, a commercially available organic alkaline aqueous solution can be used. At this time, the rinsing with the organic alkali aqueous solution dissolves the primary pattern 4a in the side wall direction (D direction), but does not dissolve the top portion (E direction). Therefore, the soluble portion of the modifying material 4c and the side wall of the primary pattern 1 is removed. Depending on the temperature and time of baking, the size of the primary pattern 4a after rinsing is 500 n
It is possible to thin a line pattern having a film thickness of m and a width of 100 nm.

As described above, it is possible to form a resist pattern thinner than the current limit using the existing exposure apparatus, illumination system, mask technology, and commercially available chemically amplified positive resist.

Further, since the shrink material of the hole pattern generally uses a crosslinking reaction, the line pattern cannot be thinned. In the above method, the side wall portion of the primary pattern is decomposed and solubilized, so that the resist pattern can be thinned.

Further, the thinning of the resist pattern using plasma ashing has a problem of plasma damage, but the present invention only requires the use of the coating unit, the baking unit and the developing unit of the coating and developing apparatus, so that no damage occurs. .

In the above description, a method of manufacturing a semiconductor device in which a chemically amplified positive resist pattern is formed on a wafer substrate and thinned is described. However, the present invention can also be applied to thinning of a negative resist pattern.

[0027]

As described above, according to the present invention, the side wall surface of the resist pattern is made dissolvable by the modifier, and the portion is removed. Semiconductor devices can be manufactured without affecting the semiconductor device.

[Brief description of the drawings]

FIG. 1 is a diagram showing a flow of a method of manufacturing a semiconductor device according to the present invention, in which (a) forms a primary pattern, (b) applies a modifier, (c) bakes, d) shows the state after rinsing.

FIG. 2 is a view showing a resist pattern formed on a wafer substrate.

FIG. 3 shows a diagram in which a modifying material is applied to a resist pattern formed on a wafer substrate.

FIG. 4 shows a view when a resist pattern to which a modifier has been applied is baked.

FIG. 5 is a diagram showing a shape of a resist pattern after rinsing.

[Explanation of symbols]

1 ... Primary pattern, 2 ... Substrate, 3 ... Modifier, 4 ...
... Resist pattern, 4a ... Primary pattern, 4b ...
Wafer substrate, 4c …… Modifier

Continued on the front page F term (reference) 2H025 AA00 AB16 AC01 AD03 BE00 BG00 FA03 FA14 FA33 2H096 AA25 BA11 BA20 EA02 HA05 JA04 5F046 AA28

Claims (7)

[Claims] 1. A method of manufacturing a semiconductor device for manufacturing a semiconductor device, comprising: forming a resist pattern using a chemically amplified resist; applying a modifying material capable of dissolving the resist pattern to the resist pattern; Making the sidewalls of the resist pattern dissolvable by a material and baking; and removing the modifying material and a portion of the resist pattern that makes the sidewalls dissolvable by the baking. A method for manufacturing a semiconductor device, comprising: 2. The method according to claim 1, wherein the chemically amplified resist is a positive resist. 3. The method according to claim 1, wherein the modifying material is obtained by mixing an acidic substance with a water-soluble polymer. 4. The method according to claim 3, wherein one of carboxylic acid and sulfonic acid is used as the acidic substance.
The manufacturing method of the semiconductor device described in the above. 5. The method for manufacturing a semiconductor device according to claim 1, wherein said modifier uses polyvinyl phenyl sulfonic acid. 6. The method according to claim 1, wherein an alkali aqueous solution is used to remove the modifying material and a portion of the resist pattern that has made the sidewall of the resist pattern soluble by baking with the modifying material. A method for manufacturing a semiconductor device. 7. The method according to claim 1, wherein the modifying material and a portion of the resist pattern, the side wall of which is made soluble by baking, are removed using an organic alkali aqueous solution. Of manufacturing a semiconductor device.