JP2002289546A - Device and method for producing silicon carbide semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To sufficiently suppress roughness on the surface of an impurity layer to be formed on a silicon carbide wafer. SOLUTION: When executing activating treatment by using a lamp anneal device, an SiC wafer 1 composed of an n<+> type substrate 1a and an n<-> type epitaxial layer 1b to inject an impurity is arranged so that the side of the n<-> type epitaxial layer 1b can be turned toward the side of a wafer stage 5. Then, the lamp anneal device is provided with a movable gate 9 and the radiation of light from a lamp 3 is controlled. First of all, the lamp 3 is turned on after the movable gate 9 is turned into closed state. Then, the movable gate 9 is turned into opened state so that the SiC wafer 1 can be irradiated with light. Afterwards, the movable gate 9 is turned into closed state while turning on the lamp 3, the SiC wafer 1 is scanned by the wafer stage 5 and the next portion of the SiC wafer 1 is activated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a silicon carbide (hereinafter referred to as "silicon carbide").
The present invention relates to an apparatus for manufacturing a semiconductor made of SiC) and a method for manufacturing a silicon carbide semiconductor using the apparatus.

[0002]

2. Description of the Related Art Impurity layers are formed in SiC by ion implantation and heat treatment for activating the implanted ions. In SiC, since impurities, particularly p-type impurities, are not easily activated by heat treatment, an attempt is made to increase the activation rate by increasing the heat treatment temperature for activation.

[0003]

For example, in order to facilitate formation of an epitaxial film (hereinafter referred to as an epi film), a wafer having an off-angle is used, and after performing an activation heat treatment at 1600 ° C., the epitaxial film is formed. AF on the surface of the formed impurity layer
When observed with M, it was confirmed that step-like surface roughness (step bunching) had occurred. When the magnitude of the surface roughness was examined, the surface roughness Ra = 9.
It was 5 nm.

[0004] Such surface roughness is considered to occur due to migration occurring during activation heat treatment. That is, in the case of a wafer having an off-angle, there are fine steps on the surface, and therefore, activation heat treatment (particularly,
Activation heat treatment for p-type impurities requiring high temperature heat treatment)
In this case, Si escape occurs at the edge portion of the most energetically unstable step, migration occurs due to the Si escape, and the migrated atoms are recrystallized while forming a stable (0001) plane. As a result, surface roughness occurs.

[0005] It was also confirmed that a carbonized layer was formed on the surface of the epi layer. This is considered to be due to the Si-extraction from the surface of the epitaxial film caused by the high temperature of the activation heat treatment, resulting in carbon-rich formation.

In order to suppress the formation of a carbonized film due to such migration or Si loss, a method of lowering the heat treatment temperature or a method of shortening the heat treatment time so as not to give time for causing migration is considered.

However, since the heat treatment temperature required for activating the p-type impurities is higher than the migration occurrence temperature (the activation heat treatment temperature is 1500 ° C. or higher, the migration occurrence temperature is 1420 ° C.) A method of lowering the heat treatment temperature cannot be selected.

Therefore, from the viewpoint of simultaneously improving the activation rate of the p-type impurity and suppressing the surface roughness, a method of shortening the heat treatment time so as not to give time for causing migration is selected.

Various studies have been made on such a method. First, when a conventional heat treatment program was analyzed, the rate of temperature rise during heat treatment was as slow as 20 ° C./min.
The time during which the temperature is higher than the temperature at which migration occurs (1420 ° C.) is sufficiently long. Therefore, it is considered that this causes a large surface roughness as described above. For this reason, the activation heat treatment was performed by increasing the temperature raising rate to 150 ° C./min. In this case, the same result as described above was obtained.

Therefore, a lamp annealing apparatus (for example, a heating rate of 350 ° C./min.)
), The activation heat treatment was performed. In other words, by using the lamp annealing device, the time during which the heat treatment at a temperature higher than the temperature at which migration occurs is shortened. As a result, the surface roughness Ra could be reduced until Ra = 3.4 nm.

However, when performing an activation heat treatment using a lamp annealing apparatus, the impurity layer for activation must be directly irradiated with light, so that the impurity layer becomes shallow after activation. I found out. According to the observation by the cross-sectional TEM, the impurity layer which had been 0.5 μm before the lamp annealing was 0.3 μm after the lamp annealing, and the same result was obtained by SIMS analysis.

This is because the light from the lamp directly irradiates the impurity layer, so that the temperature of the irradiated portion becomes higher than the epitaxial film formation temperature (1600 ° C.).
This is probably because SiC sublimated from the surface. In addition, since the light from the lamp is directly irradiated as described above, the surface roughness of the impurity layer can be suppressed, but it cannot be sufficient.

In view of the above, it is an object of the present invention to provide a method for manufacturing a silicon carbide semiconductor which can sufficiently suppress the surface roughness of an impurity layer formed on a silicon carbide substrate.

[0014]

According to the first aspect of the present invention, there is provided a wafer stage (5) on which a silicon carbide substrate (1) is mounted, and a wafer stage (5) arranged on the wafer stage. A lamp (3) for irradiating light, a condensing means (8) for collecting light emitted from the lamp and locally irradiating the silicon carbide substrate with light, and a light source between the wafer stage, the lamp and the condensing means. And a movable gate (9) controlled to a closed state for blocking light from the lamp from irradiating the silicon carbide substrate and an open state for allowing light from the lamp to irradiate the silicon carbide substrate. And scanning the silicon carbide substrate to change the position of the silicon carbide substrate irradiated with the light collected by the light condensing means. For example, the silicon carbide substrate can be scanned by the wafer stage as described in claim 2.

As described above, by providing the movable gate, the impurities can be activated one after another without turning off the lamp 3. In this way, even when it takes a long time for the irradiation by the lamp to stabilize, the heat history at each part can be equalized, and S
The electrical characteristics of the iC substrate 1 can be stabilized.

According to a fifth aspect of the present invention, the silicon carbide substrate is mounted such that the front side of the silicon carbide substrate on which the epi layer is formed faces the wafer stage. By irradiating light from a lamp to the back side, which is the substrate side, it becomes possible to suppress the surface roughness of the impurity layer formed when the impurities are activated.

According to the third aspect of the present invention, the light converging means includes:
A reflector section (8) for condensing the light emitted by the lamp by reflecting the light, wherein the light emitted by the lamp is reflected only once by the reflector section and reaches the silicon carbide substrate. I have. As described above, by allowing light to reach the silicon carbide substrate by only one reflection,
The activation process can be performed efficiently.

According to a fourth aspect of the present invention, there is provided a cooling means (6) for cooling the wafer stage, and the cooling means cools the silicon carbide substrate disposed on the wafer stage. It is characterized by: In the silicon carbide substrate, the surface side (the side on which the epi layer is formed) is directed to the wafer stage side. Therefore, by cooling the wafer stage by the cooling means, the front side of the silicon carbide substrate can be cooled,
It is possible to prevent contamination on the surface side of the silicon carbide substrate.

According to the sixth aspect of the present invention, after the lamp is turned on with the movable gate closed, the movable gate is opened to activate impurities in a part of the silicon carbide substrate. After closing the movable gate with the lamp turned on, scanning the silicon carbide substrate,
Thereafter, a step of activating impurities in a part of the silicon carbide different from the part by opening the movable gate is characterized in that the step of opening the movable gate is in an open state.

As described above, the light from the lamp is blocked by the movable gate, so that the impurities can be activated one after another without turning off the lamp. If you do this,
Even in the case where it takes time until the irradiation by the lamp is stabilized, the heat history at each part can be equalized, and the electrical characteristics of the silicon carbide substrate can be stabilized.

Note that the reference numerals in parentheses of the above means indicate the correspondence with specific means described in the embodiments described later.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 is a schematic diagram of a lamp annealing apparatus as an SiC semiconductor manufacturing apparatus used in one embodiment of the present invention. Hereinafter, the configuration of the lamp annealing apparatus will be described with reference to FIG.

The lamp annealing apparatus shown in FIG. 1 is arranged such that the vertical direction on the paper coincides with the vertical direction. This lamp annealing apparatus is configured to include a case 2 forming a room in which a SiC substrate 1 is housed, and a housing 4 in which a lamp 3 is arranged.

The case section 2 is provided with a wafer stage 5 on which the SiC substrate 1 is mounted. The wafer stage 5 can scan the SiC substrate 1 in the XY directions on a horizontal plane. FIG. 2 shows a sectional view of the wafer stage 5. The wafer stage 5 is supplied with a cooling gas from a cooler 6 composed of, for example, a cryopump and a He gas from a gas supply source 7. A projection 5a is formed on the wafer stage 5, and when the SiC substrate 1 is mounted on the wafer stage 5, the contact area between the wafer stage 5 and the SiC substrate 1 is reduced, and
He gas or the like flows into a cavity provided between the SiC substrate 1 and the SiC substrate 1.

With these configurations, when lamp annealing the SiC substrate 1, the cooling gas supplied from the cooler 6 can cool the SiC substrate 1 via the wafer stage 5, and can be supplied from the gas supply source 7. Uniform cooling can be performed by the assist of He gas.

On the other hand, the housing part 4 is provided with a lamp 3. As the lamp 3, for example, a halogen lamp, a xenon lamp, or an infrared lamp is used.
The lamp 3 is fixed to the housing via a reflector 8 as a light collecting means. In such a configuration, as shown by a dotted arrow in the figure, the light of the lamp 3 is reflected by the inner wall surface (reflection surface) of the reflector section 8, and the reflected light is mounted on one point, that is, on the wafer stage 5. Light is condensed at the position of the SiC substrate 1.

Further, the housing section 4 is provided with a movable gate 9 for opening and closing the lamp 3 and the SiC substrate 1 arranged on the wafer stage 5. When the movable gate 9 is in the open state, the light emitted from the lamp 3 reaches the SiC substrate 1 arranged on the wafer stage 5, and when the movable gate 9 is in the closed state, the light emitted from the lamp 3 9, so that it does not reach the SiC substrate 1.

Next, an activation heat treatment method using the lamp annealing apparatus having the above configuration will be described with reference to FIG.

First, an SiC substrate 1 is prepared. Specifically, as the SiC substrate 1, one obtained by forming an n ⁻ -type epi film 1b on an n ⁺ -type substrate 1a and then ion-implanting an impurity, for example, a p-type impurity into the n ⁻ -type epi film 1b is prepared. I do. Then, this SiC substrate 1 is mounted on wafer stage 5. At this time, the n ⁻ -type epi film 1 of the SiC substrate 1
The surface on which the side b is formed is directed to the wafer stage 5 side. That is, the surface of the SiC substrate 1 on which the n ⁻ -type epi film 1b is not formed, that is, n ⁺
It is arranged so that the back surface which is the mold substrate 1a side is exposed.

Subsequently, the position on the wafer stage 5 where the light from the lamp 3 is gathered by scanning the wafer stage 5 is matched with the portion of the SiC substrate 1 to be heated. That is, on the back surface of the SiC substrate 1, the n ⁻ -type epi layer 1b is aligned so that light from the lamp 3 is applied to a portion corresponding to the location where the impurity is implanted. Then, after the movable gate 9 is closed and the lamp 3 is turned on, when the irradiation from the lamp 3 is stabilized, the movable gate 9 is opened. Thereby, the light emitted from the lamp 3 is reflected on the inner wall surface of the reflector and is bundled on the upper part of the wafer stage 5,
Irradiation is performed toward the back surface of the SiC substrate 1. For this reason,
The temperature on the back side of the SiC substrate 1 rises at a high temperature rising rate.

At this time, in the case of the lamp heating, the temperature of the portion irradiated with light has the highest temperature.
Because of its good heat conduction, heat is easily transmitted from the back side to the front side. For this reason, even if the surface side of the SiC substrate 1 into which the impurities are implanted is not directly irradiated with light, the surface side also becomes hot.

However, when a xenon lamp or the like is used as the lamp 3 at this time, a cooling gas or a He gas is supplied from the cooler 6 and the gas supply source 7 to appropriately control the surface temperature of the SiC substrate 1. I do. This is because temperature control is more difficult when using a xenon lamp or the like than when a halogen lamp or the like is used, and the temperature rises at a very high rate of temperature rise. By doing so, it is possible to effectively prevent contamination due to a high temperature on the surface side (n ⁻ -type epitaxial layer 1b side) of the SiC substrate 1.

As described above, the heat treatment is performed at a high temperature rising rate, and the impurities implanted in the n ⁻ -type epi film 1b are activated, thereby forming an impurity layer. At this time, since the activation heat treatment is performed by lamp annealing as in the present embodiment, the rate of temperature rise can be increased, and the activation heat treatment time can be shortened. Further, as described above, since the light from the lamp 3 is collected and irradiated to the SiC substrate 1, a portion where an impurity layer is to be formed can be locally heated.

Next, after closing the movable gate 9 while irradiating the lamp 3, the wafer stage 5 is scanned and S
The part of the iC substrate 1 to be heated next is made to coincide with the position where the light from the lamp 3 is collected. Thereafter, the movable gate 9 is opened. As a result, the SiC substrate 1 is heated, the impurities are activated, and an impurity layer is formed. Then, a step of closing the movable gate 9 while irradiating the lamp 3, a positioning step by scanning the wafer stage 5, and a step of irradiating the SiC substrate 1 with light by opening the movable gate 9 Is repeated to sequentially activate the impurities to form an impurity layer.

As described above, in this embodiment, the activation process is performed by lamp irradiation using the lamp annealing apparatus, and the lamp irradiation is performed not on the impurity layer formed on the n ⁻ -type epi layer 1b but on the n ^- type epitaxial layer 1b. ^This is performed on the ⁺ type substrate 1a side. By using the movable gate 9, the impurities are activated one after another without turning off the lamp 3, thereby forming an impurity layer. Therefore, the following effects can be obtained.

First, in this embodiment, the n ⁺ type substrate 1a is irradiated with a lamp. The growth temperature of the n ⁺ type substrate 1a is about 2300 ° C., which is sufficiently higher than the activation heat treatment temperature and about 1550 ° C. which is the growth temperature of the n ⁻ type epi layer 1b. For this reason, even if the n ⁺ -type substrate 1a is irradiated with the lamp, it is possible to prevent SiC from subliming much. Thereby, it becomes possible to suppress the surface roughness of the SiC substrate 1.

As a reference, FIG.
The result of examining the surface roughness of each of the n ⁺ -type substrate 1a and the n ⁻ -type epi layer 1b when the in heat treatment is performed is shown. As shown in this figure, before and after the heat treatment, the n ⁺ type substrate 1
In the case of a, the surface roughness has not changed much, but n ⁻
In the case of the type epi film 1b, the surface roughness is significantly increased. From this result, it is understood that irradiating light to the n ⁺ -type substrate 1a having a growth temperature higher than the heat treatment temperature is more effective than irradiating light to the n ⁻ -type epitaxial layer 1b having a growth temperature lower than the heat treatment temperature. It can be said that roughness can be prevented.

In this embodiment, the movable gate 9 is used to activate the impurities one after another without turning off the lamp 3. In this way, even when it takes a long time for the irradiation by the lamp 3 to stabilize, the heat history at each part can be equalized, and the electrical characteristics of the SiC substrate 1 can be reduced. Can be stabilized. Further, if the wafer stage 5 is scanned and aligned while the irradiation by the lamp 3 is performed, light is irradiated to a portion that does not need to be activated, and that portion is heated. Thus, the temperature of the SiC substrate 1 can be easily controlled.

Note that the movable gate 9 is also irradiated with light from the lamp 3. However, since the movable gate 9 is only irradiated with light at the defocus position, the movable gate 9 has a high melting point. It does not have to be made of a material.

(Second Embodiment) In the present embodiment, the first
As compared with the embodiment, the filament shape of the lamp 3 is quadrangular. FIG. 4A shows the filament shape of the lamp 3. If the shape of the lamp 3 and the shape of the lamp are rectangular, the wafer is directly irradiated with the filament shape. Therefore, as shown in FIG. 4B, the wafer stage 5 is moved in the X-Y direction (arrows in FIG. (See FIG. 2), the region irradiated with light from the lamp 3 (the hatched region in the figure) can be prevented from overlapping. Thereby, it is possible to uniformly irradiate light in the plane of the SiC substrate 1 and to stabilize the electric characteristics in the plane.

[Brief description of the drawings]

FIG. 1 is a diagram showing a cross-sectional configuration of a lamp annealing device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a cross-sectional configuration of a wafer stage 5 provided in the lamp annealing apparatus shown in FIG.

FIG. 3 is a table showing the relationship between the surface roughness and the heat treatment of the n ⁺ type substrate 1a and the n ⁻ type epi layer 1b.

FIG. 4A is a diagram showing a filament shape of a lamp 3 according to a second embodiment of the present invention, and FIG. 4B is an area irradiated with light from the lamp 3 when a wafer stage 5 is scanned. FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... SiC substrate, 1a ... n ⁺ type | mold substrate, 1b ... n ^- type epilayer, 2 ... case part, 3 ... lamp, 4 ... housing, 5 ...
Wafer stage, 6 ... cooler, 7 ... gas supply source, 8 ... reflector section.

Claims (6)

[Claims] 1. A wafer stage (5) on which a silicon carbide substrate (1) is mounted, a lamp (3) arranged on the wafer stage for irradiating light, and a light emitted from the lamp, A light condensing means (8) for locally irradiating light to the silicon carbide substrate; a light condensing means disposed between the wafer stage and the lamp and the light condensing means; A movable gate (9) that is controlled to be in a closed state for blocking irradiation of the silicon carbide substrate and to be in an open state for allowing light from the lamp to be irradiated on the silicon carbide substrate. A silicon carbide semiconductor manufacturing apparatus configured to change a position on the silicon carbide substrate to be irradiated with light collected by the light condensing means. 2. The silicon carbide semiconductor manufacturing apparatus according to claim 1, wherein the wafer stage is configured to scan the silicon carbide substrate. 3. The light condensing means is a reflector section (8) for condensing the light emitted by the lamp by reflecting the light, and the light emitted by the lamp is reflected by the reflector section at one point.
3. The silicon carbide semiconductor manufacturing apparatus according to claim 1, wherein the silicon carbide substrate is reflected only by a degree and reaches the silicon carbide substrate. 4. 4. A cooling means (6) for cooling the wafer stage, wherein the cooling means cools the silicon carbide substrate disposed on the wafer stage. The silicon carbide semiconductor manufacturing apparatus according to any one of claims 1 to 3. 5. A method of manufacturing a silicon carbide semiconductor using the silicon carbide semiconductor manufacturing apparatus according to claim 1, wherein an epi layer is formed on a substrate, and the epi layer has impurities. An ion-implanted substrate is prepared as the silicon carbide substrate, and is mounted on the wafer stage such that the surface of the silicon carbide substrate on which the epi layer is formed faces the wafer stage. And a step of irradiating light from the lamp to the rear surface side of the silicon carbide substrate that is the substrate side, and heating the silicon carbide substrate to an activation temperature of the impurity. Production method. 6. A step of activating the impurity in a part of the silicon carbide substrate by turning on the lamp after closing the movable gate to turn on the lamp and then opening the movable gate; After the movable gate is closed while the lamp is turned on, the silicon carbide substrate is scanned, and then the movable gate is opened, so that a part of the silicon carbide different from the part And activating the impurity in the method of manufacturing a silicon carbide semiconductor according to claim 5.