JP2002279417A - Image processing control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve cost benefit in structuring a system and control, with high flexibility, at the same time. SOLUTION: When this control device 2 performs image processing on an input image by a first DSP processing means 4, a second DSP processing means 5 and a third DSP processing means 6 according to an image processing request, processing allocation to the first, second and third DSP processing means 4, 5, 6 is performed by a register resource control section 7 in register resource unit for controlling the resources appropriate to the structure of corresponding system.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing control device for a system using a digital signal processor connected to an external system.

[0002]

2. Description of the Related Art For example, a digital signal processor (hereinafter, referred to as a digital signal processor) connected to an external system via a common communication bus.
It is called a DSP processor. ), The resource management of the system is described in, for example, Japanese Patent Application Laid-Open No. H10-505925.
As shown in the publication, three DSP processors selectively request access to a shared source to an external memory or the like via a common communication bus, and the control unit
The assignment of the bus to the processor is controlled so that the bus is assigned by default to the control unit rather than the DSP processor.

[0003]

However, in an actual system configuration, it is costly to form a shared communication bus, and it may be difficult to form a minimum necessary resource configuration.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an image processing control apparatus which can improve the disadvantages and achieve both the cost performance of the system configuration and the control with a high degree of freedom.

[0005]

An image processing control apparatus according to the present invention is an image processing apparatus for processing a digital image using a program device such as a digital signal processor (DSP). Control management is managed by register resources.

A second image processing control device according to the present invention is an image processing device for performing image processing of a digital image by a program device such as a digital signal processor (DSP), and controls and manages one or a plurality of program devices. It is characterized by being managed by memory resources.

A third image processing control apparatus according to the present invention is an image processing apparatus for performing image processing on a digital image by a program device such as a digital signal processor (DSP), and controls and manages one or a plurality of program devices. It is characterized in that it is managed using unique hardware resources.

[0008]

FIG. 1 is a block diagram showing the configuration of an image processing control device according to the present invention. As shown in the figure, the image processing control device has an image input unit 1, a control device 2, and an image output device 3. The control device 2 has a first DSP processing unit 4, a second DSP processing unit 5, a third DSP processing unit 6, and a register resource management unit 7, and the image bus has two inputs and one output.

The image input means 1 inputs a digital image, and the control device 2 optimally distributes the input image by the first DSP processing means 4, the second DSP processing means 5, and the third DSP processing means 6 according to the image processing request. Perform image processing. At that time, the register resource management unit 7 distributes the image processing to the first DSP processing unit 4, the second DSP processing unit 5, and the third DSP processing unit in units of register resources, so that resource management suitable for the configuration of the corresponding system is performed. Do. Therefore, the features of each register function of the first DSP processing unit 4, the second DSP processing unit 5, and the third DSP processing unit 6 are managed, and resource acquisition and parameter setting are sequentially performed so that image processing can be performed.

As shown in FIG. 2, the register resources managed by the register resource management unit 7 are of two types, a type 1 resource 8 and a type 2 resource 9. The type 1 resource has a buffer register of one input and one output, and the type 2 resource has a buffer register of two inputs and one output. Type 1 resource 8 includes registers with input buffers, registers with output buffers, and FIs as register types.
It has a register with FO and a temporary register, and the number of resources is “1” for the register with the input buffer, “1” for the register with the output buffer, “8” for the register with FIFO, and “3” for the temporary register. . The type 2 resource 9 also includes registers with input buffers, registers with output buffers, and FIs as register types.
It has a register with FO and a temporary register, and the number of resources is "2" for the register with the input buffer, "1" for the register with the output buffer, "7" for the register with FIFO, and "5" for the temporary register. . First
The DSP processing means 4 and the second DSP processing means 5 have type 1
The third DSP processing means 6 has a type 2 resource 9.

Then, the image input from the image input means 1 is subjected to another image processing by the first DSP processing means 4 and the second DSP processing means 5, and then synthesized by the third DSP processing means and output to the image output means 3. FIG. 3 shows a timing chart of this processing. As shown in FIG. 3, before executing the image processing, if the register resources of the type 1 resource 8 and the type 2 resource 9 can be obtained in the resource obtaining sequence, the image processing request is set to ready and the image input is permitted. I do. When the image input is permitted, an image processing sequence is entered, the image is input, and the input image is processed and output. Thereafter, a resource release sequence is entered, the type 1 resource 8 and the type 1 resource 9 are released, and the process is terminated.

Thus, the type 1 resource 8 and the type 1
By managing the register resources of resource 9,
Optimal image processing function assignment can be performed. For example, when seven FIFO registers of the type 2 resource 9 are used, allocation can be performed so as to use the FIFO register of the type 1 resource 8 in the preceding stage. This is particularly effective when necessary register resources are greatly affected by image processing requested from an external system.

Next, the configuration of a second image processing control device according to the present invention is shown in the block diagram of FIG. The second image processing control device includes an image input unit 1, a control device 2, and an image output device 3.
Having. The control device 2 includes a first DSP processing unit 4 and a second DSP
It includes an SP processing unit 5, a third DSP processing unit 6, and a memory resource management unit 10. First DSP processing means 4 and second DSP processing means
The DSP processing means 5 and the third DSP processing means 6 are connected in series, and the structure of the image bus has one input and one output. Then, the digital image input from the image input means 1 is subjected to image processing optimally allocated according to the image processing request. At this time, the image processing distribution to the first DSP processing means 4, the second DSP processing means 5, and the third DSP processing means 6 is performed by the memory resource management unit 10 in units of memory resources, and resource management suitable for the configuration of the corresponding system is performed. Therefore, the memory resource management unit 10
And the features of the memory areas of the second DSP processing means 5 and the third DSP processing means 6 are managed, and resource acquisition and parameter setting are sequentially performed to enable image processing.

As shown in FIG. 5, the memory resource managed by the memory resource management unit 10 is a type 1 resource 1
1 and type 2 resources 12. Type 1
The resource 11 has a small capacity, low cost memory area,
The type 2 resource 12 has a large capacity and high cost memory area. Type 1 resource 11 and type 1 resource 12
Has a main control program memory, a main control data memory, an image processing function program memory, and an image processing function data memory as memory types, respectively. As a resource area, the type 1 resource 11 has a main control program memory of 50 bytes, Main control data memory is 20 bytes, image processing function program memory is 200 bytes
And the image processing function data memory have 200 bytes. The type 2 resource 12 has a main control program memory of 100 bytes and a main control data memory of 50 bytes.
Bytes, the image processing function program memory has 1000 bytes, and the image processing function data memory has 1000 bytes. The first DSP processing means 4 and the third DSP processing means 6 have a type 1 resource 11 and execute image processing that can be performed with a small-capacity memory, and the second DSP processing means 5 has a type 2 resource.
It has resources 12 and selectively processes image processing that requires a large-capacity memory.

The operation of the control device 2 for inputting and processing an image from the image input means 1 will be described with reference to a time chart of FIG. As shown in FIG. 6, before executing the image processing, first, when the memory resources of the type 1 resource 11 and the type 2 resource 12 can be obtained in the resource obtaining sequence, the image processing request is ready and the image input is permitted. I do. When the image input is permitted, an image processing sequence is entered, the image is input, and the input image is processed and output. Thereafter, a resource release sequence is entered, the type 1 resource 11 and the type 2 resource 12 are released, and the process is terminated.

As described above, by managing the memory resources, an optimal image processing function can be allocated. For example, image processing that cannot be accommodated in the memory area of the type 1 resource can be arranged in the type 2 resource 12, and small and sufficient image processing can be allocated to the memory area of the type 1 resource 11. This is particularly effective when required memory resources are greatly affected by image processing requested from an external system.

Next, the configuration of a third image processing control device according to the present invention is shown in the block diagram of FIG. The third image processing control device includes an image input unit 1, a control device 2, and an image output device 3.
Having. The control device 2 includes a first DSP processing unit 4 and a second DSP
It includes an SP processing unit 5, a third DSP processing unit 6, and a unique hardware resource management unit 13. Then, the digital image input from the image input means 1 is subjected to image processing optimally allocated according to the image processing request. At that time, the first DSP
The image processing distribution to the processing unit 4, the second DSP processing unit 5, and the third DSP processing unit 6 is assigned to the specific hardware resource management unit 13.
, Resource management suitable for the configuration of the corresponding system is performed by performing the processing in units of unique hardware resources.

The unique hardware resources managed by the unique hardware resource management unit 13 are of two types, a type 1 resource 14 and a type 2 resource 15, as shown in FIG.
The type 1 resource 14 has a specific hardware of a normal image processing function, and has, as specific hardware types, a filter processing hardware, a scaling processing hardware, a dither processing hardware, and a mask processing hardware, and the type 2 resource 15 has a data printing function. It has unique hardware, and has stamp printing hardware, date printing hardware, page printing hardware, and logo hardware as memory types. For the type 1 resource 14, as the number of resources, the filter processing hardware is “2”, the scaling processing hardware is “2”,
"1" for dither processing hardware, "3" for mask processing hardware
The type 2 resource 15 has a stamp printing hardware of “5”, a date printing hardware of “1”,
The page printing hardware has “1” and the logo hardware has “2”.

The first DSP processing means 4 and the third DSP processing means 6 have a type 1 resource 14, the second DSP processing means 5 has a type 2 resource 15, and the unique hardware resource management unit 13 has a first DSP processing means. 4th and 3rd DSP
A normal image processing function is assigned to the processing means 6, and the second DS
The data printing is executed by the P processing means 5.

The operation of the controller 2 for inputting and processing an image from the image input means 1 will be described with reference to a time chart of FIG. As shown in FIG. 9, before executing the image processing, first, when the unique hardware resources of the type 1 resource 14 and the type 2 resource 15 can be acquired in the resource acquisition sequence, the image input is made ready with the image processing request as ready. To give permission. When the image input is permitted, an image processing sequence is entered, the image is input, and the input image is processed and output. Thereafter, a resource release sequence is entered, the type 1 resource 14 and the type 2 resource 15 are released, and the process is terminated.

By managing the unique hardware resources in this manner, an optimal image processing function can be assigned. For example, when normal image processing is requested from an external system, operation can be performed using only the type 1 resource 14, and allocation can be performed so as to use the type 2 resource 15 only when data printing is requested. This is particularly effective when the required unique hardware resources are greatly affected by the image processing requested from the external system.

[0022]

As described above, according to the present invention, when a digital image is processed by a program device such as a digital signal processor (DSP), the control management of the program device is managed by the register resource. Optimal image processing function assignment can be performed by dynamically selecting registers of the program device. In this configuration, the same amount of memory and the same amount of unique hardware are used, but a system can be constructed that uses registers in a variety of ways.

In addition, by managing the control of the program device using the memory resources, it is possible to dynamically select the memory of the program device and to perform optimal image processing function assignment. Further, in this configuration, the same amount of inherent hardware is used with the same amount of registers, but a system can be constructed that uses a variety of methods of using the memory.

Further, by managing the control of the program device using the unique hardware resources, it is possible to dynamically select the possessed hardware of the program device and to perform optimal image processing function assignment. Further, in this configuration, although the same amount of memory is used with the same amount of registers, it is possible to construct a system that uses a variety of methods in using the specific hardware.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an image processing control device according to the present invention.

FIG. 2 is a configuration diagram of a register resource.

FIG. 3 is a time chart showing processing of the image processing control device.

FIG. 4 is a block diagram illustrating a configuration of a second image processing control device.

FIG. 5 is a configuration diagram of a memory resource.

FIG. 6 is a time chart illustrating processing of a second image processing control device.

FIG. 7 is a block diagram illustrating a configuration of a third image processing control device.

FIG. 8 is a configuration diagram of a unique hardware resource.

FIG. 9 is a time chart illustrating processing of a third image processing control device.

[Explanation of symbols]

1; image input means, 2; control device, 3; image output device,
4; first DSP processing means, 5; second DSP processing means,
6: third DSP processing means, 7; register resource management unit, 10; memory resource management means, 13; unique hardware resource management means.

Claims (3)

[Claims] 1. An image processing apparatus for performing image processing on a digital image by a program device such as a digital signal processor (DSP), wherein control management of one or more program devices is managed by register resources. Image processing control device. 2. An image processing apparatus for performing image processing on a digital image by a program device such as a digital signal processor (DSP), wherein control of one or more program devices is managed by a memory resource. Image processing control device. 3. An image processing apparatus for processing a digital image by a program device such as a digital signal processor (DSP), wherein control management of one or a plurality of program devices is managed by a unique hardware resource. Image processing control device.