JP2002271109A - Laminated duplexer element - Google Patents

Laminated duplexer element

Info

Publication number
JP2002271109A
JP2002271109A JP2001065490A JP2001065490A JP2002271109A JP 2002271109 A JP2002271109 A JP 2002271109A JP 2001065490 A JP2001065490 A JP 2001065490A JP 2001065490 A JP2001065490 A JP 2001065490A JP 2002271109 A JP2002271109 A JP 2002271109A
Authority
JP
Japan
Prior art keywords
filter circuit
resonance line
conductor
ground
laminated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001065490A
Other languages
Japanese (ja)
Inventor
Makoto Inoue
真 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP2001065490A priority Critical patent/JP2002271109A/en
Publication of JP2002271109A publication Critical patent/JP2002271109A/en
Withdrawn legal-status Critical Current

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  • Control Of Motors That Do Not Use Commutators (AREA)
  • Filters And Equalizers (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a laminated duplexer element in which the best frequency characteristics can be set for each filter circuit. SOLUTION: This laminated duplexer element is provided with a filter circuit for reception and a filter circuit for transmission. The filter circuit for reception has grounding conductors 171 and 179 provided to hold a plurality of conductor pieces 172, 176, 177, and 178 containing resonance lines 173, 174, and 175 between them through dielectric layers 152-157 and pass signals in a first frequency band. The filter circuit for transmission has grounding conductors 179 and 186 provided to hold a plurality of conductor pieces 180 and 185 containing resonance lines 181, 182, and 183 between them through dielectric layers 158-165 and pass signals in a second frequency band, which is different from the first frequency band. One or more of the conductor pieces and grounding conductors of the filter circuit for reception are provided on layers, which are different from those on which the conductor pieces and grounding conductors of the filter circuit for transmission are provided.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、自動車電話や携帯
型電話機等に用いられる積層デュプレクサ素子に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated duplexer used for a mobile telephone, a portable telephone and the like.

【0002】[0002]

【従来の技術】従来、携帯型電話機では、1つのアンテ
ナを用いて異なる2つの周波数帯域の周波数のそれぞれ
を送信用及び受信用として通信を行うためにデュプレク
サを使用することがある。
2. Description of the Related Art Conventionally, a portable telephone sometimes uses a duplexer for performing communication for transmitting and receiving frequencies of two different frequency bands using one antenna.

【0003】この種のデュプレクサは、互いに異なる周
波数帯域の信号を通過させる2つのフィルタ回路を備
え、一方のフィルタ回路が受信用の周波数帯域の信号を
通過させるように設定に設定され、他方のフィルタ回路
が送信用の周波数帯域の信号を通過させるように設定さ
れている。また、フィルタ回路には、例えば特開平5−
267909号公報に開示されるような同軸型の誘電体
共振器が用いられていた。
A duplexer of this type includes two filter circuits for passing signals of different frequency bands, and one of the filter circuits is set so as to pass a signal of a frequency band for reception, and the other filter circuit is set for the other filter circuit. The circuit is set to pass a signal in a frequency band for transmission. In addition, for example, Japanese Patent Application Laid-Open No.
A coaxial dielectric resonator as disclosed in Japanese Patent No. 267909 has been used.

【0004】しかし、近年の電子機器の小型化に伴い携
帯型電話機も小型化と軽量化が望まれ、電子回路を構成
する電子部品も小型化の必要性が生じて、前述したよう
な同軸型誘電体共振器を用いたデュプレクサでは、小型
化を図るには限界があった。
[0004] However, with the recent miniaturization of electronic equipment, it has been desired to reduce the size and weight of portable telephones, and the necessity of miniaturization of electronic components constituting electronic circuits has arisen. In a duplexer using a dielectric resonator, there is a limit to downsizing.

【0005】デュプレクサのさらなる小型化を図るため
に、ストリップライン等の導体片によってフィルタ回路
を構成した積層型のデュプレクサが提案された(特開平
6−85506号公報、特開平11−122007号公
報)。
In order to further reduce the size of the duplexer, a multilayer duplexer in which a filter circuit is constituted by conductor pieces such as strip lines has been proposed (JP-A-6-85506 and JP-A-11-122007). .

【0006】[0006]

【発明が解決しようとする課題】しかしながら、前述し
た従来例の積層型のデュプレクサでは、2つのフィルタ
回路間の電気的影響や外界からの電気的影響を受けやす
く、双方のフィルタ回路において良好な特性を得ること
が困難であった。また、一方のフィルタ回路の特性が良
好な状態になるように各絶縁体層の材質や厚さ及び共振
線路と接地導体との距離を設定すると、他方のフィルタ
回路の特性として最良の特性が得られないことがあっ
た。
However, the above-described conventional duplexer is susceptible to the electric influence between the two filter circuits and the electric influence from the outside world, and has good characteristics in both filter circuits. Was difficult to obtain. If the material and thickness of each insulating layer and the distance between the resonance line and the ground conductor are set so that the characteristics of one filter circuit are in a good state, the best characteristics can be obtained as the characteristics of the other filter circuit. Was not able to be done.

【0007】本発明の目的は上記の問題点に鑑み、各フ
ィルタ回路において最良の周波数特性を設定することが
できる積層デュプレクサ素子を提供することである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a multilayer duplexer element that can set the best frequency characteristics in each filter circuit in view of the above problems.

【0008】[0008]

【課題を解決するための手段】本発明は上記の目的を達
成するために請求項1では、共振線路を含む複数の導体
片を有し第1周波数帯域内の信号を通過させる第1フィ
ルタ回路と、共振線路を含む複数の導体片を有し前記第
1周波数帯域とは異なる第2周波数帯域内の信号を通過
させる第2フィルタ回路とを含む積層素体と、前記積層
素体の外面に形成され前記第1フィルタ回路の一方の入
出力端に接続された第1入出力端子と、前記積層素体の
外面に形成され前記第2フィルタ回路の一方の入出力端
に接続された第2入出力端子と、前記積層素体の外面に
形成され前記第1フィルタ回路の他方の入出力端と前記
第2フィルタ回路の他方の入出力端とに接続された共通
入出力端子と、前記積層素体の外面に形成された接地端
子とを備えてなる積層デュプレクサ素子において、前記
第1フィルタ回路の共振線路を含む導体片と前記第2フ
ィルタ回路の共振線路を含む導体片を各フィルタ毎に個
別に絶縁体層を介して挟むように配置された複数の接地
導体とを設けると共に、前記第1フィルタ回路の導体片
及び接地導体のうちの1つ以上が、前記第2フィルタ回
路の導体片及び接地導体が設けられている層とは異なる
層に設けられている積層デュプレクサ素子を提案する。
In order to achieve the above object, according to the present invention, there is provided a first filter circuit having a plurality of conductor pieces including a resonance line and passing a signal in a first frequency band. And a second filter circuit having a plurality of conductor pieces including a resonance line and passing a signal in a second frequency band different from the first frequency band, and an outer surface of the multilayer element A first input / output terminal formed and connected to one input / output terminal of the first filter circuit; and a second input / output terminal formed on the outer surface of the multilayer body and connected to one input / output terminal of the second filter circuit. An input / output terminal, a common input / output terminal formed on an outer surface of the stacked element body and connected to the other input / output terminal of the first filter circuit and the other input / output terminal of the second filter circuit; And a ground terminal formed on the outer surface of the body In the layer duplexer element, a plurality of conductor pieces each including a conductor piece including a resonance line of the first filter circuit and a conductor piece including a resonance line of the second filter circuit are sandwiched for each filter via an insulator layer. And one or more of the conductor pieces and the ground conductor of the first filter circuit are provided on a layer different from the layer on which the conductor pieces and the ground conductor of the second filter circuit are provided. The proposed laminated duplexer element is proposed.

【0009】該積層デュプレクサ素子によれば、前記第
1フィルタ回路の共振線路を含む導体片が絶縁体層を介
して接地導体によって挟まれるため、該接地導体によっ
て前記第1フィルタ回路は外界及び前記第2フィルタ回
路から遮蔽される。さらに、前記第2フィルタ回路の共
振線路を含む導体片が絶縁体層を介して接地導体によっ
て挟まれるため、該接地導体によって前記第2フィルタ
回路は外界及び前記第1フィルタ回路から遮蔽される。
また、前記第1フィルタ回路の導体片及び接地導体のう
ちの1つ以上が、前記第2フィルタ回路の導体片及び接
地導体が設けられている層とは異なる層に設けることに
より、各フィルタ毎に最良の特性を得られるように、各
絶縁体層の厚さや共振線路と接地導体との距離を設定す
ることができる。
According to the laminated duplexer element, since the conductor piece including the resonance line of the first filter circuit is sandwiched by the ground conductor via the insulator layer, the first filter circuit is connected to the outside by the ground conductor. Shielded from the second filter circuit. Further, since the conductor piece including the resonance line of the second filter circuit is sandwiched by the ground conductor via the insulator layer, the ground filter shields the second filter circuit from the outside and the first filter circuit.
Further, by providing at least one of the conductor piece and the ground conductor of the first filter circuit on a layer different from the layer provided with the conductor piece and the ground conductor of the second filter circuit, In order to obtain the best characteristics, the thickness of each insulator layer and the distance between the resonance line and the ground conductor can be set.

【0010】また、請求項2では、請求項1に記載の積
層デュプレクサ素子において、前記第1フィルタ回路の
共振線路を挟む2つの接地導体間の距離が、前記第2フ
ィルタ回路の共振線路を挟む2つの接地導体間の距離と
異なる値に設定されている積層デュプレクサ素子を提案
する。
According to a second aspect of the present invention, in the multilayer duplexer according to the first aspect, a distance between two ground conductors sandwiching the resonance line of the first filter circuit sandwiches the resonance line of the second filter circuit. A laminated duplexer element having a value different from the distance between two ground conductors is proposed.

【0011】該積層デュプレクサ素子によれば、前記第
1フィルタ回路と第2フィルタ回路のそれぞれにおい
て、共振線路を挟む2つの接地導体間の距離が異なる値
に設定され、各フィルタ回路の通過周波数帯域のインピ
ーダンス特性が設定される。
According to the laminated duplexer element, in each of the first filter circuit and the second filter circuit, a distance between two ground conductors sandwiching the resonance line is set to a different value, and a pass frequency band of each filter circuit is set. Is set.

【0012】また、請求項3では、請求項1または請求
項2に記載の積層デュプレクサ素子において、前記第1
フィルタ回路の共振線路と前記第2入出力端子との間或
いは前記第2フィルタ回路の共振線路と前記第1入出力
端子との間の少なくとも何れか一方において、1つ以上
の層に、前記入出力端子を囲むように前記接地端子に接
続された接地導体を設けた積層デュプレクサ素子。
According to a third aspect of the present invention, in the laminated duplexer element according to the first or second aspect, the first
At least one of between the resonance line of the filter circuit and the second input / output terminal or at least between the resonance line of the second filter circuit and the first input / output terminal, the one or more layers have the input line. A laminated duplexer element including a ground conductor connected to the ground terminal so as to surround the output terminal.

【0013】該積層デュプレクサ素子によれば、前記第
1フィルタ回路の共振線路と前記第2入出力端子との間
に前記第2入出力端子を囲むように前記接地端子に接続
された接地導体が設けられると、前記第1フィルタ回路
の共振線路と前記第2入出力端子との間の電気的な結合
が抑制される。また、前記第2フィルタ回路の共振線路
と前記第1入出力端子との間に前記第1入出力端子を囲
むように前記接地端子に接続された接地導体が設けられ
ると、前記第2フィルタ回路の共振線路と前記第1入出
力端子との間の電気的な結合が抑制される。これによ
り、各フィルタ回路の特性を個別に設定できると共に安
定させることができる。
According to the laminated duplexer element, the ground conductor connected to the ground terminal so as to surround the second input / output terminal is provided between the resonance line of the first filter circuit and the second input / output terminal. When provided, electrical coupling between the resonance line of the first filter circuit and the second input / output terminal is suppressed. Further, when a ground conductor connected to the ground terminal is provided between the resonance line of the second filter circuit and the first input / output terminal so as to surround the first input / output terminal, the second filter circuit Electrical coupling between the first resonance line and the first input / output terminal is suppressed. Thereby, the characteristics of each filter circuit can be set individually and can be stabilized.

【0014】また、請求項4では、請求項1乃至請求項
3の何れかに記載の積層デュプレクサ素子において、前
記第1フィルタ回路が形成された部分と、前記第2フィ
ルタ回路が形成された部分とを積層方向に重ねて配置し
てなる積層デュプレクサ素子を提案する。
According to a fourth aspect of the present invention, in the multilayer duplexer device according to any one of the first to third aspects, a portion where the first filter circuit is formed and a portion where the second filter circuit is formed. And a stacked duplexer element in which are stacked in the stacking direction.

【0015】該積層デュプレクサ素子によれば、前記第
1フィルタ回路の部分と第2フィルタ回路の部分が積層
方向に重ねて配置されるので、実装面積が削減されて高
密度実装が可能になる。
According to the laminated duplexer element, the first filter circuit portion and the second filter circuit portion are arranged so as to overlap in the laminating direction, so that the mounting area is reduced and high-density mounting is enabled.

【0016】また、請求項5では、請求項1乃至請求項
3の何れかに記載の積層デュプレクサ素子において、前
記積層素体は、前記第1フィルタ回路が形成される部分
と、前記第2フィルタ回路が形成される部分を層が延び
る方向に並べて配置してなる積層デュプレクサ素子を提
案する。
According to a fifth aspect of the present invention, in the multilayer duplexer according to any one of the first to third aspects, the multilayer element comprises a portion where the first filter circuit is formed, and a second filter. The present invention proposes a multilayer duplexer in which portions where circuits are formed are arranged in the direction in which the layers extend.

【0017】該積層デュプレクサ素子によれば、前記第
1フィルタ回路の部分と第2フィルタ回路の部分が層が
延びる方向に並べて配置されるので、積層デュプレクサ
素子の高さを低く設定することができ、薄型の電子機器
に適用可能になる。
According to the laminated duplexer element, since the first filter circuit portion and the second filter circuit portion are arranged side by side in the direction in which the layers extend, the height of the laminated duplexer device can be set low. It can be applied to thin electronic devices.

【0018】また、請求項6では、請求項1乃至請求項
3の何れかに記載の積層デュプレクサ素子において、前
記積層素体は、前記第1フィルタ回路が形成される部分
の一部分が、前記第2フィルタ回路が形成される部分の
一部分に積層されてなる積層デュプレクサ素子を提案す
る。
According to a sixth aspect of the present invention, in the multilayer duplexer according to any one of the first to third aspects, the laminated element body includes a part in which the first filter circuit is formed, and A laminated duplexer element that is laminated on a part of a part where two filter circuits are formed is proposed.

【0019】該積層デュプレクサ素子によれば、前記第
1フィルタ回路が形成される部分の一部分が前記第2フ
ィルタ回路が形成される部分の一部分のみに重なるよう
に積層されるので、各フィルタ回路間の電気的干渉を抑
制し且つ実装面積を削減できる。
According to the laminated duplexer element, a part of the portion where the first filter circuit is formed is laminated so as to overlap only a part of the portion where the second filter circuit is formed. Can be suppressed and the mounting area can be reduced.

【0020】また、請求項7では、請求項4に記載の積
層デュプレクサ素子において、前記共振線路は一端が前
記接地端子に接続され他端が開放された帯状導体片から
なり、前記第1フィルタ回路の共振線路が、前記第2フ
ィルタ回路の共振線路に対して絶縁体層を介して直角に
交差するように配置されている積層デュプレクサ素子を
提案する。
According to a seventh aspect of the present invention, in the multilayer duplexer element according to the fourth aspect, the resonance line comprises a strip-shaped conductor piece having one end connected to the ground terminal and the other end open. A laminated duplexer element is proposed in which the resonance line is arranged so as to intersect at right angles with the resonance line of the second filter circuit via an insulating layer.

【0021】該積層デュプレクサ素子によれば、前記第
1フィルタ回路の共振線路と前記第2フィルタ回路の共
振線路が絶縁体層を介して互いに直角に交差するように
配置されるので、各フィルタ回路の入出力端子を積層素
体の異なる外面に容易に配置することができる。
According to the laminated duplexer element, the resonance lines of the first filter circuit and the resonance lines of the second filter circuit are arranged so as to intersect at right angles with each other via the insulating layer. Can be easily arranged on different outer surfaces of the laminated body.

【0022】また、請求項8では、請求項4に記載の積
層デュプレクサ素子において、前記共振線路は一端が前
記接地端子に接続され他端が開放された帯状導体片から
なると共に、前記第1フィルタ回路の共振線路の一端が
前記第2フィルタ回路の共振線路の他端側に位置し且つ
前記第1フィルタ回路の共振線路の他端が前記第2フィ
ルタ回路の共振線路の一端側に位置するように各共振線
路が配置され、前記導体片を絶縁体層を介して挟むよう
に設けられた接地導体として、前記第1フィルタ回路の
共振線路と前記第2フィルタ回路の共振線路との間に配
置され、互いに異なる層に設けられた第1及び第2の接
地導体を備え、前記第1接地導体は前記第1フィルタ回
路の共振線路の開放端部側の1/2の領域に設けられて
いると共に前記第2接地導体は前記第2フィルタ回路の
共振線路の開放端部側の1/2の領域に設けられてお
り、前記第1フィルタ回路の共振線路と前記第1接地導
体との間の距離が、前記第2フィルタ回路の共振線路と
前記第1接地導体との間の距離よりも小さく設定されて
いると共に、前記第2フィルタ回路の共振線路と前記第
2接地導体との間の距離が、前記第1フィルタ回路の共
振線路と前記第2接地導体との間の距離よりも小さく設
定されている積層デュプレクサ素子を提案する。
According to an eighth aspect of the present invention, in the multilayer duplexer element according to the fourth aspect, the resonance line is formed of a strip-shaped conductor piece having one end connected to the ground terminal and the other end opened, and the first filter. One end of the resonance line of the circuit is located at the other end of the resonance line of the second filter circuit, and the other end of the resonance line of the first filter circuit is located at one end of the resonance line of the second filter circuit. Are disposed between the resonance line of the first filter circuit and the resonance line of the second filter circuit as ground conductors provided so as to sandwich the conductor piece with an insulator layer interposed therebetween. And first and second ground conductors provided on different layers from each other, wherein the first ground conductor is provided in a half area on the open end side of the resonance line of the first filter circuit. With the said The ground conductor is provided in a half area on the open end side of the resonance line of the second filter circuit, and the distance between the resonance line of the first filter circuit and the first ground conductor is equal to the distance. The distance between the resonance line of the second filter circuit and the first ground conductor is set smaller than the distance between the resonance line of the second filter circuit and the second ground conductor. The present invention proposes a multilayer duplexer that is set to be smaller than the distance between the resonance line of one filter circuit and the second ground conductor.

【0023】該積層デュプレクサ素子によれば、前記第
1接地導体と前記第1フィルタ回路の共振線路の開放端
部との間にキャパシタンスが発生し、同一共振周波数に
おいて前記キャパシタンスが無いときに比べて前記第1
フィルタ回路の共振線路の長さを短くすることができる
と共に第1フィルタ回路のQを高めることができる。同
様に、前記第2接地導体と前記第2フィルタ回路の共振
線路の開放端部との間にキャパシタンスが発生し、同一
共振周波数において前記キャパシタンスが無いときに比
べて前記第2フィルタ回路の共振線路の長さを短くする
ことができると共に第2フィルタ回路のQを高めること
ができる。さらに、絶縁体層の積層数を削減できるの
で、積層素体の外形を小型に形成することができる。
According to the laminated duplexer element, a capacitance is generated between the first ground conductor and the open end of the resonance line of the first filter circuit, and compared with the case where there is no capacitance at the same resonance frequency. The first
The length of the resonance line of the filter circuit can be shortened, and the Q of the first filter circuit can be increased. Similarly, a capacitance is generated between the second ground conductor and the open end of the resonance line of the second filter circuit, and the resonance line of the second filter circuit is compared with the case where there is no capacitance at the same resonance frequency. Can be shortened, and the Q of the second filter circuit can be increased. Further, since the number of stacked insulating layers can be reduced, the outer shape of the stacked element body can be reduced in size.

【0024】[0024]

【発明の実施の形態】以下、図面に基づいて本発明の一
実施形態を説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0025】図1は本発明の第1実施形態における積層
デュプレクサ素子を示す外観斜視図、図2はその等価回
路、図3はその分解斜視図、図4は図3におけるA−A
線斜視方向の断面図である。本実施形態においては、そ
れぞれ異なる周波数を用いた送信回路と受信回路の双方
が1つのアンテナを使用するときに用いる積層デュプレ
クサ素子の一例を説明する。
FIG. 1 is an external perspective view showing a laminated duplexer element according to a first embodiment of the present invention, FIG. 2 is an equivalent circuit thereof, FIG. 3 is an exploded perspective view thereof, and FIG.
It is sectional drawing of a line perspective direction. In the present embodiment, an example of a laminated duplexer element used when both a transmitting circuit and a receiving circuit using different frequencies use one antenna will be described.

【0026】図において、100は積層デュプレクサ素子
で、内部層に共振線路が形成された直方体形状の積層素
体110からなり、該積層素体110の外表面には底面111か
ら上面112に延ばして外部端子121〜128が形成されてい
る。外部端子121はアンテナに接続される端子である。
外部端子122は受信回路に接続される端子、外部端子123
は送信回路に接続される端子である。また、その他の外
部端子124〜128は接地端子である。
In the figure, reference numeral 100 denotes a laminated duplexer element, which comprises a rectangular parallelepiped laminated body 110 having a resonance line formed in an inner layer, and the outer surface of the laminated body 110 is extended from a bottom surface 111 to an upper surface 112. External terminals 121 to 128 are formed. The external terminal 121 is a terminal connected to the antenna.
The external terminal 122 is a terminal connected to the receiving circuit, the external terminal 123
Is a terminal connected to the transmission circuit. The other external terminals 124 to 128 are ground terminals.

【0027】積層素体110の内部には、図2の等価回路
に示すように、受信用のフィルタ回路130と送信用のフ
ィルタ回路140が形成されている。
As shown in the equivalent circuit of FIG. 2, a filter circuit 130 for reception and a filter circuit 140 for transmission are formed inside the laminated body 110.

【0028】受信用フィルタ回路130は、2.08〜
2.20GHzの帯域(第1周は数帯域)内の高周波信
号を通過させる帯域通過型フィルタで、3つの共振器13
1〜133と、インダクタ134a,134h、キャパシタ134b〜134
iによって構成されている。
The receiving filter circuit 130 has
This is a band-pass filter that passes a high-frequency signal within a band of 2.20 GHz (the first round is several bands).
1 to 133, inductors 134a and 134h, capacitors 134b to 134
i.

【0029】受信用フィルタ回路130において、共振器1
31の一端は接地され、他端はキャパシタ134bの一端に接
続されると共にインダクタ134aを介してアンテナ用の外
部端子121に接続されている。共振器132の一端は接地さ
れ、他端はキャパシタ134d,134eのそれぞれの一端に接
続されている。共振器133の一端は接地され、他端はキ
ャパシタ134iの一端に接続されると共にインダクタ134h
を介して受信用の外部端子122に接続されている。ま
た、キャパシタ134eの一端はキャパシタ134b,134dの他
端に接続され、キャパシタ134eの他端はキャパシタ134
f,134gの他端に接続されている。
In the receiving filter circuit 130, the resonator 1
One end of 31 is grounded, the other end is connected to one end of capacitor 134b, and is connected to external terminal 121 for the antenna via inductor 134a. One end of the resonator 132 is grounded, and the other end is connected to one end of each of the capacitors 134d and 134e. One end of the resonator 133 is grounded, the other end is connected to one end of the capacitor 134i, and the inductor 134h
Is connected to an external terminal 122 for reception. One end of the capacitor 134e is connected to the other ends of the capacitors 134b and 134d, and the other end of the capacitor 134e is connected to the capacitor 134e.
f, 134g is connected to the other end.

【0030】送信用フィルタ回路140は、1.90〜
2.02GHzの帯域(第2周波数帯域)内の高周波信
号を通過させる帯域通過型フィルタで、3つの共振器14
1〜143と、キャパシタ144a〜144c、インダクタ144dによ
って構成されている。
The transmission filter circuit 140 has 1.90 to
This is a band-pass filter that passes a high-frequency signal in a band of 2.02 GHz (second frequency band).
1 to 143, capacitors 144a to 144c, and an inductor 144d.

【0031】送信用フィルタ回路140において、共振器1
41の一端は接地され、他端はキャパシタ144aを介して送
信用の外部端子123に接続されている。共振器142の一端
は接地され、他端はキャパシタ144bを介して外部端子12
3に接続されると共にキャパシタ144cを介してアンテナ
用の外部端子121に接続されている。共振器143の一端は
接地され、他端はインダクタ144dを介してアンテナ用の
外部端子121に接続されている。ここで、共振器141と共
振器142との間には相互インダクタンスMを有し、また
共振器142と共振器143との間には相互インダクタンスM
を有している。
In the transmission filter circuit 140, the resonator 1
One end of 41 is grounded, and the other end is connected to a transmitting external terminal 123 via a capacitor 144a. One end of the resonator 142 is grounded, and the other end is connected to an external terminal 12 via a capacitor 144b.
3 and to the antenna external terminal 121 via a capacitor 144c. One end of the resonator 143 is grounded, and the other end is connected to an external terminal 121 for an antenna via an inductor 144d. Here, a mutual inductance M is provided between the resonator 141 and the resonator 142, and a mutual inductance M is provided between the resonator 142 and the resonator 143.
have.

【0032】上記の受信用フィルタ回路130と送信用フ
ィルタ回路140のそれぞれは積層素体110に設けられた導
体片及び共振線路から構成される。即ち、図3に示すよ
うに、積層素体110は、それぞれ同じ厚さを有する複数
の誘電体層(絶縁体層)151〜166を積層して構成されて
おり、所定層の誘電体層には表面に共振線路又は導体片
或いは接地導体が設けられている。
Each of the above-mentioned receiving filter circuit 130 and transmitting filter circuit 140 is composed of a conductor piece and a resonance line provided on the laminated body 110. That is, as shown in FIG. 3, the laminated body 110 is formed by laminating a plurality of dielectric layers (insulator layers) 151 to 166 each having the same thickness. Is provided with a resonance line, a conductor piece, or a ground conductor on the surface.

【0033】図3において最上層及び第3層目の誘電体
層151,153はダミー層であり、第2層目の誘電体層152の
表面には接地導体171が設けられている。この接地導体1
71は接地端子となる外部端子124〜128に接続され、外部
端子121〜123に対応する部分は絶縁のために切り欠かれ
ている。
In FIG. 3, the uppermost and third dielectric layers 151 and 153 are dummy layers, and a ground conductor 171 is provided on the surface of the second dielectric layer 152. This ground conductor 1
Reference numeral 71 is connected to external terminals 124 to 128 serving as ground terminals, and portions corresponding to the external terminals 121 to 123 are cut out for insulation.

【0034】第4層目の誘電体層154の表面の所定位置
には後述する共振線路174,175に結合してキャパシタを
形成する導体片172が設けられている。
At a predetermined position on the surface of the fourth dielectric layer 154, a conductor piece 172 which forms a capacitor by being coupled to resonance lines 174 and 175 described later is provided.

【0035】第5層目の誘電体層155の表面には所定間
隔をあけて互いに平行なストリップ線路からなる3つの
共振線路173,174,175が設けられ、それぞれの一端は接
地され他端は開放されている。また、共振線路173の一
端部所定位置に接続導体176の一端が接続され、接続導
体176の他端はアンテナ用の外部端子121に接続されてい
る。また、共振線路175の一端部所定位置に接続導体177
の一端が接続され、接続導体177の他端は受信用の外部
端子122に接続されている。
On the surface of the fifth dielectric layer 155, there are provided three resonance lines 173, 174 and 175 formed of strip lines parallel to each other at predetermined intervals, one end of which is grounded and the other end is open. . One end of the connection conductor 176 is connected to a predetermined position of one end of the resonance line 173, and the other end of the connection conductor 176 is connected to the external terminal 121 for an antenna. Further, the connection conductor 177 is provided at a predetermined position of one end of the resonance line 175.
Are connected, and the other end of the connection conductor 177 is connected to the external terminal 122 for reception.

【0036】第6層目の誘電体層156の表面の所定位置
には共振線路173,174に結合してキャパシタを形成する
導体片178が設けられている。
At a predetermined position on the surface of the sixth dielectric layer 156, there is provided a conductor piece 178 which is coupled to the resonance lines 173 and 174 to form a capacitor.

【0037】第7層目の誘電体層157はダミー層であ
る。
The seventh dielectric layer 157 is a dummy layer.

【0038】第8層目の誘電体層158の表面には、接地
導体179が設けられている。この接地導体179は接地端子
となる外部端子124〜128に接続され、外部端子121〜123
に対応する部分は絶縁のために切り欠かれている。
On the surface of the eighth dielectric layer 158, a ground conductor 179 is provided. This ground conductor 179 is connected to external terminals 124 to 128 which serve as ground terminals, and external terminals 121 to 123
Is cut out for insulation.

【0039】第9及び第10層目の誘電体層159,160は
ダミー層である。
The ninth and tenth dielectric layers 159 and 160 are dummy layers.

【0040】第11層目の誘電体層161の表面には導体
片180が設けられ、導体片180の一端は送信用の外部端子
123に接続され、他端は後述する共振線路183の開放端部
に結合してキャパシタンスを形成する位置に配置されて
いる。
A conductor piece 180 is provided on the surface of the eleventh dielectric layer 161. One end of the conductor piece 180 is connected to an external terminal for transmission.
The other end is connected to an open end of a resonance line 183 to be described later, and is arranged at a position where a capacitance is formed.

【0041】第12層目の誘電体層162の表面には所定
間隔をあけて互いに平行なストリップ線路からなる3つ
の共振線路181,182,183が設けられ、それぞれの一端は
接地され他端は開放されている。また、共振線路181の
一端部所定位置に接続導体184の一端が接続され、接続
導体184の他端はアンテナ用の外部端子121に接続されて
いる。また、これらの共振線路181,182,183は、上記共
振線路173,174,175と平行であり且つ接地端及び開放端
が一致するように配置されている。
On the surface of the twelfth dielectric layer 162, there are provided three resonance lines 181, 182, 183, which are strip lines parallel to each other at a predetermined interval, one end of which is grounded and the other end is open. . One end of the connection conductor 184 is connected to a predetermined position of one end of the resonance line 181, and the other end of the connection conductor 184 is connected to the external terminal 121 for the antenna. Further, these resonance lines 181, 182, 183 are arranged in parallel with the resonance lines 173, 174, 175 so that the ground end and the open end coincide.

【0042】第13層目の誘電体層163の表面の所定位
置には共振線路181,182,183の開放端に結合してキャパ
シタンスを形成する矩形の導体片185が設けられてい
る。
At a predetermined position on the surface of the thirteenth dielectric layer 163, there is provided a rectangular conductor piece 185 coupled to the open ends of the resonance lines 181, 182, 183 to form a capacitance.

【0043】第14及び第15層目の誘電体層164,165
はダミー層である。
Fourteenth and fifteenth dielectric layers 164 and 165
Is a dummy layer.

【0044】第16層目の誘電体層166の表面には、接
地導体186が設けられている。この接地導体186は接地端
子となる外部端子124〜128に接続され、外部端子121〜1
23に対応する部分は絶縁のために切り欠かれている。
A ground conductor 186 is provided on the surface of the sixteenth dielectric layer 166. The ground conductor 186 is connected to external terminals 124 to 128 serving as ground terminals,
The part corresponding to 23 is cut out for insulation.

【0045】前述した積層素体110では、第2層目から
第8層目の誘電体層152〜158及びこれらの層の表面に設
けられた共振線路と接地導体並びに導体片によって受信
用のフィルタ回路130が構成され、第8層目から第16
層目の誘電体層158〜166及びこれらの層の表面に設けら
れた共振線路と接地導体並びに導体片によって送信用の
フィルタ回路140が構成されている。
In the above-described laminated body 110, the receiving filter is formed by the second to eighth dielectric layers 152 to 158 and the resonance lines, the ground conductors, and the conductor pieces provided on the surfaces of these layers. The circuit 130 is configured, and from the eighth layer to the sixteenth layer
The transmission filter circuit 140 is constituted by the first dielectric layers 158 to 166 and the resonance line, the ground conductor, and the conductor piece provided on the surface of these layers.

【0046】上記積層デュプレクサ素子100は、受信用
フィルタ回路130を構成する共振線路173,174,175及び導
体片172,176,177,178が誘電体層152,153,156,157を介し
て接地導体171,179によって挟まれているため、この接
地導体171,179によって受信用フィルタ回路130は外界及
び送信用フィルタ回路140から遮蔽され、送信用フィル
タ回路140を構成する共振線路181,182,183及び導体片18
0,184,185が誘電体層158,159,160,163,164,165を介して
接地導体179,186によって挟まれているため、この接地
導体179,186によって送信用フィルタ回路140は外界及び
受信用フィルタ回路130から遮蔽される。これにより各
フィルタ回路130,140は、外界及び他方のフィルタ回路
の電気的な影響を受けることなく良好な特性を発揮する
ことができる。
In the laminated duplexer element 100, the resonance lines 173, 174, 175 and the conductor pieces 172, 176, 177, 178 constituting the reception filter circuit 130 are sandwiched by the ground conductors 171 and 179 via the dielectric layers 152, 153, 156 and 157. The filter circuit 130 is shielded from the outside world and the transmission filter circuit 140, and the resonance lines 181, 182, 183 and the conductor piece 18 constituting the transmission filter circuit 140 are formed.
Since the ground conductors 179 and 186 sandwich the dielectric layers 158, 159, 160, 163, 164, and 165 via the dielectric layers 158, 159, 160, 163, 164, and 165, the transmission filter circuit 140 is shielded from the outside and the reception filter circuit 130 by the ground conductors 179 and 186. Thus, each of the filter circuits 130 and 140 can exhibit good characteristics without being affected by the outside and the other filter circuits.

【0047】さらに、受信用フィルタ回路130を構成す
る共振線路と接地導体並びに導体片のうちの1つ以上
が、送信用フィルタ回路140の共振線路と導体片並びに
接地導体が設けられている層とは異なる層に設けられて
いるので、各フィルタ毎に最良の特性を得られるよう
に、各絶縁体層の厚さや共振線路と接地導体との距離を
設定することができる。これにより、各フィルタ回路13
0,140の通過周波数帯域のインピーダンス特性を最適な
状態に設定することができる。
Further, at least one of the resonance line, the ground conductor, and the conductor piece constituting the reception filter circuit 130 is formed of a layer provided with the resonance line, the conductor piece, and the ground conductor of the transmission filter circuit 140. Are provided in different layers, so that the thickness of each insulator layer and the distance between the resonance line and the ground conductor can be set so as to obtain the best characteristics for each filter. Thereby, each filter circuit 13
The impedance characteristics of the 0,140 pass frequency band can be set to an optimal state.

【0048】上記積層デュプレクサ素子100の周波数特
性は、図5に示すように、受信用フィルタ回路130と送
信用フィルタ回路140のそれぞれにおいて良好な周波数
特性を示している。即ち、図5のRxの特性曲線に示す
ように、受信用フィルタ回路130は、受信用周波数帯域
において良好な通過特性を示し且つ受信用周波数帯域以
外においては大きな減衰を生じさせている。さらに、図
5のTxの特性曲線に示すように、送信用フィルタ回路
140は、送信用周波数帯域において良好な通過特性を示
し且つ送信用周波数帯域以外においては大きな減衰を生
じさせている。
As shown in FIG. 5, the frequency characteristics of the laminated duplexer element 100 show good frequency characteristics in each of the receiving filter circuit 130 and the transmitting filter circuit 140. That is, as shown by the characteristic curve of Rx in FIG. 5, the receiving filter circuit 130 shows a good pass characteristic in the receiving frequency band, and generates a large attenuation outside the receiving frequency band. Further, as shown in the characteristic curve of Tx in FIG.
Reference numeral 140 shows good pass characteristics in the transmission frequency band, and causes significant attenuation outside the transmission frequency band.

【0049】また、上記積層デュプレクサ素子100は、
受信用フィルタ回路130の部分と送信用フィルタ回路140
の部分が積層素体110の底面111に対して垂直方向に積層
されているので、主装置への実装面積が削減されて高密
度実装が可能になる。
The laminated duplexer element 100 is
Part of the receiving filter circuit 130 and the transmitting filter circuit 140
Are stacked in the direction perpendicular to the bottom surface 111 of the multilayer body 110, so that the mounting area on the main device is reduced and high-density mounting is enabled.

【0050】尚、第1実施形態では、受信用フィルタ回
路130における共振線路173,174,175を挟む2つの接地導
体171,179の間の距離よりも送信用フィルタ回路140にお
ける共振線路181,182,183を挟む2つの接地導体179,186
の間の距離を大きく設定することにより、各フィルタ回
路130,140の通過周波数帯域のインピーダンス特性が良
好な状態になるように設定したが、これに限定されるこ
とはなく、各フィルタ回路130,140における共振線路や
導体片の配置によって任意個別に設定することが好まし
い。
In the first embodiment, the two ground conductors 179 and 186 sandwiching the resonance lines 181, 182, and 183 in the transmission filter circuit 140 are smaller than the distance between the two ground conductors 171 and 179 sandwiching the resonance lines 173, 174, and 175 in the reception filter circuit 130.
By setting the distance between them large, the impedance characteristics in the pass frequency band of each filter circuit 130, 140 were set to be in a good state, but the present invention is not limited to this. It is preferable to set individually and arbitrarily according to the arrangement of the conductor pieces.

【0051】次に、本発明の第2実施形態を説明する。Next, a second embodiment of the present invention will be described.

【0052】図6は第2実施形態における積層デュプレ
クサ素子200を示す外観斜視図、図7はその分解斜視図
である。図において、前述した第1実施形態と同一構成
部分は同一符号をもって表しその説明を省略する。ま
た、第2実施形態と第1実施形態との相違点は、送信用
フィルタ回路140を構成する共振線路181,182,183と、導
体片180,185、接続線路184の配置を変えて、共振線路18
1,182,183が受信用フィルタ回路130の共振線路173,174,
175に対して直角に交差するように配置したことであ
る。
FIG. 6 is an external perspective view showing a laminated duplexer element 200 according to the second embodiment, and FIG. 7 is an exploded perspective view thereof. In the figure, the same components as those in the first embodiment described above are denoted by the same reference numerals, and description thereof will be omitted. The difference between the second embodiment and the first embodiment is that the arrangement of the resonance lines 181, 182, 183, the conductor pieces 180, 185, and the connection lines 184 constituting the transmission filter circuit 140 is changed,
1,182,183 are the resonance lines 173,174,
That is, they are arranged to intersect at right angles to 175.

【0053】上記構成によって第1実施形態と同様の効
果が得られると共に、アンテナ用の外部端子121と、受
信用の外部端子122、送信用の外部端子123のそれぞれ
を、積層素体110の異なる側面に容易に形成することが
できるので、これらの外部端子121,122,123の短絡の発
生を防止することができると共に、外部端子121,122,12
3の大きさを第1実施形態と同様の大きさにしながら積
層素体110の形状を小型化することができる。
With the above configuration, the same effect as that of the first embodiment can be obtained, and the external terminal 121 for the antenna, the external terminal 122 for the reception, and the external terminal 123 for the transmission are different from each other in the laminated element body 110. Since the external terminals 121, 122, 123 can be easily formed on the side surfaces, it is possible to prevent the external terminals 121, 122, 123 from being short-circuited, and to prevent the external terminals 121, 122, 12
The size of the multilayer body 110 can be reduced while the size of 3 is the same as that of the first embodiment.

【0054】次に、本発明の第3実施形態を説明する。Next, a third embodiment of the present invention will be described.

【0055】図8は第3実施形態における積層デュプレ
クサ素子300の分解斜視図である。第3実施形態におけ
る積層デュプレクサ素子の外観及び等価回路は前述した
第1実施形態と同じである。
FIG. 8 is an exploded perspective view of a laminated duplexer element 300 according to the third embodiment. The appearance and the equivalent circuit of the multilayer duplexer element in the third embodiment are the same as those in the first embodiment.

【0056】また、第3実施形態と第1実施形態との相
違点は、第3実施形態では、図9に示すように、第5層
目の誘電体層155の表面に受信用フィルタ回路130の共振
線路173,174,175と送信用外部端123との間に送信用外部
端子123を囲むように接地導体を311を設けると共に、図
10に示すように、第12層目の誘電体層162の表面
に、送信用フィルタ回路140の共振線路181,182,183と受
信用外部端122との間に受信用外部端子122を囲むように
接地導体を321を設けたことである。
The difference between the third embodiment and the first embodiment is that, in the third embodiment, as shown in FIG. 9, the receiving filter circuit 130 is provided on the surface of the fifth dielectric layer 155. A ground conductor 311 is provided between the resonant transmission lines 173, 174, 175 and the transmission external end 123 so as to surround the transmission external terminal 123, and as shown in FIG. In addition, a ground conductor 321 is provided between the resonance lines 181, 182, 183 of the transmission filter circuit 140 and the reception external terminal 122 so as to surround the reception external terminal 122.

【0057】上記構成により、第1実施形態と同様の効
果を得られると共に、受信用フィルタ回路130の共振線
路173,174,175と送信用外部端子123との間の電気的な結
合が接地導体311によって抑制される。また、送信用フ
ィルタ回路140の共振線路181,182,183と受信用外部端子
122との間の電気的な結合が接地導体321によって抑制さ
れる。これにより、各フィルタ回路130,140の特性を他
方のフィルタ回路の影響を受けることなく個別に設定で
きると共に特性を安定させることができる。
According to the above configuration, the same effect as that of the first embodiment can be obtained, and the electrical coupling between the resonance lines 173, 174, 175 of the reception filter circuit 130 and the transmission external terminal 123 is suppressed by the ground conductor 311. You. In addition, the resonance lines 181, 182, 183 of the transmission filter circuit 140 and the reception external terminal
Electrical coupling with the ground conductor 122 is suppressed by the ground conductor 321. Thus, the characteristics of each of the filter circuits 130 and 140 can be individually set without being affected by the other filter circuit, and the characteristics can be stabilized.

【0058】尚、図11に示す積層デュプレクサ素子30
0Aのように、受信用のフィルタ回路130を構成する他の
導体片172,178が設けられている誘電体層154,156の表面
にも送信用外部端子123を囲む接地導体312,313を設けて
も良いし、送信用のフィルタ回路140を構成する他の導
体片180,185が設けられている誘電体層161,163の表面に
も受信用外部端子122を囲む接地導体322,323を設けても
良い。
The laminated duplexer element 30 shown in FIG.
Ground conductors 312, 313 surrounding the transmitting external terminal 123 may be provided on the surfaces of the dielectric layers 154, 156 on which other conductor pieces 172, 178 constituting the receiving filter circuit 130 are provided, as shown in FIG. Ground conductors 322 and 323 surrounding the external receiving terminal 122 may be provided on the surfaces of the dielectric layers 161 and 163 on which the other conductor pieces 180 and 185 constituting the trust filter circuit 140 are provided.

【0059】また、受信用外部端子122を囲む接地導体3
21,322,323のみを設けても良いし、送信用外部端子123
を囲む接地導体311,312,313のみを設けても良い。
The ground conductor 3 surrounding the external receiving terminal 122
Only 21,322,323 may be provided, or the external terminal 123 for transmission may be provided.
, Only the ground conductors 311, 312, and 313 may be provided.

【0060】また、上記の受信用外部端子122或いは送
信用外部端子123を囲む接地導体は共振線路が形成され
ている層と同層に設けることが好ましいが、上記接地導
体を設ける層は特に規定されることはなく、何れか1つ
以上の層に上記外部端子を囲む接地導体を設けることに
よりほぼ同様の効果を得ることができる。
The ground conductor surrounding the external terminal 122 for reception or the external terminal 123 for transmission is preferably provided on the same layer as the layer on which the resonance line is formed, but the layer on which the ground conductor is provided is particularly defined. The same effect can be obtained by providing a ground conductor surrounding the external terminal on at least one layer.

【0061】次に、本発明の第4実施形態を説明する。Next, a fourth embodiment of the present invention will be described.

【0062】図12は第4実施形態における積層デュプ
レクサ素子400を示す分解斜視図、図13は図12にお
けるA−A線矢視方向の断面図である。図において、前
述した第1実施形態と同一構成部分は同一符号をもって
表しその説明を省略する。また、第4実施形態と第1実
施形態との相違点は、第4実施形態では、受信用フィル
タ回路130の共振線路173,174,175の開放端部と接地導体
との間に所定の量のキャパシタンスを形成して共振線路
173,174,175の短縮とフィルタ回路130のQの向上を図る
と共に、送信用フィルタ回路140の共振線路181,182,183
の開放端部と接地導体との間に所定の量のキャパシタン
スを形成して共振線路181,182,183の短縮とフィルタ回
路140のQの向上を図ったことである。さらに、共振線
路173,174,175と共振線路181,182,183の間の層に配置さ
れる接地導体を2つに分割してそれぞれ異なる層に配置
することによって、上記キャパシタンスを得られるよう
にした。
FIG. 12 is an exploded perspective view showing a laminated duplexer element 400 according to the fourth embodiment, and FIG. 13 is a sectional view taken along the line AA in FIG. In the figure, the same components as those in the first embodiment described above are denoted by the same reference numerals, and description thereof will be omitted. The difference between the fourth embodiment and the first embodiment is that in the fourth embodiment, a predetermined amount of capacitance is formed between the open ends of the resonance lines 173, 174, 175 of the receiving filter circuit 130 and the ground conductor. And resonant line
173, 174, 175 and Q of the filter circuit 130 are improved, and the resonance lines 181, 182, 183 of the transmission filter circuit 140 are improved.
That is, a predetermined amount of capacitance is formed between the open end and the ground conductor to shorten the resonance lines 181, 182, 183 and improve the Q of the filter circuit 140. Further, the above-mentioned capacitance can be obtained by dividing the ground conductor arranged in the layer between the resonance lines 173, 174, 175 and the resonance lines 181, 182, 183 into two layers and arranging them in different layers.

【0063】即ち、第4実施形態の積層デュプレクサ素
子400では、受信用フィルタ回路130の共振線路173,174,
175の接地端と開放端の位置が第1実施形態とは反対に
なるように、受信用フィルタ回路130の共振線路173,17
4,175と導体片172,178、接続導体176,177を配置した。
さらに、第1実施形態における第8及び第9層目の誘電
体層158,159を除去した。
That is, in the multilayer duplexer 400 of the fourth embodiment, the resonance lines 173, 174,
The resonance lines 173 and 17 of the receiving filter circuit 130 are set so that the positions of the ground end and the open end of the 175 are opposite to those in the first embodiment.
4,175, conductor pieces 172,178, and connection conductors 176,177 were arranged.
Further, the eighth and ninth dielectric layers 158 and 159 in the first embodiment were removed.

【0064】また、第4実施形態の積層デュプレクサ素
子400は、第7層目の誘電体層157の表面に共振線路173,
174,175の開放端側に当たるほぼ1/2の領域に接地導
体411を設けると共に、接地導体411に接続された複数の
ビアホール導体412を設けた。さらに、第8層目の誘電
体層160の表面に共振線路181,182,183の開放端側に当た
るほぼ1/2の領域に接地導体421を設けた。接地導体4
11と接地導体412は複数のビアホール導体412を介して接
続されている。
The multilayer duplexer 400 of the fourth embodiment has a structure in which the resonance line 173 and the resonance line 173 are provided on the surface of the seventh dielectric layer 157.
Ground conductors 411 were provided in approximately one-half the area corresponding to the open ends of 174 and 175, and a plurality of via-hole conductors 412 connected to the ground conductors 411 were provided. Further, a ground conductor 421 was provided on the surface of the eighth dielectric layer 160 in a region almost half of the open ends of the resonance lines 181, 182, 183. Ground conductor 4
11 and ground conductor 412 are connected via a plurality of via-hole conductors 412.

【0065】上記構成により、受信用フィルタ回路130
の共振線路173,174,175と接地導体411との間の距離L1
が、送信用フィルタ回路140の共振線路181,182,183と接
地導体411との間の距離L2よりも小さく設定される。
さらに、送信用フィルタ回路140の共振線路181,182,183
と接地導体421との間の距離L3が、受信用フィルタ回
路130の共振線路173,174,175と接地導体421との間の距
離L4よりも小さく設定される。
With the above configuration, the receiving filter circuit 130
L1 between the resonant lines 173, 174, 175 and the ground conductor 411
Is set smaller than the distance L2 between the resonance lines 181, 182, 183 of the transmission filter circuit 140 and the ground conductor 411.
Further, the resonance lines 181, 182, 183 of the transmission filter circuit 140
A distance L3 between the ground conductor 421 and the ground conductor 421 is set smaller than a distance L4 between the resonance lines 173, 174, 175 of the receiving filter circuit 130 and the ground conductor 421.

【0066】このため、受信用フィルタ回路130の共振
線路173,174,175の開放端部と接地導体411との間にキャ
パシタンスが発生するので、共振線路173,174,175の長
さを短縮することができると共に受信用フィルタ回路13
0のQを高めることができる。また、送信用フィルタ回
路140の共振線路181,182,183の開放端部と接地導体421
との間にキャパシタンスが発生するので、共振線路181,
182,183の長さを短縮することができると共に送信用フ
ィルタ回路140のQを高めることができる。
As a result, a capacitance is generated between the open ends of the resonance lines 173, 174, 175 of the reception filter circuit 130 and the ground conductor 411, so that the length of the resonance lines 173, 174, 175 can be shortened and the reception filter circuit can be reduced. 13
The Q of 0 can be increased. The open ends of the resonance lines 181, 182, 183 of the transmission filter circuit 140 and the ground conductor 421
Between the resonance line 181,
The lengths of 182 and 183 can be reduced, and the Q of the transmission filter circuit 140 can be increased.

【0067】さらに、接地導体411,421のそれぞれは誘
電体層157,160の互いに異なる側の1/2の領域に設け
られ、それぞれが重なり合う部分においてビアホール導
体412を介して接続されているので、これら2つの接地
導体411,421によって受信用フィルタ回路130と送信用フ
ィルタ回路140との間の電気的な遮蔽を行うことができ
る。
Further, each of the ground conductors 411 and 421 is provided in a half area on a different side of the dielectric layers 157 and 160, and is connected via a via-hole conductor 412 at a portion where they overlap each other. The conductors 411 and 421 can electrically shield the reception filter circuit 130 and the transmission filter circuit 140.

【0068】また、受信用フィルタ回路130の共振線
路173,174,175及び送信用フィルタ回路140の共振線路18
1,182,183の長さの短縮と誘電体層の削減により、積層
デュプレクサ素子400の小型化を図ることができる。
The resonance lines 173, 174, 175 of the reception filter circuit 130 and the resonance lines 18 of the transmission filter circuit 140
By reducing the lengths of 1,182,183 and the number of dielectric layers, the size of the laminated duplexer element 400 can be reduced.

【0069】また、第4実施形態においても第1実施形
態と同様の効果を得られることは言うまでもない。
It is needless to say that the same effects as those of the first embodiment can be obtained in the fourth embodiment.

【0070】次に、本発明の第5実施形態を説明する。Next, a fifth embodiment of the present invention will be described.

【0071】図14は第5実施形態における積層デュプ
レクサ素子500を示す外観斜視図、図15は図14にお
けるA−A線矢視方向の断面図、図16はその分解斜視
図である。本実施形態においては、第1実施形態と同じ
等価回路並びに周波数特性を有する積層デュプレクサ素
子であり、且つ受信用フィルタ回路130を構成部分と送
信用フィルタ回路140を構成部分が並べて形成されてい
る積層デュプレクサ素子の一例を説明する。
FIG. 14 is an external perspective view showing a laminated duplexer element 500 according to the fifth embodiment, FIG. 15 is a sectional view taken along the line AA in FIG. 14, and FIG. 16 is an exploded perspective view thereof. In the present embodiment, the laminated duplexer element has the same equivalent circuit and frequency characteristics as those of the first embodiment, and the receiving filter circuit 130 and the transmitting filter circuit 140 are formed side by side. An example of the duplexer element will be described.

【0072】図において、500は積層デュプレクサ素子
で、内部層に共振線路が形成された直方体形状の積層素
体510からなり、該積層素体510の外表面には底面511か
ら上面512に延ばして外部端子521〜528が形成されてい
る。外部端子521はアンテナに接続される端子である。
外部端子522は受信回路に接続される端子、外部端子523
は送信回路に接続される端子である。また、その他の外
部端子524〜528は接地端子である。
In the figure, reference numeral 500 denotes a laminated duplexer element, which comprises a rectangular parallelepiped laminated body 510 having a resonance line formed in an inner layer, and the outer surface of the laminated body 510 extends from a bottom surface 511 to an upper surface 512. External terminals 521 to 528 are formed. The external terminal 521 is a terminal connected to the antenna.
The external terminal 522 is a terminal connected to the receiving circuit,
Is a terminal connected to the transmission circuit. The other external terminals 524 to 528 are ground terminals.

【0073】積層素体510の内部には、前述した図2の
等価回路に示す受信用のフィルタ回路130と送信用のフ
ィルタ回路140が形成されている。
Inside the laminated element body 510, there are formed the receiving filter circuit 130 and the transmitting filter circuit 140 shown in the equivalent circuit of FIG.

【0074】上記の受信用フィルタ回路130と送信用フ
ィルタ回路140のそれぞれは積層素体510に設けられた導
体片及び共振線路から構成される。即ち、図16に示す
ように、積層素体510は、それぞれ同じ厚さと長方形の
平面を有する複数の誘電体層(絶縁体層)551〜560を積
層して構成されており、所定層の誘電体層には表面に共
振線路又は導体片或いは接地導体が設けられている。
Each of the above-mentioned reception filter circuit 130 and transmission filter circuit 140 is composed of a conductor piece and a resonance line provided on the laminated body 510. That is, as shown in FIG. 16, the laminated body 510 is formed by laminating a plurality of dielectric layers (insulator layers) 551 to 560 each having the same thickness and a rectangular plane, and a predetermined dielectric layer is formed. A resonance line, a conductor piece, or a ground conductor is provided on the surface of the body layer.

【0075】図16において最上層の誘電体層551はダ
ミー層であり、第2層目の誘電体層552の表面にはその
長辺方向一端側の1/2の領域に接地導体571が設けら
れている。この接地導体571は接地端子となる外部端子5
24,525,528に接続され、アンテナ用及び送信用の外部端
子521,523に対応する部分は絶縁のために切り欠かれて
いる。
In FIG. 16, the uppermost dielectric layer 551 is a dummy layer, and a ground conductor 571 is provided on the surface of the second dielectric layer 552 in a half area on one end side in the long side direction. Have been. This ground conductor 571 is connected to the external terminal 5 serving as a ground terminal.
Portions corresponding to the external terminals 521 and 523 for antenna and transmission are cut out for insulation.

【0076】第3層目の誘電体層553はダミー層であ
る。
The third dielectric layer 553 is a dummy layer.

【0077】第4層目の誘電体層554の表面にはその長
辺方向他端側の1/2の領域に接地導体572が設けられ
ている。この接地導体572は接地端子となる外部端子52
6,527,528に接続され、アンテナ用及び受信用の外部端
子521,522に対応する部分は絶縁のために切り欠かれて
いる。
On the surface of the fourth dielectric layer 554, a ground conductor 572 is provided in a half area on the other end side in the long side direction. This ground conductor 572 is connected to the external terminal 52 serving as a ground terminal.
6,527,528, and the portions corresponding to the antenna and receiving external terminals 521,522 are notched for insulation.

【0078】第5層目の誘電体層555の表面には導体片5
73が設けられ、導体片573の一端は送信用の外部端子523
に接続され、他端は後述する共振線路577の開放端部に
結合してキャパシタンスを形成する位置に配置されてい
る。
On the surface of the fifth dielectric layer 555, a conductor piece 5
One end of the conductor piece 573 is provided with an external terminal 523 for transmission.
And the other end is arranged at a position where it is coupled to an open end of a resonance line 577 described later to form a capacitance.

【0079】第6層目の誘電体層556の表面には、長辺
方向の他端側1/2の領域内の所定位置に後述する共振
線路581,582に結合してキャパシタを形成する導体片574
が設けられている。さらに、第6層目の誘電体層556の
表面には、長辺方向の一端側1/2の領域内に所定間隔
をあけて互いに平行なストリップ線路からなる3つの共
振線路575,576,578が設けられ、それぞれの一端は接地
され他端は開放されている。また、共振線路575の一端
部所定位置に接続導体579の一端が接続され、接続導体5
79の他端はアンテナ用の外部端子521に接続されてい
る。また、これらの共振線路575,576,578は、誘電体層5
56の短辺に平行になるように配置されている。
On the surface of the sixth dielectric layer 556, a conductor piece 574 which is coupled to resonance lines 581 and 582, which will be described later, at a predetermined position in a region on the other half of the other side in the long side direction to form a capacitor.
Is provided. Further, on the surface of the sixth dielectric layer 556, three resonance lines 575, 576, 578 made of strip lines parallel to each other are provided at predetermined intervals in a region on one end half in the long side direction, One end of each is grounded and the other end is open. One end of the connection conductor 579 is connected to a predetermined position of one end of the resonance line 575, and the connection conductor 5
The other end of 79 is connected to an external terminal 521 for an antenna. In addition, these resonance lines 575, 576, 578
It is arranged to be parallel to the short side of 56.

【0080】第7層目の誘電体層557の表面には、長辺
方向の他端側1/2の領域内の所定位置に所定間隔をあ
けて互いに平行なストリップ線路からなる3つの共振線
路580,581,582が設けられ、これらの共振線路580,581,5
82のそれぞれの一端は接地され他端は開放されている。
また、共振線路580の一端部所定位置に接続導体583の一
端が接続され、接続導体583の他端はアンテナ用の外部
端子521に接続されている。また、共振線路582の一端部
所定位置に接続導体584の一端が接続され、接続導体584
の他端は受信用の外部端子522に接続されている。
On the surface of the seventh dielectric layer 557, there are three resonance lines formed of strip lines parallel to each other at a predetermined position in a predetermined position in the other half of the other side in the long side direction. 580, 581, 582 are provided, and these resonance lines 580, 581, 5
One end of each of the 82 is grounded and the other end is open.
One end of the connection conductor 583 is connected to a predetermined position of one end of the resonance line 580, and the other end of the connection conductor 583 is connected to an external terminal 521 for an antenna. One end of the connection conductor 584 is connected to a predetermined position of one end of the resonance line 582, and the connection conductor 584
Is connected to an external terminal 522 for reception.

【0081】さらに、第7層目の誘電体層557の表面に
は、長辺方向の一端側1/2の領域内の所定位置には共
振線路575,576,578の開放端に結合してキャパシタンス
を形成する矩形の導体片585が設けられている。
Further, on the surface of the seventh dielectric layer 557, a capacitance is formed by coupling to the open ends of the resonance lines 575, 576, and 578 at a predetermined position within a region on one end side in the long side direction. A rectangular conductor piece 585 is provided.

【0082】第8層目の誘電体層558の表面には長辺方
向の他端側1/2の領域内の所定位置に共振線路580,58
1に結合してキャパシタを形成する導体片586が設けられ
ている。
On the surface of the eighth dielectric layer 558, the resonance lines 580 and 58 are located at predetermined positions in a region on the other end half in the long side direction.
A conductor piece 586 is provided that couples to 1 to form a capacitor.

【0083】第9層目の誘電体層559はダミー層であ
る。
The ninth dielectric layer 559 is a dummy layer.

【0084】第10層目の誘電体層560の表面には、ほ
ぼ全域に亘って接地導体587が設けられている。この接
地導体587は接地端子となる外部端子524〜528に接続さ
れ、外部端子521〜523に対応する部分は絶縁のために切
り欠かれている。
On the surface of the tenth dielectric layer 560, a ground conductor 587 is provided over almost the entire area. The ground conductor 587 is connected to external terminals 524 to 528 serving as ground terminals, and portions corresponding to the external terminals 521 to 523 are cut away for insulation.

【0085】前述した積層素体510では、長辺方向の他
端側1/2の領域に設けられた共振線路と接地導体並び
に導体片によって受信用のフィルタ回路130が構成さ
れ、長辺方向の一端側1/2の領域に設けられた共振線
路と接地導体並びに導体片によって送信用のフィルタ回
路140が構成されている。
In the laminated element body 510 described above, the reception filter circuit 130 is constituted by the resonance line, the ground conductor, and the conductor piece provided in the other half of the other side in the long side direction. A transmission filter circuit 140 is configured by a resonance line, a ground conductor, and a conductor piece provided in a region on one half of one end.

【0086】また、受信用フィルタ回路130における共
振線路580,581,582を挟む2つの接地導体572,587間の距
離L5と送信用フィルタ回路140における共振線路575,5
76,577を挟む2つの接地導体571,787間の距離L6とが
異なる値に設定されている。さらに、受信用フィルタ回
路130を構成する共振線路と接地導体並びに導体片のう
ちの1つ以上が、送信用フィルタ回路140の共振線路と
導体片並びに接地導体が設けられている層とは異なる層
に設けられている。これにより、受信用及び送信用フィ
ルタ回路130,140のそれぞれにおいて、通過周波数帯域
のインピーダンス特性を最適な状態に設定することがで
きる。
The distance L5 between the two ground conductors 572, 587 sandwiching the resonance lines 580, 581, 582 in the reception filter circuit 130 and the resonance lines 575, 5 in the transmission filter circuit 140
The distance L6 between the two ground conductors 571 and 787 sandwiching 76 and 577 is set to a different value. Further, at least one of the resonance line, the ground conductor, and the conductor piece constituting the reception filter circuit 130 is a layer different from the layer in which the resonance line, the conductor piece, and the ground conductor of the transmission filter circuit 140 are provided. It is provided in. Thereby, in each of the receiving and transmitting filter circuits 130 and 140, the impedance characteristic in the pass frequency band can be set to an optimal state.

【0087】また、受信用フィルタ回路130を構成する
共振線路580,581,582及び導体片574,583,584,586が誘電
体層554,555,558,559を介して接地導体572,587によって
挟まれているため、この接地導体582,587によって受信
用フィルタ回路130は外界及び送信用フィルタ回路140か
ら遮蔽され、送信用フィルタ回路140を構成する共振線
路575,576,577及び導体片573,579585が誘電体層552,55
3,554,557,558,559を介して接地導体571,587によって挟
まれているため、この接地導体571,587によって送信用
フィルタ回路140は外界及び受信用フィルタ回路130から
遮蔽される。これにより各フィルタ回路130,140は外界
及び他方のフィルタ回路の電気的な影響を受けることな
く良好な特性を発揮することができる。
Further, since the resonance lines 580, 581, 582 and the conductor pieces 574, 583, 584, 586 constituting the reception filter circuit 130 are sandwiched by the ground conductors 572, 587 via the dielectric layers 554, 555, 558, 559, the reception filter circuit 130 is externally circulated by the ground conductors 582, 587. The resonance lines 575, 576, 577 and the conductor pieces 573, 579 585, which are shielded from the transmission filter circuit 140 and constitute the transmission filter circuit 140, are dielectric layers 552, 55.
Since the transmission filter circuit 140 is sandwiched between the ground conductors 571 and 587 via the 3,554,557,558 and 559, the transmission filter circuit 140 is shielded from the outside and the reception filter circuit 130 by the ground conductors 571 and 587. As a result, each of the filter circuits 130 and 140 can exhibit good characteristics without being affected by the outside and the other filter circuits.

【0088】また、第5実施形態の積層デュプレクサ素
子500は、受信用フィルタ回路130の部分と送信用フィル
タ回路140の部分が積層素体510の底面511上に並べて配
置されるので、積層デュプレクサ素子500の高さを低く
設定することができ、薄型の電子機器に適用可能にな
る。
Further, in the multilayer duplexer element 500 of the fifth embodiment, the portion of the receiving filter circuit 130 and the portion of the transmitting filter circuit 140 are arranged side by side on the bottom surface 511 of the multilayer body 510. The height of 500 can be set low, making it applicable to thin electronic devices.

【0089】尚、上記第5実施形態では、受信用フィル
タ回路130における共振線路580,581,582を挟む2つの接
地導体572,587の間の距離よりも送信用フィルタ回路140
における共振線路575,576,576を挟む2つの接地導体57
1,587の間の距離を大きく設定することにより、各フィ
ルタ回路130,140の通過周波数帯域のインピーダンス特
性が良好な状態になるように設定したが、これに限定さ
れることはなく、各フィルタ回路130,140における共振
線路や導体片の配置によって任意個別に設定することが
好ましい。
In the fifth embodiment, the transmission filter circuit 140 is larger than the distance between the two ground conductors 572, 587 sandwiching the resonance lines 580, 581, 582 in the reception filter circuit 130.
Ground conductors 57 sandwiching the resonance lines 575, 576, 576
By setting the distance between 1,587 to be large, the impedance characteristics in the pass frequency band of each filter circuit 130, 140 were set to be in a good state, but the present invention is not limited to this. It is preferable to set arbitrarily and individually according to the arrangement of the line and the conductor piece.

【0090】また、上記第5実施形態では、受信用フィ
ルタ回路130を構成する部分すなわち接地導体572,587に
挟まれる部分を積層素体510の底面511の側に設けたが、
図17及び図18に示す第6実施形態の積層デュプレク
サ素子500Aのように受信用フィルタ回路130を構成する
部分を積層素体510の上面512側に設けても良いし、図1
9及び図20に示す第7実施形態の積層デュプレクサ素
子500Bのように受信用フィルタ回路130を構成する部分
を積層素体510の底面511と上面512の中間位置に設けて
も良い。
Further, in the fifth embodiment, the portion constituting the receiving filter circuit 130, that is, the portion sandwiched between the ground conductors 572 and 587 is provided on the bottom surface 511 side of the multilayer body 510.
As in the multilayer duplexer element 500A according to the sixth embodiment shown in FIGS. 17 and 18, a part configuring the reception filter circuit 130 may be provided on the upper surface 512 side of the multilayer body 510.
As in the multilayer duplexer element 500B of the seventh embodiment shown in FIGS. 9 and 20, a part configuring the reception filter circuit 130 may be provided at an intermediate position between the bottom surface 511 and the upper surface 512 of the multilayer body 510.

【0091】また、図21及び図22に示す第8実施形
態のように、第5実施形態の積層素体510において受信
用フィルタ回路130を構成する部分の上面512側のダミー
層となる部分を除去した階段形状の積層素体510Cを備え
た積層デュプレクサ素子500Cを構成しても良い。
Further, as in the eighth embodiment shown in FIGS. 21 and 22, a portion to be a dummy layer on the upper surface 512 side of the portion forming the receiving filter circuit 130 in the laminated element body 510 of the fifth embodiment is replaced by A stacked duplexer element 500C including the removed staircase-shaped stacked element body 510C may be configured.

【0092】また、図23に示す第9実施形態のよう
に、第5実施形態の積層デュプレクサ素子500における
受信用フィルタ回路130を構成する部分と送信用フィル
タ回路140を構成する部分を別の層に形成し、且つ受信
用フィルタ回路130を構成する部分の一部と送信用フィ
ルタ回路140を構成する部分の一部が重なるように配置
した積層デュプレクサ素子500Dを構成しても良い。この
ように受信用フィルタ回路130を構成する部分の一部と
送信用フィルタ回路140を構成する部分の一部が重なる
ように配置しても、各フィルタ回路間の電気的干渉を抑
制できると共に主装置への実装面積を低減することがで
きる。
Further, as in the ninth embodiment shown in FIG. 23, the portion forming the reception filter circuit 130 and the portion forming the transmission filter circuit 140 in the multilayer duplexer element 500 of the fifth embodiment are separated into different layers. And a laminated duplexer element 500D in which a part of the part configuring the reception filter circuit 130 and a part of the part configuring the transmission filter circuit 140 overlap each other. Even if a part of the part forming the reception filter circuit 130 and a part of the part forming the transmission filter circuit 140 overlap each other, it is possible to suppress the electric interference between the filter circuits and to reduce The mounting area on the device can be reduced.

【0093】尚、上記各実施形態の構成は本願発明の一
具体例であって、本願発明がこれらの構成のみに限定さ
れることはなく、各実施形態の構成を組み合わせても良
いことは言うまでもない。
It should be noted that the configuration of each of the above embodiments is a specific example of the present invention, and it is needless to say that the present invention is not limited to only these configurations, and that the configurations of the embodiments may be combined. No.

【0094】[0094]

【発明の効果】以上説明したように本発明の請求項1乃
至請求項8に記載の積層デュプレクサ素子によれば、接
地導体によって第1フィルタ回路及び第2フィルタ回路
のそれぞれが互いに遮蔽されると共に外界から遮蔽され
るので、双方のフィルタ回路において最良の特性を得る
ことができる。さらに、第1フィルタ回路の導体片及び
接地導体のうちの1つ以上が、第2フィルタ回路の導体
片及び接地導体が設けられている層とは異なる層に設け
ることにより、各絶縁体層の厚さや共振線路と接地導体
との距離を各フィルタ回路毎に設定することができるの
で、各フィルタ毎に最良の特性を得ることができる。
As described above, according to the laminated duplexer element of the present invention, the first filter circuit and the second filter circuit are shielded from each other by the ground conductor. Since it is shielded from the outside, the best characteristics can be obtained in both filter circuits. Further, by providing at least one of the conductor piece and the ground conductor of the first filter circuit on a layer different from the layer provided with the conductor piece and the ground conductor of the second filter circuit, Since the thickness and the distance between the resonance line and the ground conductor can be set for each filter circuit, the best characteristics can be obtained for each filter.

【0095】また、請求項2に記載の積層デュプレクサ
素子によれば、上記の効果に加えて、第1フィルタ回路
と第2フィルタ回路のそれぞれにおいて、共振線路を挟
む2つの接地導体間の距離を異なる値に設定することに
より、各フィルタ回路の通過周波数帯域のインピーダン
ス特性が最良の状態に設定される。
According to the laminated duplexer element of the second aspect, in addition to the above effects, in each of the first filter circuit and the second filter circuit, the distance between the two ground conductors sandwiching the resonance line is reduced. By setting different values, the impedance characteristics of the pass frequency band of each filter circuit are set to the best condition.

【0096】また、請求項3に記載の積層デュプレクサ
素子によれば、上記の効果に加えて、入出力端子を囲む
ように接地導体を設けたため、第2フィルタ回路の共振
線路と第1入出力端子との間の電気的な結合、或いは第
1フィルタ回路の共振線路と第2入出力端子との間の電
気的な結合が抑制されるので、各フィルタ回路の特性を
個別に設定できると共に安定させることができる。
According to the laminated duplexer element of the third aspect, in addition to the above-described effects, the ground conductor is provided so as to surround the input / output terminal, so that the resonance line of the second filter circuit and the first input / output terminal are provided. Since the electrical coupling between the terminals and the electrical coupling between the resonance line of the first filter circuit and the second input / output terminal are suppressed, the characteristics of each filter circuit can be individually set and stable. Can be done.

【0097】また、請求項4に記載の積層デュプレクサ
素子によれば、上記の効果に加えて、第1フィルタ回路
の部分と第2フィルタ回路の部分が積層素体の積層方向
に重ねて配置されるので、主装置への実装面積が削減さ
れて高密度実装が可能になる。
According to the laminated duplexer element of the fourth aspect, in addition to the above-described effects, the first filter circuit portion and the second filter circuit portion are arranged so as to overlap in the laminating direction of the laminated element body. Therefore, the mounting area on the main device is reduced, and high-density mounting becomes possible.

【0098】また、請求項5に記載の積層デュプレクサ
素子によれば、上記の効果に加えて、第1フィルタ回路
の部分と第2フィルタ回路の部分が積層素体の層が延び
る方向に並べて配置されるので、積層デュプレクサ素子
の高さを低く設定することができ、薄型の電子機器に適
用可能になる。
According to the laminated duplexer element of the fifth aspect, in addition to the above effects, the first filter circuit portion and the second filter circuit portion are arranged side by side in the direction in which the layers of the laminated body extend. Therefore, the height of the laminated duplexer element can be set low, and it can be applied to a thin electronic device.

【0099】また、請求項6に記載の積層デュプレクサ
素子によれば、上記の効果に加えて、第1フィルタ回路
が形成される部分の一部分が第2フィルタ回路が形成さ
れる部分の一部分のみに重なるように積層されるので、
各フィルタ回路間の電気的干渉を抑制し且つ実装面積を
削減することができる。
According to the laminated duplexer element of the sixth aspect, in addition to the above effects, a part of the portion where the first filter circuit is formed is only a part of a portion where the second filter circuit is formed. Since they are stacked so that they overlap,
Electrical interference between the filter circuits can be suppressed, and the mounting area can be reduced.

【0100】また、請求項7に記載の積層デュプレクサ
素子によれば、上記の効果に加えて、第1フィルタ回路
の共振線路と第2フィルタ回路の共振線路が互いに直角
に交差するように配置されるので、各フィルタ回路の入
出力端子を積層素体の異なる外面に容易に配置すること
ができる。
According to the laminated duplexer element of the present invention, in addition to the above effects, the resonance line of the first filter circuit and the resonance line of the second filter circuit are arranged so as to intersect each other at right angles. Therefore, the input / output terminals of each filter circuit can be easily arranged on different outer surfaces of the multilayer body.

【0101】また、請求項8に記載の積層デュプレクサ
素子によれば、上記の効果に加えて、共振線路の長さを
短くすることができると共に絶縁体層の積層数を削減で
きるので、積層素体の外形を小型に形成することができ
る。さらに、各フィルタ回路のQを高めることができ
る。
According to the laminated duplexer element of the eighth aspect, in addition to the above effects, the length of the resonance line can be shortened and the number of laminated insulating layers can be reduced. The external shape of the body can be formed small. Further, the Q of each filter circuit can be increased.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1実施形態における積層デュプレク
サ素子を示す外観斜視図
FIG. 1 is an external perspective view showing a laminated duplexer element according to a first embodiment of the present invention.

【図2】本発明の第1実施形態における積層デュプレク
サ素子の等価回路を示す図
FIG. 2 is a diagram showing an equivalent circuit of the laminated duplexer element according to the first embodiment of the present invention.

【図3】本発明の第1実施形態における積層デュプレク
サ素子を示す分解斜視図
FIG. 3 is an exploded perspective view showing the laminated duplexer element according to the first embodiment of the present invention.

【図4】図3におけるA−A線斜視方向の断面図FIG. 4 is a sectional view taken along a line AA in FIG. 3;

【図5】本発明の第1実施形態における積層デュプレク
サ素子の周波数特性を示す図
FIG. 5 is a diagram showing frequency characteristics of the multilayer duplexer element according to the first embodiment of the present invention.

【図6】本発明の第2実施形態における積層デュプレク
サ素子を示す外観斜視図
FIG. 6 is an external perspective view showing a laminated duplexer element according to a second embodiment of the present invention.

【図7】本発明の第2実施形態における積層デュプレク
サ素子を示す分解斜視図
FIG. 7 is an exploded perspective view showing a laminated duplexer element according to a second embodiment of the present invention.

【図8】本発明の第3実施形態における積層デュプレク
サ素子を示す分解斜視図
FIG. 8 is an exploded perspective view showing a laminated duplexer element according to a third embodiment of the present invention.

【図9】本発明の第3実施形態における要部を示す平面
FIG. 9 is a plan view showing a main part according to a third embodiment of the present invention.

【図10】本発明の第3実施形態における要部を示す平
面図
FIG. 10 is a plan view showing a main part according to a third embodiment of the present invention.

【図11】本発明の第3実施形態の積層デュプレクサ素
子の他の構成例を示す分解斜視図
FIG. 11 is an exploded perspective view showing another configuration example of the laminated duplexer element according to the third embodiment of the present invention.

【図12】本発明の第4実施形態における積層デュプレ
クサ素子を示す分解斜視図
FIG. 12 is an exploded perspective view showing a laminated duplexer element according to a fourth embodiment of the present invention.

【図13】図12におけるA−A線矢視方向の断面図13 is a sectional view taken along the line AA in FIG. 12;

【図14】本発明の第5実施形態における積層デュプレ
クサ素子を示す外観斜視図
FIG. 14 is an external perspective view showing a laminated duplexer element according to a fifth embodiment of the present invention.

【図15】図14におけるA−A線矢視方向の断面図FIG. 15 is a sectional view taken along the line AA in FIG. 14;

【図16】本発明の第5実施形態における積層デュプレ
クサ素子を示す分解斜視図
FIG. 16 is an exploded perspective view showing a laminated duplexer element according to a fifth embodiment of the present invention.

【図17】本発明の第6実施形態における積層デュプレ
クサ素子を示す分解斜視図
FIG. 17 is an exploded perspective view showing a laminated duplexer element according to a sixth embodiment of the present invention.

【図18】図17におけるA−A線矢視方向の断面図18 is a sectional view taken along line AA in FIG. 17;

【図19】本発明の第7実施形態における積層デュプレ
クサ素子を示す分解斜視図
FIG. 19 is an exploded perspective view showing a laminated duplexer element according to a seventh embodiment of the present invention.

【図20】図20におけるA−A線矢視方向の断面図20 is a sectional view taken along the line AA in FIG. 20;

【図21】本発明の第8実施形態における積層デュプレ
クサ素子を示す分解斜視図
FIG. 21 is an exploded perspective view showing a laminated duplexer element according to an eighth embodiment of the present invention.

【図22】図22におけるA−A線矢視方向の断面図FIG. 22 is a sectional view taken along the line AA in FIG. 22;

【図23】本発明の第9実施形態における積層デュプレ
クサ素子を示す側断面図
FIG. 23 is a side sectional view showing a laminated duplexer element according to a ninth embodiment of the present invention.

【符号の説明】[Explanation of symbols]

100,200,300,300A,400,500,500A〜500D…積層デュプレ
クサ素子、110,210,510…積層素体、111,211,511…底
面、112,212,512…上面、121,521…アンテナ用外部端
子、122,522…受信用外部端子、123,523…送信用外部端
子、124〜128,524〜528…接地用外部端子、130…受信用
フィルタ回路、131,132,133…共振器、134a,134h…イン
ダクタ、134b,134d,134e,134f,134g…キャパシタ、140
…送信用フィルタ回路、144a,144b,144c…キャパシタ、
144d…インダクタ、151〜166…誘電体層(絶縁体層)、
171,179,186…接地導体、172,178,180,185…導体片、17
3,174,175,181,182,183…共振線路、175,176,184…接続
導体、311,312,313,321,322,323…接地導体、411,421…
接地導体、412…ビアホール導体、551〜560…誘電体層
(絶縁体層)、571,572,587,588,589,591,592,593…接
地導体、573,574,585,586…導体片、575,576,577,580,5
81,582…共振線路、579,583,584…接続導体。
100, 200, 300, 300A, 400, 500, 500A to 500D: laminated duplexer element, 110, 210, 510: laminated body, 111, 211, 511: bottom, 112, 212, 512 ... top, 121, 521: external terminal for antenna, 122, 522: external terminal for reception, 123, 523: external terminal for transmission, 124 to 128, 524 528: External terminal for grounding, 130: Filter circuit for receiving, 131, 132, 133: Resonator, 134a, 134h: Inductor, 134b, 134d, 134e, 134f, 134g: Capacitor, 140
... Transmission filter circuits, 144a, 144b, 144c ... Capacitors,
144d ... inductor, 151-166 ... dielectric layer (insulator layer),
171,179,186… ground conductor, 172,178,180,185… conductor piece, 17
3,174,175,181,182,183… Resonance line, 175,176,184… Connection conductor, 311,312,313,321,322,323… Ground conductor, 411,421…
Ground conductor, 412: Via hole conductor, 551 to 560: Dielectric layer (insulator layer), 571,572,587,588,589,591,592,593 ... Ground conductor, 573,574,585,586 ... Conductor piece, 575,576,577,580,5
81,582… Resonant line, 579,583,584… Connection conductor.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H03H 7/09 H03H 7/46 A 7/46 H01F 15/00 D Fターム(参考) 5E070 AA01 AB01 CB03 CB13 CB15 EA01 5J006 HB05 HB22 JA22 KA03 LA03 LA09 LA13 LA23 NA03 NA04 NB07 NC03 5J024 AA01 BA18 CA04 CA06 CA09 CA10 CA17 DA01 DA29 DA32 EA03 EA05 KA03 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H03H 7/09 H03H 7/46 A 7/46 H01F 15/00 DF term (Reference) 5E070 AA01 AB01 CB03 CB13 CB15 EA01 5J006 HB05 HB22 JA22 KA03 LA03 LA09 LA13 LA23 NA03 NA04 NB07 NC03 5J024 AA01 BA18 CA04 CA06 CA09 CA10 CA17 DA01 DA29 DA32 EA03 EA05 KA03

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 共振線路を含む複数の導体片を有し第1
周波数帯域内の信号を通過させる第1フィルタ回路と、
共振線路を含む複数の導体片を有し前記第1周波数帯域
とは異なる第2周波数帯域内の信号を通過させる第2フ
ィルタ回路とを含む積層素体と、前記積層素体の外面に
形成され前記第1フィルタ回路の一方の入出力端に接続
された第1入出力端子と、前記積層素体の外面に形成さ
れ前記第2フィルタ回路の一方の入出力端に接続された
第2入出力端子と、前記積層素体の外面に形成され前記
第1フィルタ回路の他方の入出力端と前記第2フィルタ
回路の他方の入出力端とに接続された共通入出力端子
と、前記積層素体の外面に形成された接地端子とを備え
てなる積層デュプレクサ素子において、 前記第1フィルタ回路の共振線路を含む導体片と前記第
2フィルタ回路の共振線路を含む導体片を各フィルタ回
路毎に個別に絶縁体層を介して挟むように配置された複
数の接地導体とを設けると共に、 前記第1フィルタ回路の導体片及び接地導体のうちの1
つ以上が、前記第2フィルタ回路の導体片及び接地導体
が設けられている層とは異なる層に設けられていること
を特徴とする積層デュプレクサ素子。
A first conductor having a plurality of conductor pieces including a resonance line;
A first filter circuit for passing a signal in a frequency band,
A multilayer element including a plurality of conductor pieces including a resonance line and including a second filter circuit that allows a signal in a second frequency band different from the first frequency band to pass therethrough, and formed on an outer surface of the multilayer element; A first input / output terminal connected to one input / output terminal of the first filter circuit, and a second input / output terminal formed on an outer surface of the multilayer body and connected to one input / output terminal of the second filter circuit A terminal, a common input / output terminal formed on an outer surface of the multilayer element and connected to the other input / output end of the first filter circuit and the other input / output end of the second filter circuit; And a grounding terminal formed on an outer surface of the multilayered duplexer element, wherein a conductor piece including the resonance line of the first filter circuit and a conductor piece including the resonance line of the second filter circuit are individually provided for each filter circuit. Sandwiched between insulator layers And a plurality of ground conductors arranged as described above, and one of the conductor pieces and the ground conductor of the first filter circuit.
At least one is provided on a layer different from the layer on which the conductor piece and the ground conductor of the second filter circuit are provided.
【請求項2】 前記第1フィルタ回路の共振線路を挟む
2つの接地導体間の距離が、前記第2フィルタ回路の共
振線路を挟む2つの接地導体間の距離と異なる値に設定
されていることを特徴とする請求項1に記載の積層デュ
プレクサ素子。
2. A distance between two ground conductors sandwiching a resonance line of the first filter circuit is set to a value different from a distance between two ground conductors sandwiching a resonance line of the second filter circuit. The laminated duplexer element according to claim 1, wherein:
【請求項3】 前記第1フィルタ回路の共振線路と前記
第2入出力端子との間或いは前記第2フィルタ回路の共
振線路と前記第1入出力端子との間の少なくとも何れか
一方において、1つ以上の層に、前記入出力端子を囲む
ように前記接地端子に接続された接地導体を設けたこと
を特徴とする請求項1または請求項2に記載の積層デュ
プレクサ素子。
3. In at least one of between a resonance line of the first filter circuit and the second input / output terminal or between a resonance line of the second filter circuit and the first input / output terminal. The multilayer duplexer element according to claim 1 or 2, wherein a ground conductor connected to the ground terminal is provided on at least one of the layers so as to surround the input / output terminal.
【請求項4】 前記積層素体は、前記第1フィルタ回路
が形成された部分と、前記第2フィルタ回路が形成され
た部分とを積層方向に重ねて配置してなることを特徴と
する請求項1乃至請求項3の何れかに記載の積層デュプ
レクサ素子。
4. The laminated element body according to claim 1, wherein a portion on which the first filter circuit is formed and a portion on which the second filter circuit is formed are arranged so as to overlap in a laminating direction. 4. The multilayer duplexer according to claim 1.
【請求項5】 前記積層素体は、前記第1フィルタ回路
が形成される部分と、前記第2フィルタ回路が形成され
る部分を層が延びる方向に並べて配置してなることを特
徴とする請求項1乃至請求項3の何れかに記載の積層デ
ュプレクサ素子。
5. The laminated element body according to claim 1, wherein a portion where the first filter circuit is formed and a portion where the second filter circuit is formed are arranged side by side in a direction in which the layers extend. 4. The multilayer duplexer according to claim 1.
【請求項6】 前記積層素体は、前記第1フィルタ回路
が形成される部分の一部分が、前記第2フィルタ回路が
形成される部分の一部分に積層されてなることを特徴と
する請求項1乃至請求項3の何れかに記載の積層デュプ
レクサ素子。
6. The laminated element body according to claim 1, wherein a part of a part where the first filter circuit is formed is laminated on a part of a part where the second filter circuit is formed. The laminated duplexer element according to claim 3.
【請求項7】 前記共振線路は一端が前記接地端子に接
続され他端が開放された帯状導体片からなり、 前記第1フィルタ回路の共振線路が、前記第2フィルタ
回路の共振線路に対して絶縁体層を介して直角に交差す
るように配置されていることを特徴とする請求項4に記
載の積層デュプレクサ素子。
7. The resonance line is formed of a strip-shaped conductor piece having one end connected to the ground terminal and the other end open, wherein the resonance line of the first filter circuit is different from the resonance line of the second filter circuit. The laminated duplexer element according to claim 4, wherein the laminated duplexer element is arranged so as to intersect at right angles with an insulator layer interposed therebetween.
【請求項8】 前記共振線路は一端が前記接地端子に接
続され他端が開放された帯状導体片からなると共に、前
記第1フィルタ回路の共振線路の一端が前記第2フィル
タ回路の共振線路の他端側に位置し且つ前記第1フィル
タ回路の共振線路の他端が前記第2フィルタ回路の共振
線路の一端側に位置するように各共振線路が配置され、 前記導体片を絶縁体層を介して挟むように設けられた接
地導体として、前記第1フィルタ回路の共振線路と前記
第2フィルタ回路の共振線路との間に配置され、互いに
異なる層に設けられた第1及び第2の接地導体を備え、 前記第1接地導体は前記第1フィルタ回路の共振線路の
開放端部側の1/2の領域に設けられていると共に前記
第2接地導体は前記第2フィルタ回路の共振線路の開放
端部側の1/2の領域に設けられており、 前記第1フィルタ回路の共振線路と前記第1接地導体と
の間の距離が、前記第2フィルタ回路の共振線路と前記
第1接地導体との間の距離よりも小さく設定されている
と共に、 前記第2フィルタ回路の共振線路と前記第2接地導体と
の間の距離が、前記第1フィルタ回路の共振線路と前記
第2接地導体との間の距離よりも小さく設定されている
ことを特徴とする請求項4に記載の積層デュプレクサ素
子。
8. The resonance line includes a strip-shaped conductor piece having one end connected to the ground terminal and the other end open, and one end of the resonance line of the first filter circuit is connected to the resonance line of the second filter circuit. Each resonance line is arranged such that the other end of the resonance line of the first filter circuit is located on the other end side and the other end of the resonance line of the second filter circuit is located on one end side of the resonance line of the second filter circuit. A first and a second ground provided on different layers from each other and disposed between the resonance line of the first filter circuit and the resonance line of the second filter circuit as ground conductors provided so as to be sandwiched therebetween. A conductor, wherein the first ground conductor is provided in a half area on the open end side of the resonance line of the first filter circuit, and the second ground conductor is provided on a resonance line of the second filter circuit. 1/2 of the open end side The distance between the resonance line of the first filter circuit and the first ground conductor is smaller than the distance between the resonance line of the second filter circuit and the first ground conductor. The distance between the resonance line of the second filter circuit and the second ground conductor is set smaller than the distance between the resonance line of the first filter circuit and the second ground conductor. The laminated duplexer element according to claim 4, wherein
JP2001065490A 2001-03-08 2001-03-08 Laminated duplexer element Withdrawn JP2002271109A (en)

Priority Applications (1)

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Cited By (5)

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Publication number Priority date Publication date Assignee Title
EP1406342A1 (en) * 2002-10-04 2004-04-07 Matsuhita Electric Industrial Co., Ltd. Duplexer, and laminate-type high-frequency device and communication equipment using the same
JP2007523574A (en) * 2004-02-23 2007-08-16 ジョージア テック リサーチ コーポレイション Passive signal processing components for RF / wireless multiband applications based on liquid crystalline polymers and multilayer polymers
JP2008507235A (en) * 2004-07-22 2008-03-06 ノースロップ グルムマン スペース アンド ミッション システムズ コーポレイション Switch filter bank and method for creating a switch filter bank
WO2009054515A1 (en) * 2007-10-26 2009-04-30 Kyocera Corporation Diplexer, wireless communication module using the same, and wireless communication device
WO2022030238A1 (en) * 2020-08-07 2022-02-10 住友電気工業株式会社 High-frequency circuit and radio device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1406342A1 (en) * 2002-10-04 2004-04-07 Matsuhita Electric Industrial Co., Ltd. Duplexer, and laminate-type high-frequency device and communication equipment using the same
US7012481B2 (en) 2002-10-04 2006-03-14 Matsushita Electric Industrial Co., Ltd. Duplexer, and laminate-type high-frequency device and communication equipment using the same
JP2007523574A (en) * 2004-02-23 2007-08-16 ジョージア テック リサーチ コーポレイション Passive signal processing components for RF / wireless multiband applications based on liquid crystalline polymers and multilayer polymers
US7795995B2 (en) 2004-02-23 2010-09-14 Georgia Tech Research Corporation Liquid crystalline polymer and multilayer polymer-based passive signal processing components for RF/wireless multi-band applications
US8013688B2 (en) 2004-02-23 2011-09-06 Georgia Tech Research Corporation Liquid crystalline polymer and multilayer polymer-based passive signal processing components for RF/wireless multi-band applications
KR101183272B1 (en) 2004-02-23 2012-09-14 조지아 테크 리서치 코오포레이션 Liquid crystalline polymer- and multilayer polymer-based passive signal processing components for rf/wireless multi-band applications
JP2008507235A (en) * 2004-07-22 2008-03-06 ノースロップ グルムマン スペース アンド ミッション システムズ コーポレイション Switch filter bank and method for creating a switch filter bank
WO2009054515A1 (en) * 2007-10-26 2009-04-30 Kyocera Corporation Diplexer, wireless communication module using the same, and wireless communication device
JP4923111B2 (en) * 2007-10-26 2012-04-25 京セラ株式会社 Diplexer and wireless communication module and wireless communication device using the same
US8471650B2 (en) 2007-10-26 2013-06-25 Kyocera Corporation Diplexer, and wireless communication module and wireless communication apparatus using the same
WO2022030238A1 (en) * 2020-08-07 2022-02-10 住友電気工業株式会社 High-frequency circuit and radio device

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