JP2002260906A - Substrate for chip - Google Patents

Substrate for chip

Info

Publication number
JP2002260906A
JP2002260906A JP2001056508A JP2001056508A JP2002260906A JP 2002260906 A JP2002260906 A JP 2002260906A JP 2001056508 A JP2001056508 A JP 2001056508A JP 2001056508 A JP2001056508 A JP 2001056508A JP 2002260906 A JP2002260906 A JP 2002260906A
Authority
JP
Japan
Prior art keywords
chip component
division
dimension
chip
dividing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001056508A
Other languages
Japanese (ja)
Inventor
Kojiro Nakamura
幸二郎 中村
Seiji Tsuda
清二 津田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2001056508A priority Critical patent/JP2002260906A/en
Publication of JP2002260906A publication Critical patent/JP2002260906A/en
Pending legal-status Critical Current

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Adjustable Resistors (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a chip substrate which can be divided into discrete chips. all having normal shapes as products. SOLUTION: Primary dividing grooves 12 are provided with proper intervals on a chip substrate, and then unit dividing grooves 13 are provided with proper intervals on the chip substrate so as to cross the grooves 12 nearly at right angels. The chip substrate is divided along the unit dividing grooves 13 into chips 14 as products, first dummy parts 15 of dimension E larger than a dividing dimension F divided along the unit dividing grooves 13 of the chips 14 are provided outside the outermost ones of the chips 14, and second dummy parts 16 are provided outside the first dummy parts 15.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、各種電子機器に利
用されるチップ部品に用いられるチップ部品用基板に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip component substrate used for chip components used in various electronic devices.

【0002】[0002]

【従来の技術】従来のこの種のチップ部品用基板につい
て、角形チップ抵抗器を例に図面を参照しながら説明す
る。
2. Description of the Related Art A conventional chip component substrate of this type will be described with reference to the drawings, taking a rectangular chip resistor as an example.

【0003】図4は従来の角形チップ抵抗器に用いられ
るチップ部品用基板を示したもので、この図4におい
て、1はチップ部品用基板で、このチップ部品用基板1
には1次分割用の分割溝2を適宜間隔で形成するととも
に、この1次分割用の分割溝2と略直交する個片分割用
の分割溝3を適宜間隔で形成している。4は製品となる
チップ部品で、このチップ部品4はチップ抵抗器を一例
としている。5は製品となるチップ部品4の外側に位置
してチップ部品用基板1に設けられたダミー部で、この
ダミー部5は製品として使用しない部分である。
FIG. 4 shows a substrate for chip components used in a conventional square chip resistor. In FIG. 4, reference numeral 1 denotes a substrate for chip components.
In this example, the division grooves 2 for the primary division are formed at appropriate intervals, and the division grooves 3 for the individual division substantially orthogonal to the division grooves 2 for the primary division are formed at appropriate intervals. Reference numeral 4 denotes a chip component to be a product, and the chip component 4 is an example of a chip resistor. Reference numeral 5 denotes a dummy portion provided on the chip component substrate 1 outside the chip component 4 to be a product. The dummy portion 5 is a portion not used as a product.

【0004】図5は従来のチップ部品用基板における短
冊状基板のチップ分割装置を示したもので、この図5に
おいて、6は個片分割用の分割溝3を適宜間隔で形成し
てなる短冊状基板7の複数本を、その長手方向に平行に
並べた状態で移送するようにした移送コンベアで、この
移送コンベア6における移送方向に向かう前方の部位に
は、大径のローラ8と小径のローラ9とを互いに平行に
して配設し、そしてこれら両ローラ8,9を矢印A,B
で示すように互いに逆方向に回転駆動することにより、
これら両ローラ8,9の間に、前記移送コンベア6によ
って移送されてきた複数本の短冊状基板7を一斉に送り
込みできるように構成している。
FIG. 5 shows a conventional chip dividing device for a strip-shaped substrate in a chip component substrate. In FIG. 5, reference numeral 6 denotes a strip formed by forming division grooves 3 for dividing individual pieces at appropriate intervals. A plurality of substrate-like substrates 7 are transported in a state of being arranged in parallel in the longitudinal direction thereof. A large-diameter roller 8 and a small-diameter roller 8 Rollers 9 are arranged parallel to each other, and both rollers 8, 9 are marked with arrows A, B
By rotating in the opposite directions as shown by,
A plurality of strip-shaped substrates 7 transferred by the transfer conveyor 6 can be simultaneously fed between the rollers 8 and 9.

【0005】上記構成において、移送コンベア6の上面
に、複数本の短冊状基板7を平行に並べ、この移送コン
ベア6を両ローラ8,9に向けて移送すると、複数本の
短冊状基板7は、その先端から両ローラ8,9の間に引
き込まれ、そしてこの大径のローラ8と小径のローラ9
とによって挟圧されることになるため、個片分割用の分
割溝3の箇所において各チップ部品4ごとに分割される
ものである。この場合、大径のローラ8と小径のローラ
9とによる分割の設定条件は、製品となるチップ部品4
が正常に分割されるような条件となっている。
In the above configuration, a plurality of strip-shaped substrates 7 are arranged in parallel on the upper surface of the transfer conveyor 6, and when the transfer conveyor 6 is transferred toward both rollers 8 and 9, the plurality of strip-shaped substrates 7 become , Which is drawn between the rollers 8 and 9 from the tip thereof, and the large-diameter roller 8 and the small-diameter
Therefore, each chip component 4 is divided at the location of the dividing groove 3 for dividing an individual piece. In this case, the setting conditions for the division by the large-diameter roller 8 and the small-diameter roller 9 are as follows.
Is normally split.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、上記従
来のチップ部品用基板は、図4に示すように、ハンドリ
ングなどのために設けられたダミー部5の寸法Cが製品
となるチップ部品4の寸法Dよりもかなり大きいため、
この図4に示すチップ部品用基板を用いて、製品となる
チップ部品4が正常に分割されるように設定された条件
で個片分割を行った場合、図6に示すように、ダミー部
5と製品となるチップ部品4との間の分割形状が、製品
となるチップ部品4,4間のように断面が略長方形とな
る正常な分割形状とはならずに、大きなバリを有する異
常な分割形状となってしまい、その結果、ダミー部5側
に位置するチップ部品4が製品としては使用できないよ
うな形状となってしまうという課題を有していた。
However, as shown in FIG. 4, in the conventional chip component substrate, as shown in FIG. 4, the dimension C of the dummy portion 5 provided for handling or the like is the same as the dimension of the chip component 4 to be a product. Because it is much larger than D,
When using the chip component substrate shown in FIG. 4 to divide individual pieces under the conditions set so that the chip component 4 to be a product is normally divided, as shown in FIG. The divided shape between the chip component 4 and the product does not become a normal divided shape having a substantially rectangular cross section as between the chip components 4 and 4 as the product, but an abnormal division having large burrs. As a result, there is a problem that the chip component 4 located on the side of the dummy portion 5 has a shape that cannot be used as a product.

【0007】本発明は上記従来の課題を解決するもの
で、製品となるチップ部品の分割形状がすべて正常な分
割形状となるチップ部品用基板を提供することを目的と
するものである。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a chip component substrate in which all divided shapes of a chip component to be a product have a normal divided shape.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するため
に、本発明は以下の構成を有する。
In order to achieve the above object, the present invention has the following arrangement.

【0009】本発明の請求項1に記載の発明は、1次分
割用の分割溝を適宜間隔で形成するとともに、この1次
分割用の分割溝と略直交する個片分割用の分割溝を適宜
間隔で形成してなるチップ部品用基板において、前記個
片分割用の分割溝で分割されて製品となる複数のチップ
部品における最外側のチップ部品の外側に位置して、前
記チップ部品の個片分割用の分割溝で分割される分割寸
法よりも大きい寸法を有する第1のダミー部を設けると
ともに、この第1のダミー部の外側に第2のダミー部を
設けたもので、この構成によれば、個片分割用の分割溝
で分割されて製品となる複数のチップ部品における最外
側のチップ部品の外側に位置して、前記チップ部品の個
片分割用の分割溝で分割される分割寸法よりも大きい寸
法を有する第1のダミー部を設けるとともに、この第1
のダミー部の外側に第2のダミー部を設けているため、
第1のダミー部とその外側に設けた第2のダミー部との
間は異常な分割形状となるものの、第1のダミー部と製
品となるチップ部品との間は正常な分割形状とすること
ができるという作用効果が得られるものである。
According to the first aspect of the present invention, the primary dividing grooves are formed at appropriate intervals, and the individual dividing grooves which are substantially orthogonal to the primary dividing grooves are formed. In the chip component substrate formed at an appropriate interval, the chip component is located outside the outermost chip component in a plurality of chip components which are divided by the division grooves for dividing into individual pieces and are products. A first dummy portion having a dimension larger than the division dimension divided by the one-way division groove is provided, and a second dummy portion is provided outside the first dummy portion. According to this, the division is performed by the division groove for dividing the chip component, which is located outside the outermost chip component of the plurality of chip components divided into the product by the division groove for dividing the chip component. A first having a dimension greater than the dimension Provided with Mie portion, the first
Since the second dummy portion is provided outside the dummy portion of
An abnormally divided shape is formed between the first dummy portion and the second dummy portion provided outside the first dummy portion, but a normally divided shape is formed between the first dummy portion and a chip component to be a product. This has the effect of being able to achieve

【0010】[0010]

【発明の実施の形態】以下、本発明の請求項1に記載の
発明について、一実施の形態を用いて説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the first embodiment of the present invention will be described with reference to an embodiment.

【0011】図1は本発明の一実施の形態におけるチッ
プ部品用基板の正面図である。この図1において、11
はチップ部品用基板で、このチップ部品用基板11には
1次分割用の分割溝12を適宜間隔で形成するととも
に、この1次分割用の分割溝12と略直交する個片分割
用の分割溝13を適宜間隔で形成している。14は製品
となるチップ部品で、このチップ部品14はチップ抵抗
器を一例としている。15は前記個片分割用の分割溝1
3で分割されて製品となる複数のチップ部品14におけ
る最外側のチップ部品14の外側に位置して設けた製品
として使用しない第1のダミー部で、この第1のダミー
部15の寸法Eは、製品となるチップ部品14の個片分
割用の分割溝13で分割される分割寸法Fよりも大きい
寸法としている。この場合、この第1のダミー部15の
寸法Eは、個片分割後の選別工数を考慮すると、チップ
部品14の製品寸法交差よりも大きくすることが望まし
く、また分割の形状を考慮した場合、チップ部品14の
製品寸法交差の1.4倍よりも小さい寸法とすることが
望ましい。16は前記第1のダミー部15の外側に設け
た製品として使用しない第2のダミー部で、この第2の
ダミー部16の寸法Gは、第1のダミー部15の寸法E
よりも大きい寸法としている。
FIG. 1 is a front view of a chip component substrate according to an embodiment of the present invention. In FIG. 1, 11
Is a substrate for chip components. The substrate 11 for chip components has division grooves 12 for primary division formed at appropriate intervals, and divisions for individual division substantially orthogonal to the division grooves 12 for primary division. The grooves 13 are formed at appropriate intervals. A chip component 14 is a product, and the chip component 14 is an example of a chip resistor. 15 is a dividing groove 1 for dividing the individual pieces.
The first dummy part 15 which is not used as a product provided outside the outermost chip part 14 among the plurality of chip parts 14 which are divided into three and becomes a product, has a dimension E of the first dummy part 15. The dimension is larger than the division dimension F divided by the division groove 13 for dividing the chip component 14 as a product into individual pieces. In this case, it is desirable that the dimension E of the first dummy portion 15 be larger than the product dimension intersection of the chip component 14 in consideration of the number of steps after the individual division, and when the division shape is considered, It is desirable that the dimension be smaller than 1.4 times the product dimension intersection of the chip component 14. Reference numeral 16 denotes a second dummy section provided outside the first dummy section 15 and not used as a product. The dimension G of the second dummy section 16 is equal to the dimension E of the first dummy section 15.
The size is larger than

【0012】図2は本発明の一実施の形態を示すチップ
部品用基板における短冊状基板のチップ分割装置の正面
図である。
FIG. 2 is a front view of an apparatus for dividing a strip-shaped substrate in a chip component substrate according to an embodiment of the present invention.

【0013】図2において、17は個片分割用の分割溝
13を適宜間隔で形成してなる短冊状基板18の複数本
を、その長手方向に平行に並べた状態で移送するように
した移送コンベアで、この移送コンベア17における移
送方向に向かう前方の部位には、大径のローラ19と小
径のローラ20とを互いに平行にして配設し、そしてこ
れら両ローラ19,20を矢印H,Iで示すように互い
に逆方向に回転駆動することにより、これら両ローラ1
9,20の間に、移送コンベア17によって移送されて
きた複数本の短冊状基板18を一斉に送り込みできるよ
うに構成している。
In FIG. 2, reference numeral 17 denotes a transfer for transferring a plurality of strip-shaped substrates 18 in which division grooves 13 for dividing the individual pieces are formed at appropriate intervals in a state of being arranged in parallel in the longitudinal direction. On the conveyor, a large-diameter roller 19 and a small-diameter roller 20 are disposed in parallel with each other at a position in front of the transfer conveyor 17 in the transfer direction. The two rollers 1 are driven by rotating in opposite directions as shown in FIG.
A plurality of strip-shaped substrates 18 transferred by the transfer conveyor 17 can be sent at a time between 9 and 20.

【0014】上記構成において、移送コンベア17の上
面に、複数本の短冊状基板18を平行に並べ、この移送
コンベア17を両ローラ19,20に向けて移送する
と、複数本の短冊状基板18は、その先端から両ローラ
19,20の間に引き込まれ、そしてこの大径のローラ
19と小径のローラ20とによって挟圧されることにな
るため、個片分割用の分割溝13の箇所において各チッ
プ部品14ごとに分割されるものである。この場合、大
径のローラ19と小径のローラ20とによる分割の設定
条件は、製品となるチップ部品14が正常に分割される
ような条件となっている。
In the above configuration, a plurality of strip-shaped substrates 18 are arranged in parallel on the upper surface of the transfer conveyor 17, and when the transfer conveyor 17 is transferred toward both the rollers 19 and 20, the plurality of strip-shaped substrates 18 become Is drawn from the leading end between the two rollers 19 and 20 and is nipped by the large-diameter roller 19 and the small-diameter roller 20. It is divided for each chip component 14. In this case, the setting condition of division by the large-diameter roller 19 and the small-diameter roller 20 is such that the chip component 14 as a product is normally divided.

【0015】上記した図1に示すチップ部品用基板11
を用いて、製品となるチップ部品14が正常に分割され
るように設定された条件で図2に示すチップ分割装置に
より個片分割を行った場合、図3に示すように、第1の
ダミー部15と第2のダミー部16との間の分割形状は
大きなバリを有する異常な分割形状となるが、第1のダ
ミー部15と製品となるチップ部品14との間の分割形
状は、第1のダミー部15の寸法Eを製品となるチップ
部品14の分割寸法Fよりも大きい寸法としているもの
の、両者の寸法差は小さいため、断面が略長方形となる
ほぼ正常な分割形状とすることができるものである。
The chip component substrate 11 shown in FIG.
When the chip division device shown in FIG. 2 divides an individual piece under the conditions set so that the chip component 14 as a product is normally divided by using the first dummy, as shown in FIG. The division shape between the portion 15 and the second dummy portion 16 is an abnormal division shape having large burrs, but the division shape between the first dummy portion 15 and the chip component 14 which is a product is Although the dimension E of the dummy portion 15 is larger than the division dimension F of the chip component 14 to be a product, the difference between the two is small, so that a substantially normal division shape having a substantially rectangular cross section is required. You can do it.

【0016】なお、上記本発明の一実施の形態において
は、第1のダミー部15の寸法Eを製品となるチップ部
品14の分割寸法Fよりも大きい寸法としているが、第
1のダミー部15が製品として構成されないようにすれ
ば、第1のダミー部15の寸法Eと製品となるチップ部
品14の分割寸法Fを同じ寸法にしても本発明の一実施
の形態と同様の効果が得られる。しかしながら、この場
合は、第1のダミー部15と製品となるチップ部品14
の選別が、個片分割後の工程で抵抗値を測定することに
よってしかできず、しかも1次分割用の分割溝13で分
割された1本の短冊状基板18に少なくとも1個は製品
とならない同形状のものが構成されることになるため、
選別工数が増大するものである。また第1のダミー部1
5の寸法Eを製品となるチップ部品14の分割寸法Fよ
りも小さい寸法とすることによっても本発明の一実施の
形態と同様の効果が得られるが、この場合も選別工数が
増大するものである。
In the above-described embodiment of the present invention, the dimension E of the first dummy section 15 is larger than the division dimension F of the chip component 14 as a product. Is not configured as a product, the same effect as in the embodiment of the present invention can be obtained even if the dimension E of the first dummy portion 15 and the division size F of the chip component 14 to be a product are the same. . However, in this case, the first dummy portion 15 and the chip component
Can be selected only by measuring the resistance value in the step after the division into individual pieces, and at least one of the strip-shaped substrates 18 divided by the division groove 13 for the primary division does not become a product. Since the same shape will be configured,
This increases the number of sorting steps. Also, the first dummy unit 1
The same effect as in the embodiment of the present invention can be obtained by making the dimension E of 5 smaller than the division dimension F of the chip component 14 to be a product, but also in this case, the number of sorting steps is increased. is there.

【0017】これに対し、本発明の一実施の形態におい
ては、第1のダミー部15の寸法Eを製品となるチップ
部品14の分割寸法Fよりも大きい寸法とで、かつチッ
プ部品14の製品寸法公差よりも大きい寸法としている
ため、ふるいなどによってダミーの選別が容易に行える
という効果を有するものである。
On the other hand, in one embodiment of the present invention, the size E of the first dummy portion 15 is larger than the division size F of the chip component 14 to be a product, and the product of the chip component 14 is Since the size is set to be larger than the dimensional tolerance, there is an effect that a dummy can be easily selected by a sieve or the like.

【0018】また第2のダミー部16の寸法Gについて
は、分割が可能な寸法であれば特に制限されるものでは
ないが、製品となるチップ部品14の分割寸法Fとの関
係においては、上記した第1のダミー部15の寸法Eと
製品となるチップ部品14の分割寸法Fとの関係と同様
の理由によって、チップ部品14の分割寸法Fよりも大
きい寸法で、かつチップ部品14の製品寸法公差よりも
大きい寸法とすることが好ましい。一方、第1のダミー
部15の寸法Eとの関係においては、本発明の一実施の
形態では、第2のダミー部16の寸法Gは第1のダミー
15の寸法Eよりも大きい寸法としているが、この第2
のダミー部16はハンドリングなどのために設けられる
ものであって、製品として使用しないものであるため、
第1のダミー部15の寸法Eと同じ寸法であってもよ
く、あるいは第1のダミー部15の寸法Eよりも小さい
寸法であってもよいものである。
The dimension G of the second dummy portion 16 is not particularly limited as long as it is a dimension that can be divided. For the same reason as the relationship between the dimension E of the first dummy portion 15 and the division dimension F of the chip component 14 as a product, the dimension is larger than the division dimension F of the chip component 14 and the product dimension of the chip component 14. Preferably, the dimension is larger than the tolerance. On the other hand, in relation to the dimension E of the first dummy portion 15, the dimension G of the second dummy portion 16 is larger than the dimension E of the first dummy 15 in one embodiment of the present invention. But this second
Are provided for handling and the like, and are not used as products.
The dimension may be the same as the dimension E of the first dummy section 15, or may be smaller than the dimension E of the first dummy section 15.

【0019】[0019]

【発明の効果】以上のように本発明のチップ部品用基板
は、個片分割用の分割溝で分割されて製品となる複数の
チップ部品における最外側のチップ部品の外側に位置し
て、前記チップ部品の個片分割用の分割溝で分割される
分割寸法よりも大きい寸法を有する第1のダミー部を設
けるとともに、この第1のダミー部の外側に第2のダミ
ー部を設けているため、第1のダミー部とその外側に設
けた第2のダミー部との間は異常な分割形状となるもの
の、第1のダミー部と製品となるチップ部品との間は正
常な分割形状とすることができ、その結果、製品となる
チップ部品の分割形状はすべて正常な分割形状が得られ
るというすぐれた効果を有するものである。
As described above, the chip component substrate of the present invention is positioned outside the outermost chip component among a plurality of chip components which are divided by the dividing groove for dividing into individual pieces and are products. Since the first dummy portion having a dimension larger than the division dimension of the chip component divided by the division groove for dividing into individual pieces is provided, and the second dummy portion is provided outside the first dummy portion. An abnormally divided shape is formed between the first dummy portion and the second dummy portion provided outside the first dummy portion, but a normal divided shape is formed between the first dummy portion and a chip component as a product. As a result, the divisional shapes of the chip components to be products are all excellent in that a normal divisional shape can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態におけるチップ部品用基
板の正面図
FIG. 1 is a front view of a chip component substrate according to an embodiment of the present invention.

【図2】同チップ部品用基板における短冊状基板のチッ
プ分割装置の正面図
FIG. 2 is a front view of a chip dividing device for strip-shaped substrates in the chip component substrate.

【図3】同チップ分割装置により個片分割されたチップ
部品の分割形状を示す断面図
FIG. 3 is a cross-sectional view illustrating a divided shape of a chip component divided into individual pieces by the chip dividing apparatus.

【図4】従来のチップ部品用基板の正面図FIG. 4 is a front view of a conventional chip component substrate.

【図5】同チップ部品用基板における短冊状基板のチッ
プ分割装置の正面図
FIG. 5 is a front view of a chip dividing device for strip-shaped substrates in the chip component substrate.

【図6】同チップ分割装置により個片分割されたチップ
部品の分割形状を示す断面図
FIG. 6 is a cross-sectional view showing a divided shape of a chip component divided by the chip dividing apparatus.

【符号の説明】[Explanation of symbols]

11 チップ部品用基板 12 1次分割用の分割溝 13 個片分割用の分割溝 14 チップ部品 15 第1のダミー部 16 第2のダミー部 DESCRIPTION OF SYMBOLS 11 Substrate for chip components 12 Divided groove for primary division 13 Divided groove for division into 14 pieces 14 Chip component 15 First dummy part 16 Second dummy part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 1次分割用の分割溝を適宜間隔で形成す
るとともに、この1次分割用の分割溝と略直交する個片
分割用の分割溝を適宜間隔で形成してなるチップ部品用
基板において、前記個片分割用の分割溝で分割されて製
品となる複数のチップ部品における最外側のチップ部品
の外側に位置して、前記チップ部品の個片分割用の分割
溝で分割される分割寸法よりも大きい寸法を有する第1
のダミー部を設けるとともに、この第1のダミー部の外
側に第2のダミー部を設けたチップ部品用基板。
1. A chip component comprising: dividing grooves for primary division formed at appropriate intervals; and dividing grooves for dividing individual pieces substantially orthogonal to the dividing grooves for primary division formed at appropriate intervals. In the substrate, the plurality of chip components that are divided by the division grooves for dividing the individual pieces are located outside the outermost chip components of the plurality of chip components, and are divided by the division grooves for dividing the chip components into individual pieces. A first having a dimension greater than the split dimension
And a chip component substrate provided with a second dummy portion outside the first dummy portion.
JP2001056508A 2001-03-01 2001-03-01 Substrate for chip Pending JP2002260906A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001056508A JP2002260906A (en) 2001-03-01 2001-03-01 Substrate for chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001056508A JP2002260906A (en) 2001-03-01 2001-03-01 Substrate for chip

Publications (1)

Publication Number Publication Date
JP2002260906A true JP2002260906A (en) 2002-09-13

Family

ID=18916525

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001056508A Pending JP2002260906A (en) 2001-03-01 2001-03-01 Substrate for chip

Country Status (1)

Country Link
JP (1) JP2002260906A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002292619A (en) * 2001-03-30 2002-10-09 Kyocera Corp Ceramic base plate having split grooves

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5825008U (en) * 1981-08-10 1983-02-17 ロ−ム株式会社 Ceramic substrate for chip resistors
JPS6045091A (en) * 1983-08-22 1985-03-11 ロ−ム株式会社 Thick film printing method
JPH01276603A (en) * 1988-04-27 1989-11-07 Rohm Co Ltd Formation of electrode film in small electronic component
JPH05136534A (en) * 1991-11-13 1993-06-01 Matsushita Electric Ind Co Ltd Insulating board for electronic part
JPH0732901U (en) * 1993-11-29 1995-06-16 京セラ株式会社 Chip electronic component substrate

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5825008U (en) * 1981-08-10 1983-02-17 ロ−ム株式会社 Ceramic substrate for chip resistors
JPS6045091A (en) * 1983-08-22 1985-03-11 ロ−ム株式会社 Thick film printing method
JPH01276603A (en) * 1988-04-27 1989-11-07 Rohm Co Ltd Formation of electrode film in small electronic component
JPH05136534A (en) * 1991-11-13 1993-06-01 Matsushita Electric Ind Co Ltd Insulating board for electronic part
JPH0732901U (en) * 1993-11-29 1995-06-16 京セラ株式会社 Chip electronic component substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002292619A (en) * 2001-03-30 2002-10-09 Kyocera Corp Ceramic base plate having split grooves
JP4683752B2 (en) * 2001-03-30 2011-05-18 京セラ株式会社 Ceramic substrate having dividing grooves

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