JP2002252235A - Resin paste for semiconductor and semiconductor device using it - Google Patents

Resin paste for semiconductor and semiconductor device using it

Info

Publication number
JP2002252235A
JP2002252235A JP2001049527A JP2001049527A JP2002252235A JP 2002252235 A JP2002252235 A JP 2002252235A JP 2001049527 A JP2001049527 A JP 2001049527A JP 2001049527 A JP2001049527 A JP 2001049527A JP 2002252235 A JP2002252235 A JP 2002252235A
Authority
JP
Japan
Prior art keywords
semiconductor
resin
resin paste
paste
adhesive strength
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001049527A
Other languages
Japanese (ja)
Inventor
Naoya Kanamori
直哉 金森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Bakelite Co Ltd
Original Assignee
Sumitomo Bakelite Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Bakelite Co Ltd filed Critical Sumitomo Bakelite Co Ltd
Priority to JP2001049527A priority Critical patent/JP2002252235A/en
Publication of JP2002252235A publication Critical patent/JP2002252235A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Die Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a resin paste for semiconductor having high adhesive strength and high solder crack resistance with low elasticity modulus when heated, which does not generate characteristic defectives of IC and the like due to chip cracks and warpage, even in the case of combination of a large sized chip of IC and the like and, a lead frame and the like with a large coefficient of linear expansion, and does not deteriorate adhesive strength when heated after moisture absorption. SOLUTION: This resin paste for semiconductor is made of (A) thermosetting resin and (B) filler, which has shearing bond strength of more than 2 MPa at 260 deg.C after leaving it for 72 hours under high temperature and high humidity of 85$0C, 85% and, modulus of elasticity being less than 100 MPa at 260 deg.C.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はIC、LSI等の半導体
素子を金属フレーム等に接着する半導体用樹脂ペースト
に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin paste for a semiconductor for bonding a semiconductor element such as an IC or an LSI to a metal frame or the like.

【0002】[0002]

【従来の技術】エレクトロニクス業界の最近の著しい発
展により、トランジスター、IC、LSI、超LSIと進化して
きており、これら半導体素子における回路の集積度が急
激に増大すると共に大量生産が可能となり、これらを用
いた半導体製品の普及に伴って、その量産における作業
性の向上並びにコストダウンが重要な問題となってき
た。従来は半導体素子を金属フレームなどの導体にAu-S
i共晶法により接合し、次いでハーメチックシールによ
って封止して、半導体製品とするのが普通であった。し
かし量産時の作業性、コストの面より樹脂封止法が開発
され、現在は一般化されている。これに伴い、マウント
工程におけるAu-Si共晶法の改良としてハンダ材料や半
導体用樹脂ペーストによる方法が取り上げられるように
なった。
2. Description of the Related Art Recent remarkable developments in the electronics industry have evolved into transistors, ICs, LSIs, and ultra-LSIs. The integration of circuits in these semiconductor devices has rapidly increased, and mass production has become possible. With the spread of used semiconductor products, improvement of workability and cost reduction in mass production have become important issues. Conventionally, semiconductor elements were replaced with Au-S
In general, they were joined by an eutectic method and then sealed by a hermetic seal to obtain a semiconductor product. However, a resin encapsulation method has been developed in view of workability and cost during mass production, and is now common. Along with this, methods using solder materials and resin pastes for semiconductors have come to be taken up as an improvement of the Au-Si eutectic method in the mounting process.

【0003】しかし、ハンダ法では信頼性が低いこと、
素子の電極の汚染を起こしやすいこと等が欠点とされ、
高熱伝導性を要するパワートランジスター、パワーICの
素子に使用が限られている。これに対し、半導体用樹脂
ペーストはハンダ法に較べ、作業性においても信頼性等
においても優れており、その需要が急激に増大してい
る。
However, the solder method has low reliability,
The disadvantage is that the electrode of the element is easily contaminated, etc.
Its use is limited to power transistors and power IC elements that require high thermal conductivity. On the other hand, resin paste for semiconductors is superior in workability and reliability as compared with the solder method, and the demand for the paste is rapidly increasing.

【0004】さらに近年、IC等の集積度の高密度化によ
り、チップが大型化してきている。一方、従来用いられ
てきたリードフレームである42合金フレームが高価な
ことより、コストダウンの目的から銅フレームが用いら
れるようになってきた。ここでIC等のチップの大きさが
約4〜5mm角より大きくなると、IC等の組立工程での
加熱により、マウント法としてAu-Si共晶法を用いる
と、チップの熱膨張率と銅フレームの熱膨張率との差か
らチップのクラックや反りによる特性不良が問題となっ
てきている。
Further, in recent years, chips have been increased in size due to an increase in the degree of integration of ICs and the like. On the other hand, a copper frame has come to be used for the purpose of cost reduction because the 42 alloy frame which is a lead frame conventionally used is expensive. Here, when the size of a chip such as an IC becomes larger than about 4 to 5 mm square, the Au-Si eutectic method is used as a mounting method due to heating in the assembling process of the IC or the like. From the coefficient of thermal expansion, there is a problem of poor characteristics due to cracks and warpage of the chip.

【0005】即ちこれは、チップの材料であるシリコン
等の熱膨張率が3×10-5℃であるのに対し、42合金
フレームは8×10-5℃であるが、銅フレームでは20
×10-5と大きくなる為である。これに対し、マウント
法としてマウント用樹脂を用いることが考えられるが、
従来の半導体用樹脂ペーストでは弾性率が高く、チップ
と銅フレームとの歪を吸収するには至らなかった。
That is, while the thermal expansion coefficient of silicon or the like, which is the material of the chip, is 3 × 10 -5 ° C., that of the 42 alloy frame is 8 × 10 -5 ° C., whereas that of the copper frame is 20 × 10 -5 ° C.
× is because as large as 10-5. On the other hand, it is conceivable to use a mounting resin as the mounting method,
The conventional resin paste for semiconductors has a high modulus of elasticity and has not been able to absorb the distortion between the chip and the copper frame.

【0006】他方、電子機器の小型軽量化、高機能化の
動向に対応して、半導体パッケージの小型化、薄型化、
狭ピッチ化が益々加速する中、半導体用樹脂ペーストに
は、エポキシ樹脂成形材料による封止成形後の半導体パ
ッケージの信頼性に関係する吸湿処理後の耐半田クラッ
ク性や耐湿性の向上が強く求められている。信頼性の向
上には半導体チップとリードフレームが接着しているこ
とが必要であるが、従来の低弾性率化した半導体用樹脂
ペーストでは、リードフレームや半導体チップと半導体
用樹脂ペーストとの密着性が低下し、パッケージ信頼性
が期待した程には向上しないといった問題があった。こ
のため吸湿処理を行った後の熱時接着強度を高くした半
導体用樹脂ペーストが提案されている(特開2000−
265144号公報)。
On the other hand, in response to the trend toward smaller and lighter electronic devices and higher functionality, semiconductor packages have become smaller and thinner.
As the pitch becomes increasingly narrow, resin pastes for semiconductors are required to improve solder cracking resistance and moisture resistance after moisture absorption, which is related to the reliability of semiconductor packages after encapsulation with epoxy resin molding materials. Have been. To improve reliability, it is necessary that the semiconductor chip and the lead frame adhere to each other. However, the conventional low-modulus resin paste for semiconductors requires the adhesiveness between the lead frame or semiconductor chip and the resin paste for semiconductor. And the package reliability does not improve as expected. For this reason, a resin paste for semiconductor has been proposed in which the adhesive strength at the time of heat after the moisture absorption treatment is increased (Japanese Patent Application Laid-Open No. 2000-2000).
265144).

【0007】しかし、最近の環境問題から、半導体パッ
ケージを基盤に実装する際のPb-Sn共晶半田中のPbが問
題となり、Pbを使用しない半田が使われる傾向になって
きている。Pbレス半田は従来のPb-Sn共晶半田に比べて
融点が高いため、Pbレス半田を用いる場合は半導体パッ
ケージを基盤に実装する際の半田リフロー温度を上昇さ
せることが必要となる。具体的には従来のPb-Sn共晶半
田では235℃程度で半田リフローを行っていたが、Pb
レス半田では260℃以上が必要である。この半田リフ
ロー温度の上昇に伴い半導体パッケージに要求される耐
半田クラック性もさらに厳しくなり、従来の半田リフロ
ー条件での耐半田クラック性で問題のなかった半導体用
樹脂ペーストも、Pbレス半田に対応した半田リフロー条
件では不良が発生し、更なる信頼性の向上が求められて
いた。
[0007] However, due to recent environmental problems, Pb in Pb-Sn eutectic solder when mounting a semiconductor package on a substrate has become a problem, and there has been a tendency to use solder that does not use Pb. Since Pb-less solder has a higher melting point than conventional Pb-Sn eutectic solder, when using Pb-less solder, it is necessary to increase the solder reflow temperature when mounting a semiconductor package on a substrate. Specifically, in the conventional Pb-Sn eutectic solder, solder reflow was performed at about 235 ° C.
260 ° C. or higher is required for solderless. With the rise in solder reflow temperature, the solder crack resistance required for semiconductor packages has become more severe, and resin paste for semiconductors, which had no problem with solder crack resistance under conventional solder reflow conditions, is now compatible with Pb-less solder Under the solder reflow conditions described above, defects occurred, and further improvement in reliability was required.

【0008】[0008]

【発明が解決しようとする課題】本発明の目的は、IC等
の大型チップと線膨張係数の大きいリードフレーム等の
組合せでもチップクラックや反りによるIC等の特性不良
が起こらず、吸湿後の熱時接着強度が低下しない、高接
着強度且つ低熱時弾性率の高耐半田クラック性を有する
半導体用樹脂ペーストを提供することにある。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device having a large chip such as an IC and a lead frame having a large coefficient of linear expansion, without causing characteristic defects such as an IC due to chip cracks or warpage and preventing heat after moisture absorption. It is an object of the present invention to provide a resin paste for semiconductors having a high adhesive strength, a low elastic modulus at the time of heat, and a high solder crack resistance, which does not lower the adhesive strength at the time.

【0009】[0009]

【課題を解決するための手段】(A)熱硬化性樹脂と
(B)フィラーからなる半導体樹脂ペーストであり、8
5℃、85%の高温高湿度下に72時間放置した後の2
60℃における剪断接着強度が2MPa以上で且つ26
0℃における弾性率が100MPa以下である半導体用
樹脂ペーストである。更に好ましい形態としては、半導
体用樹脂ペーストが銅リードフレームと半導体チップの
接続に用いられる半導体用樹脂ペーストである。また、
上記の半導体用樹脂ペーストを用いて製作された半導体
装置である。
A semiconductor resin paste comprising (A) a thermosetting resin and (B) a filler;
After leaving for 72 hours at 5 ° C, 85% high temperature and high humidity, 2
The shear adhesive strength at 60 ° C. is 2 MPa or more and 26
It is a resin paste for semiconductors having an elastic modulus at 0 ° C. of 100 MPa or less. In a more preferred embodiment, the resin paste for semiconductor is a resin paste for semiconductor used for connecting a copper lead frame and a semiconductor chip. Also,
A semiconductor device manufactured using the above-mentioned resin paste for a semiconductor.

【0010】[0010]

【発明の実施の形態】本発明に用いる熱硬化性樹脂
(A)は、樹脂、硬化剤、硬化促進剤等からなる一般的
な熱硬化性樹脂であり、特に限定されるものではないが
ペーストを形成する材料であることから室温で液状であ
ることが望ましい。
BEST MODE FOR CARRYING OUT THE INVENTION The thermosetting resin (A) used in the present invention is a general thermosetting resin comprising a resin, a curing agent, a curing accelerator, and the like. Is desirable to be liquid at room temperature.

【0011】熱硬化性樹脂(A)の例としては、液状の
シアネート樹脂、液状のエポキシ樹脂、ラジカル重合性
の各種アクリル樹脂、アリール基を有するトリアリール
イソシアヌレートなどが挙げることができる。液状のエ
ポキシ樹脂としては、例えば、ビスフェノールA型エポ
キシ樹脂、ビスフェノールF型エポキシ樹脂、ビスフェ
ノールE型エポキシ樹脂、脂環式エポキシ樹脂、脂肪族
エポキシ樹脂、グリシジルアミン型の液状エポキシ樹脂
等をあげることができる。中でもエポキシ樹脂、アクリ
ル樹脂が接着強度の点より好ましい。
Examples of the thermosetting resin (A) include liquid cyanate resin, liquid epoxy resin, various radically polymerizable acrylic resins, and triaryl isocyanurate having an aryl group. Examples of the liquid epoxy resin include bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol E type epoxy resin, alicyclic epoxy resin, aliphatic epoxy resin, and glycidylamine type liquid epoxy resin. it can. Among them, epoxy resin and acrylic resin are preferable from the viewpoint of adhesive strength.

【0012】シアネート樹脂の硬化触媒としては、例え
ば、銅アセチルアセトナート、亜鉛アセチルアセトナー
ト等の金属錯体が挙げられる。エポキシ樹脂の硬化剤と
しては、例えば、フェノール樹脂、脂肪族アミン、芳香
族アミン、ジシアンジアミド、ジカルボン酸ジヒドラジ
ド化合物等が例として挙げられる。ジヒドラジド化合物
の例としては、アジピン酸ジヒドラジド、ドデカン酸ジ
ヒドラジド、イソフタル酸ジヒドラジド、P−オキシ安
息香酸ジヒドラジド等のカルボン酸ジヒドラジドなどが
挙げられる。
Examples of the curing catalyst for the cyanate resin include metal complexes such as copper acetylacetonate and zinc acetylacetonate. Examples of the epoxy resin curing agent include a phenol resin, an aliphatic amine, an aromatic amine, dicyandiamide, and a dicarboxylic acid dihydrazide compound. Examples of the dihydrazide compound include carboxylic acid dihydrazides such as adipic dihydrazide, dodecanoic dihydrazide, isophthalic dihydrazide, and P-oxybenzoic dihydrazide.

【0013】硬化促進剤兼硬化剤としては、エポキシ樹
脂では例えば、各種のイミダゾール化合物があり、その
例としては、2−メチルイミダゾール、2−エチルイミ
ダゾール、2−フェニル−4−メチル−5−ヒドロキシ
メチルイミダゾール、2−C 1123−イミダゾール等の
一般的なイミダゾールやトリアジンやイソシアヌル酸を
付加し、保存安定性を付与した2,4−ジアミノ−6−
[2−メチルイミダゾール−(1)] −エチル−S−トリ
アジン、またそのイソシアネート付加物等があり、これ
らは何れも1種類あるいは複数種併用して使うことが可
能である。
As the curing accelerator and curing agent, epoxy resin
In fats, for example, there are various imidazole compounds,
Examples include 2-methylimidazole, 2-ethylimidazole
Dazol, 2-phenyl-4-methyl-5-hydroxy
Methyl imidazole, 2-C 11Htwenty three-Such as imidazole
Common imidazole, triazine and isocyanuric acid
2,4-diamino-6-added to give storage stability
[2-methylimidazole- (1)]-ethyl-S-tri
Azine and its isocyanate adducts
Can be used alone or in combination.
Noh.

【0014】本発明においては、室温で固体の熱硬化性
樹脂の特性低下が起きない程度に混合して用いることも
可能である。エポキシ樹脂では例えば、ビスフェノール
A、ビスフェノールF、フェノールノボラック、クレゾ
ールノボラック類とエピクロルヒドリンとの反応により
得られるポリグリシジルエーテル、ブタンジオールジグ
リシジルエーテル、ネオペンチルグリコールジグリシジ
ルエーテル等の脂肪族エポキシ、ジグリシジルヒダント
イン等の複素環式エポキシ、ビニルシクロヘキセンジオ
キサイド、ジシクロペンタジエンジオキサイド、アリサ
イクリックジエポキシ−アジペイトのような脂環式エポ
キシがあり、これらの内1種類あるいは複数種と併用可
能である。
In the present invention, it is also possible to mix the thermosetting resins which are solid at room temperature to such an extent that the properties do not deteriorate. Epoxy resins include, for example, aliphatic epoxies such as bisphenol A, bisphenol F, phenol novolak, polyglycidyl ether, butanediol diglycidyl ether, and neopentyl glycol diglycidyl ether obtained by reacting cresol novolaks with epichlorohydrin, and diglycidyl hydantoin. And alicyclic epoxies such as vinylcyclohexene dioxide, dicyclopentadiene dioxide, and alicyclic diepoxy-adipate. These can be used in combination with one or more of these.

【0015】本発明に用いるフィラー(B)には、無機
フィラーと有機フィラーとがある。無機フィラーとして
は、例えば、金粉、銀粉、銅粉、アルミニウム粉等の金
属粉や、溶融シリカ、結晶シリカ、窒化珪素、アルミ
ナ、窒化アルミ、タルク等がある。有機フィラーとして
は、例えば、シリコーン樹脂、ポリテトラフロロエチレ
ン等のフッ素樹脂、ポリメチルメタクリレート等のアク
リル樹脂、ベンゾグアナミンやメラミンとホルムアルデ
ヒドとの架橋物等がある。この内、金属粉は主に導電性
や熱伝導性を付与するために用いられる。
The filler (B) used in the present invention includes an inorganic filler and an organic filler. Examples of the inorganic filler include metal powder such as gold powder, silver powder, copper powder, and aluminum powder, fused silica, crystalline silica, silicon nitride, alumina, aluminum nitride, and talc. Examples of the organic filler include a silicone resin, a fluorine resin such as polytetrafluoroethylene, an acrylic resin such as polymethyl methacrylate, and a crosslinked product of benzoguanamine or melamine with formaldehyde. Among them, the metal powder is mainly used for imparting electrical conductivity and thermal conductivity.

【0016】使用するフィラーは、ハロゲンイオン、ア
ルカリ金属イオン等のイオン性不純物の含有量は10p
pm以下であることが好ましい。又形状としてはフレー
ク状、鱗片状、樹脂状や球状等が用いられる。必要とす
るペーストの粘度により、使用する粒径は異なるが、通
常平均粒径は0.3〜20μm、最大粒径は50μm程
度のものが好ましい。平均粒径が0.3μm未満だと粘
度が高くなり、20μmを越えると塗布又は硬化時に樹
脂分が流出し、ブリードが発生するため好ましくない。
最大粒径が50μmを越えるとディスペンサーでペース
トを塗布するときに、ニードルの出口を塞ぎ長時間の連
続使用ができない。又比較的粗いフィラーと細かいフィ
ラーとを混合して用いることもでき、種類、形状につい
ても各種のものを適宜混合してもよい。
The filler used has a content of ionic impurities such as halogen ions and alkali metal ions of 10 p.
pm or less. The shape may be a flake, scale, resin, or sphere. The particle size used varies depending on the required viscosity of the paste, but usually the average particle size is preferably 0.3 to 20 μm, and the maximum particle size is preferably about 50 μm. If the average particle size is less than 0.3 μm, the viscosity increases, and if it exceeds 20 μm, the resin component flows out during coating or curing, and bleeding occurs, which is not preferable.
If the maximum particle size exceeds 50 μm, the outlet of the needle is blocked when applying the paste with a dispenser, and continuous use cannot be performed for a long time. In addition, a mixture of a relatively coarse filler and a fine filler may be used, and various types and shapes may be appropriately mixed.

【0017】必要とされる特性を付与するために、本発
明のフィラーに、例えば、粒径が1〜100nm程度の
ナノスケールフィラー、シリカとアクリルとの複合材、
有機フィラー表面に金属コーティングを施したような有
機と無機の複合フィラー等を添加しても良い。尚、本発
明のフィラーは、予め表面をアルコキシシラン、アリロ
キシシラン、シラザン、オルガノアミノシラン等のシラ
ンカップリング剤等で処理したものを用いてもよい。
In order to impart required properties, the filler of the present invention may be, for example, a nanoscale filler having a particle size of about 1 to 100 nm, a composite material of silica and acrylic,
An organic / inorganic composite filler or the like having a metal coating on the surface of the organic filler may be added. The filler of the present invention may be one whose surface has been previously treated with a silane coupling agent such as alkoxysilane, allyloxysilane, silazane, or organoaminosilane.

【0018】本発明の半導体用樹脂ペーストを用いてリ
ードフレームにシリコンチップを接着した後、85℃、
85%の高温高湿下に72時間放置した後の260℃で
の剪断接着強度が2MPa以上であることが好ましい。
これは半導体パッケージをプリント配線基板に半田リフ
ロー接続で搭載される際に、パッケージ自体が240℃
から260℃の温度で数十秒間曝された時に、内部のペ
ースト層の接着強度が低いと先ずペースト層が剥離し、
パッケージにクラックを発生することになるので、半導
体用樹脂ペーストは吸湿後でも高温での接着強度が高い
方が半導体パッケージの信頼性の点から好ましいためで
ある。上記の条件での剪断接着強度が2MPa以上で有
れば高温半田リフロー時にペースト層の剥離が発生しな
いので好ましい。
After bonding the silicon chip to the lead frame using the resin paste for semiconductor of the present invention,
It is preferable that the shear adhesive strength at 260 ° C. after standing at 85% high temperature and high humidity for 72 hours is 2 MPa or more.
This is because when a semiconductor package is mounted on a printed wiring board by solder reflow connection, the package itself is 240 ° C.
When exposed at a temperature of 260 ° C. for several tens of seconds, if the adhesive strength of the internal paste layer is low, the paste layer first peels off,
This is because cracks are generated in the package, and therefore, it is preferable that the resin paste for a semiconductor has high adhesive strength at a high temperature even after absorbing moisture from the viewpoint of the reliability of the semiconductor package. It is preferable that the shear adhesive strength under the above conditions is 2 MPa or more, since peeling of the paste layer does not occur during high-temperature solder reflow.

【0019】銅リードフレームは線膨張係数が42アロ
イ製のリードフレームよりも大きいためシリコンチップ
との膨張係数の差が大きいので、銅フレームでの吸湿処
理後の剪断接着強度を評価することが望ましい。260
℃における熱時の弾性率は100MPa以下が望まし
い。これは、半導体素子を半導体用樹脂ペーストを用い
てリードフレームに接着後、半導体用封止樹脂を用いて
封止して作成された半導体パッケージを、吸湿処理後に
半田リフロー処理を行うと各部材の熱膨張率が異なるた
め、半導体用樹脂ペースト層に応力集中するが、半導体
用樹脂ペーストの熱時弾性率が100MPa以下では応
力を緩和できるため好ましい。100MPaを超える
と、応力を緩和しきれずに半導体用樹脂ペーストとリー
ドフレームや半導体チップの界面で剥離が発生するため
好ましくない。
Since the copper lead frame has a larger coefficient of linear expansion than the lead frame made of 42 alloy and thus has a large difference in expansion coefficient from the silicon chip, it is desirable to evaluate the shear adhesive strength of the copper frame after the moisture absorption treatment. . 260
It is desirable that the elastic modulus at the time of heating at 100C be 100 MPa or less. This is because a semiconductor package formed by bonding a semiconductor element to a lead frame using a resin paste for a semiconductor and then sealing using a sealing resin for a semiconductor is subjected to a solder reflow process after a moisture absorption process. Since the coefficients of thermal expansion are different, stress concentrates on the resin paste layer for semiconductor. However, when the elastic modulus of the resin paste for semiconductor under heat is 100 MPa or less, it is preferable because the stress can be reduced. If the pressure exceeds 100 MPa, the stress cannot be alleviated and peeling occurs at the interface between the semiconductor resin paste and the lead frame or semiconductor chip, which is not preferable.

【0020】本発明における樹脂ペーストには、必要に
より用途に応じた特性を損なわない範囲内で、シランカ
ップリング剤、チタネートカップリング剤、顔料、染
料、消泡剤、界面活性剤、溶剤等の添加剤を用いること
ができる。本発明の製造方法としては、例えば各成分を
予備混合し、三本ロール等を用いて混練してペーストを
得た後、真空下で脱泡すること等がある。
The resin paste according to the present invention may contain a silane coupling agent, a titanate coupling agent, a pigment, a dye, a defoaming agent, a surfactant, a solvent, etc., as long as the properties according to the intended use are not impaired. Additives can be used. The production method of the present invention includes, for example, premixing each component, kneading using a three roll or the like to obtain a paste, and then defoaming under vacuum.

【0021】[0021]

【実施例】本発明を実施例で具体的に説明する。各成分
の配合割合は重量部とする。 <実施例1〜5、比較例1〜5>表1に示した組成の各
成分とフィラーを配合し、三本ロールで混練して樹脂ペ
ーストを得た。この樹脂ペーストを真空チャンバーにて
2mmHgで30分間脱泡した後、以下の方法により各種の性
能を評価した。評価結果を表1に示す。
EXAMPLES The present invention will be specifically described with reference to Examples. The mixing ratio of each component is part by weight. <Examples 1 to 5, Comparative Examples 1 to 5> Each component having the composition shown in Table 1 and a filler were blended and kneaded with a three-roll mill to obtain a resin paste. Apply this resin paste in a vacuum chamber
After defoaming at 2 mmHg for 30 minutes, various performances were evaluated by the following methods. Table 1 shows the evaluation results.

【0022】[0022]

【表1】 [Table 1]

【0023】<原料成分>用いた原料成分は次のとおり
である。 ・ビスフェノールA型エポキシ樹脂;エピコート828
(油化シェルエポキシ(株)) ・フェニルグリシジルエーテル ・シアネートL−10
<Raw Materials> The raw materials used are as follows. -Bisphenol A type epoxy resin; Epicoat 828
(Yuika Shell Epoxy Co., Ltd.) Phenyl glycidyl ether Cyanate L-10

【化1】 Embedded image

【0024】・ウレタンアクリレート;M-1600(東
亜合成化学(株)) ・TAIC(日本化成(株))
Urethane acrylate; M-1600 (Toa Gosei Chemical Co., Ltd.) TAIC (Nippon Kasei Co., Ltd.)

【化2】 Embedded image

【0025】・フェノールノボラック樹脂;PH514
70(住友デュレズ(株)) ・トリフェノールメタン ・ジシアンジアミド ・ナフテン酸コバルト ・パーヘキサ3M(日本油脂(株))
Phenol novolak resin; PH514
70 (Sumitomo Durez) ・ Triphenolmethane ・ Dicyandiamide ・ Cobalt naphthenate ・ Perhexa 3M (Nippon Oil & Fats Co., Ltd.)

【化3】 Embedded image

【0026】・N-フェニル-γ-アミノプロピルトリメ
トキシシラン;KBM573(信越化学(株)) ・エポキシ化ポリブタジエン;E−1800(日本石油
化学(株)、エポキシ当量246) ・銀粉:粒径が0.1〜50μmで平均粒径3μmのフ
レーク状 ・シリカフィラー:平均粒径5μmで最大粒径20μm
のシリカフィラー
N-phenyl-γ-aminopropyltrimethoxysilane; KBM573 (Shin-Etsu Chemical Co., Ltd.) Epoxidized polybutadiene; E-1800 (Nippon Petrochemical Co., Ltd., epoxy equivalent 246) Silver powder: particle size Flakes with average particle size of 3 μm at 0.1 to 50 μm ・ Silica filler: maximum particle size of 20 μm with average particle size of 5 μm
Silica filler

【0027】<評価方法> ・粘度:E型粘度計(3°コーン)を用い25℃、2.
5rpmでの値を測定し粘度とした。 接着強度:6×6mmのシリコンチップをペーストを用
いて銅フレームにマウントし、175℃中30分間オー
ブン中で硬化した。硬化後、ポストキュア(175℃、
8時間)を行い、更に85℃、相対湿度85%、72時
間吸湿処理した後、マウント強度測定装置を用いて26
0℃での熱時ダイシェア強度を測定した。 ・弾性率:テフロン(登録商標)シート上に半導体用樹
脂ペーストを幅10mm、長さ約150mm、厚さ10
0μmに塗布し、175℃のオーブン中で30分間硬化
した後、引っ張り試験機を用いて25℃及び260℃、
試験長100mm、引っ張り速度1mm/60秒(25
℃)、10mm/60秒(260℃)で測定し、得られ
た応力−ひずみ曲線の初期勾配から弾性率を算出した。
<Evaluation method> Viscosity: 25 ° C. using an E-type viscometer (3 ° cone);
The value at 5 rpm was measured and defined as the viscosity. Adhesive strength: A 6 × 6 mm silicon chip was mounted on a copper frame using a paste and cured in an oven at 175 ° C. for 30 minutes. After curing, post cure (175 ° C,
8 hours), and after performing a moisture absorption process at 85 ° C. and a relative humidity of 85% for 72 hours, use a mount strength measuring device to perform 26 hours.
The hot die shear strength at 0 ° C. was measured. Elastic modulus: A resin paste for semiconductors on a Teflon (registered trademark) sheet is 10 mm in width, about 150 mm in length, and 10 in thickness.
After coating at 0 μm and curing in an oven at 175 ° C. for 30 minutes, using a tensile tester at 25 ° C. and 260 ° C.
Test length 100 mm, pulling speed 1 mm / 60 seconds (25
° C), 10 mm / 60 seconds (260 ° C), and the elastic modulus was calculated from the initial gradient of the obtained stress-strain curve.

【0028】・耐パッケージクラック性:6×6mmの
シリコンチップをペーストを用いて銅フレームにマウン
トし、175℃中30分間オーブン中で硬化した。これ
をエポキシ樹脂封止材料を用い、下記の条件で成形した
パッケージを85℃、相対湿度85%、168時間吸湿
処理した後、IRリフロー処理(260℃、10秒)を
行い、パッケージの断面観察により内部クラックの数を
測定して耐パッケージクラック性の指標とした。 パッケージ:80pQFP(14x20x2mm厚さ) チップサイズ:6x6mm(表面アルミ配線のみ) リードフレーム:銅 封止材の成形:175℃、2分間 ポストモールドキュアー:175℃、8時間 全パッケージ数:12個
Package crack resistance: A silicon chip of 6 × 6 mm was mounted on a copper frame using a paste and cured in an oven at 175 ° C. for 30 minutes. This was molded using an epoxy resin sealing material under the following conditions, and after a moisture absorption treatment at 85 ° C. and a relative humidity of 85% for 168 hours, an IR reflow treatment (260 ° C., 10 seconds) was performed to observe the cross section of the package. And the number of internal cracks was measured as an index of package crack resistance. Package: 80pQFP (14x20x2mm thickness) Chip size: 6x6mm (only surface aluminum wiring) Lead frame: Copper Molding of sealing material: 175 ° C, 2 minutes Post mold cure: 175 ° C, 8 hours Total number of packages: 12

【0029】実施例1〜5では吸湿前後において熱時接
着強度が優れ、さらに熱時弾性率の低いペーストが得ら
れ、耐パッケージクラック性も良好であるが、比較例1
〜5ではペーストの剪断接着強度が2MPa以上、 熱
時弾性率100MPa以下という特性の両立が図れてい
ないので耐パッケージクラック性も低い。
In Examples 1 to 5, a paste having an excellent hot adhesive strength before and after moisture absorption, a paste having a low elastic modulus during heat was obtained, and the package crack resistance was good.
In Nos. 5 to 5, the package crack resistance is low because the properties of the paste having a shear adhesive strength of 2 MPa or more and the elastic modulus under heat of 100 MPa or less are not compatible.

【0030】[0030]

【発明の効果】本発明に従うと、 IC等の大型チップと
銅フレーム等の組合せでもチップクラックや反りによる
IC等の特性不良が起こらず、熱時接着強度が高く、且つ
熱時弾性率が低い、吸湿処理後の耐半田クラック性試験
においてパッケージクラックの起こらない信頼性に優れ
た半導体用樹脂ペースト、及びこれを用いた半導体装置
が得られる。
According to the present invention, even when a large chip such as an IC is combined with a copper frame or the like, the chip cracks or warps.
A resin paste for semiconductors that does not suffer from poor properties such as ICs, has a high adhesive strength at heat, and has a low elastic modulus at heat, and has excellent reliability without package cracks in a solder cracking resistance test after moisture absorption; and A semiconductor device using this is obtained.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 (A)熱硬化性樹脂と(B)フィラーか
らなる半導体樹脂ペーストであり、85℃、85%の高
温高湿度下に72時間放置した後の260℃における剪
断接着強度が2MPa以上で且つ260℃における弾性
率が100MPa以下であることを特徴とする半導体用
樹脂ペースト。
1. A semiconductor resin paste comprising (A) a thermosetting resin and (B) a filler, which has a shear adhesive strength of 2 MPa at 260 ° C. after standing at 85 ° C. and 85% high temperature and high humidity for 72 hours. A resin paste for semiconductors having an elastic modulus at 260 ° C. of 100 MPa or less.
【請求項2】 半導体用樹脂ペーストが銅リードフレー
ムと半導体チップの接続に用いられる請求項1記載の半
導体用樹脂ペースト。
2. The resin paste for a semiconductor according to claim 1, wherein the resin paste for a semiconductor is used for connecting a copper lead frame and a semiconductor chip.
【請求項3】 請求項1記載の半導体用樹脂ペーストを
用いて製作された半導体装置。
3. A semiconductor device manufactured by using the resin paste for a semiconductor according to claim 1.
JP2001049527A 2001-02-26 2001-02-26 Resin paste for semiconductor and semiconductor device using it Pending JP2002252235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Publication Number Publication Date
JP2002252235A true JP2002252235A (en) 2002-09-06

Family

ID=18910617

Family Applications (1)

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Country Status (1)

Country Link
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004179275A (en) * 2002-11-26 2004-06-24 Sumitomo Bakelite Co Ltd Semiconductor device
JP2004186525A (en) * 2002-12-05 2004-07-02 Sumitomo Bakelite Co Ltd Area package type semiconductor device
JP2005226049A (en) * 2004-02-16 2005-08-25 Hitachi Chem Co Ltd Circuit-joining material, film-formed circuit-joining material by using the same, joining structure of circuit member and method for producing the same
JP2009164500A (en) * 2008-01-10 2009-07-23 Sumitomo Bakelite Co Ltd Adhesive, and semiconductor package
JP5888466B2 (en) * 2013-02-21 2016-03-22 日本化成株式会社 Crosslinking aids and their applications
JP2016074845A (en) * 2014-10-08 2016-05-12 ナミックス株式会社 Encapsulant composition and semiconductor device using the same
WO2016042415A3 (en) * 2014-09-17 2016-05-26 日本ゼオン株式会社 Curable resin composition, curable resin molded article, cured product, laminate, complex, and multi-layer printed circuit board

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004179275A (en) * 2002-11-26 2004-06-24 Sumitomo Bakelite Co Ltd Semiconductor device
JP2004186525A (en) * 2002-12-05 2004-07-02 Sumitomo Bakelite Co Ltd Area package type semiconductor device
JP2005226049A (en) * 2004-02-16 2005-08-25 Hitachi Chem Co Ltd Circuit-joining material, film-formed circuit-joining material by using the same, joining structure of circuit member and method for producing the same
JP4655488B2 (en) * 2004-02-16 2011-03-23 日立化成工業株式会社 Circuit connection material, film-like circuit connection material using the same, circuit member connection structure, and manufacturing method thereof
JP2009164500A (en) * 2008-01-10 2009-07-23 Sumitomo Bakelite Co Ltd Adhesive, and semiconductor package
JP5888466B2 (en) * 2013-02-21 2016-03-22 日本化成株式会社 Crosslinking aids and their applications
WO2016042415A3 (en) * 2014-09-17 2016-05-26 日本ゼオン株式会社 Curable resin composition, curable resin molded article, cured product, laminate, complex, and multi-layer printed circuit board
JP2016074845A (en) * 2014-10-08 2016-05-12 ナミックス株式会社 Encapsulant composition and semiconductor device using the same

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