JP2002244933A5 - - Google Patents

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Publication number
JP2002244933A5
JP2002244933A5 JP2001377503A JP2001377503A JP2002244933A5 JP 2002244933 A5 JP2002244933 A5 JP 2002244933A5 JP 2001377503 A JP2001377503 A JP 2001377503A JP 2001377503 A JP2001377503 A JP 2001377503A JP 2002244933 A5 JP2002244933 A5 JP 2002244933A5
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JP
Japan
Prior art keywords
memory
checksum
memory location
location
indicator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001377503A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002244933A (ja
Filing date
Publication date
Priority claimed from US09/738,697 external-priority patent/US6490668B2/en
Application filed filed Critical
Publication of JP2002244933A publication Critical patent/JP2002244933A/ja
Publication of JP2002244933A5 publication Critical patent/JP2002244933A5/ja
Pending legal-status Critical Current

Links

JP2001377503A 2000-12-15 2001-12-11 チェックサムを異なるメモリ位置へ動的に移動させるシステムおよび方法 Pending JP2002244933A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/738,697 US6490668B2 (en) 2000-12-15 2000-12-15 System and method for dynamically moving checksums to different memory locations
US09/738697 2000-12-15

Publications (2)

Publication Number Publication Date
JP2002244933A JP2002244933A (ja) 2002-08-30
JP2002244933A5 true JP2002244933A5 (cg-RX-API-DMAC7.html) 2005-03-17

Family

ID=24969104

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001377503A Pending JP2002244933A (ja) 2000-12-15 2001-12-11 チェックサムを異なるメモリ位置へ動的に移動させるシステムおよび方法

Country Status (2)

Country Link
US (2) US6490668B2 (cg-RX-API-DMAC7.html)
JP (1) JP2002244933A (cg-RX-API-DMAC7.html)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6665830B2 (en) * 2001-01-31 2003-12-16 Hewlett-Packard Development Company, L.P. System and method for building a checksum
JP4544901B2 (ja) * 2004-04-19 2010-09-15 株式会社日立製作所 記憶制御システム及びブート制御システム
US7284138B2 (en) * 2004-12-02 2007-10-16 International Business Machines Corporation Deep power saving by disabling clock distribution without separate clock distribution for power management logic
US8627014B2 (en) * 2008-12-30 2014-01-07 Intel Corporation Memory model for hardware attributes within a transactional memory system
US8627017B2 (en) 2008-12-30 2014-01-07 Intel Corporation Read and write monitoring attributes in transactional memory (TM) systems
US9785462B2 (en) 2008-12-30 2017-10-10 Intel Corporation Registering a user-handler in hardware for transactional memory event handling
JP2010231650A (ja) * 2009-03-27 2010-10-14 Fujitsu Ltd 端末装置、データ提供システム、データ提供方法及びコンピュータプログラム
RU2448361C2 (ru) * 2010-07-01 2012-04-20 Андрей Рюрикович Федоров Способ восстановления записей в запоминающем устройстве, система для его осуществления и машиночитаемый носитель
KR20130021633A (ko) * 2011-08-23 2013-03-06 삼성전자주식회사 오류정정부호를 이용한 데이터의 은닉과 검출 방법 및 장치
KR101334017B1 (ko) * 2012-06-29 2013-12-12 주식회사 만도 차량 네트워크의 메시지 무결성 체크 시스템 및 방법
US9698825B2 (en) 2014-10-22 2017-07-04 Quest Software Inc. Fast update of data packet checksums
FR3028376B1 (fr) * 2014-11-07 2018-01-12 Safran Electronics & Defense Sas Procede de detection de pixels defectueux.
US10440299B2 (en) * 2015-09-04 2019-10-08 Apple Inc. Correcting pixel defects based on defect history in an image processing pipeline
US10509666B2 (en) * 2017-06-29 2019-12-17 Ati Technologies Ulc Register partition and protection for virtualized processing device
US11829240B2 (en) * 2022-01-06 2023-11-28 Red Hat, Inc. Preventing duplication of files in a storage device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59157887A (ja) 1983-02-28 1984-09-07 Hitachi Ltd 情報処理装置
US5230045A (en) 1986-11-12 1993-07-20 Xerox Corporation Multiple address space system including address translator for receiving virtual addresses from bus and providing real addresses on the bus
US4849978A (en) 1987-07-02 1989-07-18 International Business Machines Corporation Memory unit backup using checksum
US5130992A (en) * 1990-04-16 1992-07-14 International Business Machines Corporaiton File-based redundant parity protection in a parallel computing system
US5446661A (en) * 1993-04-15 1995-08-29 Automotive Systems Laboratory, Inc. Adjustable crash discrimination system with occupant position detection
US5446691A (en) 1994-03-15 1995-08-29 Shablamm! Computer Inc. Interleave technique for accessing digital memory
JPH0887424A (ja) * 1994-09-16 1996-04-02 Toshiba Corp 電子計算機
US5548788A (en) * 1994-10-27 1996-08-20 Emc Corporation Disk controller having host processor controls the time for transferring data to disk drive by modifying contents of the memory to indicate data is stored in the memory
US5761695A (en) 1995-09-19 1998-06-02 Hitachi, Ltd. Cache memory control method and apparatus, and method and apparatus for controlling memory capable of interleave control
US5915265A (en) * 1995-12-22 1999-06-22 Intel Corporation Method and apparatus for dynamically allocating and resizing the dedicated memory in a shared memory buffer architecture system
US5835954A (en) 1996-09-12 1998-11-10 International Business Machines Corporation Target DASD controlled data migration move
JP2000010738A (ja) * 1998-06-17 2000-01-14 Toshiba Corp ディスクアレイシステム、同システムに適用される記憶容量拡張方法および記録媒体
US6964008B1 (en) * 1999-11-12 2005-11-08 Maxtor Corporation Data checksum method and apparatus
US6728922B1 (en) * 2000-08-18 2004-04-27 Network Appliance, Inc. Dynamic data space

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