JP2002243964A - Semiconductor optical integrated element and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor optical integrated element in which a plurality of semiconductor optical elements are integrated by a butt joint connection and which has a small coupling loss and high reliability by reducing the occurrence of a level difference or a space at the butt joint connecting part of an optical waveguide layer. SOLUTION: After a dielectric mask is formed on a part of a first semiconductor optical element and a first optical waveguide layer is removed by dry etching, a side etching of a suitable amount for the first optical waveguide layer is formed by wet etching. Thereby, in the butt joint connection of a second optical waveguide layer by MOVPE selective growth, both optical waveguides are connected continuously with nearly the same film thickness.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor optical integrated device having an optical waveguide layer and a method for manufacturing the same, and more particularly to a semiconductor laser, an optical modulator, an optical amplifier, a photodetector, and a beam spot used in an optical transmission device or the like. The present invention relates to a semiconductor optical integrated device in which semiconductor optical devices such as an expander and an optical waveguide are integrated by butt joint connection, and a method for manufacturing the same.

[0002]

2. Description of the Related Art In an optical transmission / reception module of an optical transmission device,
To convert electrical signals into light and couple them to optical fiber,
Semiconductor optical devices such as a semiconductor laser as a light source, an optical modulator that modulates a signal into laser light, an optical amplifier to amplify the laser light, and a beam spot expander to improve the coupling loss with the optical fiber are integrated. ing.

[0003] These semiconductor optical devices can be individually manufactured and mounted in a hybrid form. However, from the viewpoint of reducing the coupling loss between the devices and reducing the module mounting cost, they are monolithically integrated on the same substrate. It is desirable to do.

As an optical element integration method for this purpose, there is a method in which optical waveguide layers of optical components are butt-joined to each other (butt joint connection). Here, the optical waveguide layer is a general term for layers sandwiched between upper and lower clad layers constituting each semiconductor optical element. For example, in a semiconductor laser, a multiple quantum well (MQW) active layer and an upper and lower optical guide layer are used. Includes all.

[0005] As a technique relating to a conventional semiconductor optical integrated device by butt joint coupling, for example, Japanese Patent Laid-Open No. 7-2
No. 63655 reports "Optical integrated circuit and manufacturing method thereof". In this method, an example of a method of integrating a distributed feedback (DFB) semiconductor laser with a butt joint coupling and an electro-absorption optical modulator is described.

The outline of integration in the above-mentioned conventional example will be described with reference to FIG. FIG. 4 shows InGaAs on an InP substrate.
FIG. 4 is a cross-sectional view taken along a waveguide direction for explaining a structure and a manufacturing method of an element in which a DFB laser composed of a P-based MQW and an optical modulator are integrated.

First, an n-type I having a partially formed diffraction grating
An InGaAsP lower light guide layer 1 is formed on an nP substrate 11.
2. A semiconductor laser multilayer structure including an MQW active layer 13, an InGaAsP upper optical guide layer 14, and a p-type InP clad layer 15 is sequentially formed (FIG. 2A). Next, a dielectric mask pattern 16 is formed in a region to be a laser, and the p-type InP cladding layer 15 and InGaAs in a region other than the mask are formed.
The sP upper light guide layer 14 and the MQW active layer 13 are removed by dry etching, and the InGaAsP lower light guide layer 12 is used as a surface layer (FIG. 2B).

Next, using the dielectric pattern 16 as a mask, an electroabsorption composed of an MQW layer 22, a p-type InGaAsP upper light guide layer 23, and a p-type InP cladding layer 24 is performed by a metal organic chemical vapor deposition (MOVPE) selective growth method. By sequentially forming the shaped modulator structures, the laser section and the optical waveguide layer of the optical modulator section are directly butt-joined (FIG. 3C). Next, the dielectric mask 16 is removed, and the p-type InP cladding layer 25, the p-type InGaAs contact layer 26, the laser unit p-electrode 27, and the modulator unit p-electrode 28,
An n-electrode 29 is formed (FIG. 2D).

[0009]

In the butt joint connection according to the conventional manufacturing method as described above, the crystal damage during dry etching causes the lower InGaAsP light guide layer 12 to be damaged.
, The crystallinity is reduced when the modulator portion MQW layer is regrown by MOVPE, which causes deterioration of the reliability of the device.
At the end of the dielectric mask, the side wall of the optical waveguide layer of the laser portion removed by dry etching is almost vertical, so that when the MOVPE is regrown, the material is modulated near the connection due to the diffusion of the material from above the dielectric mask. The thickness of the optical waveguide layer in the optical part increases, and a surface step at the connection part and a change in the MQW crystal composition occur.

According to the present invention, in the step of performing wet etching for removing a damaged layer after dry etching, the MQW, which is an optical waveguide layer, is simultaneously removed while selectively removing the damaged layer.
By forming an appropriate amount of side etching on the W layer, the optical waveguide layers are continuously connected to each other with substantially the same film thickness when the butt joint connection is formed, and the coupling loss is small.
An object is to provide a highly reliable semiconductor optical integrated device.

[0011]

In order to achieve the above object, according to the present invention, when removing an optical waveguide layer by dry etching, a part of the optical waveguide layer is left, and the remaining waveguide layer is removed. When removing with a wet etching solution having a selectivity between the optical waveguide layer and the lower cladding layer, side etching is formed in the optical waveguide layer.

The thickness of the optical waveguide layer left at the time of dry etching is preferably about 20 to 100 nm.
The amount of side etching formed during wet etching is 100 to 500 nm in the lateral direction of the optical waveguide layer.
It is desirable that In these forming steps, it is desirable that the thickness of the upper cladding layer between the optical waveguide layer and the dielectric mask is not less than 20 nm and not more than 500 nm. The reason is as follows.

First, the thickness of the damaged layer that is applied to the semiconductor crystal at the time of dry etching is 15 to 20 nm, so that the optical waveguide layer is left at least 20 nm at the time of dry etching, and is selected between the optical waveguide layer and the lower clad layer. By using a wet etching solution having a specific ratio, the damaged layer can be reliably removed.

On the other hand, the side etching amount of the optical waveguide layer in the lateral direction is 0 nm to 10 nm.
When the thickness is 0 nm, when the optical waveguide layer is connected to the butt joint by MOVPE growth using a dielectric mask as a selective growth mask, the growth occurs in the vicinity of the connection portion at the end of the mask due to the diffusion of the organometallic material on the mask. An increase in film thickness and a change in crystal composition occur. As a result, a surface step is generated or the crystallinity of the MQW active layer is reduced, so that the characteristics of the semiconductor optical integrated device are deteriorated.

If the side etching amount is as large as 500 nm or more, the raw material by vapor phase diffusion hardly reaches the side-etched portion at the time of butt joint connection, so that the thickness of the connection portion after growth is reduced. Or a void is formed.

The amount of side etching of the optical waveguide layer formed by the wet etching depends on the crystal composition and thickness of the optical waveguide layer which is partially left when the optical waveguide layer is removed by dry etching, and the amount of the optical waveguide for forming the side etching. The desired amount can be controlled by adjusting the mixing ratio of the wet etchant and the etching time in accordance with the crystal composition and thickness of the waveguide layer, the shape of the dielectric mask, and the like. In the above-mentioned forming method, the thickness of the optical waveguide layer and the upper cladding layer of the dielectric mask is not less than 20 nm so that the dielectric mask is not exposed in an eaves shape when side etching is formed by wet etching. Is desirable. Furthermore, the thickness of the upper cladding layer is 500 n
If it is larger than m, when the optical waveguide layer is butt-joined by MOVPE growth using a dielectric mask as a selective growth mask, crystal growth occurs laterally from the upper cladding layer side wall, and a void is formed. From that
It is desirable that the thickness be 500 nm or less.

[0017]

(Embodiment 1) FIG. 1 is a diagram illustrating a device structure and a manufacturing method of a modulator integrated distributed feedback semiconductor laser according to a first embodiment of the present invention. FIG.

First, as shown in FIG. 1A, an n-type (1
00) After forming a diffraction grating in a region to be a distributed feedback semiconductor laser on the InP substrate 11, by MOVPE method,
n-type InGaAsP lower optical guide layer (bandgap wavelength λg = 1.15 μm, thickness 100 nm) 12, InG
aAsP (6 nm thick) is used as a well layer, and InGaAsP
(Λg = 1.30 μm, 10 nm thick) as a barrier layer 7
Periodic strain MQW active layer (λg = 1.55 μm) 13, p
-Type InGaAsP upper light guide layer (λg = 1.15 μm)
m, a thickness of 100 nm) and a p-type InP cladding layer (thickness of 200 nm) 15 are sequentially formed as a semiconductor laser multilayer structure.

Further, a rectangular SiN dielectric pattern (width 20 μm) 16 is formed in a region to be a laser by ordinary plasma CVD, photolithography, and etching steps.

Then, as shown in FIG. 1B, the p-type InP cladding layer 15 and the InG
aAsP upper light guide layer 14, MQW active layer 13, In
The GaAsP lower light guide layer 12 is etched. At this time, the etching is stopped while leaving the InGaAsP lower optical guide layer 12 at 50 nm. This remaining InGaAs
It was confirmed that the P lower optical guide layer 12 had damage during dry etching in a region having a depth of 15 nm from the surface.

Next, as shown in FIG. 1C, the remaining InG is mixed with a mixed etching solution of phosphoric acid, hydrogen peroxide and water.
The aAsP lower light guide layer 12 is etched. At this time, the phosphoric acid-based etching solution contains InGaAsP crystal and In
Since the P crystal has selectivity, n-type InP
Although the etching stops on the surface of the cladding layer 11, the InG
Lateral side etching is formed on the optical waveguide layers (12 to 14) made of aAsP-based crystal. At this time, the side etching amount for the optical waveguide layers (12 to 14) is, as shown in FIG.
The shape corresponds to the composition of the nGaAsP crystal.
The side etching amount becomes 400 nm near the active layer.

Next, as shown in FIG.
Using the N pattern 16 as a mask, an n-type InGaAsP lower light guide layer (λg =
1.10 μm, thickness 100 nm) 21, InGaAsP
(7 nm thick) as a well layer, and InGaAsP (λg =
Eight-period strain M with barrier layer of 1.40 μm, 7 nm thick)
QW layer (λg = 1.49 μm) 22, p-type InGaAs
P upper light guide layer (λg = 1.10 μm, thickness 100 n)
m) 23, p-type InP cladding layer (thickness: 200 nm) 2
4 are sequentially formed. At this time, at the connection portion between the laser and the modulator, a butt joint is continuously formed with substantially the same thickness without forming a step or a gap.

FIG. 2 shows the results of measuring the step formed at the butt joint connection when the amount of side etching on the optical waveguide layer was changed in the manufacturing process of this embodiment. The amount of side etching was changed depending on the mixing ratio of the phosphoric acid-based etching solution and the etching time. In the figure, the vertical axis indicates the step amount at the upper end of the optical waveguide layer of the laser section and the modulator section in the butt joint connection section. When phosphoric acid etching is not performed (side etching =
In (0), a ridge of about 150 nm was formed in the modulator section at the connection section. As the amount of side etching increases, the step at the connecting portion decreases, and the
At this time, the connection was almost complete. When the side etching amount is further increased, a dent is formed in the connection portion, and when the side etching amount is 550 nm,
At the time of butt joint connection, a gap is formed below the SiN mask.

Such a change in the stepped shape of the connection part due to the change in the amount of side etching is explained by the diffusion of the raw material from the SiN mask 16 to the selective growth region. That is, the raw material diffused from above the SiN mask 16 is Si
Since there is no side etching to contribute to the crystal growth of the optical waveguide layer near the N mask 16, the thickness of the crystal at the connection portion increases. On the other hand, since the excess material is consumed for crystal growth in the side-etched portion by forming the side-etching, the connection portion can be substantially set by appropriately setting the side-etching amount according to the SiN mask shape. It can be formed flat. If the side etching amount is too large, the supply of the raw material to the side etching region is insufficient, so that a dent or a void is formed at the connection portion.

Thereafter, as shown in FIG.
nP cladding layer (2 μm thick) 25, p-type InGaAs
A contact layer (thickness 0.2 μm) 26 is formed, and a laser part p is formed through a normal semiconductor optical device forming process.
Forming an electrode 27, a modulator part p electrode 28, and an n electrode 29,
A modulator integrated distributed feedback semiconductor laser was completed.

In the modulator integrated distributed feedback semiconductor laser manufactured as described above, since the crystals are continuously connected at the butt joint connection portion, the waveguide loss is reduced, and the optical output is smaller than that of the conventional structure. Increased and long-term reliability improved. (Embodiment 2) FIG. 3 is a cross-sectional view taken along a waveguide direction for explaining an element structure and a manufacturing method of a beam spot expander integrated semiconductor laser according to a second embodiment of the present invention.

First, as shown in FIG. 3A, the n-type (1
00) On the InP substrate 11, an n-type I
nGaAsP lower optical guide layer (bandgap wavelength λg
= 1.05 μm, thickness 100 nm) 12, InGaAs
P (6 nm thick) is used as a well layer, and InGaAsP (λg =
A seven-period strained MQW active layer (λg = 1.30 μm) 13 with a barrier layer of 1.05 μm, 10 nm thick, p-type InG
aAsP upper light guide layer (λg = 1.05 μm, thickness 1
00 nm) 14, p-type InP cladding layer (thickness: 200 n)
m) A semiconductor laser multilayer structure consisting of 15 is sequentially formed.

Further, a recessed SiN having a width of 200 μm in a region serving as a laser and a 30 μm width in a part of a region serving as a beam spot expander is formed by ordinary plasma CVD, photolithography and etching processes.
A dielectric pattern 16 is formed.

Next, as shown in FIG. 3B, the p-type InP clad layer 15 and the InG
aAsP upper light guide layer 14, MQW active layer 13, In
The GaAsP lower light guide layer 12 is etched. At this time, the etching is stopped while leaving the InGaAsP lower light guide layer 12 at 30 nm.

Next, as shown in FIG. 3C, the remaining InG is mixed with a mixed etching solution of phosphoric acid, hydrogen peroxide and water.
The aAsP lower light guide layer 12 is etched. At this time, the phosphoric acid-based etching solution contains InGaAsP crystal and In
Since the P crystal has selectivity, n-type InP
Although the etching stops on the surface of the cladding layer 11, the InG
A lateral etching of 300 nm is formed on the optical waveguide layers (12 to 14) made of aAsP crystal.

Next, as shown in FIG.
Using the N pattern 16 as a mask, an InGaAsP optical waveguide layer (λg = 1.00 μm) is formed by MOVPE selective growth.
m, a connection portion thickness of 320 nm) 31 and an InP cladding layer (connection portion thickness of 200 nm) 32 are formed. At this time,
At the connection between the laser section and the beam spot expander,
The butt joint is continuously formed with substantially the same film thickness without forming steps or voids. Since the SiN dielectric pattern 16 has a concave shape, the thickness of the InGaAsP optical waveguide layer 31 becomes 130 nm at the front end portion due to the effect of MOVPE selective growth, and a tapered beam spot expander is formed.

Thereafter, as shown in FIG.
nP cladding layer (4 μm thickness) 25, p-type InGaAs
A contact layer (thickness: 0.2 μm) 26 is formed, and a beam spot expander integrated semiconductor laser is completed through a normal semiconductor optical device forming process.

The beam spot expander integrated semiconductor laser manufactured as described above has a laser light spot enlarged at the emission end, so that the coupling efficiency with a single mode fiber is -3 dB.

In the above embodiment, the case where the semiconductor laser, the optical modulator, and the beam spot expander are integrated by butt joint connection has been described. In addition, an optical amplifier, an optical switch, an optical waveguide, The present invention is similarly effective when various optical elements such as photodetectors are integrated with each other by butt joint connection.

[0035]

According to the semiconductor optical integrated device having the optical waveguide layer and the method of manufacturing the same according to the present invention, the occurrence of steps and voids at the butt joint connection portion is suppressed, and the optical waveguide layers are continuously connected. By doing so, it is possible to reduce the waveguide loss at the connection portion and to realize a highly reliable semiconductor optical integrated device.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view taken along a waveguide direction for explaining an element structure of a modulator integrated distributed feedback semiconductor laser according to a first embodiment of the present invention and a manufacturing method thereof.

FIG. 2 is a measurement diagram showing a relationship between an amount of side etching on an optical waveguide layer and a step of an optical waveguide layer at a butt joint connection portion in the first embodiment of the present invention.

FIG. 3 is a sectional view taken along a waveguide direction for describing a beam spot expander integrated semiconductor laser structure and a method of manufacturing the same according to a second embodiment of the present invention.

FIG. 4 is a cross-sectional view taken along a waveguide direction for explaining a device structure of a modulator integrated distributed feedback semiconductor laser according to a conventional embodiment and a manufacturing method thereof.

[Explanation of symbols]

11 n-type InP substrate, 12 lower InGaAsP light guide layer, 13 laser MQW layer, 14 upper InGa
AsP layer, 15: p-type InP cladding layer, 16: dielectric mask, 21: lower InGaAsP light guide layer, 22 ...
Modulator section MQW layer, 23: upper InGaAsP light guide layer, 24: p-type InP clad layer, 25: p-type InP clad layer, 26: p-type InGaAs contact layer, 27
... Laser part p-electrode, 28 ... Modulator part p-electrode, 29 ... n-electrode, 31 ... InGaAsP waveguide layer, 32 ... InP clad layer.

Continued on the front page (72) Inventor Kazunori Shinoda 1-280 Higashi Koikekubo, Kokubunji-shi, Tokyo F-term in Hitachi Central Research Laboratory Co., Ltd. AB21 AB25 AB28 CA12 DA05 DA23 DA24 DA35 EA29

Claims (8)

[Claims] 1. A semiconductor optical integrated device in which first and second semiconductor optical devices comprising an optical waveguide layer sandwiched between upper and lower cladding layers are integrated on a same substrate by butt joint connection, wherein the optical waveguide layers are mutually connected. A semiconductor optical integrated device, wherein the semiconductor optical integrated device is in continuous contact with the substrate, and the position and the thickness in the height direction substantially coincide with each other at the connection portion. 2. The method according to claim 1, wherein the first semiconductor optical device and the second semiconductor optical device are integrated by a butt joint connection. The optical waveguide layer and the upper and lower cladding layers constituting the first semiconductor optical device are formed on a substrate. Forming, forming a dielectric pattern having a shape corresponding to the first semiconductor optical device region on the upper cladding layer of the first semiconductor optical device, and forming the first semiconductor optical device using the dielectric pattern as a mask. Removing the upper cladding layer of the semiconductor optical device and a part of the optical waveguide layer by dry etching, and using the dielectric pattern as a mask, removing the remaining portion of the optical waveguide layer of the first semiconductor optical device, When the first semiconductor optical device is removed by a wet etching solution having selectivity to the semiconductor crystal constituting the optical waveguide layer of the first semiconductor optical device, the edge of the dielectric pattern is removed by the wet etching solution. Forming side etching on the optical waveguide layer of the semiconductor optical device of the first aspect, and forming the optical waveguide layer and the upper and lower cladding layers constituting the second semiconductor optical element, the optical waveguide of the first semiconductor optical element. And forming an optical waveguide layer forming the second semiconductor optical device so as to be connected at the side-etched portion. 3. An optical waveguide layer of the first and second semiconductor optical devices, comprising upper and lower optical guide layers and a multiple quantum well layer sandwiched between them, or a single optical waveguide layer. The semiconductor optical integrated device according to claim 1, wherein 4. An upper clad layer of the first semiconductor optical device and a part of the optical waveguide layer are removed by dry etching using a dielectric pattern formed on the upper clad layer of the first semiconductor optical device as a mask. 3. The method according to claim 2, wherein the thickness of the remaining optical waveguide layer is 20 nm or more and 100 nm or less. 5. A part of the optical waveguide layer of the first semiconductor optical device is removed by dry etching using the dielectric pattern formed on the upper cladding layer of the first semiconductor optical device as a mask, and is left behind. When the removed optical waveguide layer is removed by a wet etching solution having selectivity to the semiconductor crystal constituting the optical waveguide layer of the first semiconductor optical device,
In the step of forming side etching in the optical waveguide layer of the first semiconductor optical device at the end of the dielectric mask, the length of side etching is 100 nm or more and 500 n or more.
5. The method for manufacturing a semiconductor optical integrated device according to claim 2, wherein m is equal to or less than m. 6. The semiconductor optical integrated device according to claim 1, wherein the thickness of the upper cladding layer constituting the first semiconductor optical device is not less than 20 nm and not more than 500 nm. 7. The semiconductor substrate and the upper and lower cladding layers are made of InP.
And the optical waveguide layer is made of InGaAsP, InGaAl
As or a multiple quantum well structure composed of these semiconductors,
7. The semiconductor optical integrated device according to claim 1, wherein said semiconductor optical integrated device has a laminated structure. 8. The optical waveguide layer of the second semiconductor optical device,
6. The method according to claim 2, wherein metal oxide vapor phase epitaxy is used for crystal growth in the step of forming the first semiconductor optical device so as to be connected to the optical waveguide layer at the side etching portion. A method for manufacturing a semiconductor optical integrated device according to any one of the above.