JP2002237468A - Method of forming electrode passed through substrate, and substrate having through electrode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a through electrode passed through a silicon substrate and having a high aspect ratio. SOLUTION: A through hole 12 having a high aspect ratio is formed by a photo-excited electrolytic polishing process in a silicon substrate 11. The inner wall of the through hole 12 is subjected to oxidation to form an oxide film 21 as an insulating layer. Then a metal 23 is filled into the through hole 12 by a melted metal refilling process to form a through electrode (23). The through electrode 12 having a high aspect ratio can be easily formed in the substrate 11, and thus there can be easily achieved a semiconductor package having, e.g. stacked silicon IC chips.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a through electrode forming method for forming a through electrode on a substrate such as a silicon substrate, a substrate having at least one through electrode formed by the method, and a device using the substrate. For example, a through electrode of a substrate that can be suitably applied when a through electrode with a high aspect ratio is required, such as when a through electrode is formed on a silicon substrate when silicon IC chips are stacked and mounted at high density The present invention relates to a formation method, a substrate made of silicon or the like having a through electrode, and various devices such as an electronic device and an optical device based on the substrate.

[0002]

2. Description of the Related Art For example, as a method of forming a through electrode penetrating the front and back of a silicon substrate, a method has been proposed in which anisotropic etching is performed, an oxide film is formed, and conduction is performed by soldering. In this case, as shown in FIG. 11, the through holes 2 formed in the silicon substrate 1 by anisotropic etching are:
The area of the opening relative to the thickness of the substrate becomes large. 3
Indicates an oxide film, and 4 indicates solder. Also, an ICP-RIE (Inductively Coupled) for forming a through electrode on a silicon substrate.
A method has been proposed in which a through-hole is formed by using a d-plasma-reactive ion etching method, and the inner wall of the through-hole is metal-plated to form a through-electrode.

On the other hand, as a technique for forming a through hole having a high aspect ratio (opening area with respect to hole depth) in a silicon substrate, a photo-excited electrolytic polishing method (J. Electrochem. Soc., Vol.
No.2, pp653-659) is known. The details of the photoexcited electrolytic polishing method will be described later.

[0004]

In the above-described conventional anisotropic etching / solder method, the etching shape is restricted, and the area of the opening of the through hole becomes large with respect to the thickness of the silicon substrate 1. It is not possible to form a through electrode with a specific ratio, and it is not suitable for forming a through electrode on a silicon substrate when high-density mounting of a silicon IC chip is to be performed.

Also, in the ICP-RIE / metal plating method, it is difficult to form a through electrode having a high aspect ratio because the reaction gas and the plating solution cannot enter deep into the through hole.

Further, in the shape of the through hole formed by the photoexcited electrolytic polishing method, a flat wall surface cannot be obtained because side branches and the like are generated.

The present invention has been made in view of the above circumstances, and it is possible to form a through electrode having a high aspect ratio, and to penetrate a substrate capable of flattening the inner wall of a through hole in which the through electrode is formed. An object is to provide a method for forming an electrode and a substrate having a through electrode.

[0008]

According to the present invention, there is provided a method of forming a through electrode in a substrate such as a silicon substrate, comprising forming a through hole having a high aspect ratio in the substrate. An inner wall of the through-hole is oxidized to form an oxide film as an insulating layer, and then the through-hole is filled with a metal by a backfill method of molten metal.

According to a second aspect of the present invention, in the method of forming a through-electrode for a substrate according to the first aspect, when forming an oxide film as an insulating layer on the inner wall of the through-hole, the oxide film formed on the inner wall of the through-hole is once removed, and then again. An oxide film is formed by oxidizing the inner wall of the through hole.

According to a third aspect of the present invention, in the method for forming a through electrode of a substrate according to the first aspect, when forming an oxide film as an insulating layer on the inner wall of the through hole, a high concentration impurity diffusion is performed on the inner wall of the through hole. Is characterized in that an impurity diffusion layer is formed outside the substrate.

According to a fourth aspect of the present invention, there is provided a substrate made of silicon or the like having a through electrode, wherein the through electrode is formed by a photo-excited electrolytic polishing method, and has a through hole having an oxide film on an inner wall, and is filled in the through hole. The through-electrode is made of metal, and the through-electrode is a substrate having at least one through-electrode formed in the substrate.

[0012]

FIG. 1 is a block diagram showing an embodiment of the present invention.
This will be described with reference to FIGS. In this embodiment, for example, it is assumed that a through electrode is formed on a silicon substrate when silicon IC chips are stacked and mounted at high density. First, as shown in FIG.
Then, a V-shaped recess (in this example, a pyramid-shaped recess) 11a is formed by anisotropic etching using an etching solution such as KOH.

Next, at the position of the V-shaped recess 11a of the silicon substrate 11, a photo-excited electrolytic polishing method is used as shown in FIG.
The through hole 12 is formed as shown in FIG. The principle of forming the through holes 12 by the photoexcited electrolytic polishing method will be described with reference to the photoexcited electrolytic polishing apparatus 10 shown in FIG. 2 and FIG. The n-type silicon substrate 11 having the V-shaped recess 11a formed in advance on the surface 11b with KOH as described above is immersed in the electrolytic solution 13 composed of an HF solution in the electrolytic bath 18, and the silicon substrate 11
While irradiating light (the light source is indicated by 14) to the back surface 11c corresponding to the V-shaped recess 11a through an infrared filter 17, a current (DC power supply is applied) between the silicon substrate 11 serving as an anode and the cathode electrode 15 is provided. 16), the V-shaped recess position of the silicon substrate 11 is selectively etched, and the through hole 12 is formed at the V-shaped recess position. The principle of selective etching will be described. As shown in FIG. 3, when light 14a is irradiated on the back surface of the n-type silicon substrate 2, minority carriers (holes) are excited on the back surface of the silicon substrate 2 by the light irradiation. ) Is generated, and the minority carriers are concentrated at the tip of the V-shaped recess 11a in the form of a pyramid on the surface side, so that only the tip of the V-shaped recess 11a is electrochemically etched, and the etching proceeds. Thus, a through hole is formed. As a specific example of the formation of the through hole 12 by the photoexcited electrolytic polishing method, for example, 50 ° C., 2.5 w
Illuminance of light 6mW / c in t% HF etchant
Polishing is performed with m ² , an applied current of 0.1 mA, and an applied time of 24 hours to form a through hole having a diameter of 15 μm and a depth of 400 μm, for example.

Next, the inner wall of the through hole 12 is oxidized to form an oxide film 2 as an insulating layer as shown in FIG.
Form one. The oxide film 21 can be formed by, for example, a thermal oxidation method. As a specific embodiment of the thermal oxidation, for example, the oxide film 2 is exposed to a wet atmosphere in which steam at 1100 ° C. and 2000 cc / min.
Form one.

When the oxide film 21 is formed as an insulating layer, the inner wall of the through-hole formed by the photoexcited electrolytic polishing method has side branches and the like, so that a flat inner wall surface cannot be obtained. Is desirably removed and oxidized again to form an oxide film. Thereby, the inner wall surface of the through hole 12 can be flattened, and a good through electrode can be formed. The removal of the oxide film can be performed by selectively etching the oxide film in the through hole 12 using BOE (buffered hydrofluoric acid) or the like. In some cases, when the steps of removing the oxide film and reforming the oxide film are repeated a plurality of times, the inner wall surface of the through hole 12 can be further flattened.

Further, when forming an oxide film, high-concentration impurity diffusion is performed, and a layer (impurity diffusion tank) formed thereby can be used as a shield layer. FIG. 4 shows an impurity diffusion layer 22 formed by impurity diffusion.
Noise can be suppressed by forming the shield layer. As an impurity to be diffused, for example, in the case of an n-type silicon substrate, a substance which forms a p-type layer such as boron may be diffused. The impurity diffusion can be performed by, for example, a thermal diffusion method. According to this thermal diffusion method, the impurity diffusion layer 22
Since the formation of the insulating layer (oxide film 21) on the substrate can be performed at the same time, it is efficient. As a specific example of impurity diffusion by thermal diffusion, for example, when boron is diffused into an n-type silicon substrate, boron glass is decomposed in a nitrogen atmosphere at 950 ° C. for one hour using a solid or vapor impurity source. After the positioning, drive-in is performed at 1,100 ° C. in a wet oxidizing atmosphere for 3 hours to form, for example, a high-concentration P ++ layer (impurity diffusion layer 22) of about 2 μm.

Next, FIG.
As shown in (d), the metal 23 is filled in the through hole 12. The molten metal backfill method is a method of filling a metal into a minute space such as a fine hole formed in a silicon substrate (work) to be processed. Is reduced, then, while maintaining the reduced pressure state, insert the work into the molten metal, then pressurize the atmosphere pressure of the molten metal, fill the space with the molten metal by the atmospheric pressure difference before and after metal insertion, then This method is characterized in that the work is pulled up from the molten metal bath and cooled. Here, as the metal to be filled, a metal having a relatively low melting point and a low vapor pressure, such as indium (In), tin (Sn), or eutectic solder of gold-tin, may be used, but is not particularly limited thereto. . Specific examples of the molten metal backfill, using molten metal filling apparatus 30 shown in FIG. 5, for example, for example, 10 ^-3 Pa
In a reduced pressure atmosphere of about (Pascal), the silicon substrate 11 with the through-holes 12 as a work is immersed in molten tin at, for example, 300 ° C., and then the atmosphere is returned to the atmospheric pressure to obtain a high aspect ratio through-hole. 12 is filled with tin.

The molten metal filling device 30 includes a heater 44
Vacuum chamber 31 in which a molten metal tank 43 with
And a vacuum chamber for buffer 37 communicating with an opening 36 that can be opened and closed by a shutter 35, and a work fixing arm 47 for holding the silicon substrate 11 is covered with a lid 50.
Attached to. Both chambers 31, 37 are provided with a suction pipe 33 or a vacuum roughing suction pipe 3 in a vacuum pump device.
8 and connected to a nitrogen cylinder (not shown) via nitrogen introduction pipes 39 and 40.

The above-described metal filling device 30 uses the silicon substrate 1
The procedure for filling the metal into the through-hole 12 will be described. The buffer vacuum chamber 37 with the lid 50 closed and the silicon substrate 11 held by the work fixing arm 47 positioned in the buffer vacuum chamber 37. The inside of the vacuum pump 34 is roughly evacuated. Next, the shutter 35 is opened (the vacuum chamber 31 is first depressurized). Next, the inside of the vacuum chamber 11 and the vacuum chamber for buffer 17 is vacuum-sucked by the vacuum pump device 34, and the pressure is reduced to a vacuum pressure of about 10 ⁻² to 10 ⁻³ Pa. Next, the metal in the molten metal tank 43 is melted by heating with the heater 44, and the silicon substrate 11 is inserted into the molten metal 23. After the silicon substrate 11 has reached the same temperature as the molten metal 23, nitrogen from a nitrogen cylinder is introduced into the vacuum chamber 11 and the buffer vacuum chamber 17, and the inside is 2 to 5 × 10 ⁵ Pa (2 to 5 kgf / cm ² ). By this pressurization, the molten metal 23 is filled in the through hole 12 having a high aspect ratio. Thereafter, the silicon substrate 11 is pulled up from the molten metal bath 43, taken out of the vacuum chamber 31, and air-cooled at room temperature. This completes the work of filling the through holes 12 of the silicon substrate 11 with metal.

[0020] As a method of forming an insulating layer on the inner wall surface of the through-hole 12 (oxide film) is not limited to the thermal oxidation method described above, for example by SiO ₂ type film-forming coating solution and the like of the liquid phase, a low temperature It is also conceivable to form under conditions. This method is advantageous when circuits and the like are already formed on the silicon substrate 11 because they are not affected by heat.

The present invention is suitable for application to stacked high-density mounting (three-dimensional mounting) of silicon IC chips. FIG.
FIG. 3 is a cross-sectional view showing a stacked body of a silicon IC chip (silicon substrate). In the figure, reference numeral 71 denotes a silicon IC chip on which two through electrodes 72 are formed by a photo-excited electrolytic polishing method.
Three layers are stacked with their upper and lower positions aligned. Silicon IC
The chip 71 has, for example, the same circuit pattern cut out from the same wafer, and when viewed from the wafer surface, a through electrode 72 and a circuit pattern (not shown) are formed at the same position in each chip. The through electrode 72 of
The upper and lower ends are connected together. That is, the solder bumps 74 provided at the lower ends of the electrodes are connected to the upper ends of the through electrodes on the partner chip, and the through electrodes 72 of these chips are
It is aligned and connected to the through electrode 72 formed on the silicon base substrate 73. As a result, a common electrode penetrating the base substrate and the silicon IC chip is formed, and the solder ball 70 at the lower end of the common electrode is connected to a wiring circuit of the base substrate (not shown). However, when the design is made so that the vertical positions of the through electrodes are not aligned, the solder bumps on the lower part of one chip are connected to the wiring pattern on the other chip (they are formed on the other chip which is electrically connected to the penetrating electrodes). (Electrode layer). As described above, by positioning several IC chips on which through electrodes with a high aspect ratio are formed at arbitrary positions and connecting them by overlapping,
It is possible to make a three-dimensional IC device that is stacked on multiple layers and has an improved mounting density. The number of through electrodes is 2
The invention is not limited to the book, and the same applies to other embodiments.

FIG. 8 shows another embodiment of the present invention, and shows a chip size mounting of an IC chip using an interposer. In the figure, reference numeral 81 denotes 2 formed by the photoexcited electrolytic polishing method.
There is a silicon interposer (silicon substrate) having through electrodes 82 at various locations, and a face-down IC chip 83 is mounted on the interposer, for example. The electrode 84 on the surface of the IC chip is connected to the through electrode 82 via the conductive layer 85 on the surface of the interposer. On the lower surface of the interposer, a solder ball 86 formed at the lower end of the through electrode 82 is mounted on the motherboard (base substrate) 80. Is connected to the wiring pattern. Conventionally, in mounting a chip using an interposer, there are many restrictions on the connection with the motherboard and the wiring density is limited, but in this embodiment,
By forming multiple through electrodes with high aspect ratio,
The restrictions on the wiring pattern design of the interposer are reduced,
The mounting structure (or package structure) can be simplified. Furthermore, since silicon is used as the material of the interposer, the matching of the thermal expansion coefficient with the IC chip is improved, and the thermal stress distortion applied to the chip when mounted on a motherboard is better than that of other ceramics. And the heat transfer efficiency of silicon is relatively excellent, so that the heat generated from the chip can be easily released. Furthermore, since the commonly used silicon precision processing technology can be used, there is an advantage that the surface wiring pattern can be refined.

FIG. 9A shows another embodiment of the present invention, which shows an image sensor having through electrodes. In the figure, 9
Reference numeral 1 denotes a photoelectric element area in the image sensor chip 90, and reference numeral 92 denotes a through electrode having a high aspect ratio formed on the silicon substrate 93 by a photo-excited electrolytic polishing method. The through electrode 92 is formed at the end of the chip outside the active area (photoelectric element area where the photoelectric conversion element is formed) 91 of the image sensor, and the upper end thereof is connected to the active area 91 via an electrode layer on the chip surface. Have been. The lower end is solder ball 9
4 and the like, and is connected to a wiring pattern on the motherboard surface (not shown).

FIG. 9B shows a wire connection type image sensor. In this figure, the image sensor has a relatively large area wire bond pad 95 that is electrically connected to the element area on the same surface as the element area of the chip, and is connected to an external lead frame or the like by a bonding wire 96. Further, in order to reduce the influence of heat or the like generated at the time of gold wire (wire) connection, the wire bond pad and the image area need to be separated to some extent. For the above reasons, the area of the image area occupying the chip surface is limited. There are restrictions.

On the other hand, in the present invention, the upper end of the through electrode having a high aspect ratio is connected to the photoelectric element area 91 via the conductive layer 97, and the solder ball 9 at the lower end of the through electrode is provided.
4, connection to the outside becomes unnecessary, so that a wire bonding pad on the same surface as the image area becomes unnecessary. Accordingly, since the element area occupying the chip area of the image sensor can be increased, the image sensor can be downsized or a large element area can be secured in a chip having a limited size. Further, since wire bonding is not required, surface mounting on the base substrate is facilitated, and the size and thickness of the image chip mounting substrate can be reduced, and the manufacturing cost can be reduced.

FIG. 10 shows another embodiment of the present invention, and is a cross-sectional view of an optical circuit device (optical transmitter) in which a through electrode having a high aspect ratio is formed. In the figure, reference numeral 100 denotes four through electrodes 101 formed by a photo-excited electrolytic polishing method.
A, 101B, 101C (one other location is not shown), a precision-machined silicon platform (silicon substrate), 101 is a V-groove for positioning and fixing an optical fiber 106, and 102 is a surface-mount LD ( Laser diode)
The top surface to which one electrode surface of 103 is connected is a conductive layer 102
A projection 104 having a trapezoidal cross section and A is an inverted trapezoidal recess whose concave bottom connected to one electrode surface of a monitoring PD (photodiode) 105 forms a conductive layer 104A. The protrusion 1
02 and a lower portion of the concave portion 104, a conductive layer 102A and through electrodes 101A and 101B which are electrically connected to the conductive layer 104A are formed. The lower ends of the through electrodes 101A and 101B form solder bumps (pads). Connected to an external circuit not shown. On the other hand, the other two penetrating electrodes 101C (one not shown) are located on the platform surface 100A.
Are connected to two electrode pads 110 (one is not shown), and two bonding wires (gold wires) 109A and 109B derived from these electrode pads are LD103 and PD105.
Is connected to the other one-side electrode surface. More specifically, the gold wire 109A is directly bonded to one electrode on the LD 103, and the gold wire 109B is not directly connected to the device electrode, but is connected to the extension of the conductive layer 104A plated on the platform. Is done. In the lower part of the platform 100, the lower ends of these through electrodes are surface-mounted on a mounting substrate via solder balls 111 and the like.

Next, the arrangement direction of these optical devices is aligned so that the optical axis coincides with the axis 107 of the optical fiber 106, the light emitted from the LD 103 enters the optical fiber, and the PD 105 monitors the LD output. I do. According to this embodiment, since the respective conductive layers 102A and 104A under the optical element are electrically connected to the external circuit via the through electrodes 101A and 101B, the formation of the wiring pattern on the platform surface is simplified. Further, since the wire (gold wire) bonding is performed only between the optical pad and the electrode pad 110 in the platform, the wire length becomes shorter and the connection becomes easier as compared with the case where the optical element and the external lead frame are connected. Therefore, there is an advantage that not only the size of the entire optical device can be reduced, but also that the number of connection steps can be reduced and the product cost can be reduced. In addition, the shape of the above-mentioned platform was changed to allow external incident light from the optical fiber to
With such a configuration, an optical receiver can be configured. If two optical fibers (two v-grooves) are used, the platform is processed, and an optical transmitter and an optical receiver are built on the same platform, whereby an optical transceiver can be configured.

As described above, according to the present invention, a through electrode having a high aspect ratio can be formed in various elements, and a general-purpose silicon precision processing technique can be used. The precision and size of the device can be improved, and the mounting density can be improved. In addition, since complicated and costly processes such as wire bonding can be omitted, the product cost can be reduced. In the present invention, a through electrode is mainly formed on a silicon substrate. However, a through electrode may be formed on a substrate made of a material other than silicon.

[0029]

According to the present invention, a through hole having a high aspect ratio is formed in a substrate by, for example, photoexcited electrolytic polishing, and an inner wall of the through hole is oxidized to form an oxide film as an insulating layer. Since the through holes are filled with a metal by the molten metal backfill method to form the through electrodes, a through electrode having a high aspect ratio can be easily obtained. This facilitates, for example, realizing a high-density semiconductor package or an optical device in which silicon IC chips are stacked.

If the oxide film formed on the inner wall of the through-hole is once removed and then re-oxidized to form an oxide film, the inner wall of the through-hole can be flattened. Can be formed.

According to a third aspect of the present invention, if a high-concentration impurity is diffused into the inner wall of the through-hole and an impurity diffusion layer is formed outside the oxide film, the impurity diffusion layer can be used as a shield layer to suppress noise. It is effective for

[Brief description of the drawings]

FIGS. 1A and 1B are schematic views illustrating a method of forming a through electrode in a substrate according to an embodiment of the present invention by dividing the process into steps, wherein FIG. 1A shows a step in which a V-shaped recess is formed in a silicon substrate, and FIG. (C) shows a stage in which an oxide film is formed on the inner wall of the through hole, and (d) shows a stage in which a metal is filled in the through hole to form a through electrode.

FIG. 2 illustrates a method of forming a through electrode according to an embodiment of the present invention.
It is a schematic diagram of a photoexcited electrolytic polishing apparatus used for forming a through hole.

FIG. 3 is a view for explaining the principle that selective etching is performed on a V-shaped recess by the photoexcited electrolytic polishing method.

FIG. 4 is a schematic diagram showing a state in which a shield layer (impurity diffusion) is formed by performing impurity diffusion when forming the oxide film of FIG.

FIG. 5 illustrates a method of forming a through electrode according to an embodiment of the present invention.
It is a partially cutaway front view of the principal part of the metal filling apparatus used for filling metal into a through-hole.

FIG. 6 shows an embodiment in which a through electrode is actually formed on a silicon substrate by the above-described through electrode forming method, and is a sketch of a micrograph of a cross section of a through electrode portion of the silicon substrate.

FIG. 7 is a cross-sectional view of a laminated body of a silicon IC chip (silicon substrate).

FIG. 8 is a view showing another embodiment of the present invention and showing chip size mounting of an IC chip using an interposer.

9A is a cross-sectional view of an image sensor having a through electrode according to still another embodiment of the present invention, and FIG.
FIG. 3 is a cross-sectional view showing a wire connection type image sensor.

FIG. 10 shows still another embodiment of the present invention, and is a cross-sectional view of an optical circuit element (optical transmitter) on which a through electrode having a high aspect ratio is formed.

FIG. 11 is a schematic cross-sectional view of a through electrode portion when a through electrode is formed on a silicon substrate by a conventional anisotropic etching / solder method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 Photoexcited electropolishing apparatus 11 Silicon substrate 11a V-shaped recess 11b Surface of silicon substrate 11c Back surface of silicon substrate 12 Through hole 13 Electrolyte 14 Light source 15 Cathode electrode 21 Oxide film 22 Impurity diffusion layer (shield layer) 23 Filling metal (melting) 30 Metal filling device 31 Vacuum chamber 37 Vacuum chamber for buffer 34 Vacuum suction device 43 Molten metal tank 44 Heater 70 Solder ball 71 Silicon IC chip 72 Through electrode 73 Base substrate 74 Solder bump 80 Mother board (base substrate) 81 interposer (silicon substrate) made of silicon 82 through electrode 83 IC chip 84 electrode 85 conductive layer 86 solder ball 90 image sensor chip 91 photoelectric element area (active area of image sensor) 92 through electrode 93 silicon Con board 94 Solder ball 97 Conductive layer 100 Platform made of silicon (silicon substrate) 101A, 101B, 101C Through electrode 101 V groove 101A, 101B Through electrode 101C Through electrode 102 Projection 102A Conductive layer 103 Surface mount type LD (laser diode) 104 inverted trapezoidal recess 104A conductive layer 105 PD (photodiode) 106 optical fiber 107 axis 109A, 109B bonding wire (gold wire) 110 electrode pad 111 solder ball

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Tatsuo Suemitsu 1-5-1 Kiba, Koto-ku, Tokyo Inside Fujikura Co., Ltd. (72) Inventor Kazuhisa Itoi 1-5-1 Kiba, Koto-ku, Tokyo F-term (reference) in Jikura 4M104 AA01 BB09 BB36 CC01 DD07 DD09 DD22 DD23 DD26 DD31 EE02 EE16 FF01 FF21 GG04 GG05 HH14 5F043 AA02 BB02 DD08 DD14 FF04 FF06 GG04 5F058 BC03 BE04 BE10 BF46 BF56 BF56

Claims (4)

[Claims] 1. A through electrode forming method for forming a through electrode on a substrate such as a silicon substrate, wherein a through hole having a high aspect ratio is formed in the substrate by a photo-excited electrolytic polishing method, and an inner wall of the through hole is oxidized. Forming an oxide film as an insulating layer, and then filling the through-hole with a metal by a molten metal backfilling method. 2. A process for forming an oxide film as an insulating layer on the inner wall of a through hole, comprising removing the oxide film formed on the inner wall of the through hole, and then oxidizing the inner wall of the through hole again to form an oxide film. 2. The method for forming a through electrode in a substrate according to claim 1, wherein the method is provided at least once. 3. The method according to claim 1, wherein, when forming an oxide film as an insulating layer on the inner wall of the through hole, a high concentration impurity is diffused on the inner wall of the through hole to form an impurity diffusion layer outside the oxide film. Item 4. The method for forming a through electrode of a substrate according to Item 1. 4. A substrate made of silicon or the like having a through electrode, wherein the through electrode is formed by a photoexcited electrolytic polishing method, and is formed of a through hole having an oxide film on an inner wall, and a metal filled in the through hole. A substrate having a through electrode, wherein the through electrode is formed in at least one place in the substrate.