JP2002229063A - Substrate for liquid crystal display device, and liquid crystal display device eqiupped with the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate for a liquid crystal display device which can have stacking deviation and substrate bonding deviation detected at low cost in a short time, and to provide a liquid crystal display device equipped with it. SOLUTION: The substrate is composed of a thin-film transistor having a gate electrode, an insulation film, an operation semiconductor layer, and a source/drain electrode, a dummy gate electrode 4 formed of a gate electrode formation layer, an insulation film which is formed on the dummy gate electrode 4, a dummy operating semiconductor layer which is formed of an operating semiconductor layer formation layer on the insulation film and has an oblique end side 9, formed obliquely with respect to a gate bus lines, and dummy source/ drain electrodes 10 and 12 which are formed of source/drain electrode formation layer on the dummy operating semiconductor layer opposite to each other, across a specific gap, and is equipped with a thin-film transistor for detection which detects wiring patterns which are stacked deviated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for a liquid crystal display device constituting a liquid crystal display device used for a display section of information equipment or the like, and a liquid crystal display device provided with the same.

[0002]

2. Description of the Related Art In an active matrix type liquid crystal display device used for a display section of information equipment or the like, as a switching element, for example, a thin film transistor (TFT) is used.
ilmTransistor). In recent years, liquid crystal display devices have been required to have lower cost and higher image quality.
Therefore, a substrate with stable switching characteristics is produced by controlling the amount of superposition of the wiring pattern of the gate electrode of the TFT and the source / drain electrodes, or a substrate in which stable switching characteristics cannot be obtained is found at an early stage. That has become extremely important.

[0003] FIG. 10 is a graph showing the T value of a conventional liquid crystal display.
FIG. 3 is a plan view showing the configuration of the FT108. As shown in FIG. 10, the TFT has a gate electrode 112 formed on the glass substrate. On the gate electrode 112, an operation semiconductor layer (not shown) and a channel protection film 116 are formed via an insulating film (not shown). On the channel protective film 116, a drain electrode 114 and a source electrode 110 are formed with their leading ends facing each other with a predetermined gap. The pixel electrode 124 is connected to the source electrode 110 via the contact hole 118.

In a liquid crystal display device, the liquid crystal of each pixel is driven by an alternating current in order to prevent the deterioration of the liquid crystal. As the AC driving method has the frame inversion driving or dot inversion driving, feedthrough (penetration) in these drive schemes correction for voltage [Delta] V _p is essential. The feedthrough voltage ΔV _p is
Overlap region 120 in which the source electrode 110 and the gate electrode 112 overlap in a direction perpendicular to the substrate surface.
Caused by the parasitic capacitance C _gs it is formed by (shown in FIG hatching). When the effective voltage of the pixel in both the positive polarity and the negative polarity decreases due to the feedthrough voltage ΔV _{p and} the symmetry of the inversion driving is broken, flicker display occurs. In order to eliminate the image quality deterioration due to the flicker display, the common potential V of the common electrode formed on the opposite substrate of the TFT substrate is set.
_com is adapted to offset potential for canceling the feed-through voltage [Delta] V _p is applied.

[0005] In general, a projection exposure apparatus is used for patterning wiring and the like on a substrate for a liquid crystal display device. In the case of a large glass substrate, division exposure using a plurality of masks is performed. FIG. 11 is a plan view showing the glass substrate 102 patterned using the division exposure method. FIG.
Is divided into, for example, six divided regions a to f and patterned. Outside the display area 104, an inspection element area 106 in which elements for measuring various resistances and capacitances are provided.

When the gate electrode 112 and the source / drain electrodes 110 and 114 of the TFT 108 shown in FIG. 10 are formed by patterning using the divisional exposure method, the overlapping region occurs in the direction in which the drain bus line 122 extends. The overlap amount of the overlap region 120 varies for each of a to f. Thereby, a parasitic capacitance C _gs having a different capacitance for each of the divided regions a to f is formed in the TFT 108.
Since the common potential V _com cannot be corrected for each of the divided areas a to f, a difference in image quality can be visually recognized for each of the divided areas a to f due to the presence or absence of flicker display.

Further, even if the overlay shift occurs in the direction in which the gate bus line extends, the distance between the drain bus line 122 and the edge of the pixel electrode 124 varies for each of the divided areas a to f. For this reason, the strength of the horizontal electric field between the drain bus line 122 and the pixel electrode 124 fluctuates, and different crosstalk occurs for each of the divided regions a to f. Further, since different capacitances are generated between the drain bus line 122 and the pixel electrode 124 for each of the divided regions a to f, the divided regions a to f
The difference in image quality is visually recognized every time. These divided areas a to f
In order to prevent a difference in image quality that is visually recognized every time, the overlay displacement of the gate electrode 112 and the source / drain electrodes 110 and 114, particularly the overlay displacement in the extending direction of the drain bus line 122 for each of the divided regions a to f is measured. ,
It is important to manage.

The gate electrode 1 of the TFT 108 is formed by patterning by a batch exposure method in which the entire surface of the substrate is exposed with one mask.
12 and the source / drain electrodes 110 and 114 are formed, there is no difference in image quality distributed in the display area as described above. However, when the amount of misalignment is large, stable switching characteristics can be obtained. Absent. Therefore, the gate electrode 112 and the source / drain electrodes 110 and 11 of the TFT 108 are patterned by using the batch exposure method.
4 is formed, the gate electrode 112 and the source /
It is necessary to measure and manage the misalignment of the wiring patterns of the drain electrodes 110 and 114.

The etching for patterning wirings and the like on a substrate for a liquid crystal display device is roughly classified into a wet (wet) etching method using an etchant and a dry (dry) etching method using an etching gas. You. Generally, the wet etching method has etching isotropic property, and the dry etching method has etching anisotropy.

[0010]

Conventionally, the misalignment of the laminated wiring patterns is determined by measuring the line width of the gate electrode 112 and the source / drain electrodes 110 and 114 and the amount of overlap of the overlap region 120 with a microscope. Is measured by Since the misalignment leads to deterioration of the image quality, it is originally desirable to inspect all the substrates for the liquid crystal display device. However, measurement using a microscope requires expensive equipment and measurement takes a long time,
It is difficult to inspect all the substrates, and for example, there is a problem that only one or two samples can be extracted from one lot (several tens). When measuring the shape of the TFT 108 in the display area 104 using a microscope, since the pixel shape and the arrangement in the display area 104 are different for each type, the measurement conditions such as the magnification of the microscope and the measurement position are set for each type. However, there is a problem in that the change of the format becomes complicated.

Further, in the patterning using the wet etching method, there is a problem that it is difficult to obtain a wiring pattern having a desired line width because side etching occurs due to etching isotropicity.

SUMMARY OF THE INVENTION An object of the present invention is to provide a substrate for a liquid crystal display device capable of detecting a misalignment of a laminated wiring pattern and a misalignment of a substrate at low cost and in a short time, and a liquid crystal display device having the same. It is in.

Another object of the present invention is to provide a substrate for a liquid crystal display device which can measure the amount of side etching when patterning is performed by using a wet etching method.

[0014]

The above object is achieved by providing a plurality of gate bus lines, a plurality of drain bus lines formed substantially orthogonal to the plurality of gate bus lines, the plurality of gate bus lines and the plurality of gate bus lines. A plurality of pixel regions defined by the drain bus line, a gate electrode electrically connected to the gate bus line, an insulating film formed on the gate electrode, and an operation formed on the insulating film. A semiconductor layer, and a source / drain electrode formed opposite to the operation semiconductor layer at a predetermined gap, electrically connected to the thin film transistor formed for each pixel region, and the source electrode; A pixel electrode formed in the pixel region, a dummy gate electrode formed of the gate electrode formation layer, an insulating film formed on the dummy gate electrode, and the insulating film A dummy operation semiconductor layer formed of the operation semiconductor layer formation layer and having a slanted edge formed obliquely with respect to the gate bus line; and a source / drain electrode formation layer on the dummy operation semiconductor layer. And a dummy source / drain electrode formed to face each other with a gap between them, and a thin film transistor for detecting an overlay shift for detecting an overlay shift of a wiring pattern. Is done.

The object of the present invention is to provide a misalignment detection pattern α formed of a first opaque layer and having an opening.
And a misalignment formed so as to close the opening with a second opaque layer via an insulating film and arranged to overlap at least a part of the opening when viewed in a direction perpendicular to the substrate surface. This is achieved by a substrate for a liquid crystal display device comprising: a detection pattern β; and a registration error detection pattern for detecting a registration error of a wiring pattern.

Further, the object is to provide a first substrate provided with a misalignment detection pattern α formed of an opaque layer and having an opening, disposed opposite to the first substrate,
An overlay misregistration detection pattern β formed of an opaque layer with a size to cover the opening and disposed so as to overlap at least a part of the opening when viewed in a direction perpendicular to the substrate surface.
And a liquid crystal display device having a liquid crystal sealed between the first and second substrates.

Still another object of the present invention is to form a side etching amount measurement pattern α formed of a first opaque layer and having an opening, and a size occupying the opening with a second opaque layer via an insulating film. A liquid crystal display having a side etching amount measurement pattern including a side etching amount measurement pattern β arranged so as to overlap at least a part of the opening when viewed in a direction perpendicular to the substrate surface. This is achieved by a device substrate.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A substrate for a liquid crystal display device according to a first embodiment of the present invention and a liquid crystal display device having the same will be described with reference to FIGS. FIG. 1 is a plan view showing the configuration of the overlay displacement detecting TFT 1 formed on the substrate for a liquid crystal display device according to the present embodiment. FIG. 2 is a plan view of the overlay displacement detecting TFT 1 shown in FIG. It is sectional drawing cut | disconnected by the line. TFT1 for overlay displacement detection
Is the display area 104 for each of the divided areas a to f shown in FIG.
It is formed in each of the inspection element regions 106 arranged outside. The overlay displacement detecting TFT 1 is formed on a glass substrate 2 which is an insulating substrate by a TFT shown in FIG.
The dummy gate electrode 4 is formed of a gate electrode forming layer 108 and extends in the direction parallel to the direction in which the gate bus line (not shown) extends (in the horizontal direction in the figure).

The dummy gate electrode 4 has a trapezoidal region 8 protruding substantially at the center. On the dummy gate electrode 4, a dummy operation semiconductor layer 7 is formed via an insulating film 30 formed over the entire surface of the substrate 2, as shown in FIG.
8 is formed of the formation layer of the operating semiconductor layer. On the dummy operation semiconductor layer 7, a dummy channel protective film 6 is formed in substantially the same shape as the trapezoidal region 8. Here, in the dummy operation semiconductor layer 7 below the dummy channel protective film 6, an oblique edge 9 is formed obliquely to the direction in which the gate bus line extends. At both ends of the oblique end 9, two parallel ends 11, which are parallel to the direction in which the gate bus lines extend and have different lengths,
11 'is formed. Thus, the channel region is defined by the trapezoidal dummy operation semiconductor layer 7 below the dummy channel protection film 6. On the dummy channel protective film 6,
The n-type impurity semiconductor layer 32 and the distal ends of the dummy source electrode 10 and the dummy drain electrode 12 which are formed thereover by the source / drain electrode formation layer face each other with a predetermined gap. Dummy source electrode 10 and dummy drain electrode 1
2, a protective film 34 is formed.

The dummy source electrode 10 is formed so as to overlap the oblique end 9 of the channel region of the dummy operation semiconductor layer 7. The tip of the dummy source electrode 10 facing the dummy drain electrode 12 is disposed so as to intersect the oblique end 9 of the channel region. Also, the left end shown in FIG. 1 among the side ends on both sides of the front end of the dummy source electrode 10 is disposed so as to intersect one parallel end 11 having a shorter channel region length of the dummy operation semiconductor layer 7. Have been.
The parallel edge 11 reduces the measurement sensitivity to the overlay displacement in the direction in which the gate bus line (not shown) extends, and relatively increases the measurement sensitivity to the overlay displacement in the direction in which the drain bus line (not shown) extends. Is formed. The length of the parallel edge 11 is a value (for example, 2) in consideration of the maximum misalignment in the direction in which the gate bus line extends.
μm or more).

Next, a method of detecting misalignment using the liquid crystal display substrate according to the present embodiment will be described with reference to FIG. A probe of a test device (not shown) is brought into contact with the dummy drain electrode 12 to apply a voltage of, for example, +5 V, and a voltage of, for example, +
A voltage of 25 V is applied, and the ON current of the overlay detection TFT 1 is measured on the dummy source electrode 10 side. Figure 1
By comparing the current values of the on-currents of the overlay deviation detecting TFTs 1 formed for each of the plurality of divided regions a to f shown in FIG. 1, the overlay deviation of the wiring pattern for each of the divided regions a to f can be detected. . It should be noted that the overlay displacement detection T
The size of the element of the FT1 is arbitrary, but if the overlay deviation detecting TFT1 is formed relatively large, the ON current becomes large and the measurement becomes easy.

The TFT for detecting overlay displacement shown in FIG.
Reference numeral 1 denotes a channel region having a shortest channel length of L ₁ and a channel width of W ₁ below the dummy channel protective film 6. When the dummy source electrode 10 and the dummy drain electrode 12 are formed at the positions indicated by the upper broken lines in the drawing due to the overlay shift in the patterning, the shortest channel length of the channel region of the overlay shift detection TFT 1 is L ₂ ( <
L ₁ ), and the channel width becomes W ₂ (> W ₁ ). Therefore, the ON current of the overlay shift detecting TFT 1 increases. Conversely, when the dummy source electrode 10 and the dummy drain electrode 12 cause an overlay shift with respect to the dummy gate electrode 4 downward in the figure, the overlay shift detection TFT
1 is reduced. That is, if the on-currents of the overlay displacement detecting TFTs 1 in the divided areas a to f are substantially the same, the relative overlap of the divided areas a to f in the direction in which the drain bus line extends, which is the vertical direction in the drawing, is shown. It can be seen that no misalignment has occurred. Further, the divided areas a to a in which the ON current of the overlay displacement detection TFT 1 is relatively large
When f is present, the divided regions a to f are shifted from each other in the direction in which the amount of overlap between the gate electrode and the source electrode is larger in the source / drain electrode formation layer than in the other divided regions a to f. I have.

In this embodiment, a channel protective film type TF
Although a substrate for a liquid crystal display device having a T is taken as an example, the present invention is not limited to this, and a substrate for a liquid crystal display device having a channel etching type TFT having no channel protective film as shown in FIG. Applicable. Figure 3 is a plan view, deviation detecting TFT3 superposition, in the dummy active semiconductor layer 7, the channel width the channel length is which L ₅ has a channel region of the W _1. When the misalignment in patterning the dummy source electrode 10 and the dummy drain electrode 12 is formed at the position indicated by the broken line upward in the drawing, the channel length of the channel region of the overlay deviation detection TFT3 does not change L ₅ However, since the channel width is W ₂ (> W ₁ ), the ON current of the overlay detection TFT 3 increases. FIG. 4 is a cross-sectional view of the overlay displacement detecting TFT 3 shown in FIG. 3 taken along line BB. As shown in FIG. 4, the channel-etching type overlay detection TFT 3 has substantially the same configuration as that of the channel-etching type TFT, has no dummy channel protective film 6, and has a dummy operation semiconductor layer 7. The upper part of the channel region is etched away.

Further, in the present embodiment, the dummy gate electrode 4 is formed in parallel with the direction in which the gate bus line for image display extends, but the present invention is not limited to this. If the dummy gate electrode 4 is formed in parallel with the direction in which the drain bus line for image display extends, a misalignment between the gate electrode forming layer and the source / drain electrode forming layer in the direction in which the gate bus line extends can be detected. it can.

Further, in the present embodiment, the dummy source electrode 10 is disposed so as to intersect with the oblique end side 9, but the present invention is not limited to this, and the dummy drain electrode 12 intersects with the oblique end side 9. It may be arranged so that.

According to the substrate for a liquid crystal display device according to the present embodiment, the overlay shift for each of the divided regions a to f can be detected only by measuring the ON current of the overlay shift detecting TFTs 1 and 3, which is expensive. Simple equipment is not required, and detection can be performed in a short time. Therefore, it is possible to inspect all the substrates. Unlike measurement using a microscope, it is not necessary to change measurement conditions for each product type.

FIG. 5 shows a first modification of the overlay deviation detecting TFT 1 formed on the liquid crystal display device substrate according to the above embodiment. Two overlay displacement detecting TFTs 1 having a shape symmetrical to each other with respect to the length direction of the dummy gate electrode 4 are sequentially arranged in the length direction of the dummy gate electrode 4, and a reference current measuring TFT 14 is formed. . In the reference current measurement TFT 14, even if an overlay shift occurs upward or downward in the figure, the overlay shift detection TFTs 1 cancel out the change in the on-current with each other, so that the overall on-current is substantially constant. That is, for example, +5 is applied to the external connection terminal 15 on the dummy drain electrode 12 side.
When a voltage of, for example, +25 V is applied to the dummy gate electrode 4 and a current value is measured at the external connection terminal 15 on the dummy source electrode 10 side, half of the obtained current value is superimposed. The reference ON current of the misalignment detection TFT 1 is obtained.

By comparing the reference on-state current with the on-state current of the TFT 1 for detecting misalignment in the substrate for the liquid crystal display device according to the above embodiment using this modification, the drain bus line for each of the divided areas a to f is Specific overlay displacement of the source / drain electrode formation layer in the extending direction can be measured at low cost and in a short time. In view of the difficulty in forming a TFT 108 having uniform characteristics over the entire surface of the substrate 2, the reference current measuring TFT 14 may be formed for each test element region 106 where the detecting TFT 1 is formed. desirable.

FIG. 6 shows a second modification of the overlay displacement detecting TFT 1 formed on the substrate for a liquid crystal display device according to the above embodiment. In the present modification, unlike the overlay shift detecting TFT 1 shown in FIG. 1, the right end shown in FIG. 6 among the side ends on both sides of the tip of the dummy source electrode 10 is a lower layer of the dummy channel protective film 6. The dummy operation semiconductor layer 7 is formed so as to intersect with the oblique edge 9 of the channel region. The TFT 1 for overlay displacement detection shown in FIG. 6 has the shortest channel length of L ₃
In channel width has a channel region of the W _3.

Dummy source electrode 10 and dummy drain
The electrode 12 is indicated by a broken line on the left in the figure due to misalignment.
When the TFT 1 is formed at the position
The channel width of the channel region of_ThreeIn Although,
The shortest channel length is L_Four(<L _Three). Therefore,
The ON current of the overlay shift detecting TFT 1 increases.
Conversely, the dummy source electrode 10 and the dummy drain electrode 1
2 overlaps the dummy gate electrode 4 to the right in the figure.
When a shift occurs, the overlay shift detecting TFT 1 is turned on.
The current decreases. That is, superposition for each of the divided areas a to f
If the ON current of the misalignment detection TFT 1 is almost the same
For example, the direction in which the gate bus line extends in the horizontal direction in the figure.
No relative misalignment has occurred for each divided area
I understand. In addition, the TFT 1 for overlay displacement detection
If there are divided areas a to f having relatively large on-currents,
Are divided in the source / drain electrode formation layer.
And compared with the other divided regions a to f,
Overlapping displacement occurs in the direction to narrow the gap between the pixel electrode
ing.

The overlay detecting TFT shown in FIG.
In No. 1, the shortest channel length and the shortest channel width do not change even if the overlay shift occurs in the direction in which the drain bus line extends (the vertical direction in the drawing). Therefore, the ON current of the overlay shift detecting TFT 1 does not change, and overlay shift in the direction in which the drain bus line extends is not sensed. According to the present modification, it is possible to detect the overlay displacement between the gate electrode formation layer and the source / drain electrode formation layer in the direction in which the gate bus line extends at low cost and in a short time.

FIG. 7 shows a third modification of the overlay shift detecting TFT 1 formed on the substrate for a liquid crystal display device according to the above embodiment. In this modification, unlike the overlay shift detecting TFT 1 shown in FIG. 1, the channel region is formed in a triangular shape having the oblique end 9, and does not have the parallel end 11 but only the parallel end 11 ′. It is characterized by having. That is, since the left end of the dummy source electrode 10 is not arranged so as to intersect with the parallel side 11, the overlap shift in the direction in which the gate bus line extends and the overlap shift in the direction in which the drain bus line extends. The measurement sensitivity is the same. According to this modification as well, it is possible to detect a misalignment between the gate electrode formation layer and the source / drain electrode formation layer.

Next, a liquid crystal display substrate according to a second embodiment of the present invention will be described with reference to FIG. FIG.
3 shows the configuration of a misalignment detection pattern 16 formed on the liquid crystal display device substrate according to the present embodiment. FIG. 8A shows a state in which no overlay shift has occurred, and FIG. 8B shows a state in which an overlay shift has occurred. The overlay misregistration detection pattern 16 formed for each of the divided regions a to f is formed of an opaque layer, for example, a gate electrode formation layer on a transparent and insulating glass substrate 2, and has, for example, a circular opening. 22 has a pattern α18 for detecting overlay misalignment. Note that the shape of the outer shape of the overlay deviation detection pattern α18 is arbitrary, and is not limited to a circular shape but may be a square shape or the like.

On the overlay deviation detection pattern α18, an overlay deviation detection pattern β20 formed by another opaque layer, for example, a source / drain electrode formation layer, is formed via an insulating film or the like (not shown). Have been. The overlay displacement detection pattern β20 is formed to have a size that covers the opening 22 and is arranged so as to overlap at least a part of the opening 22 when viewed in a direction perpendicular to the substrate surface. If there is no misalignment, the misalignment detection pattern β20 and the opening 22 overlap with each other with a width d. The overlap width d is a shift amount (for example, 0.5 μm) of the overlay shift to be detected. In a state in which no misalignment has occurred, as shown in FIG. 8A, the opening 22 is not exposed when viewed in a direction perpendicular to the substrate surface. However, for example, in the state where the overlap is larger than the width d and overlapped in the lower right direction in the drawing, as shown in FIG. 8B, the upper left part of the opening 22 is viewed in the direction perpendicular to the substrate surface. Exposed. At this time, since the opening 22 transmits light, the overlay displacement can be detected by detecting the light emitted from the back surface with a light receiving element or the like.

By changing the size of the overlay deviation detecting pattern β20 relative to the opening 22, a plurality of overlay deviation detecting patterns 16 having different overlapping widths d are arranged, and By specifying the overlay shift detection pattern 16 through which light is transmitted, the overlay shift amount can be detected. In addition, a plurality of overlay shift detection patterns 16 formed such that the overlay shift detection pattern β20 is shifted in an arbitrary direction from directly above the opening 22 are arranged, and the overlay shift detection in which light is transmitted through the opening 22 is performed. If the use pattern 16 is specified, the direction of the misalignment can be detected.

If the overlay displacement detection pattern α18 is formed on the TFT substrate by, for example, a gate electrode forming layer, and the overlay displacement detection pattern β20 is formed on a CF substrate by a light shielding film forming layer of, for example, Cr, the substrate is Can be detected. Also, the overlay shift detection pattern α18 may be formed on the CF substrate, and the overlay shift detection pattern β20 may be formed on the TFT substrate. A liquid crystal display device is completed by enclosing a liquid crystal between the bonded substrates.

According to the liquid crystal display device substrate and the liquid crystal display device having the same according to the present embodiment, the divided regions a to f
The overlay shift and the overlay shift between the TFT substrate and the CF substrate can be detected only by detecting the light irradiated from the back surface of the overlay shift detection pattern 16. Therefore, expensive equipment is not required, and detection can be performed in a short time. Therefore, it is possible to inspect all the substrates. Unlike measurement using a microscope, it is not necessary to change measurement conditions for each product type.

Next, a liquid crystal display substrate according to a third embodiment of the present invention will be described with reference to FIG. FIG.
Shows the configuration of the pattern 24 for measuring the side etching amount formed on the substrate for the liquid crystal display device according to the present embodiment. The side etching amount measuring pattern 24 is formed by an opaque layer, for example, a gate electrode forming layer on the transparent and insulating glass substrate 2. For example, a side etching amount measuring pattern α 26 having a rectangular opening 30 is formed. Have. The opening 30 has, for example, 1.0 μm.
It is patterned by a wet etching method using a resist layer having an opening width of m as an etching mask. FIG. 9 shows three side etching amount measurement patterns α26 having openings 30 of the same shape.
The shape of the external shape of the side etching amount measurement pattern α26 is arbitrary, and is not limited to a square shape, but may be a circular shape or the like.

Pattern α26 for measuring side etching amount
A side etching amount measurement pattern β28 formed of another opaque layer, for example, a source / drain electrode formation layer, is formed via an insulating film or the like (not shown). In FIG. 9, three side etching amount measurement patterns β28 are formed by changing the size of the side etching amount measurement pattern β28 relative to the size of the opening 30. The three side etching amount measurement patterns β28 are formed by a dry etching method in which side etching hardly occurs, and have a width of 1.
It is patterned at 0 μm, 1.5 μm, and 2.0 μm.

As shown in FIG. 9, the opening 30 at the left end in FIG.
Is partially exposed when viewed in a direction perpendicular to the substrate surface, but the other openings 30 are not exposed. Therefore, if there is no misalignment between the gate electrode formation layer and the source / drain electrode formation layer, the width of the opening 30 is 1.0 μm.
m and 1.5 μm or less. That is, it is specified that the side etching amount in the opening 30 is 0.25 μm or less.

In the present embodiment, the side etching amount measuring pattern α26 is patterned using a wet etching method, and the side etching amount measuring pattern β28 is patterned using a dry etching method. Of course, it does not matter.

According to the substrate for a liquid crystal display device according to the present embodiment, the amount of side etching when patterning is performed using the wet etching method can be measured, so that a wiring pattern having a desired line width can be easily obtained.

The substrate for a liquid crystal display device according to the above-described embodiment and the liquid crystal display device provided with the same are summarized as follows. (Supplementary Note 1) A plurality of gate bus lines, a plurality of drain bus lines formed substantially orthogonal to the plurality of gate bus lines, and a plurality of gate bus lines and a plurality of drain bus lines defined by the plurality of drain bus lines. A pixel region, a gate electrode electrically connected to the gate bus line, an insulating film formed on the gate electrode, an operating semiconductor layer formed on the insulating film, and A source / drain electrode formed opposite to each other at a predetermined gap, and a thin film transistor formed for each pixel region, and a pixel electrode electrically connected to the source electrode and formed in the pixel region. A dummy gate electrode formed of the gate electrode formation layer, an insulating film formed on the dummy gate electrode, and the operating semiconductor layer formation layer formed on the insulating film. A dummy operation semiconductor layer having an oblique end formed obliquely with respect to the gate bus line and a source / drain electrode formation layer formed on the dummy operation semiconductor layer so as to face the dummy operation semiconductor layer at a predetermined gap. What is claimed is: 1. A substrate for a liquid crystal display device, comprising: a dummy source / drain electrode; and a thin film transistor for detecting overlay shift detecting an overlay shift of a wiring pattern.

(Supplementary Note 2) In the liquid crystal display device substrate according to Supplementary Note 1, one of the dummy source / drain electrodes is formed so as to overlap with the oblique end side when viewed in a direction perpendicular to the substrate surface. A substrate for a liquid crystal display device, comprising:

(Supplementary Note 3) In the substrate for a liquid crystal display device according to Supplementary Note 2, one of the dummy source / drain electrodes may have a tip end facing the other and the oblique end side as viewed in a direction perpendicular to the substrate surface. A substrate for a liquid crystal display device formed so as to intersect.

(Supplementary Note 4) In the substrate for a liquid crystal display device according to supplementary note 3, the dummy operation semiconductor layer has two parallel end sides having different lengths parallel to a direction in which the gate bus lines extend, and One of the source / drain electrodes is formed such that one of the side edges on both sides of the tip crosses one of the parallel edges having a shorter length when viewed in a direction perpendicular to the substrate surface. A substrate for a liquid crystal display device.

(Supplementary Note 5) In the substrate for a liquid crystal display device according to Supplementary Note 2, one of the dummy source / drain electrodes may have a side end on both sides of a tip end opposed to the other, viewed in a direction perpendicular to the substrate surface. A substrate for a liquid crystal display device, wherein the substrate is formed so as to intersect with the oblique end.

(Supplementary Note 6) In the liquid crystal display device substrate according to any one of Supplementary notes 1 to 5, the overlay shift detecting thin film transistor has a dummy channel protective film formed on a dummy operation semiconductor layer. A substrate for a liquid crystal display device, comprising:

(Supplementary Note 7) The overlay deviation detecting pattern α formed with the first opaque layer and having an opening and the second opaque layer with an insulating film interposed therebetween are formed in such a size as to close the opening. A misalignment detection pattern β arranged to overlap at least a part of the opening when viewed in a direction perpendicular to the substrate surface, and a misalignment detection pattern for detecting misalignment of the wiring pattern. A substrate for a liquid crystal display device, comprising:

(Supplementary Note 8) In the liquid crystal display device substrate according to Supplementary Note 7, the overlay misalignment detection pattern may correspond to the size of the opening of the overlay misalignment detection pattern α. A liquid crystal display device substrate, wherein a plurality of the patterns β are formed by relatively changing the size of the patterns β.

(Supplementary Note 9) A first substrate formed of an opaque layer and provided with an overlay detection pattern α having an opening, and a size arranged to face the first substrate and to cover the opening. A second substrate provided with an overlay misregistration detection pattern β formed of an opaque layer and arranged to overlap at least a part of the opening when viewed in a direction perpendicular to the substrate surface; And a liquid crystal sealed between the second substrates.

(Supplementary Note 10) A side etching amount measuring pattern α formed of a first opaque layer and having an opening,
A side etching amount measurement pattern β formed to have a size to cover the opening with a second opaque layer via an insulating film and arranged to overlap at least a part of the opening when viewed in a direction perpendicular to the substrate surface. A substrate for a liquid crystal display device having a pattern for measuring a side etching amount, comprising:

(Supplementary Note 11) In the substrate for a liquid crystal display device according to Supplementary Note 10, the side etching amount measurement pattern may be different from the side etching amount measurement pattern α with respect to the size of the opening. A liquid crystal display device substrate, wherein a plurality of the patterns β are formed by relatively changing the size of the patterns β.

(Supplementary Note 12) In the substrate for a liquid crystal display device according to Supplementary Note 10 or 11, the side etching amount measurement pattern α is patterned using a wet (or dry) etching method, and the side etching amount measurement pattern β is a substrate for a liquid crystal display device, which is patterned using a dry (or wet) etching method.

[0055]

As described above, according to the present invention, overlay deviation and substrate bonding deviation can be detected at low cost and in a short time. Further, according to the present invention, the amount of side etching at the time of patterning using a wet etching method can be measured.

[Brief description of the drawings]

FIG. 1 is a plan view illustrating a configuration of a liquid crystal display device substrate according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a configuration of a substrate for a liquid crystal display according to a first embodiment of the present invention.

FIG. 3 is a plan view illustrating a configuration of a substrate for a liquid crystal display device according to a first embodiment of the present invention.

FIG. 4 is a cross-sectional view illustrating a configuration of a substrate for a liquid crystal display according to a first embodiment of the present invention.

FIG. 5 is a diagram illustrating a configuration of a first modification of the substrate for a liquid crystal display device according to the first embodiment of the present invention.

FIG. 6 is a diagram illustrating a configuration of a liquid crystal display device substrate according to a second modification of the first embodiment of the present invention.

FIG. 7 is a diagram illustrating a configuration of a third modification of the liquid crystal display device substrate according to the first embodiment of the present invention.

FIG. 8 is a diagram illustrating a configuration of a substrate for a liquid crystal display device according to a second embodiment of the present invention.

FIG. 9 is a diagram illustrating a configuration of a substrate for a liquid crystal display device according to a third embodiment of the present invention.

FIG. 10 is a diagram illustrating a configuration of a conventional substrate for a liquid crystal display device.

FIG. 11 is a diagram illustrating a configuration of a conventional substrate for a liquid crystal display device.

[Explanation of symbols]

 1, 3 overlay detection TFT 2 glass substrate 4 dummy gate electrode 6 dummy channel protective film 7 dummy operation semiconductor layer 8 trapezoidal region 9 oblique edge 10 dummy source electrode 11, 11 'parallel edge 12 dummy drain electrode 14 Reference current measurement TFT 15 External connection terminal 16 Overlay displacement detection pattern 18 Overlay displacement detection pattern α 20 Overlay displacement detection pattern β 22, 30 Opening 24 Side etching amount measurement pattern 26 Side etching amount measurement Pattern α 28 Pattern β for measuring side etching amount

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/336 H01L 29/78 627C F-term (Reference) 2H088 FA01 FA16 HA05 HA06 HA08 MA20 2H092 JA28 JA34 JA37 JA41 JB22 JB31 JB56 JB77 5C094 AA43 BA03 BA43 CA19 CA24 DA14 DA15 DB04 EA04 EA07 EB02 FB12 FB14 FB15 5F110 AA24 AA30 BB01 CC07 DD02 EE24 GG23 GG60 HM20 NN12 QQ05 5G435 AA17 BB12 EE33 KK05

Claims (5)

[Claims] A plurality of gate bus lines; a plurality of drain bus lines formed substantially orthogonal to the plurality of gate bus lines; a plurality of gate bus lines; and a plurality of drain bus lines. A plurality of pixel regions, a gate electrode electrically connected to the gate bus line, an insulating film formed on the gate electrode, an operating semiconductor layer formed on the insulating film, and the operating semiconductor layer A thin film transistor having a source / drain electrode formed on the pixel region facing each other at a predetermined gap, and a thin film transistor formed for each of the pixel regions; and a pixel electrically connected to the source electrode and formed in the pixel region. An electrode; a dummy gate electrode formed of the gate electrode formation layer; an insulating film formed on the dummy gate electrode; and forming the operating semiconductor layer on the insulating film. And a dummy operation semiconductor layer having an oblique edge formed obliquely with respect to the gate bus line and a source / drain electrode formation layer formed on the dummy operation semiconductor layer so as to face each other with a predetermined gap. A substrate for a liquid crystal display device, comprising: a dummy source / drain electrode; and a thin film transistor for detecting overlay displacement, which detects overlay displacement of a wiring pattern. 2. The substrate for a liquid crystal display device according to claim 1, wherein one of the dummy source / drain electrodes is formed so as to overlap with the oblique edge when viewed in a direction perpendicular to the substrate surface. A substrate for a liquid crystal display device, comprising: 3. A substrate α formed of a first opaque layer and having an opening and having a size to cover the opening with a second opaque layer via an insulating film. A misalignment detection pattern β arranged to overlap at least a part of the opening when viewed in a direction perpendicular to the plane, and has a misalignment detection pattern for detecting misalignment of the wiring pattern. A substrate for a liquid crystal display device, comprising: 4. A first substrate formed of an opaque layer and provided with an overlay detection pattern α having an opening; and a first substrate facing the first substrate and having a size to close the opening. A second substrate formed of an opaque layer and provided with an overlay misregistration detection pattern β arranged so as to overlap at least a part of the opening when viewed in a direction perpendicular to the substrate surface; And a liquid crystal sealed between the two substrates. 5. A side etching amount measurement pattern .alpha. Formed of a first opaque layer and having an opening, and a second opaque layer formed through an insulating film so as to cover said opening and perpendicular to the substrate surface. A side etching amount measurement pattern provided with a side etching amount measurement pattern β disposed so as to overlap at least a part of the opening when viewed in a desired direction.