JP2002203819A - Cmp abrasive and method for polishing substrate - Google Patents

Cmp abrasive and method for polishing substrate

Info

Publication number
JP2002203819A
JP2002203819A JP2000399809A JP2000399809A JP2002203819A JP 2002203819 A JP2002203819 A JP 2002203819A JP 2000399809 A JP2000399809 A JP 2000399809A JP 2000399809 A JP2000399809 A JP 2000399809A JP 2002203819 A JP2002203819 A JP 2002203819A
Authority
JP
Japan
Prior art keywords
polishing
substrate
film
cerium oxide
polished
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000399809A
Other languages
Japanese (ja)
Inventor
Takashi Sakurada
剛史 櫻田
Koji Haga
浩二 芳賀
Keizo Hirai
圭三 平井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP2000399809A priority Critical patent/JP2002203819A/en
Publication of JP2002203819A publication Critical patent/JP2002203819A/en
Pending legal-status Critical Current

Links

Landscapes

  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Weting (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a CMP abrasive capable of accurately determining the polishing end point of a polished surface of a substrate and a method for polishing the substrate capable of accurately determining the polishing end point of the polished surface of the substrate, which provides high planarity. SOLUTION: This CMP abrasive of cerium oxide comprises slurry where the torque of rotation axis of a polishing surface plate at polishing end is 1.2-2 times at polishing start and the torque becomes greatest 10-30 seconds before the polishing end. In this method for polishing the substrate, the substrate on which a polished film has been formed is pressed onto a polishing cloth of the polishing surface plate and is pressurized, and while supplying the CMP abrasive between the polishing film and the polishing cloth, the polished film is polished by rotating the substrate and the polishing surface plate.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子製造技
術である基板表面の平坦化工程、特に、層間絶縁膜の平
坦化工程、シャロー・トレンチ分離の形成工程等におい
て使用されるCMP研磨剤及びこれらCMP研磨剤を使
用した基板の研磨方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CMP polishing agent used in a flattening process of a substrate surface, which is a semiconductor device manufacturing technology, in particular, a flattening process of an interlayer insulating film, a forming process of shallow trench isolation, and the like. The present invention relates to a method for polishing a substrate using these CMP abrasives.

【0002】[0002]

【従来の技術】現在の超々大規模集積回路では、実装密
度を高める傾向にあり、種々の微細加工技術が研究、開
発されている。既に、デザインルールは、サブハーフミ
クロンのオーダーになっている。このような厳しい微細
化の要求を満足するために開発されている技術の一つに
CMP(ケミカルメカニカルポリッシング)技術があ
る。この技術は、半導体装置の製造工程において、露光
を施す層を完全に平坦化し、露光技術の負担を軽減し、
歩留まりを安定させることができるため、例えば、層間
絶縁膜の平坦化、シャロー・トレンチ分離等を行う際に
必須となる技術である。
2. Description of the Related Art At present, ultra-large-scale integrated circuits tend to increase the packing density, and various microfabrication techniques have been studied and developed. Already, design rules are on the order of sub-half microns. One of the technologies that have been developed to satisfy such strict requirements for miniaturization is a CMP (Chemical Mechanical Polishing) technology. This technology completely flattens the layer to be exposed in the semiconductor device manufacturing process, reducing the burden of the exposure technology,
Since the yield can be stabilized, the technique is indispensable when performing, for example, planarization of an interlayer insulating film, isolation of a shallow trench, and the like.

【0003】従来、半導体装置の製造工程において、プ
ラズマ−CVD(ChemicalVapor Deposition、化学的蒸
着法)、低圧−CVD等の方法で形成される酸化珪素絶
縁膜等無機絶縁膜層を平坦化するためのCMP研磨剤と
して、フュームドシリカ系の研磨剤が一般的に検討され
ていた。フュームドシリカ系の研磨剤は、シリカ粒子を
四塩化珪酸に熱分解する等の方法で粒成長させ、pH調整
を行って製造している。しかしながら、この様な研磨剤
は無機絶縁膜の研磨速度が充分な速度をもたず、実用化
には低研磨速度という技術課題があった。
Conventionally, in a semiconductor device manufacturing process, an inorganic insulating film layer such as a silicon oxide insulating film formed by a method such as plasma-CVD (Chemical Vapor Deposition) or low-pressure-CVD is used to flatten. Fumed silica-based abrasives have been generally studied as CMP abrasives. The fumed silica-based abrasive is produced by subjecting silica particles to particle growth by a method such as thermal decomposition to tetrachlorosilicic acid and adjusting the pH. However, such a polishing agent does not have a sufficient polishing rate for the inorganic insulating film, and there has been a technical problem of a low polishing rate for practical use.

【0004】従来の層間絶縁膜を平坦化するCMP技術
では、研磨速度の基板上被研磨膜のパターン依存性が大
きく、パターン密度差或いはサイズ差の大小により凸部
の研磨速度が大きく異なり、また凹部の研磨も進行して
しまうため、ウエハ面内全体での高いレベルの平坦化を
実現することができないという技術課題があった。
In the conventional CMP technique for flattening an interlayer insulating film, the polishing rate largely depends on the pattern of a film to be polished on a substrate, and the polishing rate of a convex portion differs greatly depending on the pattern density difference or size difference. Since the polishing of the concave portion also proceeds, there has been a technical problem that a high level of planarization cannot be realized over the entire wafer surface.

【0005】また、層間膜を平坦化するCMP技術で
は、層間膜の途中で研磨を終了する必要があり、研磨量
の制御を研磨時間で行うプロセス管理方法が一般的に行
われている。しかし、パターン段差形状の変化だけでな
く、研磨布の状態等でも、研磨速度が顕著に変化してし
まうため、プロセス管理が難しいという問題があった。
In the CMP technique for flattening an interlayer film, it is necessary to finish polishing in the middle of the interlayer film, and a process management method for controlling a polishing amount by a polishing time is generally performed. However, there has been a problem that not only the change in the pattern step shape but also the state of the polishing cloth significantly changes the polishing rate, making process management difficult.

【0006】デザインルール0.5μm以上の世代で
は、集積回路内の素子分離にLOCOS(シリコン局所
酸化)が用いられていた。その後さらに加工寸法が微細
化すると素子分離幅の狭い技術が要求され、シャロー・
トレンチ分離が用いられつつある。シャロー・トレンチ
分離では、基板上に成膜した余分の酸化珪素膜を除くた
めにCMPが使用され、研磨を停止させるために、酸化
珪素膜の下に研磨速度の遅いストッパ膜が形成される。
ストッパ膜には窒化珪素などが使用され、酸化珪素膜と
ストッパ膜との研磨速度比が大きいことが望ましい。
In the generation of the design rule of 0.5 μm or more, LOCOS (local silicon oxidation) has been used for element isolation in an integrated circuit. After that, when the processing dimensions are further reduced, the technology for narrowing the element separation width is required,
Trench isolation is being used. In the shallow trench isolation, CMP is used to remove an excess silicon oxide film formed on the substrate, and a stopper film having a low polishing rate is formed below the silicon oxide film to stop polishing.
Silicon nitride or the like is used for the stopper film, and it is desirable that the polishing rate ratio between the silicon oxide film and the stopper film is large.

【0007】従来のフュームドシリカ系の研磨剤は、上
記の酸化珪素膜とストッパ膜の研磨速度比が3程度と小
さく、シャロー・トレンチ分離用としては実用に耐える
特性を有していなかった。研磨が終了したかどうかの判
定手段として研磨定盤のトルクを測定する方法がある。
この方法は研磨量や研磨膜によってトルクが変化するこ
とを利用したものだが、精度がよくないという問題があ
った。
The conventional fumed silica-based abrasive has a polishing rate ratio of the silicon oxide film and the stopper film as small as about 3 and does not have characteristics that can be practically used for shallow trench isolation. As a means for determining whether or not polishing has been completed, there is a method of measuring the torque of the polishing platen.
This method utilizes the fact that the torque changes depending on the polishing amount and the polishing film, but has a problem that accuracy is not good.

【0008】一方、フォトマスクやレンズ等のガラス表
面研磨剤として、酸化セリウム研磨剤が用いられてい
る。酸化セリウム粒子はシリカ粒子やアルミナ粒子に比
べ硬度が低く、したがって、研磨表面に傷が入りにくい
ことから、仕上げ鏡面研磨に有用である。しかしなが
ら、ガラス表面研磨用酸化セリウム研磨剤にはナトリウ
ム塩を含む分散剤を使用しているため、そのまま半導体
用研磨剤として適用することはできない。
On the other hand, cerium oxide abrasives have been used as abrasives for glass surfaces such as photomasks and lenses. Cerium oxide particles have a lower hardness than silica particles and alumina particles and are therefore less likely to scratch the polished surface, and thus are useful for finish mirror polishing. However, since a cerium oxide abrasive for polishing a glass surface uses a dispersant containing a sodium salt, it cannot be directly used as an abrasive for semiconductors.

【0009】[0009]

【発明が解決しようとする課題】請求項1〜3記載の発
明は、高平坦化可能であり、基盤の被研磨面の研磨の終
点を精度よく判定可能なCMP研磨剤を提供するもので
ある。請求項4記載の発明は、基板の被研磨面の研磨の
終点を精度よく判定可能な基板の研磨方法を提供するも
のである。
SUMMARY OF THE INVENTION The invention according to claims 1 to 3 provides a CMP polishing agent which can be highly flattened and which can accurately determine the end point of polishing of a polished surface of a substrate. . A fourth aspect of the present invention provides a substrate polishing method capable of accurately determining an end point of polishing of a polished surface of a substrate.

【0010】[0010]

【課題を解決するための手段】本発明は、研磨終了時の
研磨定盤回転軸のトルクが研磨開始時の1.2〜2倍で
あり、研磨終了時の10〜30秒前にトルクが最大にな
るスラリーからなる酸化セリウムCMP研磨剤に関す
る。
According to the present invention, the torque of the polishing platen rotating shaft at the end of polishing is 1.2 to 2 times that at the start of polishing, and the torque is increased 10 to 30 seconds before the end of polishing. It relates to a cerium oxide CMP polishing slurry consisting of a slurry which is maximized.

【0011】また、本発明は、酸化セリウム粒子、分散
剤及び水を含む酸化セリウムスラリー及び高分子添加剤
と水を含む添加液からなる前記のCMP研磨剤に関す
る。また、本発明は、分散剤および高分子添加剤が水溶
性有機高分子、水溶性陰イオン性界面活性剤、水溶性非
イオン性界面活性剤から選ばれる少なくとも1種の化合
物である前記のCMP研磨剤に関する。
[0011] The present invention also relates to the above-mentioned CMP polishing slurry comprising a cerium oxide slurry containing cerium oxide particles, a dispersant and water and an additive liquid containing a polymer additive and water. Further, the present invention provides the above CMP wherein the dispersant and the polymer additive are at least one compound selected from a water-soluble organic polymer, a water-soluble anionic surfactant, and a water-soluble nonionic surfactant. For abrasives.

【0012】また、本発明は、研磨する膜を形成した基
板を研磨定盤の研磨布に押しあて加圧し、前記のCMP
研磨剤を研磨膜と研磨布との間に供給しながら、基板と
研磨定盤を回転して研磨する膜を研磨する基板の研磨方
法に関する
Further, in the present invention, the substrate on which a film to be polished is formed is pressed against a polishing cloth of a polishing platen and pressurized.
The present invention relates to a substrate polishing method for polishing a film to be polished by rotating a substrate and a polishing plate while supplying an abrasive between a polishing film and a polishing cloth.

【0013】[0013]

【発明の実施の形態】本発明の酸化セリウムCMP研磨
剤は、研磨終了時の研磨定盤回転軸のトルクが研磨開始
時の1.2〜2倍であり、研磨終了時の10〜30秒前
にトルクが最大になるスラリーからなる。研磨定盤回転
軸のトルクは本発明のCMP研磨剤による研磨時に研磨
定盤を駆動するモーター電流を測定するか、研磨定盤回
転軸のひずみ量を測定することで得られる。研磨時には
研磨粒子と被研磨膜の間に摩擦が生じ、トルクが増加す
る。研磨が進行し被研磨膜が凹凸の無い平坦な面になる
とトルクは減少する。
BEST MODE FOR CARRYING OUT THE INVENTION The cerium oxide CMP abrasive of the present invention has a polishing platen rotating shaft torque at the end of polishing 1.2 to 2 times that at the start of polishing and 10 to 30 seconds at the end of polishing. Previously consisted of a slurry that maximized torque. The torque of the polishing platen rotating shaft can be obtained by measuring a motor current for driving the polishing platen at the time of polishing with the CMP polishing slurry of the present invention, or by measuring a distortion amount of the polishing platen rotating shaft. During polishing, friction occurs between the polishing particles and the film to be polished, and the torque increases. When the polishing proceeds and the film to be polished becomes a flat surface without irregularities, the torque decreases.

【0014】本発明ではトルクが最大値を示した10〜
30秒後を研磨終点とし、トルクを測定することで研磨
の終点を容易に判定することが可能で、高平坦性が達成
できる。ここでトルクが最大値を示さない(単調増加的
に増えていきやがて飽和していく等)場合は、研磨の終
点を容易に判定することができないため作業性、歩留ま
りが劣り、高平坦性が達成できない。また、研磨終了時
の研磨定盤回転軸のトルクが研磨開始時の1.2〜2倍
の範囲外では、プロセスマージンが小さすぎて作業性に
劣り、また、高平坦性が達成できず、場合により研磨キ
ズが発生する。
In the present invention, the torque has a maximum value of 10 to 10.
The end point of polishing can be easily determined by measuring the torque after 30 seconds as the polishing end point, and high flatness can be achieved. Here, when the torque does not show the maximum value (for example, it increases monotonically and eventually becomes saturated), the end point of polishing cannot be easily determined, so that the workability, the yield, and the high flatness are poor. I can't achieve it. Further, when the torque of the polishing platen rotating shaft at the end of polishing is out of the range of 1.2 to 2 times that at the start of polishing, the process margin is too small, resulting in poor workability, and high flatness cannot be achieved. In some cases, polishing scratches occur.

【0015】酸化セリウムCMP研磨剤のトルク特性を
上記のような範囲とすることは、酸化セリウム粒子(そ
の粒径、粒径分布)、添加する薬剤の種類と量、酸化セ
リウムCMP研磨剤のpHや固形分濃度等を調整すること
により行える。
[0015] The torque characteristics of the cerium oxide CMP abrasive within the above-mentioned range include the cerium oxide particles (particle size and particle size distribution), the type and amount of the added agent, and the pH of the cerium oxide CMP abrasive. And by adjusting the solid content concentration and the like.

【0016】本発明における酸化セリウムは、炭酸塩、
硝酸塩、硫酸塩、しゅう酸塩のセリウム化合物を酸化す
ることによって得られる。TEOS−CVD法等で形成
される酸化珪素膜の研磨に使用する酸化セリウム研磨剤
は、一次粒子径が大きく、かつ結晶ひずみが少ないほ
ど、すなわち結晶性が良いほど高速研磨が可能である
が、研磨傷が入りやすい傾向がある。そこで、本発明で
用いる酸化セリウム粒子は、その製造方法を限定するも
のではないが、酸化セリウム結晶子径は5nm以上300
nm以下であることが好ましい。また、半導体チップ研磨
に使用することから、アルカリ金属及びハロゲン類の含
有率は酸化セリウム粒子中10ppm以下に抑えることが
好ましい。
The cerium oxide in the present invention is a carbonate,
It is obtained by oxidizing cerium compounds of nitrates, sulfates and oxalates. A cerium oxide abrasive used for polishing a silicon oxide film formed by a TEOS-CVD method or the like can be polished at a high speed as the primary particle diameter is large and the crystal distortion is small, that is, the crystallinity is good. Polishing scratches tend to occur. Therefore, the cerium oxide particles used in the present invention are not limited to a method for producing the cerium oxide particles.
It is preferably not more than nm. Further, since it is used for polishing a semiconductor chip, the content of alkali metals and halogens is preferably suppressed to 10 ppm or less in cerium oxide particles.

【0017】本発明において、酸化セリウム粉末を作製
する方法として焼成または過酸化水素等による酸化法が
使用できる。焼成温度は350〜900℃が好ましい。
上記の方法により製造された酸化セリウム粒子は凝集し
ているため、機械的に粉砕することが好ましい。粉砕方
法として、ジェットミル等による乾式粉砕や遊星ビーズ
ミル等による湿式粉砕方法が好ましい。ジェットミルは
例えば化学工業論文集第6巻第5号(1980)527〜532頁
に説明されている。
In the present invention, as a method for producing cerium oxide powder, calcination or an oxidation method using hydrogen peroxide or the like can be used. The firing temperature is preferably from 350 to 900C.
Since the cerium oxide particles produced by the above method are agglomerated, it is preferable to mechanically pulverize the particles. As the pulverization method, a dry pulverization method using a jet mill or the like or a wet pulverization method using a planetary bead mill or the like is preferable. The jet mill is described in, for example, Chemical Industry Transactions, Vol. 6, No. 5, (1980), pp. 527-532.

【0018】本発明におけるCMP研磨剤は、例えば、
上記の特徴を有する酸化セリウム粒子と分散剤と水から
なる組成物を分散させ、さらに高分子添加剤を添加する
ことによって得られる。ここで、酸化セリウム粒子の濃
度に制限はないが、分散液の取り扱いやすさから0.5
〜20重量%の範囲が好ましい。また、分散剤として、
半導体素子研磨に使用することから、ナトリウムイオ
ン、カリウムイオン等のアルカリ金属及びハロゲン、イ
オウの含有率は10ppm以下に抑えることが好ましく、
例えば、共重合成分としてアクリル酸アンモニウム塩を
含む高分子分散剤が好ましい。また、高分子添加剤とし
てアクリル酸アンモニウム塩を含む高分子添加剤と水溶
性陰イオン性界面活性剤、水溶性非イオン性界面活性
剤、および水溶性アミンから選ばれた少なくとも1種類
を使用することが好ましい。
In the present invention, for example, the CMP abrasive is
It is obtained by dispersing a composition comprising cerium oxide particles having the above characteristics, a dispersant and water, and further adding a polymer additive. Here, the concentration of the cerium oxide particles is not limited, but is preferably 0.5% because of easy handling of the dispersion.
The range of -20% by weight is preferred. Also, as a dispersant,
Since it is used for polishing semiconductor elements, the content of alkali metals such as sodium ions and potassium ions and halogens and sulfur is preferably suppressed to 10 ppm or less,
For example, a polymer dispersant containing ammonium acrylate as a copolymer component is preferable. In addition, as a polymer additive, a polymer additive containing ammonium acrylate and at least one selected from a water-soluble anionic surfactant, a water-soluble nonionic surfactant, and a water-soluble amine are used. Is preferred.

【0019】水溶性陰イオン性分散剤としては、例え
ば、ラウリル硫酸トリエタノールアミン、ラウリル硫酸
アンモニウム、ポリオキシエチレンアルキルエーテル硫
酸トリエタノールアミン、特殊ポリカルボン酸型高分子
分散剤等が挙げられ、水溶性非イオン性分散剤として
は、例えば、ポリオキシエチレンラウリルエーテル、ポ
リオキシエチレンセチルエーテル、ポリオキシエチレン
ステアリルエーテル、ポリオキシエチレンオレイルエー
テル、ポリオキシエチレン高級アルコールエーテル、ポ
リオキシエチレンオクチルフェニルエーテル、ポリオキ
シエチレンノニルフェニルエーテル、ポリオキシアルキ
レンアルキルエーテル、ポリオキシエチレン誘導体、ポ
リオキシエチレンソルビタンモノラウレート、ポリオキ
シエチレンソルビタンモノパルミテート、ポリオキシエ
チレンソルビタンモノステアレート、ポリオキシエチレ
ンソルビタントリステアレート、ポリオキシエチレンソ
ルビタンモノオレエート、ポリオキシエチレンソルビタ
ントリオレエート、テトラオレイン酸ポリオキシエチレ
ンソルビット、ポリエチレングリコールモノラウレー
ト、ポリエチレングリコールモノステアレート、ポリエ
チレングリコールジステアレート、ポリエチレングリコ
ールモノオレエート、ポリオキシエチレンアルキルアミ
ン、ポリオキシエチレン硬化ヒマシ油、ポリビニルピロ
リドン、アルキルアルカノールアミド等が挙げられる。
Examples of the water-soluble anionic dispersant include triethanolamine lauryl sulfate, ammonium lauryl sulfate, polyoxyethylene alkyl ether triethanolamine sulfate, special polycarboxylic acid type polymer dispersants, and the like. Examples of the nonionic dispersant include polyoxyethylene lauryl ether, polyoxyethylene cetyl ether, polyoxyethylene stearyl ether, polyoxyethylene oleyl ether, polyoxyethylene higher alcohol ether, polyoxyethylene octyl phenyl ether, polyoxyethylene Ethylene nonyl phenyl ether, polyoxyalkylene alkyl ether, polyoxyethylene derivative, polyoxyethylene sorbitan monolaurate, polyoxyethylene sorbitan Nopalmitate, polyoxyethylene sorbitan monostearate, polyoxyethylene sorbitan tristearate, polyoxyethylene sorbitan monooleate, polyoxyethylene sorbitan trioleate, polyoxyethylene sorbate tetraoleate, polyethylene glycol monolaurate, polyethylene glycol mono Examples include stearate, polyethylene glycol distearate, polyethylene glycol monooleate, polyoxyethylene alkylamine, polyoxyethylene hydrogenated castor oil, polyvinylpyrrolidone, and alkyl alkanolamide.

【0020】これらの分散剤添加量は、スラリー中の粒
子の分散性及び沈降防止、さらに研磨傷と分散剤添加量
との関係から酸化セリウム粒子100重量部に対して、
0.01重量部以上2.0重量部以下の範囲が好まし
い。
The amount of the dispersant added is determined based on the dispersibility of the particles in the slurry and the prevention of sedimentation.
The range is preferably from 0.01 part by weight to 2.0 parts by weight.

【0021】また、高分子添加剤添加量は、酸化セリウ
ム粒子100重量部に対して、1重量部以上1000重
量部以下の範囲が好ましい。分散剤及び高分子添加剤の
重量平均分子量は100〜50,000が好ましく、
1,000〜10,000がより好ましい。
The amount of the polymer additive is preferably in the range of 1 to 1000 parts by weight based on 100 parts by weight of the cerium oxide particles. The weight average molecular weight of the dispersant and the polymer additive is preferably from 100 to 50,000,
1,000 to 10,000 is more preferred.

【0022】分散剤及び高分子添加剤の分子量が100
未満の場合は、酸化珪素膜あるいは窒化珪素膜を研磨す
るときに、充分な研磨速度が得られず、分散剤及び高分
子添加剤の分子量が50,000を超えた場合は、粘度
が高くなり、CMP研磨剤の保存安定性が低下するから
である。なお、重量平均分子量は、ゲルパーミエーショ
ンクロマトグラフィーで測定し、標準ポリスチレン換算
した値である。
The molecular weight of the dispersant and the polymer additive is 100
If the molecular weight of the dispersant and the polymer additive exceeds 50,000, the viscosity becomes high when the silicon oxide film or the silicon nitride film is polished. This is because the storage stability of the CMP abrasive decreases. The weight average molecular weight is a value measured by gel permeation chromatography and converted to standard polystyrene.

【0023】これらの酸化セリウム粒子を水中に分散さ
せる方法としては、通常の攪拌機による分散処理の他に
ホモジナイザー、超音波分散機、湿式ボールミルなどを
用いることができる。
As a method for dispersing these cerium oxide particles in water, a homogenizer, an ultrasonic disperser, a wet ball mill, or the like can be used in addition to a usual dispersion treatment using a stirrer.

【0024】こうして作製されたCMP研磨剤中の酸化
セリウム粒子の平均粒径は、0.01μm〜1.0μm
であることが好ましい。酸化セリウム粒子の平均粒径が
0.01μm未満であると研磨速度が低くなりすぎ、
1.0μmを超えると研磨する膜に傷がつきやすくなる
からである。
The average particle size of the cerium oxide particles in the thus prepared CMP abrasive is 0.01 μm to 1.0 μm.
It is preferred that If the average particle size of the cerium oxide particles is less than 0.01 μm, the polishing rate is too low,
If the thickness exceeds 1.0 μm, the film to be polished is easily damaged.

【0025】酸化セリウム粒子、分散剤、及び水からな
る酸化セリウムスラリーと、高分子添加剤及び水からな
る添加液とを分けたCMP研磨剤として保存すると酸化
セリウム粒子が凝集しないため、保存安定性が増し、研
磨傷の発生防止、研磨速度の安定化が得られて好まし
い。上記のCMP研磨剤で基板を研磨する際に、添加液
は、酸化セリウムスラリーと別々に研磨定盤上に供給
し、研磨定盤上で混合するか、研磨直前に酸化セリウム
スラリーと混合し研磨定盤上に供給する方法がとられ
る。
When a cerium oxide slurry composed of cerium oxide particles, a dispersant, and water and an additive solution composed of a polymer additive and water are stored as a separate CMP abrasive, the cerium oxide particles do not agglomerate. Is increased, and the generation of polishing scratches can be prevented, and the polishing rate can be stabilized. When polishing a substrate with the above-mentioned CMP abrasive, the additive liquid is supplied separately to the polishing platen and the cerium oxide slurry, and mixed on the polishing platen, or mixed with the cerium oxide slurry immediately before polishing. The method of supplying on a surface plate is taken.

【0026】本発明のCMP研磨剤が使用される無機絶
縁膜の作製方法として、低圧CVD法、プラズマCVD
法等が挙げられる。低圧CVD法による酸化珪素膜形成
は、Si源としてモノシラン:SiH4、酸素源として
酸素:O2を用いる。このSiH4−O2系酸化反応を4
00℃以下の低温で行わせることにより得られる。場合
によっては、CVD後1000℃またはそれ以下の温度
で熱処理される。高温リフローによる表面平坦化を図る
ためにリン:Pをドープするときには、SiH4−O2
PH3系反応ガスを用いることが好ましい。
As a method of forming an inorganic insulating film using the CMP polishing slurry of the present invention, low pressure CVD, plasma CVD, etc.
And the like. In forming a silicon oxide film by low-pressure CVD, monosilane: SiH 4 is used as a Si source, and oxygen: O 2 is used as an oxygen source. This SiH 4 —O 2 -based oxidation reaction
It is obtained by performing at a low temperature of 00 ° C. or less. In some cases, heat treatment is performed at a temperature of 1000 ° C. or lower after CVD. When doping phosphorus: P for planarizing the surface by high temperature reflow, SiH 4 —O 2
It is preferable to use a PH 3 based reaction gas.

【0027】プラズマCVD法は、通常の熱平衡下では
高温を必要とする化学反応が低温でできる利点を有す
る。プラズマ発生法には、容量結合型と誘導結合型の2
つが挙げられる。反応ガスとしては、Si源としてSi
4、酸素源としてN2Oを用いたSiH4−N2O系ガス
とテトラエトキシシラン(TEOS)をSi源に用いた
TEOS−O2系ガス(TEOS−プラズマCVD法)
が挙げられる。基板温度は250℃〜400℃、反応圧
力は67〜400Paの範囲が好ましい。
The plasma CVD method has an advantage that a chemical reaction requiring a high temperature can be performed at a low temperature under normal thermal equilibrium. There are two types of plasma generation methods, capacitive coupling type and inductive coupling type.
One is. As a reaction gas, Si is used as a Si source.
H 4, SiH 4 -N 2 O-based gas and TEOS-O 2 based gas using tetraethoxysilane (TEOS) to Si source using N 2 O as oxygen source (TEOS-plasma CVD method)
Is mentioned. The substrate temperature is preferably in the range of 250 ° C. to 400 ° C., and the reaction pressure is preferably in the range of 67 to 400 Pa.

【0028】このように、本発明の酸化珪素膜にはリ
ン、ホウ素等の元素がドープされていても良い。同様
に、低圧CVD法による窒化珪素膜形成は、Si源とし
てジクロロシラン:SiH2Cl2、窒素源としてアンモ
ニア:NH3を用いる。このSiH2Cl2−NH3系酸化
反応を900℃の高温で行わせることにより得られる。
プラズマCVD法は、反応ガスとしては、Si源として
SiH4、窒素源としてNH3を用いたSiH4−NH3
ガスが挙げられる。基板温度は300℃〜400℃が好
ましい。
As described above, the silicon oxide film of the present invention may be doped with an element such as phosphorus and boron. Similarly, in forming a silicon nitride film by low-pressure CVD, dichlorosilane: SiH 2 Cl 2 is used as a Si source, and ammonia: NH 3 is used as a nitrogen source. This is obtained by performing the SiH 2 Cl 2 —NH 3 based oxidation reaction at a high temperature of 900 ° C.
In the plasma CVD method, a SiH 4 —NH 3 gas using SiH 4 as a Si source and NH 3 as a nitrogen source is used as a reaction gas. The substrate temperature is preferably from 300C to 400C.

【0029】基板として、半導体基板すなわち回路素子
と配線パターンが形成された段階の半導体基板、回路素
子が形成された段階の半導体基板等の半導体基板上に酸
化珪素膜層あるいは窒化珪素膜層が形成された基板が使
用できる。このような半導体基板上に形成された酸化珪
素膜層あるいは窒化珪素膜層を上記CMP研磨剤で研磨
することによって、酸化珪素膜層表面の凹凸を解消し、
半導体基板全面にわたって平滑な面とすることができ
る。また、シャロー・トレンチ分離にも使用できる。
As a substrate, a silicon oxide film layer or a silicon nitride film layer is formed on a semiconductor substrate such as a semiconductor substrate in which circuit elements and wiring patterns are formed, and a semiconductor substrate in which circuit elements are formed. Substrate can be used. By polishing the silicon oxide film layer or the silicon nitride film layer formed on such a semiconductor substrate with the above-mentioned CMP polishing agent, the unevenness on the surface of the silicon oxide film layer is eliminated,
A smooth surface can be provided over the entire surface of the semiconductor substrate. It can also be used for shallow trench isolation.

【0030】シャロー・トレンチ分離に使用するために
は、酸化珪素膜研磨速度と窒化珪素膜研磨速度の比、酸
化珪素膜研磨速度/窒化珪素膜研磨速度が10以上であ
ることが好ましい。この比が10未満では、酸化珪素膜
研磨速度と窒化珪素膜研磨速度の差が小さく、シャロー
・トレンチ分離をする際、所定の位置で研磨を停止しに
くくなる傾向がある。この比が10以上の場合は窒化珪
素膜の研磨速度がさらに小さくなって研磨の停止が容易
になり、シャロー・トレンチ分離により好適である。ま
た、シャロー・トレンチ分離に使用するためには、研磨
時に傷の発生が少ないことが好ましい。
For use in shallow trench isolation, it is preferable that the ratio of the polishing rate of the silicon oxide film to the polishing rate of the silicon nitride film, that is, the polishing rate of the silicon oxide film / the polishing rate of the silicon nitride film is 10 or more. If this ratio is less than 10, the difference between the polishing rate of the silicon oxide film and the polishing rate of the silicon nitride film is small, and it tends to be difficult to stop polishing at a predetermined position when performing shallow trench isolation. When this ratio is 10 or more, the polishing rate of the silicon nitride film is further reduced, and the polishing can be easily stopped, which is more suitable for shallow trench isolation. Further, in order to use it for shallow trench isolation, it is preferable that scratches are less generated during polishing.

【0031】ここで、研磨する装置としては、半導体基
板を保持するホルダーと研磨布(パッド)を貼り付け
た、回転数が変更可能なモータを取り付けてある定盤を
有する一般的な研磨装置が使用できる。研磨布として
は、一般的な不織布、発泡ポリウレタン、多孔質フッ素
樹脂などが使用でき、特に制限がない。また、研磨布に
はCMP研磨剤がたまるような溝加工を施すことが好ま
しい。研磨条件に制限はないが、定盤の回転速度は半導
体基板が飛び出さないように200rpm以下の低回転が
好ましく、半導体基板にかける圧力は研磨後に傷が発生
しないように1kg/cm2以下が好ましい。研磨している
間、研磨布にはスラリーをポンプ等で連続的に供給す
る。この供給量に制限はないが、研磨布の表面が常にス
ラリーで覆われていることが好ましい。
Here, as a polishing apparatus, a general polishing apparatus having a holder holding a semiconductor substrate and a polishing pad (a pad) and having a surface plate provided with a motor whose rotation speed can be changed is attached. Can be used. As the polishing cloth, general nonwoven fabric, foamed polyurethane, porous fluororesin and the like can be used, and there is no particular limitation. Further, it is preferable that the polishing cloth is subjected to a groove processing for accumulating a CMP abrasive. The polishing conditions are not limited, but the rotation speed of the surface plate is preferably 200 rpm or less so that the semiconductor substrate does not pop out, and the pressure applied to the semiconductor substrate is 1 kg / cm 2 or less so that no scratch occurs after polishing. preferable. During polishing, the slurry is continuously supplied to the polishing cloth by a pump or the like. Although the supply amount is not limited, it is preferable that the surface of the polishing pad is always covered with the slurry.

【0032】研磨終了後の半導体基板は、流水中で良く
洗浄後、スピンドライヤ等を用いて半導体基板上に付着
した水滴を払い落としてから乾燥させることが好まし
い。このようにして平坦化されたシャーロー・トレンチ
を形成したあと、酸化珪素絶縁膜層の上に、アルミニウ
ム配線を形成し、その配線間及び配線上に再度上記方法
により酸化珪素絶縁膜を形成後、上記CMP研磨剤を用
いて研磨することによって、絶縁膜表面の凹凸を解消
し、半導体基板全面にわたって平滑な面とする。この工
程を所定数繰り返すことにより、所望の層数の半導体を
製造する。
After the polishing is completed, the semiconductor substrate is preferably washed well in running water, and then dried using a spin drier or the like to remove water droplets adhering to the semiconductor substrate. After forming the shallow trench flattened in this manner, an aluminum wiring is formed on the silicon oxide insulating film layer, and a silicon oxide insulating film is formed again between the wirings and on the wiring by the above-described method. By polishing using the above-mentioned CMP polishing agent, irregularities on the surface of the insulating film are eliminated, and a smooth surface is formed over the entire surface of the semiconductor substrate. By repeating this process a predetermined number of times, a semiconductor having a desired number of layers is manufactured.

【0033】本発明のCMP研磨剤は、半導体基板に形
成された酸化珪素膜だけでなく、所定の配線を有する配
線板に形成された酸化珪素膜、ガラス、窒化珪素等の無
機絶縁膜、ポリシリコン、Al、Cu、Ti、TiN、
重量a、TaN等を主として含有する膜、フォトマスク
・レンズ・プリズム等の光学ガラス、ITO等の無機導
電膜、ガラス及び結晶質材料で構成される光集積回路・
光スイッチング素子・光導波路、光ファイバーの端面、
シンチレータ等の光学用単結晶、固体レーザ単結晶、青
色レーザLED用サファイヤ基板、SiC、GaP、G
aAS等の半導体単結晶、磁気ディスク用ガラス基板、
磁気ヘッド等を研磨することができる。
The CMP polishing slurry of the present invention can be used not only for a silicon oxide film formed on a semiconductor substrate, but also for a silicon oxide film formed on a wiring board having predetermined wiring, an inorganic insulating film such as glass and silicon nitride, and a polycrystalline silicon oxide. Silicon, Al, Cu, Ti, TiN,
Weight a, a film mainly containing TaN, etc., optical glass such as a photomask, a lens, a prism, etc., an inorganic conductive film such as ITO, an optical integrated circuit composed of glass and a crystalline material.
Optical switching elements / optical waveguides, end faces of optical fibers,
Optical single crystal such as scintillator, solid laser single crystal, sapphire substrate for blue laser LED, SiC, GaP, G
semiconductor single crystal such as aAS, glass substrate for magnetic disk,
The magnetic head and the like can be polished.

【0034】[0034]

【実施例】実施例1 (酸化セリウム粒子の作製)炭酸セリウム水和物2kgを
白金製容器に入れ、800℃で2時間空気中で焼成する
ことにより黄白色の粉末を約1kg得た。この粉末をX線
回折法で相同定を行ったところ酸化セリウムであること
を確認した。焼成粉末粒子径は30〜100μmであっ
た。焼成粉末粒子表面を走査型電子顕微鏡で観察したと
ころ、酸化セリウムの粒界が観察された。粒界に囲まれ
た酸化セリウム一次粒子径を測定したところ、体積分布
の中央値が190nm、最大値が500nmであった。酸化
セリウム粉末1kgをジェットミルを用いて乾式粉砕を行
った。粉砕粒子について走査型電子顕微鏡で観察したと
ころ、一次粒子径と同等サイズの小さな粒子の他に、1
〜3μmの大きな粉砕残り粒子と0.5〜1μmの粉砕
残り粒子が混在していた。
Example 1 (Preparation of cerium oxide particles) 2 kg of cerium carbonate hydrate was placed in a platinum container and calcined at 800 ° C. for 2 hours in the air to obtain about 1 kg of a yellowish white powder. The powder was subjected to phase identification by X-ray diffraction to confirm that it was cerium oxide. The particle diameter of the calcined powder was 30 to 100 μm. When the surface of the fired powder particles was observed with a scanning electron microscope, grain boundaries of cerium oxide were observed. When the primary particle diameter of the cerium oxide surrounded by the grain boundaries was measured, the median of the volume distribution was 190 nm and the maximum was 500 nm. 1 kg of cerium oxide powder was dry-ground using a jet mill. Observation of the pulverized particles with a scanning electron microscope revealed that, in addition to small particles having the same size as the primary particle size, 1
Large residual particles of about 3 μm and residual particles of 0.5 to 1 μm were mixed.

【0035】(酸化セリウムスラリーの作製)上記作製
の酸化セリウム粒子1kgとポリアクリル酸アンモニウム
塩水溶液(40重量%)23gと脱イオン水8977g
を混合し、撹拌しながら超音波分散を10分間施した。
得られたスラリーを1ミクロンフィルターでろ過をし、
さらに脱イオン水を加えることにより5重量%スラリー
を得た。スラリーpHは8.3であった。スラリー粒子を
レーザ回折式粒度分布計で測定するために、適当な濃度
に希釈して測定した結果、粒子径の中央値が190nmで
あった。
(Preparation of Cerium Oxide Slurry) 1 kg of the cerium oxide particles prepared above, 23 g of an aqueous solution of ammonium polyacrylate (40% by weight), and 8977 g of deionized water
Was mixed and subjected to ultrasonic dispersion for 10 minutes while stirring.
The resulting slurry is filtered through a 1 micron filter,
Further 5% by weight slurry was obtained by adding deionized water. The slurry pH was 8.3. As a result of diluting the slurry particles to an appropriate concentration in order to measure them with a laser diffraction type particle size distribution meter, the median value of the particle diameter was 190 nm.

【0036】(層間絶縁膜の研磨)直径200mmのSi
基板上にLine/Space幅が0.05〜5mmで高さが100
0nmのAl配線Line部を形成した後、その上にTE
OS−プラズマCVD法で酸化珪素膜を2000nm形成
したパターンウエハを作製する。保持する基板取り付け
用の吸着パッドを貼り付けたホルダーに上記パターンウ
エハをセットし、多孔質ウレタン樹脂製の研磨パッドを
貼り付けた直径600mmの定盤上に絶縁膜面を下にして
ホルダーを載せ、さらに加工荷重を30000Pa(30
0gf/cm2)に設定した。定盤上に上記の酸化セリウム研
磨剤(固形分:1重量%)と高分子添加剤であるポリア
クリル酸アンモニウム(固形分:2.4重量%)の混合
物(前者/後者の重量比が1/4)を200ml/minの速
度で滴下しながら、定盤及びウエハを50min-1で2.
5分間回転させ、絶縁膜を研磨した。研磨後のウエハを
純水で良く洗浄後、乾燥した。
(Polishing of interlayer insulating film) Si having a diameter of 200 mm
Line / Space width is 0.05-5mm and height is 100 on the substrate
After forming a 0 nm Al wiring Line portion, TE
A pattern wafer having a 2000 nm-thick silicon oxide film formed by OS-plasma CVD is manufactured. The above-mentioned pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film surface down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. , And a processing load of 30,000 Pa (30
0 gf / cm 2 ). A mixture of the above-mentioned cerium oxide abrasive (solid content: 1% by weight) and a polymer additive polyammonium polyacrylate (solids content: 2.4% by weight) (the former / latter weight ratio was 1) / 4) dropwise at a rate of 200 ml / min, the platen and the wafer at 50min -1 2.
After rotating for 5 minutes, the insulating film was polished. The polished wafer was thoroughly washed with pure water and then dried.

【0037】同様に、研磨時間を3分、3.5分にして
上記パターンウエハの研磨を行った。Si基板中心部に
位置するLine/Space幅0.1mmのLine部分とSpace部分
の段差ScとSpace部分の膜厚Tc、Si基板中心部か
ら半径方向50mmのところに位置するLine/Space幅0.
1mmのLine部分とSpace部分の段差SmとSpace部分の膜
厚Tm、Si基板中心部から半径方向90mmに位置する
Line/Space幅0.1mmのLine部分とSpace部分の段差Se
とSpace部分の膜厚Teを測定した。段差は触針式段差
計、膜厚は光干渉式膜厚計を用いて測定した。
In the same manner, the pattern wafer was polished with a polishing time of 3 minutes and 3.5 minutes. A line / space width 0.1 mm located at the center of the Si substrate, a step Sc of the Line portion having a line / space width of 0.1 mm, a film thickness Tc of the Space portion, and a line / space width of 0.5 mm located 50 mm in the radial direction from the center of the Si substrate.
Step Sm of 1 mm Line portion and Space portion and film thickness Tm of Space portion, located 90 mm in radial direction from the center of Si substrate
Line / Space Step of Se of 0.1mm width Line part and Space part
And the film thickness Te of the Space portion were measured. The step was measured using a stylus-type step meter, and the film thickness was measured using a light interference type film thickness meter.

【0038】研磨時間が2.5分の時、段差Sc、S
m、Seが40、30、40nm、膜厚Tc、Tm、Te
が1450、1500、1500となった。また、研磨
時間が3分の時、段差Sc、Sm、Seが20、15、
30nm、膜厚Tc、Tm、Teが1400、1430、
1440となった。さらに研磨時間が3.5分の時、段
差Sc、Sm、Seが40、30、50nm、膜厚Tc、
Tm、Teが1380、1430、1420となった。
研磨時間が3分の時に最も平坦性がよかったので、研磨
時間3分を研磨終点とした。研磨開始時の研磨定盤回転
軸のトルクを1とすると3分後の研磨終了時のトルクは
1.5であった。また、トルクは研磨終了時の10秒前
に最大値1.6を示した。トルクが最大値を取った10
秒後に研磨の終点になるので、トルクの変化を読み取る
ことで研磨終点を決定することが可能だった。
When the polishing time is 2.5 minutes, steps Sc, S
m, Se are 40, 30, 40 nm, and film thicknesses Tc, Tm, Te
Were 1450, 1500 and 1500. When the polishing time is 3 minutes, the steps Sc, Sm, Se are 20, 15,
30 nm, film thicknesses Tc, Tm and Te are 1400, 1430,
1440. Further, when the polishing time is 3.5 minutes, the steps Sc, Sm, and Se are 40, 30, and 50 nm, the film thickness Tc,
Tm and Te were 1380, 1430 and 1420.
Since the flatness was the best when the polishing time was 3 minutes, the polishing time of 3 minutes was taken as the polishing end point. Assuming that the torque of the polishing table rotating shaft at the start of polishing is 1, the torque at the end of polishing after 3 minutes is 1.5. Further, the torque showed a maximum value of 1.6 ten seconds before the end of polishing. The torque took the maximum value 10
Since the end point of the polishing is reached after a lapse of seconds, it was possible to determine the polishing end point by reading the change in the torque.

【0039】(シャロー・トレンチ分離絶縁膜の研磨)
直径200mmのSi基板上にプラズマCVD法で窒化珪
素膜を150nm形成し、Line/Space幅が0.05〜5mm
で深さが500nmの溝を形成した後、その上にTEOS
−プラズマCVD法で酸化珪素膜を600nm形成したパ
ターンウエハを作製する。保持する基板取り付け用の吸
着パッドを貼り付けたホルダーに上記パターンウエハを
セットし、多孔質ウレタン樹脂製の研磨パッドを貼り付
けた直径600mmの定盤上に絶縁膜面を下にしてホルダ
ーを載せ、さらに加工荷重を30000Pa(300gf/c
m2)に設定した。
(Polishing of shallow trench isolation insulating film)
A silicon nitride film is formed to a thickness of 150 nm on a Si substrate having a diameter of 200 mm by a plasma CVD method and has a line / space width of 0.05 to 5 mm.
After forming a groove with a depth of 500 nm by TEOS, TEOS
-Fabricate a pattern wafer on which a silicon oxide film is formed to a thickness of 600 nm by a plasma CVD method. The above-mentioned pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film surface down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. , And a processing load of 30,000 Pa (300 gf / c
m 2 ).

【0040】定盤上に上記の酸化セリウム研磨剤(固形
分:1重量%)と高分子添加剤であるポリアクリル酸ア
ンモニウム(固形分:2.4重量%)の混合物(前者/
後者の重量比が1/4)を200ml/minの速度で滴下し
ながら、定盤及びウエハを50min-1で3分間回転さ
せ、絶縁膜を研磨した。研磨後のウエハを純水で良く洗
浄後、乾燥した。
A mixture of the above-mentioned cerium oxide abrasive (solid content: 1% by weight) and ammonium polyacrylate (solid content: 2.4% by weight) as a polymer additive (former:
The platen and the wafer were rotated at 50 min -1 for 3 minutes while the latter was dropped at a weight ratio of 1/4) at a rate of 200 ml / min, and the insulating film was polished. The polished wafer was thoroughly washed with pure water and then dried.

【0041】同様に、研磨時間を3分、3.5分、4分
にして上記パターンウエハの研磨を行った。Si基板中
心部に位置するLine/Space幅0.1mmのLine部分とSpac
e部分の段差ScとSpace部分の膜厚Tc、Si基板中心
部から半径方向50mmのところに位置するLine/Space幅
0.1mmのLine部分とSpace部分の段差SmとSpace部分
の膜厚Tm、Si基板中心部から半径方向90mmに位置
するLine/Space幅0.1mmのLine部分とSpace部分の段
差SeとSpace部分の膜厚Teを測定した。段差は触針
式段差計、膜厚は光干渉式膜厚計を用いて測定した。
Similarly, the pattern wafer was polished by setting the polishing time to 3 minutes, 3.5 minutes, and 4 minutes. Line / Space 0.1mm width Line part and Spac located at the center of Si substrate
Step Sc of e portion and film thickness Tc of Space portion, Line / Space located at 50 mm in the radial direction from the center of the Si substrate, Line portion having Line / Space width of 0.1 mm, and step Sm of Space portion and film thickness Tm of Space portion, The step Se between the Line portion and the Space portion, each of which has a Line / Space width of 0.1 mm and the line portion located 90 mm in the radial direction from the center of the Si substrate, and the thickness Te of the Space portion were measured. The step was measured using a stylus-type step meter, and the film thickness was measured using a light interference type film thickness meter.

【0042】研磨時間が3分の時、段差Sc、Sm、S
eが30、25、25nm、膜厚Tc、Tm、Teが45
0、460、435となった。また、研磨時間が3.5
分の時、段差Sc、Sm、Seが40、40、60nm、
膜厚Tc、Tm、Teが510、500、480となっ
た。さらに、研磨時間が4分の時、段差Sc、Sm、S
eが40、30、35nm、膜厚Tc、Tm、Teが42
0、435、400となった。研磨時間が3.5分の時
に最も平坦性がよかったので、研磨時間3.5分を研磨
終点とした。研磨開始時の研磨定盤回転軸のトルクを1
とすると3分後の研磨終了時のトルクは1.75であっ
た。また、トルクは研磨終了時の30秒前に最大値1.
8を示した。トルクが最大値を取った30秒後に研磨の
終点になるので、トルクの変化を読み取ることで研磨終
点を決定することが可能だった。
When the polishing time is 3 minutes, steps Sc, Sm, S
e is 30, 25, 25 nm, and the film thicknesses Tc, Tm, and Te are 45
0, 460 and 435. The polishing time is 3.5
Minute, steps Sc, Sm, Se are 40, 40, 60 nm,
The thicknesses Tc, Tm, and Te were 510, 500, and 480. Further, when the polishing time is 4 minutes, the steps Sc, Sm, S
e is 40, 30, and 35 nm, and film thicknesses Tc, Tm, and Te are 42
0, 435 and 400. Since the flatness was the best when the polishing time was 3.5 minutes, the polishing time was set to 3.5 minutes as the polishing end point. Reduce the torque of the polishing table rotating shaft at the start of polishing to 1
Then, the torque at the end of the polishing after 3 minutes was 1.75. The torque was set to a maximum value of 1.30 seconds before the end of polishing.
8 was shown. Since the polishing end point is reached 30 seconds after the torque reaches the maximum value, it was possible to determine the polishing end point by reading the change in the torque.

【0043】比較例1 (酸化セリウム粒子の作製)炭酸セリウム水和物2kgを
白金製容器に入れ、800℃で2時間空気中で焼成する
ことにより黄白色の粉末を約1kg得た。この粉末をX線
回折法で相同定を行ったところ酸化セリウムであること
を確認した。焼成粉末粒子径は30〜100μmであっ
た。焼成粉末粒子表面を走査型電子顕微鏡で観察したと
ころ、酸化セリウムの粒界が観察された。粒界に囲まれ
た酸化セリウム一次粒子径を測定したところ、体積分布
の中央値が190nm、最大値が500nmであった。酸化
セリウム粉末1kgをジェットミルを用いて乾式粉砕を行
った。粉砕粒子について走査型電子顕微鏡で観察したと
ころ、一次粒子径と同等サイズの小さな粒子の他に、1
〜3μmの大きな粉砕残り粒子と0.5〜1μmの粉砕
残り粒子が混在していた。
Comparative Example 1 (Preparation of Cerium Oxide Particles) 2 kg of cerium carbonate hydrate was placed in a platinum container and calcined at 800 ° C. for 2 hours in the air to obtain about 1 kg of yellowish white powder. When this powder was subjected to phase identification by an X-ray diffraction method, it was confirmed that the powder was cerium oxide. The particle diameter of the calcined powder was 30 to 100 μm. When the surface of the fired powder particles was observed with a scanning electron microscope, grain boundaries of cerium oxide were observed. When the primary particle diameter of the cerium oxide surrounded by the grain boundaries was measured, the median of the volume distribution was 190 nm and the maximum was 500 nm. 1 kg of cerium oxide powder was dry-ground using a jet mill. Observation of the pulverized particles with a scanning electron microscope revealed that, in addition to small particles having the same size as the primary particle size, 1
Large crushed particles having a size of 33 μm and remaining particles having a size of 0.5 to 1 μm were mixed.

【0044】(酸化セリウムスラリーの作製)上記作製
の酸化セリウム粒子1kgとポリアクリル酸アンモニウム
塩水溶液(40重量%)23gと脱イオン水8977g
を混合し、撹拌しながら超音波分散を10分間施した。
得られたスラリーを1ミクロンフィルターでろ過をし、
さらに脱イオン水を加えることにより5重量%スラリー
を得た。スラリーpHは8.3であった。スラリー粒子を
レーザ回折式粒度分布計で測定するために、適当な濃度
に希釈して測定した結果、粒子径の中央値が190nmで
あった。
(Preparation of Cerium Oxide Slurry) 1 kg of the cerium oxide particles prepared above, 23 g of an aqueous solution of ammonium polyacrylate (40% by weight), and 8977 g of deionized water
Was mixed and subjected to ultrasonic dispersion for 10 minutes while stirring.
The resulting slurry is filtered through a 1 micron filter,
Further 5% by weight slurry was obtained by adding deionized water. The slurry pH was 8.3. As a result of diluting the slurry particles to an appropriate concentration in order to measure them with a laser diffraction type particle size distribution meter, the median value of the particle diameter was 190 nm.

【0045】(層間絶縁膜の研磨)直径200mmのSi
基板上にLine/Space幅が0.05〜5mmで高さが100
0nmのAl配線Line部を形成した後、その上にTEOS
−プラズマCVD法で酸化珪素膜を2000nm形成した
パターンウエハを作製する。保持する基板取り付け用の
吸着パッドを貼り付けたホルダーに上記パターンウエハ
をセットし、多孔質ウレタン樹脂製の研磨パッドを貼り
付けた直径600mmの定盤上に絶縁膜面を下にしてホル
ダーを載せ、さらに加工荷重を30000Pa(300gf
/cm2)に設定した。
(Polishing of interlayer insulating film) Si having a diameter of 200 mm
Line / Space width is 0.05-5mm and height is 100 on the substrate
After forming a 0 nm Al line part, TEOS
-Producing a pattern wafer on which a silicon oxide film is formed to a thickness of 2000 nm by a plasma CVD method. The above-mentioned pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film surface down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. , And a processing load of 30,000 Pa (300 gf
/ cm 2 ).

【0046】定盤上に上記の酸化セリウム研磨剤(固形
分:1重量%)を200ml/minの速度で滴下しながら、
定盤及びウエハを50min-1で1.5分間回転させ、絶
縁膜を研磨した。高分子添加剤は添加しなかった。研磨
後のウエハを純水で良く洗浄後、乾燥した。
While dropping the above-mentioned cerium oxide abrasive (solid content: 1% by weight) at a rate of 200 ml / min on a surface plate,
The platen and the wafer were rotated at 50 min -1 for 1.5 minutes to polish the insulating film. No polymer additives were added. The polished wafer was thoroughly washed with pure water and then dried.

【0047】同様に、研磨時間を2分、2.5分にして
上記パターンウエハの研磨を行った。Si基板中心部に
位置するLine/Space幅0.1mmのLine部分とSpace部分
の段差ScとSpace部分の膜厚Tc、Si基板中心部か
ら半径方向50mmのところに位置するLine/Space幅0.
1mmのLine部分とSpace部分の段差SmとSpace部分の膜
厚Tm、Si基板中心部から半径方向90mmに位置する
Line/Space幅0.1mmのLine部分とSpace部分の段差S
eとSpace部分の膜厚Teを測定した。段差は触針式段
差計、膜厚は光干渉式膜厚計を用いて測定した。
Similarly, the pattern wafer was polished by setting the polishing time to 2 minutes and 2.5 minutes. A line / space width 0.1 mm located at the center of the Si substrate, a step Sc of the Line portion having a line / space width of 0.1 mm, a film thickness Tc of the Space portion, and a line / space width of 0.5 mm located 50 mm in the radial direction from the center of the Si substrate.
Step Sm of 1 mm Line portion and Space portion and film thickness Tm of Space portion, located 90 mm in radial direction from the center of Si substrate
Line / Space Step S between 0.1mm width Line and Space
e and the film thickness Te of the Space portion were measured. The step was measured using a stylus-type step meter, and the film thickness was measured using a light interference type film thickness meter.

【0048】研磨時間が1.5分の時、段差Sc、S
m、Seが100、70、90nm、膜厚Tc、Tm、T
eが1750、1850、1700となった。また、研
磨時間が2分の時、段差Sc、Sm、Seが70、6
0、55nm、膜厚Tc、Tm、Teが1550、178
0、1630となった。さらに研磨時間が2.5分の
時、段差Sc、Sm、Seが85、50、70nm、膜厚
Tc、Tm、Teが1160、1350、1120とな
った。研磨時間が2.5分の時に最も平坦性がよかった
ので、研磨時間2.5分を研磨終点としたが、実施例と
比べると平坦性は悪かった。研磨開始時の研磨定盤回転
軸のトルクを1とすると2.5分後の研磨終了時のトル
クは1.7であった。また、トルクの最大値も1.7程
度で数十秒連続するので、最大値を判定することが難し
く、トルクの変化から研磨の終点は読み取ることができ
なかった。
When the polishing time is 1.5 minutes, the steps Sc, S
m, Se are 100, 70, 90 nm, and film thicknesses Tc, Tm, T
e became 1750, 1850, and 1700. When the polishing time is 2 minutes, the steps Sc, Sm, Se are 70, 6
0, 55 nm, film thicknesses Tc, Tm, Te are 1550, 178
0, 1630. Further, when the polishing time was 2.5 minutes, the steps Sc, Sm and Se were 85, 50 and 70 nm, and the film thicknesses Tc, Tm and Te were 1160, 1350 and 1120. Since the flatness was the best when the polishing time was 2.5 minutes, the polishing end point was 2.5 minutes when the polishing time was 2.5 minutes, but the flatness was poor as compared with the examples. Assuming that the torque of the polishing platen rotating shaft at the start of polishing is 1, the torque at the end of polishing 2.5 minutes later was 1.7. In addition, the maximum value of the torque is about 1.7 and is continuous for several tens of seconds. Therefore, it is difficult to determine the maximum value, and the end point of polishing cannot be read from the change in the torque.

【0049】比較例2 (層間絶縁膜の研磨)直径200mmのSi基板上にLine
/Space幅が0.05〜5mmで高さが1000nmのAl配
線のLine部を形成した後、その上にTEOS−プラズマ
CVD法で酸化珪素膜を2000nm形成したパターンウ
エハを作製する。保持する基板取り付け用の吸着パッド
を貼り付けたホルダーに上記パターンウエハをセット
し、多孔質ウレタン樹脂製の研磨パッドを貼り付けた直
径600mmの定盤上に絶縁膜面を下にしてホルダーを載
せ、さらに加工荷重を30000Pa(300gf/cm2)に
設定した。定盤上に市販シリカスラリーを200ml/min
の速度で滴下しながら、定盤及びウエハを50min-1
2分間回転させ、絶縁膜を研磨した。市販スラリーのpH
は10.3で、SiO2粒子を12.5重量%含んでい
るものである。研磨後のウエハを純水で良く洗浄後、乾
燥した。
Comparative Example 2 (Polishing of Interlayer Insulating Film) Line on a 200 mm Si substrate
After forming a line portion of Al wiring having a / Space width of 0.05 to 5 mm and a height of 1000 nm, a patterned wafer is formed on which a 2000 nm silicon oxide film is formed by TEOS-plasma CVD. The above-mentioned pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film surface down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. Further, the processing load was set to 30,000 Pa (300 gf / cm 2 ). 200 ml / min of commercial silica slurry on platen
The platen and the wafer were rotated at 50 min -1 for 2 minutes while dropping at a speed of 2 to polish the insulating film. PH of commercial slurry
Is 10.3 and contains 12.5% by weight of SiO 2 particles. The polished wafer was thoroughly washed with pure water and then dried.

【0050】同様に、研磨時間を2.5分、3分にして
上記パターンウエハの研磨を行った。Si基板中心部に
位置するLine/Space幅0.1mmのLine部分とSpace部分
の段差ScとSpace部分の膜厚Tc、Si基板中心部か
ら半径方向50mmのところに位置するLine/Space幅0.
1mmのLine部分とSpace部分の段差SmとSpace部分の膜
厚Tm、Si基板中心部から半径方向90mmに位置する
Line/Space幅0.1mmのLine部分とSpace部分の段差S
cとSpace部分の膜厚Tcを測定した。段差は触針式段
差計、膜厚は光干渉式膜厚計を用いて測定した。
Similarly, the pattern wafer was polished with a polishing time of 2.5 minutes and 3 minutes. A line / space width 0.1 mm located at the center of the Si substrate, a step Sc of the Line portion having a line / space width of 0.1 mm, a film thickness Tc of the Space portion, and a line / space width of 0.5 mm located 50 mm in the radial direction from the center of the Si substrate.
Step Sm of 1 mm Line portion and Space portion and film thickness Tm of Space portion, located 90 mm in radial direction from the center of Si substrate
Line / Space Step S between 0.1mm width Line and Space
The thickness Tc of c and Space portions was measured. The step was measured using a stylus-type step meter, and the film thickness was measured using a light interference type film thickness meter.

【0051】研磨時間が2分の時、段差Sc、Sm、S
eが115、150、100nm、膜厚Tc、Tm、Te
が1900、1850、1740となった。また、研磨
時間が2.5分の時、段差Sc、Sm、Seが100、
105、90nm、膜厚Tc、Tm、Teが1300、1
280、1400となった。さらに研磨時間が3分の
時、段差Sc、Sm、Seが75、80、70nm、膜厚
Tc、Tm、Teが1020、1100、1010とな
った。研磨時間が3分の時に最も平坦性がよかったの
で、研磨時間3分を研磨終点としたが、実施例と比べる
と平坦性は悪かった。トルクは研磨が進行するにつれて
単調に減少し、トルクの変化から研磨の終点は読み取る
ことができなかった。
When the polishing time is 2 minutes, the steps Sc, Sm, S
e is 115, 150, 100 nm, film thicknesses Tc, Tm, Te
Were 1900, 1850, and 1740. When the polishing time is 2.5 minutes, the steps Sc, Sm, Se are 100,
105, 90 nm, film thicknesses Tc, Tm, Te are 1300, 1
280 and 1400. Further, when the polishing time was 3 minutes, the steps Sc, Sm and Se were 75, 80 and 70 nm, and the film thicknesses Tc, Tm and Te were 1020, 1100 and 1010. Since the flatness was the best when the polishing time was 3 minutes, the polishing end point was 3 minutes when the polishing time was 3 minutes, but the flatness was poor as compared with the examples. The torque monotonously decreased as the polishing progressed, and the end point of the polishing could not be read from the change in the torque.

【0052】[0052]

【発明の効果】請求項1〜3記載のCMP研磨剤は、高
平坦化可能であり、基盤の被研磨面の研磨の終点を精度
よく判定可能なものである。請求項4記載の基板の研磨
方法は、基板の被研磨面の研磨の終点を精度よく判定可
能なものである。
According to the first to third aspects of the present invention, the CMP polishing slurry can be highly planarized and can accurately determine the end point of polishing of the polished surface of the substrate. According to a fourth aspect of the present invention, there is provided a method for polishing a substrate, which can accurately determine an end point of polishing of a polished surface of a substrate.

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 3C058 AA07 AA12 AC04 BA02 BA06 CB04 CB10 DA02 DA12 DA17 5F043 AA26 BB30 DD30 FF07 GG10 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 3C058 AA07 AA12 AC04 BA02 BA06 CB04 CB10 DA02 DA12 DA17 5F043 AA26 BB30 DD30 FF07 GG10

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 研磨終了時の研磨定盤回転軸のトルクが
研磨開始時の1.2〜2倍であり、研磨終了時の10〜
30秒前にトルクが最大になるスラリーからなる酸化セ
リウムCMP研磨剤。
The torque of the polishing platen rotating shaft at the end of polishing is 1.2 to 2 times that at the start of polishing, and the torque of 10 to 10 times at the end of polishing.
Cerium oxide CMP polishing slurry consisting of a slurry that maximizes torque 30 seconds before.
【請求項2】 酸化セリウム粒子、分散剤及び水を含む
酸化セリウムスラリー及び高分子添加剤と水を含む添加
液からなる請求項1記載のCMP研磨剤。
2. The CMP polishing slurry according to claim 1, comprising a cerium oxide slurry containing cerium oxide particles, a dispersant and water, and an additive liquid containing a polymer additive and water.
【請求項3】 分散剤および高分子添加剤が水溶性有機
高分子、水溶性陰イオン性界面活性剤、水溶性非イオン
性界面活性剤から選ばれる少なくとも1種の化合物であ
る請求項1、2または3記載のCMP研磨剤。
3. The dispersant and the polymer additive are at least one compound selected from a water-soluble organic polymer, a water-soluble anionic surfactant, and a water-soluble nonionic surfactant. 4. The CMP polishing slurry according to 2 or 3.
【請求項4】 研磨する膜を形成した基板を研磨定盤の
研磨布に押しあて加圧し、請求項1、2、3または4記
載のCMP研磨剤を研磨膜と研磨布との間に供給しなが
ら、基板と研磨定盤を回転して研磨する膜を研磨する基
板の研磨方法。
4. A substrate on which a film to be polished is formed is pressed against a polishing cloth of a polishing platen and pressurized, and the CMP abrasive according to claim 1, 2, 3 or 4 is supplied between the polishing film and the polishing cloth. A substrate polishing method for polishing a film to be polished by rotating a substrate and a polishing platen.
JP2000399809A 2000-12-28 2000-12-28 Cmp abrasive and method for polishing substrate Pending JP2002203819A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000399809A JP2002203819A (en) 2000-12-28 2000-12-28 Cmp abrasive and method for polishing substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000399809A JP2002203819A (en) 2000-12-28 2000-12-28 Cmp abrasive and method for polishing substrate

Publications (1)

Publication Number Publication Date
JP2002203819A true JP2002203819A (en) 2002-07-19

Family

ID=18864518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000399809A Pending JP2002203819A (en) 2000-12-28 2000-12-28 Cmp abrasive and method for polishing substrate

Country Status (1)

Country Link
JP (1) JP2002203819A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2005017989A1 (en) * 2003-08-14 2007-10-04 日立化成工業株式会社 Polishing agent for semiconductor planarization
JP2009218619A (en) * 2002-08-09 2009-09-24 Hitachi Chem Co Ltd Cmp abrasive and polishing method for substrate

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09262743A (en) * 1996-03-27 1997-10-07 Nec Corp Device and method for detecting final point to be polished
JPH10256209A (en) * 1997-03-17 1998-09-25 Toshiba Corp Polishing equipment
JPH11181403A (en) * 1997-12-18 1999-07-06 Hitachi Chem Co Ltd Cerium oxide abrasive and grinding of substrate
JP2000135673A (en) * 1998-10-30 2000-05-16 Okamoto Machine Tool Works Ltd Polishing end point detecting method and polishing end point detecting device of wafer
JP2000331969A (en) * 1999-05-14 2000-11-30 Mitsubishi Materials Corp Wafer-polishing device and manufacture of wafer

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09262743A (en) * 1996-03-27 1997-10-07 Nec Corp Device and method for detecting final point to be polished
JPH10256209A (en) * 1997-03-17 1998-09-25 Toshiba Corp Polishing equipment
JPH11181403A (en) * 1997-12-18 1999-07-06 Hitachi Chem Co Ltd Cerium oxide abrasive and grinding of substrate
JP2000135673A (en) * 1998-10-30 2000-05-16 Okamoto Machine Tool Works Ltd Polishing end point detecting method and polishing end point detecting device of wafer
JP2000331969A (en) * 1999-05-14 2000-11-30 Mitsubishi Materials Corp Wafer-polishing device and manufacture of wafer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009218619A (en) * 2002-08-09 2009-09-24 Hitachi Chem Co Ltd Cmp abrasive and polishing method for substrate
US8231735B2 (en) 2002-08-09 2012-07-31 Hitachi Chemical Co., Ltd. Polishing slurry for chemical mechanical polishing and method for polishing substrate
JPWO2005017989A1 (en) * 2003-08-14 2007-10-04 日立化成工業株式会社 Polishing agent for semiconductor planarization
JP4555944B2 (en) * 2003-08-14 2010-10-06 日立化成工業株式会社 Semiconductor flattening abrasive and method for producing the same

Similar Documents

Publication Publication Date Title
KR100851451B1 (en) Cmp abrasive, liquid additive for cmp abrasive and method for polishing substrate
JP4729834B2 (en) CMP abrasive, substrate polishing method and semiconductor device manufacturing method using the same, and additive for CMP abrasive
US8231735B2 (en) Polishing slurry for chemical mechanical polishing and method for polishing substrate
JP4983603B2 (en) Cerium oxide slurry, cerium oxide polishing liquid, and substrate polishing method using the same
JPWO2011081109A1 (en) Polishing liquid for CMP and polishing method using the same
CN101311205A (en) Cmp polishing agent and method for polishing substrate
JP2006318952A (en) Cmp abrasive and method of polishing substrate
JP2010095650A (en) Abrasives composition and method for polishing substrates using the same
JP2012186339A (en) Polishing liquid and polishing method of substrate using the same
JP2003347248A (en) Cmp polishing agent for semiconductor insulating film and method of polishing substrate
JP2005048125A (en) Cmp abrasive, polishing method, and production method for semiconductor device
JP4062977B2 (en) Abrasive and substrate polishing method
JP4088811B2 (en) CMP polishing agent and substrate polishing method
JP2003007660A (en) Cmp abrasive and sustrate-polishing method
KR20090057249A (en) Cmp polishing agent, additive solution for cmp polishing agent, and method for polishing substrate by using the polishing agent and the additive solution
JP2002203819A (en) Cmp abrasive and method for polishing substrate
JP2004200268A (en) Cmp polishing agent and polishing method of substrate
JP4491857B2 (en) CMP polishing agent and substrate polishing method
JP2003158101A (en) Cmp abrasive and manufacturing method therefor
JP4604727B2 (en) Additive for CMP abrasives
JP2001332516A (en) Cmp abrasive and method for polishing substrate
JP4608925B2 (en) Additive for CMP abrasives
JP2002151448A (en) Cmp pad for cerium oxide polishing agent and method of polishing wafer
JP2004277474A (en) Cmp abrasive, polishing method, and production method for semiconductor device
JP2001308043A (en) Cmp-polishing agent and polishing method for substrate

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20071128

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100621

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100624

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20101014