JP2002151448A - Cmp pad for cerium oxide polishing agent and method of polishing wafer - Google Patents

Cmp pad for cerium oxide polishing agent and method of polishing wafer

Info

Publication number
JP2002151448A
JP2002151448A JP2000345663A JP2000345663A JP2002151448A JP 2002151448 A JP2002151448 A JP 2002151448A JP 2000345663 A JP2000345663 A JP 2000345663A JP 2000345663 A JP2000345663 A JP 2000345663A JP 2002151448 A JP2002151448 A JP 2002151448A
Authority
JP
Japan
Prior art keywords
polishing
cerium oxide
pad
substrate
particle size
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000345663A
Other languages
Japanese (ja)
Inventor
Masaya Nishiyama
雅也 西山
Masanobu Hanehiro
昌信 羽▲広▼
Hiroshi Nakagawa
宏 中川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP2000345663A priority Critical patent/JP2002151448A/en
Publication of JP2002151448A publication Critical patent/JP2002151448A/en
Pending legal-status Critical Current

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  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a CMP pad for a cerium oxide polishing agent with which a substrate such as a silicon oxide film or the like can be polished efficiently at a high speed and can readily control its process in a CMP technique for planarizing an interlayer dielectric, and a BPSG film and a shallow trench isolation insulating film, and to provide a method of polishing a wafer by using the same. SOLUTION: This CMP pad for a cerium oxide polishing agent is used to polish a thin film formed on a substrate chemically and mechanically by using a cerium oxide polishing agent and has fine projections and depressions on the surface. The mean surface roughness Ra along the center line of the pad surface is defined by the ratio to the D99% grain size of polishing agent particles measured by a laser scattering grain size distribution measuring instrument.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子製造技
術に好適に使用されるCMPパッド及び基板の研磨方法
に関し、特に、層間絶縁膜、BPSG(ボロン、リンを
ドープした二酸化珪素膜)膜の平坦化工程、シャロー・
トレンチ分離の形成工程等において使用される酸化セリ
ウム研磨剤用CMPパッド及びこれらCMPパッドを使
用した基板の研磨方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of polishing a CMP pad and a substrate suitably used in a semiconductor device manufacturing technique, and more particularly to a method of polishing an interlayer insulating film and a BPSG (silicon dioxide film doped with boron and phosphorus) film. Flattening process, shallow
The present invention relates to a cerium oxide abrasive CMP pad used in a trench isolation forming step and the like, and a substrate polishing method using the CMP pad.

【0002】[0002]

【従来の技術】現在の超々大規模集積回路では、実装密
度を高める傾向にあり、種々の微細加工技術が研究、開
発されている。既に、デザインルールは、サブハーフミ
クロンのオーダーになっている。このような厳しい微細
化の要求を満足するために開発されている技術の一つに
CMP(ケミカルメカニカルポリッシング)技術があ
る。この技術は、半導体装置の製造工程において、露光
を施す層を完全に平坦化し、露光技術の負担を軽減し、
歩留まりを安定させることができるため、例えば、層間
絶縁膜、BPSG膜の平坦化、シャロー・トレンチ分離
等を行う際に必須となる技術である。
2. Description of the Related Art At present, ultra-large-scale integrated circuits tend to increase the packing density, and various microfabrication techniques have been studied and developed. Already, design rules are on the order of sub-half microns. One of the technologies that have been developed to satisfy such strict requirements for miniaturization is a CMP (Chemical Mechanical Polishing) technology. This technology completely flattens the layer to be exposed in the semiconductor device manufacturing process, reducing the burden of the exposure technology,
Since the yield can be stabilized, it is a technique that is indispensable when, for example, flattening an interlayer insulating film and a BPSG film and performing shallow trench isolation.

【0003】従来、半導体装置の製造工程において、プ
ラズマ−CVD(ChemicalVapor Dep
osition、化学的蒸着法)、低圧−CVD等の方
法で形成される酸化珪素絶縁膜等の無機絶縁膜を平坦化
するための研磨方法としては、研磨する膜を形成した基
板をCMPパッドに押しあて加圧し、研磨剤を研磨膜と
CMPパッドとの間に供給しながら、基板もしくはCM
Pパッドを動かして行っている。
Conventionally, in a manufacturing process of a semiconductor device, a plasma CVD (Chemical Vapor Depth) is used.
As a polishing method for flattening an inorganic insulating film such as a silicon oxide insulating film formed by a method such as oxidation, chemical vapor deposition, or low-pressure CVD, a substrate on which a film to be polished is formed is pressed against a CMP pad. Pressurizing and supplying the polishing agent between the polishing film and the CMP pad,
I am moving the P pad.

【0004】この際、研磨剤としてフュームドシリカ系
が、CMPパッドとしては発泡ウレタン系の研磨布が一
般的に用いられている。しかしながら、この様な研磨法
は無機絶縁膜の研磨速度が十分な速度をもたず、実用化
には低研磨速度という技術課題があった。
At this time, fumed silica-based polishing cloth is generally used as an abrasive, and urethane foam-based polishing cloth is generally used as a CMP pad. However, such a polishing method does not have a sufficient polishing rate for the inorganic insulating film, and there is a technical problem of a low polishing rate for practical use.

【0005】さらに、上記発泡ウレタン系の研磨布を用
いて研磨する場合、ドレッシングと呼ばれる前処理を定
期的に行う必要がある。これは、研磨中に発生した研磨
屑が発泡ウレタンの気孔に詰まるためである。しかしな
がら従来のドレッシング処理ではCMPパッド表面状態
を正確に制御しているとは言いがたく、結果として、研
磨特性の不安定さを招いている。また、層間膜を平坦化
するCMP技術では、層間膜の途中で研磨を終了する必
要があり、研磨量の制御を研磨時間で行うプロセス管理
方法が一般的に行われている。しかし、パターン段差形
状の変化だけでなく、CMPパッドの状態等でも、研磨
速度が顕著に変化してしまうため、プロセス管理が難し
いという問題があった。さらに、安定した研磨速度を得
るためには、CMPパッドの状態をどのように制御すれ
ば良いかのも明確ではなかった。
Further, when polishing is performed using the above-mentioned urethane foam-based polishing cloth, it is necessary to periodically perform a pretreatment called dressing. This is because polishing dust generated during polishing clogs the pores of the urethane foam. However, it cannot be said that the conventional dressing process accurately controls the surface state of the CMP pad, and as a result, the polishing characteristics are unstable. Further, in the CMP technique for flattening an interlayer film, it is necessary to end polishing in the middle of the interlayer film, and a process management method of controlling a polishing amount by a polishing time is generally performed. However, not only the change in the pattern step shape, but also the state of the CMP pad, etc., causes a significant change in the polishing rate, which causes a problem that process management is difficult. Furthermore, it was not clear how to control the state of the CMP pad to obtain a stable polishing rate.

【0006】一方、高研磨速度、低研磨傷の研磨剤とし
て酸化セリウム研磨剤が現在注目されており、この酸化
セリウム研磨剤に最適なCMPパッドが望まれている。
On the other hand, cerium oxide abrasives are currently attracting attention as abrasives having a high polishing rate and low polishing scratches, and a CMP pad optimal for such cerium oxide abrasives is desired.

【0007】[0007]

【発明が解決しようとする課題】本発明の目的は、層間
絶縁膜、BPSG膜、シャロー・トレンチ分離用絶縁膜
を平坦化するCMP技術において、酸化珪素膜等の基板
を効率的、高速に研磨することができ、かつプロセス管
理も容易に行うことができる酸化セリウム研磨剤用CM
Pパッド及びこれを用いた基板の研磨法を提供すること
にある。
SUMMARY OF THE INVENTION An object of the present invention is to efficiently and quickly polish a substrate such as a silicon oxide film in a CMP technique for planarizing an interlayer insulating film, a BPSG film, and an insulating film for isolating a shallow trench. For cerium oxide abrasives that can be used and process management can be easily performed
An object of the present invention is to provide a method for polishing a P pad and a substrate using the same.

【0008】[0008]

【課題を解決するための手段】本発明は、酸化セリウム
研磨剤を用いて、基板上に形成された薄膜を化学機械的
に研磨するための表面に微小な凹凸を有するパッドにお
いて、パッド表面の中心線平均表面あらさRaがレーザ
散乱式粒度分布計で測定した研磨剤粒子のD99%粒径
との比で規定されていることを特徴とする酸化セリウム
研磨剤用CMPパッドに関する。
SUMMARY OF THE INVENTION The present invention provides a pad having fine irregularities on a surface for chemically and mechanically polishing a thin film formed on a substrate using a cerium oxide abrasive. The present invention relates to a CMP pad for a cerium oxide abrasive, wherein the center line average surface roughness Ra is defined by a ratio of the abrasive particle to a D99% particle diameter measured by a laser scattering type particle size distribution meter.

【0009】酸化セリウム研磨剤に含まれる酸化セリウ
ム粒子の粒子径は、レーザー散乱式粒度分布計(例えば
測定装置、Malvern Instruments 社製 Mastersizer Mic
roplus、光源He−Neレーザー、粒子の屈折率1.9
285、吸収0で測定)で測定する。
[0009] The particle size of the cerium oxide particles contained in the cerium oxide abrasive can be measured with a laser scattering particle size distribution analyzer (for example, a measuring device, Mastersizer Mic manufactured by Malvern Instruments).
roplus, light source He-Ne laser, refractive index of particles 1.9
285, measured at 0 absorption).

【0010】中心線平均表面あらさRaとレーザ散乱式
粒度分布計で測定した研磨剤粒子のD99%粒径との比
が0.2以上1.3以下のCMPパッドを用いて基板を
研磨すれば非常に高い研磨速度を得ることが可能とな
る。
When the substrate is polished using a CMP pad having a ratio of the center line average surface roughness Ra to the D99% particle size of the abrasive particles measured by a laser scattering type particle size distribution analyzer of 0.2 to 1.3, Very high polishing rates can be obtained.

【0011】また、パッド表面の中心線平均表面あらさ
Raとレーザ散乱式粒度分布計で測定した研磨剤粒子の
D99%粒径との比が、2〜20であるCMPパッドで
は、研磨速度はCMPパッドの表面あらさ変化に対して
鈍感になり、結果として安定した研磨特性を得ることが
可能となる。
In the case of a CMP pad in which the ratio of the center line average surface roughness Ra of the pad surface to the D99% particle size of the abrasive particles measured by a laser scattering type particle size distribution analyzer is 2 to 20, the polishing rate is set to the CMP rate. It becomes insensitive to changes in the surface roughness of the pad, and as a result, stable polishing characteristics can be obtained.

【0012】本発明はまた、基板を上記の酸化セリウム
研磨剤用CMPパッドに押し当て、酸化セリウム研磨剤
を研磨膜とCMPパッドとの間に供給しながら、基板も
しくは研磨定盤を動かすことにより研磨膜を研磨するこ
とを特徴とする基板の研磨方法に関する。本発明の基板
の研磨方法は、例えばSiO絶縁膜が形成された基板
を研磨するのに好適に用いられる。
The present invention also provides a method in which the substrate or the polishing platen is moved while pressing the substrate against the above-mentioned CMP pad for cerium oxide abrasive and supplying the cerium oxide abrasive between the polishing film and the CMP pad. The present invention relates to a method for polishing a substrate, characterized by polishing a polishing film. The substrate polishing method of the present invention is suitably used, for example, for polishing a substrate on which an SiO 2 insulating film is formed.

【0013】さらに、研磨中において、意図的にパッド
表面の中心線平均表面あらさRaとレーザ散乱式粒度分
布計で測定した研磨剤粒子のD99%粒径との比を好ま
しくは0.2〜1.3と2〜20との間で変化させるこ
とで、研磨速度を制御しながら研磨を行うことも可能で
ある。
Furthermore, during polishing, the ratio of the center line average surface roughness Ra of the pad surface to the D99% particle size of the abrasive particles measured by a laser scattering type particle size distribution analyzer is intentionally preferably 0.2 to 1%. By changing between 0.3 and 2 to 20, polishing can be performed while controlling the polishing rate.

【0014】本発明の基板の研磨方法に用いられる酸化
セリウム研磨剤は砥粒が多結晶酸化セリウムであること
が好ましい。
The cerium oxide abrasive used in the method of polishing a substrate of the present invention preferably has abrasive grains of polycrystalline cerium oxide.

【0015】[0015]

【発明の実施の形態】本発明の酸化セリウム研磨剤用C
MPパッドを図1を用いて説明する。図1は研磨速度と
パッド表面の中心線平均表面あらさRaとレーザ散乱式
粒度分布計で測定した研磨剤粒子のD99%粒径の比と
の関係を示したグラフである。用いる研磨剤は多結晶酸
化セリウムであることが好ましく、D99%粒径が1μ
mと0.6μmの2種類の多結晶酸化セリウムであるこ
とがより好ましい。D99%粒径が異なってもパッド表
面の中心線平均表面あらさRaとレーザ散乱式粒度分布
計で測定した研磨剤粒子のD99%粒径の比を横軸にす
ることで、ほぼ同一の曲線上になることを見出した。図
1に示すように、中心線平均表面あらさRaとレーザ散
乱式粒度分布計で測定した研磨剤粒子のD99%粒径と
の比が0.2以上1.3以下のCMPパッドを用いて基
板を研磨すれば、非常に高い研磨速度を得ることが可能
となる。比が0.2より小さいと粒子を保持できず、研
磨速度が低下する。1.3より大きくなるとRaととも
に研磨速度が低下するが、2以上になるとパッド表面の
あらさによらず研磨速度は一定となる。すなわち、パッ
ド表面の中心線平均表面あらさRaとレーザ散乱式粒度
分布計で測定した研磨剤粒子のD99%粒径との比が、
2〜20であるCMPパッドを用いることで、研磨中あ
るいは、ドレッシング処理によるパッド表面あらさの変
化に対して変化の少ない研磨速度を得ることが可能とな
る。中心線平均表面あらさRaはJIS B 0601
3.1に準拠し、例えば、表面形状測定装置:DEK
TAK3030(Sloan Technology
Division Veeco Instrument
s社製)、触針先端半径:12.5μm、測定時触針荷
重:3mgf、測定距離:1mm、測定速度:20μm
/sec、測定数:パッド上任意に5点(ドレッサーの
届かないパッドの端部と中心部をさける。)の条件で測
定した。研磨剤粒子のD99%粒径の測定は、例えば、
レーザー回折法(測定装置:Master Size製
microplus、屈折率:1.9285、光源:H
e−Neレーザ)によって行うことができる。また、D
99%は、体積粒子径分布において粒子の細かいものか
らその粒子の体積割合を積算していき、99%になった
ときの粒子径を意味する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS C for cerium oxide abrasive of the present invention
The MP pad will be described with reference to FIG. FIG. 1 is a graph showing the relationship between the polishing rate, the center line average surface roughness Ra of the pad surface, and the ratio of the D99% particle size of the abrasive particles measured by a laser scattering type particle size distribution meter. The abrasive used is preferably polycrystalline cerium oxide and has a D99% particle size of 1 μm.
More preferably, two types of polycrystalline cerium oxides, m and 0.6 μm, are used. Even if the D99% particle size is different, the ratio between the center line average surface roughness Ra of the pad surface and the D99% particle size of the abrasive particles measured by the laser scattering type particle size distribution analyzer is plotted on the substantially same curve. I found out. As shown in FIG. 1, a substrate was prepared using a CMP pad in which the ratio of the center line average surface roughness Ra to the D99% particle size of abrasive particles measured by a laser scattering type particle size distribution analyzer was 0.2 or more and 1.3 or less. , A very high polishing rate can be obtained. If the ratio is less than 0.2, the particles cannot be retained, and the polishing rate decreases. If it is larger than 1.3, the polishing rate decreases with Ra, but if it is 2 or more, the polishing rate becomes constant regardless of the roughness of the pad surface. That is, the ratio between the center line average surface roughness Ra of the pad surface and the D99% particle size of the abrasive particles measured by the laser scattering type particle size distribution analyzer is:
By using a CMP pad of 2 to 20, it is possible to obtain a polishing rate with little change with respect to a change in pad surface roughness during polishing or due to a dressing process. The center line average surface roughness Ra is JIS B 0601
In accordance with 3.1, for example, surface profile measuring device: DEK
TAK3030 (Sloan Technology)
Division Veeco Instrument
s), stylus tip radius: 12.5 μm, stylus load at measurement: 3 mgf, measurement distance: 1 mm, measurement speed: 20 μm
/ Sec, number of measurements: Measured under the condition of 5 points on the pad arbitrarily (avoid the end and center of the pad where the dresser does not reach). The D99% particle size of the abrasive particles is measured, for example, by
Laser diffraction method (measuring device: microplus manufactured by Master Size, refractive index: 1.9285, light source: H
(e-Ne laser). Also, D
99% means the particle diameter when the volume ratio of the particles is integrated from the finer particles in the volume particle diameter distribution and reaches 99%.

【0016】本発明におけるCMPパッド表面の微細凹
凸の形成方法としては、前述のドレッシング処理、すな
わち、ダイヤモンド砥石を用いてCMPパッド表面を削
り取る方法がある。ダイヤモンド砥石の代わりにワイヤ
ーブラシ、メタルスクレーバー、樹脂製ブラシ、ガラス
あるいはアルミナセラッミクスプレート等を用いても良
い。さらに、ドレッシング処理なしで、基板の研磨と同
時にパッド表面の微細凹凸を形成してもよい。また、粒
子をCMPパッドに吹き付けて微細凹凸を形成あるい
は、微細凹凸を有する型を熱または圧力をかけながらC
MPパッド表面に押し付ける方法で転写しても良い。
As a method of forming fine irregularities on the surface of the CMP pad in the present invention, there is the above-mentioned dressing treatment, that is, a method of shaving the surface of the CMP pad using a diamond grindstone. Instead of a diamond grindstone, a wire brush, a metal scraper, a resin brush, glass or an alumina ceramics plate may be used. Further, fine irregularities on the pad surface may be formed simultaneously with polishing of the substrate without dressing. Also, the particles are sprayed on a CMP pad to form fine irregularities, or a mold having fine irregularities is formed by applying heat or pressure to the mold.
The transfer may be performed by a method of pressing against the surface of the MP pad.

【0017】本発明に用いられるCMPパッドの材質と
しては、発泡ウレタンを始めとする、発泡樹脂の他、化
学的、熱的にシートまたは板状に成形できるものを用い
ることができる。例えば、ポリエチレン、ポリプロピレ
ン等のポリオレフィン、セルロースアセテート等のセル
ロース誘導体、アクリル系樹脂、各種エポキシ樹脂、ポ
リアミド、ポリスチレン、ポリカーボネート、ポリイミ
ド、ナイロン、ポリエステル、さらに、ABS樹脂等の
共重合樹脂等が挙げられる。
As the material of the CMP pad used in the present invention, in addition to foamed resin such as urethane foam, a material which can be chemically and thermally formed into a sheet or plate can be used. Examples thereof include polyolefins such as polyethylene and polypropylene, cellulose derivatives such as cellulose acetate, acrylic resins, various epoxy resins, polyamides, polystyrenes, polycarbonates, polyimides, nylons, polyesters, and copolymer resins such as ABS resins.

【0018】一般に酸化セリウムは、炭酸塩、硝酸塩、
硫酸塩、しゅう酸塩のセリウム化合物を酸化することに
よって得られる。TEOS−CVD法等で形成される酸
化珪素膜の研磨に使用する酸化セリウム研磨剤は、一次
粒子径が大きく、かつ結晶ひずみが少ないほど、すなわ
ち結晶性が良いほど高速研磨が可能であるが、研磨傷が
入りやすい傾向がある。そこで、本発明で用いる酸化セ
リウム粒子は、その製造方法を限定するものではない
が、酸化セリウム結晶子径は5nm以上300nm以下
であることが好ましい。また、半導体チップ研磨に使用
することから、アルカリ金属及びハロゲン類の含有率は
酸化セリウム粒子中10ppm以下に抑えることが好ま
しい。
Generally, cerium oxide is carbonate, nitrate,
It is obtained by oxidizing cerium compounds of sulfate and oxalate. A cerium oxide abrasive used for polishing a silicon oxide film formed by a TEOS-CVD method or the like can perform high-speed polishing as the primary particle diameter is larger and the crystal distortion is smaller, that is, the crystallinity is better. Polishing scratches tend to occur. Thus, the method for producing the cerium oxide particles used in the present invention is not limited, but the cerium oxide crystallite diameter is preferably 5 nm or more and 300 nm or less. Further, since it is used for polishing a semiconductor chip, the content of alkali metals and halogens is preferably suppressed to 10 ppm or less in the cerium oxide particles.

【0019】本発明で用いる酸化セリウム粉末を上記の
セリウム化合物を用いて作製する方法として焼成または
過酸化水素等による酸化法が使用できる。焼成温度は3
50℃以上900℃以下が好ましい。
As a method for producing the cerium oxide powder used in the present invention using the above-mentioned cerium compound, a calcination method or an oxidation method using hydrogen peroxide or the like can be used. Firing temperature is 3
The temperature is preferably from 50 ° C to 900 ° C.

【0020】上記の方法により製造された酸化セリウム
粒子は凝集しているため、機械的に粉砕することが好ま
しい。粉砕方法として、ジェットミル等による乾式粉砕
や遊星ビーズミル等による湿式粉砕方法が好ましい。ジ
ェットミルは例えば化学工業論文集第6巻第5号(19
80)527〜532頁に説明されている。
Since the cerium oxide particles produced by the above method are agglomerated, it is preferable to mechanically pulverize them. As the pulverization method, a dry pulverization method using a jet mill or the like or a wet pulverization method using a planetary bead mill or the like is preferable. The jet mill is described in, for example, Chemical Industry Transactions, Vol.
80) pages 527-532.

【0021】本発明に使用するCMP研磨剤は、例え
ば、上記の特徴を有する酸化セリウム粒子と分散剤と水
からなる組成物を分散させ、さらに添加剤を添加するこ
とによって得られる。ここで、酸化セリウム粒子の濃度
に制限はないが、分散液の取り扱いやすさから0.5重
量%以上20重量%以下の範囲が好ましい。また、分散
剤として、半導体チップ研磨に使用することから、ナト
リウムイオン、カリウムイオン等のアルカリ金属及びハ
ロゲン、イオウの含有率は10ppm以下に抑えること
が好ましく、例えば、共重合成分としてアクリル酸アン
モニウム塩を含む高分子分散剤が好ましい。また、共重
合成分としてアクリル酸アンモニウム塩を含む高分子分
散剤と水溶性陰イオン性分散剤、水溶性非イオン性分散
剤、水溶性陽イオン性分散剤、水溶性両性分散剤から選
ばれた少なくとも1種類とを含む2種類以上の分散剤を
使用してもよい。水溶性陰イオン性分散剤としては、例
えば、ラウリル硫酸トリエタノールアミン、ラウリル硫
酸アンモニウム、ポリオキシエチレンアルキルエーテル
硫酸トリエタノールアミン、特殊ポリカルボン酸型高分
子分散剤等が挙げられ、水溶性非イオン性分散剤として
は、例えばポリオキシエチレンラウリルエーテル、ポリ
オキシエチレンセチルエーテル、ポリオキシエチレンス
テアリルエーテル、ポリオキシエチレンオレイルエーテ
ル、ポリオキシエチレン高級アルコールエーテル、ポリ
オキシエチレンオクチルフェニルエーテル、ポリオキシ
エチレンノニルフェニルエーテル、ポリオキシアルキレ
ンアルキルエーテル、ポリオキシエチレン誘導体、ポリ
オキシエチレンソルビタンモノラウレート、ポリオキシ
エチレンソルビタンモノパルミテート、ポリオキシエチ
レンソルビタンモノステアレート、ポリオキシエチレン
ソルビタントリステアレート、ポリオキシエチレンソル
ビタンモノオレエート、ポリオキシエチレンソルビタン
トリオレエート、テトラオレイン酸ポリオキシエチレン
ソルビット、ポリエチレングリコールモノラウレート、
ポリエチレングリコールモノステアレート、ポリエチレ
ングリコールジステアレート、ポリエチレングリコール
モノオレエート、ポリオキシエチレンアルキルアミン、
ポリオキシエチレン硬化ヒマシ油、アルキルアルカノー
ルアミド等が挙げられ、水溶性陽イオン性分散剤として
は、例えば、ポリビニルピロリドン、ココナットアミン
アセテート、ステアリルアミンアセテート等が挙げら
れ、水溶性両性分散剤としては、例えば、ラウリルベタ
イン、ステアリルベタイン、ラウリルジメチルアミンオ
キサイド、2−アルキル−N−カルボキシメチル−N−
ヒドロキシエチルイミダゾリニウムベタイン等が挙げら
れる。これらの分散剤添加量は、スラリー中の粒子の分
散性及び沈降防止、さらに研磨傷と分散剤添加量との関
係から酸化セリウム粒子100重量部に対して、0.0
1重量部以上2.0重量部以下の範囲が好ましい。分散
剤の分子量は、100〜50,000が好ましく、1,
000〜10,000がより好ましい。分散剤の分子量
が100未満の場合は、酸化珪素膜あるいは窒化珪素膜
を研磨するときに、十分な研磨速度が得られず、分散剤
の分子量が50,000を越えた場合は、粘度が高くな
り、CMP研磨剤の保存安定性が低下する傾向があるか
らである。
The CMP abrasive used in the present invention can be obtained, for example, by dispersing a composition comprising cerium oxide particles having the above characteristics, a dispersant, and water, and further adding an additive. Here, the concentration of the cerium oxide particles is not limited, but is preferably in the range of 0.5% by weight or more and 20% by weight or less from the viewpoint of easy handling of the dispersion. In addition, since it is used as a dispersant for polishing semiconductor chips, the content of alkali metals such as sodium ions and potassium ions, halogens, and sulfur is preferably suppressed to 10 ppm or less. For example, ammonium acrylate as a copolymerization component A polymer dispersant containing is preferred. Also selected from a polymer dispersant containing ammonium acrylate as a copolymer component and a water-soluble anionic dispersant, a water-soluble nonionic dispersant, a water-soluble cationic dispersant, and a water-soluble amphoteric dispersant. Two or more dispersants including at least one dispersant may be used. Examples of the water-soluble anionic dispersant include triethanolamine lauryl sulfate, ammonium lauryl sulfate, polyoxyethylene alkyl ether triethanolamine sulfate, a special polycarboxylic acid type polymer dispersant, and the like. As the dispersant, for example, polyoxyethylene lauryl ether, polyoxyethylene cetyl ether, polyoxyethylene stearyl ether, polyoxyethylene oleyl ether, polyoxyethylene higher alcohol ether, polyoxyethylene octyl phenyl ether, polyoxyethylene nonyl phenyl ether , Polyoxyalkylene alkyl ether, polyoxyethylene derivative, polyoxyethylene sorbitan monolaurate, polyoxyethylene sorbitan monopalmitate , Polyoxyethylene sorbitan monostearate, polyoxyethylene sorbitan tristearate, polyoxyethylene sorbitan monooleate, polyoxyethylene sorbitan trioleate, polyoxyethylene sorbit tetraoleate, polyethylene glycol monolaurate,
Polyethylene glycol monostearate, polyethylene glycol distearate, polyethylene glycol monooleate, polyoxyethylene alkylamine,
Polyoxyethylene hydrogenated castor oil, alkyl alkanolamides, and the like.Examples of the water-soluble cationic dispersant include polyvinylpyrrolidone, coconutamine acetate, stearylamine acetate, and the like. For example, lauryl betaine, stearyl betaine, lauryl dimethylamine oxide, 2-alkyl-N-carboxymethyl-N-
Hydroxyethyl imidazolinium betaine and the like. These dispersant addition amounts are 0.03 parts by weight based on 100 parts by weight of the cerium oxide particles from the relationship between the dispersibility of the particles in the slurry and the prevention of sedimentation, and the relationship between the polishing scratches and the dispersant addition amount.
The range is preferably from 1 part by weight to 2.0 parts by weight. The molecular weight of the dispersant is preferably from 100 to 50,000,
000 to 10,000 is more preferred. When the molecular weight of the dispersant is less than 100, a sufficient polishing rate cannot be obtained when polishing the silicon oxide film or the silicon nitride film, and when the molecular weight of the dispersant exceeds 50,000, the viscosity becomes high. This is because the storage stability of the CMP abrasive tends to decrease.

【0022】これらの酸化セリウム粒子を水中に分散さ
せる方法としては、通常の撹拌機による分散処理の他に
ホモジナイザー、超音波分散機、湿式ボールミルなどを
用いることができる。
As a method of dispersing these cerium oxide particles in water, a homogenizer, an ultrasonic disperser, a wet ball mill, or the like can be used in addition to the usual dispersion treatment using a stirrer.

【0023】こうして作製されたCMP研磨剤中の酸化
セリウム粒子の平均粒径は、0.01μm〜1.0μm
であることが好ましい。酸化セリウム粒子の平均粒径が
0.01μm未満であると研磨速度が低くなりすぎ、
1.0μmを越えると研磨する膜に傷がつきやすくなる
傾向があるからである。
The average particle size of the cerium oxide particles in the thus prepared CMP abrasive is 0.01 μm to 1.0 μm.
It is preferable that If the average particle size of the cerium oxide particles is less than 0.01 μm, the polishing rate is too low,
If the thickness exceeds 1.0 μm, the film to be polished tends to be easily damaged.

【0024】本発明のCMP研磨剤が使用される無機絶
縁膜の作製方法として、低圧CVD法、プラズマCVD
法等が挙げられる。低圧CVD法による酸化珪素膜形成
は、Si源としてモノシラン:SiH、酸素源として
酸素:Oを用いる。このSiH−O系酸化反応を
400℃以下の低温で行わせることにより得られる。場
合によっては、CVD後1000℃またはそれ以下の温
度で熱処理される。高温リフローによる表面平坦化を図
るためにリン:Pをドープするときには、SiH−O
−PH系反応ガスを用いることが好ましい。プラズ
マCVD法は、通常の熱平衡下では高温を必要とする化
学反応が低温でできる利点を有する。プラズマ発生法に
は、容量結合型と誘導結合型の2つが挙げられる。反応
ガスとしては、Si源としてSiH、酸素源としてN
Oを用いたSiH−NO系ガスとテトラエトキシ
シラン(TEOS)をSi源に用いたTEOS−O
ガス(TEOS−プラズマCVD法)が挙げられる。基
板温度は250℃〜400℃、反応圧力は67〜400
Paの範囲が好ましい。このように、本発明の酸化珪素
膜にはリン、ホウ素等の元素がドープされていても良
い。同様に、低圧CVD法による窒化珪素膜形成は、S
i源としてジクロルシラン:SiHCl、窒素源と
してアンモニア:NHを用いる。このSiHCl
−NH系酸化反応を900℃の高温で行わせることに
より得られる。プラズマCVD法は、反応ガスとして
は、Si源としてSiH、窒素源としてNHを用い
たSiH−NH系ガスが挙げられる。基板温度は3
00℃〜400℃が好ましい。
As a method of forming an inorganic insulating film using the CMP polishing slurry of the present invention, low pressure CVD, plasma CVD, etc.
And the like. In forming a silicon oxide film by a low-pressure CVD method, monosilane: SiH 4 is used as a Si source, and oxygen: O 2 is used as an oxygen source. It can be obtained by performing this SiH 4 —O 2 -based oxidation reaction at a low temperature of 400 ° C. or less. In some cases, heat treatment is performed at a temperature of 1000 ° C. or lower after CVD. When doping phosphorus: P for planarization of the surface by high-temperature reflow, SiH 4 —O
It is preferred to use 2 -PH 3 system reaction gas. The plasma CVD method has an advantage that a chemical reaction requiring a high temperature can be performed at a low temperature under normal thermal equilibrium. The plasma generation method includes two types, a capacitive coupling type and an inductive coupling type. As a reaction gas, SiH 4 as a Si source and N as an oxygen source
2 O The SiH 4 -N 2 O-based gas and TEOS-O 2 based gas of tetraethoxysilane (TEOS) was used in the Si source used (TEOS-plasma CVD method). The substrate temperature is 250 ° C to 400 ° C, and the reaction pressure is 67 to 400.
The range of Pa is preferable. As described above, the silicon oxide film of the present invention may be doped with elements such as phosphorus and boron. Similarly, silicon nitride film formation by low pressure CVD
Dichlorosilane: SiH 2 Cl 2 is used as an i source, and ammonia: NH 3 is used as a nitrogen source. This SiH 2 Cl 2
It can be obtained by performing an —NH 3 -based oxidation reaction at a high temperature of 900 ° C. In the plasma CVD method, a SiH 4 -NH 3 gas using SiH 4 as a Si source and NH 3 as a nitrogen source is used as a reaction gas. Substrate temperature is 3
00 ° C to 400 ° C is preferred.

【0025】基板として、半導体基板すなわち回路素子
と配線パターンが形成された段階の半導体基板、回路素
子が形成された段階の半導体基板上に酸化珪素膜層ある
いは窒化珪素膜層が形成された基板が使用できる。この
ような半導体基板上に形成された酸化珪素膜層あるいは
窒化珪素膜層を上記CMP研磨剤で研磨することによっ
て、酸化珪素膜層あるいは窒化珪素膜層表面の凹凸を解
消し、半導体基板全面にわたって平滑な面とすることが
できる。また、シャロー・トレンチ分離にも使用でき
る。
As the substrate, a semiconductor substrate, that is, a semiconductor substrate in which circuit elements and wiring patterns are formed, or a substrate in which a silicon oxide film layer or a silicon nitride film layer is formed on a semiconductor substrate in which circuit elements are formed, is used. Can be used. By polishing the silicon oxide film layer or the silicon nitride film layer formed on such a semiconductor substrate with the above-mentioned CMP polishing agent, irregularities on the surface of the silicon oxide film layer or the silicon nitride film layer are eliminated, and the entire surface of the semiconductor substrate is removed. It can be a smooth surface. It can also be used for shallow trench isolation.

【0026】研磨する装置に制限はなく、円盤型研磨装
置、リニア型研磨装置、ウェブ型研磨装置で用いること
ができる。一例としては半導体基板を保持するホルダー
と研磨布(パッド)を貼り付けた(回転数が変更可能な
モータ等を取り付けてある)定盤を有する一般的な研磨
装置がある。研磨条件に制限はないが、半導体基板にか
ける圧力は研磨後に傷が発生しないように0.1MPa
以下が好ましい。研磨している間、CMPパッドにはス
ラリーをポンプ等で連続的に供給する。この供給量に制
限はないが、研磨パッドの表面が常にスラリーで覆われ
ていることが好ましい。
The apparatus for polishing is not limited, and can be used in a disk-type polishing apparatus, a linear-type polishing apparatus, and a web-type polishing apparatus. As an example, there is a general polishing apparatus having a holder for holding a semiconductor substrate and a surface plate on which a polishing cloth (pad) is attached (a motor or the like whose rotation speed can be changed is attached). The polishing conditions are not limited, but the pressure applied to the semiconductor substrate is 0.1 MPa so as not to cause scratches after polishing.
The following is preferred. During polishing, slurry is continuously supplied to the CMP pad by a pump or the like. Although the supply amount is not limited, it is preferable that the surface of the polishing pad is always covered with the slurry.

【0027】研磨終了後の半導体基板は、流水中で良く
洗浄後、スピンドライヤ等を用いて半導体基板上に付着
した水滴を払い落としてから乾燥させることが好まし
い。このようにして平坦化されたシャーロー・トレンチ
を形成したあと、酸化珪素絶縁膜層の上に、アルミニウ
ム配線を形成し、その配線間及び配線上に再度上記方法
により酸化珪素絶縁膜を形成後、上記CMP研磨剤、パ
ッドを用いて研磨することによって、絶縁膜表面の凹凸
を解消し、半導体基板全面にわたって平滑な面とする。
この工程を所定数繰り返すことにより、所望の層数の半
導体を製造する。
After the polishing is completed, the semiconductor substrate is preferably washed well in running water, and then dried using a spin drier or the like to remove water droplets adhering to the semiconductor substrate. After forming the shallow trench thus flattened, an aluminum wiring is formed on the silicon oxide insulating film layer, and a silicon oxide insulating film is formed again between the wirings and on the wiring by the above method. By polishing using the above-mentioned CMP polishing agent and pad, unevenness on the surface of the insulating film is eliminated, and a smooth surface is formed over the entire semiconductor substrate.
By repeating this process a predetermined number of times, a semiconductor having a desired number of layers is manufactured.

【0028】本発明のCMPパッドは、半導体基板に形
成された酸化珪素膜だけでなく、所定の配線を有する配
線板に形成された酸化珪素膜、ガラス、窒化珪素等の無
機絶縁膜、ポリシリコン、Al、Cu、Ti、TiN、
W、Ta、TaN等を主として含有する膜、フォトマス
ク・レンズ・プリズムなどの光学ガラス、ITO等の無
機導電膜、ガラス及び結晶質材料で構成される光集積回
路・光スイッチング素子・光導波路、光ファイバーの端
面、シンチレータ等の光学用単結晶、固体レーザ単結
晶、青色レーザLED用サファイヤ基板、SiC、Ga
P、GaAS等の半導体単結晶、磁気ディスク用ガラス
基板、磁気ヘッド等を研磨することができる。
The CMP pad of the present invention includes not only a silicon oxide film formed on a semiconductor substrate, but also a silicon oxide film formed on a wiring board having predetermined wiring, glass, an inorganic insulating film such as silicon nitride, polysilicon, or the like. , Al, Cu, Ti, TiN,
A film mainly containing W, Ta, TaN, etc., an optical glass such as a photomask / lens / prism, an inorganic conductive film such as ITO, an optical integrated circuit / optical switching element / optical waveguide composed of glass and a crystalline material, Optical fiber end face, optical single crystal such as scintillator, solid-state laser single crystal, sapphire substrate for blue laser LED, SiC, Ga
A semiconductor single crystal such as P or GaAs, a glass substrate for a magnetic disk, a magnetic head, or the like can be polished.

【0029】[0029]

【実施例】以下本発明を実施例に基づいて詳細に説明す
るが、本発明はこれに限定されるものではない。 実施例1 (CMPパッドの表面処理)2.0mm厚みの平板AB
S樹脂シートに#70、#150、#400番手のダイ
ヤモンド砥石を用いて、圧力9.0kPa、回転38r
pmで20分間ドレッシング処理を行った。また、AB
S樹脂シート上に表面粗化処理した銅箔をのせプレス処
理により銅箔表面の凹凸を転写した。これらの処理によ
り、表面の中心線平均表面あらさRaが0.05〜6μ
mのCMPパッドを得た。
The present invention will be described below in detail with reference to examples, but the present invention is not limited to these examples. Example 1 (Surface treatment of CMP pad) Flat plate AB having a thickness of 2.0 mm
Using # 70, # 150 and # 400 diamond grindstones for S resin sheet, pressure 9.0 kPa, rotation 38r
Dressing was performed at pm for 20 minutes. AB
The surface roughened copper foil was placed on the S resin sheet, and the unevenness of the copper foil surface was transferred by pressing. By these treatments, the center line average surface roughness Ra of the surface is 0.05 to 6 μm.
m CMP pads were obtained.

【0030】(酸化セリウム粒子の作製)炭酸セリウム
水和物2kgを白金製容器に入れ、800℃で2時間空
気中で焼成することにより黄白色の粉末を約1kg得
た。この粉末をX線回折法で相同定を行ったところ酸化
セリウムであることを確認した。焼成粉末粒子径は30
〜100μmであった。焼成粉末粒子表面を走査型電子
顕微鏡で観察したところ、酸化セリウムの粒界が観察さ
れた。粒界に囲まれた酸化セリウム一次粒子径を測定し
たところ、体積分布の中央値が190nm、最大値が5
00nmであった。酸化セリウム粉末1kgをジェット
ミルを用いて乾式粉砕を行った。粉砕粒子について走査
型電子顕微鏡で観察したところ、一次粒子径と同等サイ
ズの小さな粒子の他に、1〜3μmの大きな粉砕残り粒
子と0.5〜1μmの粉砕残り粒子が混在していた。
(Preparation of Cerium Oxide Particles) 2 kg of cerium carbonate hydrate was placed in a platinum container and calcined at 800 ° C. for 2 hours in the air to obtain about 1 kg of yellowish white powder. When this powder was subjected to phase identification by an X-ray diffraction method, it was confirmed that the powder was cerium oxide. The calcined powder particle size is 30
100100 μm. When the surface of the fired powder particles was observed with a scanning electron microscope, grain boundaries of cerium oxide were observed. When the primary particle diameter of cerium oxide surrounded by the grain boundaries was measured, the median of the volume distribution was 190 nm and the maximum was 5 nm.
00 nm. 1 kg of cerium oxide powder was dry-ground using a jet mill. Observation of the pulverized particles with a scanning electron microscope revealed that in addition to the small particles having the same size as the primary particle diameter, large pulverized residual particles of 1 to 3 μm and pulverized residual particles of 0.5 to 1 μm were mixed.

【0031】(酸化セリウムスラリーの作製)上記作製
の酸化セリウム粒子1kgとポリアクリル酸アンモニウ
ム塩水溶液(40重量%)23gと脱イオン水8977
gを混合し、攪拌しながら超音波分散を10分間施し
た。得られたスラリーを1ミクロンフィルターでろ過を
し、さらに脱イオン水を加えることにより5wt%スラ
リーを得た。スラリーpHは8.3であった。スラリー
粒子をレーザ回折式粒度分布計で測定するために、適当
な濃度に希釈して測定した結果、D99%粒径が0.9
9μmであった。
(Preparation of Cerium Oxide Slurry) 1 kg of the cerium oxide particles prepared above, 23 g of an aqueous solution of ammonium polyacrylate (40% by weight), and deionized water 8977
g was mixed and subjected to ultrasonic dispersion for 10 minutes while stirring. The obtained slurry was filtered through a 1-micron filter, and further 5% by weight of slurry was obtained by adding deionized water. The slurry pH was 8.3. As a result of diluting the slurry particles to an appropriate concentration in order to measure them with a laser diffraction type particle size distribution meter, the D99% particle size was found to be 0.9.
It was 9 μm.

【0032】(絶縁膜層の研磨)φ127mmSi基板
上ににTEOS−プラズマCVD法で酸化珪素膜を20
00nm形成したブランケットウエハを作製する。保持
する基板取り付け用の吸着パッドを貼り付けたホルダー
に上記ウエハをセットし、上記作製した各種表面あらさ
を有するCMPパッドを貼り付けたφ380mmの定盤
上に絶縁膜面を下にしてホルダーを載せ、さらに加工荷
重を30.0kPaに設定した。定盤上に上記の酸化セ
リウム研磨剤(固形分:1重量%)を150cc/mi
nの速度で滴下しながら、定盤及びウエハを38rpm
で2分間回転させ、絶縁膜を研磨した。研磨後のウエハ
を純水で良く洗浄後、乾燥した。光干渉式膜厚測定装置
を用いて、研磨前後の膜厚差を測定し、研磨速度を計算
した。研磨速度とパッド表面の中心線平均表面あらさR
aを図2に示す。
(Polishing of insulating film layer) A silicon oxide film was formed on a 127 mm Si substrate by a TEOS-plasma CVD method.
A blanket wafer having a thickness of 00 nm is manufactured. The wafer was set on a holder to which a suction pad for attaching a substrate to be held was attached, and the holder was placed with the insulating film face down on a φ380 mm platen to which the above-prepared CMP pads having various surface roughness were attached. , And the processing load was set to 30.0 kPa. 150 cc / mi of the above cerium oxide abrasive (solid content: 1% by weight) on a surface plate
While dropping at a speed of n, the platen and the wafer were rotated at 38 rpm.
For 2 minutes to polish the insulating film. The polished wafer was thoroughly washed with pure water and then dried. The difference in film thickness before and after polishing was measured using an optical interference type film thickness measuring device, and the polishing rate was calculated. Polishing rate and center line average surface roughness R of pad surface
a is shown in FIG.

【0033】実施例2 実施例1で作製した酸化セリウムスラリーを沈降分級処
理を行った。このスラリー粒子をレーザ回折式粒度分布
計で測定するために、適当な濃度に希釈して測定した結
果、D99%粒径が0.6μmであった。D99%粒径
が0.6μmの酸化セリウムスラリーを用いる以外、実
施例と同様のCMPパッドを用い、実施例1と同様の絶
縁膜層の研磨を行った。研磨速度とパッド表面の中心線
平均表面あらさRaを図3に示す。更に、実施例1及び
実施例2で得られた研磨速度をパッド表面の中心線平均
表面あらさRaとD99%粒径との比で表したものを図
1に示す。パッド表面の中心線平均表面あらさRaとレ
ーザ散乱式粒度分布計で測定した研磨剤粒子のD99%
粒径との比を、0.2以上1.3以下に規定すること
で、高い研磨速度を得ることが可能である。
Example 2 The cerium oxide slurry prepared in Example 1 was subjected to sedimentation classification. The slurry particles were diluted to an appropriate concentration for measurement by a laser diffraction particle size distribution analyzer, and as a result, the D99% particle size was 0.6 μm. The same insulating film layer as in Example 1 was polished using the same CMP pad as in Example 1, except that a cerium oxide slurry having a D99% particle size of 0.6 μm was used. FIG. 3 shows the polishing rate and the center line average surface roughness Ra of the pad surface. Further, FIG. 1 shows the polishing rates obtained in Examples 1 and 2 expressed by the ratio between the center line average surface roughness Ra of the pad surface and the D99% particle size. Center line average surface roughness Ra of pad surface and D99% of abrasive particles measured by laser scattering type particle size distribution meter
By setting the ratio to the particle size to be at least 0.2 and at most 1.3, a high polishing rate can be obtained.

【0034】実施例3 2.0mm厚みの平板ABS樹脂シートに#70番手の
ダイヤモンド砥石を用いて、圧力9.0kPa、回転3
8rpmで20分間ドレッシング処理を行った。この処
理により、表面の中心線平均表面あらさRaが6μmの
CMPパッドを得た。その後このCMPパッドを用いて
絶縁膜層の研磨を行い、基板間のドレッシング処理なし
での研磨速度の安定性を調べた。なお、研磨に用いた酸
化セリウムスラリー及び絶縁膜層の研磨条件は実施例1
と同様である。研磨速度と研磨した基板枚数の関係を図
4に示す。研磨速度のばらつき(1σ/平均研磨速度×
100)は2.5%であった。
Example 3 Using a # 70 diamond grindstone on a 2.0 mm thick flat ABS resin sheet, a pressure of 9.0 kPa and a rotation of 3
The dressing was performed at 8 rpm for 20 minutes. By this treatment, a CMP pad having a center line average surface roughness Ra of 6 μm was obtained. Thereafter, the insulating film layer was polished using this CMP pad, and the stability of the polishing rate without dressing between the substrates was examined. The polishing conditions for the cerium oxide slurry and the insulating film layer used for polishing were the same as those in Example 1.
Is the same as FIG. 4 shows the relationship between the polishing rate and the number of polished substrates. Variation in polishing rate (1σ / average polishing rate ×
100) was 2.5%.

【0035】比較例1 表面の中心線平均表面あらさRaが1.8μmのCMP
パッドを用いる以外実施例3と同様に研磨した。研磨速
度と研磨した基板枚数の関係を図5に示す。研磨速度
は、一定ではなく、研磨枚数に応じて速くなっている。
その結果、研磨速度のばらつき(1σ/平均研磨速度×
100)は25%であった。
Comparative Example 1 CMP having a center line average surface roughness Ra of 1.8 μm
Polishing was performed in the same manner as in Example 3 except that a pad was used. FIG. 5 shows the relationship between the polishing rate and the number of polished substrates. The polishing rate is not constant, but increases in accordance with the number of pieces polished.
As a result, variations in polishing rate (1σ / average polishing rate ×
100) was 25%.

【0036】実施例4 研磨する基板間に#70番手のダイヤモンド砥石を用い
て、圧力90g/cm 、回転38rpmで1分間ドレ
ッシング処理を行う以外実施例3と同様に研磨した。研
磨速度と研磨した基板枚数の関係を図6に示す。研磨速
度のばらつき(1σ/平均研磨速度×100)は3.3
%であった。
Example 4 A # 70 diamond whetstone was used between substrates to be polished.
And pressure 90g / cm 2At 38 rpm for 1 minute
Polishing was performed in the same manner as in Example 3 except for performing a shinging process. Laboratory
FIG. 6 shows the relationship between the polishing rate and the number of polished substrates. Polishing speed
The degree of dispersion (1σ / average polishing rate × 100) is 3.3.
%Met.

【0037】比較例2 表面の中心線平均表面あらさRaが1.8μmのCMP
パッドを用い、研磨する基板間に#400番手のダイヤ
モンド砥石を用いて、圧力9.0kPa、回転38rp
mで1分間ドレッシング処理を行う以外実施例3と同様
に研磨した。研磨速度と研磨した基板枚数の関係を図7
に示す。その結果、研磨速度のばらつき(1σ/平均研
磨速度×100)は13%であった。
Comparative Example 2 CMP in which the center line average surface roughness Ra of the surface is 1.8 μm
Using a pad and using a # 400 diamond grindstone between substrates to be polished, at a pressure of 9.0 kPa and a rotation of 38 rpm
The polishing was performed in the same manner as in Example 3 except that the dressing treatment was performed at m for 1 minute. FIG. 7 shows the relationship between the polishing rate and the number of polished substrates.
Shown in As a result, the variation in the polishing rate (1σ / average polishing rate × 100) was 13%.

【0038】[0038]

【発明の効果】本発明の表面の中心線平均表面あらさR
aを研磨剤粒子のD99%粒径との比で規定したCMP
パッド及びこのパッドを用いた基板の研磨方法により、
層間絶縁膜、BPSG(ボロン、リンをドープした二酸
化珪素膜)膜の平坦化工程、シャロー・トレンチ分離の
形成工程を効率的に、かつプロセス管理も容易に行うこ
とができる。
The center line average surface roughness R of the surface of the present invention
a is defined by the ratio of a to the D99% particle size of the abrasive particles.
By a pad and a polishing method of a substrate using the pad,
The step of flattening the interlayer insulating film and the BPSG (silicon dioxide film doped with boron and phosphorus) film and the step of forming shallow trench isolation can be efficiently and easily performed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】パッド表面の中心線平均表面あらさRaに対す
る研磨剤粒子粒径の比と研磨速度との関係を示すグラ
フ。
FIG. 1 is a graph showing the relationship between the ratio of the abrasive particle diameter to the center line average surface roughness Ra of the pad surface and the polishing rate.

【図2】研磨剤粒子粒径1μmでのパッド表面の中心線
平均表面あらさRaと研磨速度の関係を示すグラフ。
FIG. 2 is a graph showing the relationship between the center line average surface roughness Ra of the pad surface and the polishing rate when the abrasive particle diameter is 1 μm.

【図3】研磨剤粒子粒径0.6μmでのパッド表面の中
心線平均表面あらさRaと研磨速度の関係を示すグラ
フ。
FIG. 3 is a graph showing the relationship between the center line average surface roughness Ra of the pad surface and the polishing rate when the abrasive particle diameter is 0.6 μm.

【図4】パッド表面の中心線平均表面あらさRa6.0
μmでドレッシングなしでの使用による研磨枚数と研磨
速度の関係を示すグラフ。
FIG. 4 shows a center line average surface roughness Ra6.0 of a pad surface.
7 is a graph showing the relationship between the number of polished wafers and the polishing rate when used without dressing at μm.

【図5】パッド表面の中心線平均表面あらさRa1.8
μmでドレッシングなしでの使用による研磨枚数と研磨
速度の関係を示すグラフ。
FIG. 5: Center line average surface roughness Ra1.8 of the pad surface
7 is a graph showing the relationship between the number of polished wafers and the polishing rate when used without dressing at μm.

【図6】パッド表面の中心線平均表面あらさRa6.0
μmでドレッシングありでの使用による研磨枚数と研磨
速度の関係を示すグラフ。
FIG. 6: Center line average surface roughness Ra6.0 of the pad surface
9 is a graph showing the relationship between the number of polished wafers and the polishing rate when used with dressing at μm.

【図7】パッド表面の中心線平均表面あらさRa1.8
μmでドレッシングありでの使用による研磨枚数と研磨
速度の関係を示すグラフ。
FIG. 7 shows a center line average surface roughness Ra1.8 of the pad surface.
9 is a graph showing the relationship between the number of polished wafers and the polishing rate when used with dressing at μm.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 中川 宏 茨城県日立市東町四丁目13番1号 日立化 成工業株式会社山崎事業所内 Fターム(参考) 3C058 AA07 AA09 CA01 CB01 DA12 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Hiroshi Nakagawa 4-13-1, Higashicho, Hitachi City, Ibaraki Pref. Hitachi Chemical Co., Ltd. Yamazaki Office F-term (reference)

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 酸化セリウム研磨剤を用いて、基板上に
形成された薄膜を化学機械的に研磨するための表面に微
小な凹凸を有するパッドにおいて、パッド表面の中心線
平均表面あらさRaがレーザ散乱式粒度分布計で測定し
た研磨剤粒子のD99%粒径との比で規定されているこ
とを特徴とする酸化セリウム研磨剤用CMPパッド。
1. A pad having fine irregularities on a surface for chemically and mechanically polishing a thin film formed on a substrate using a cerium oxide abrasive, wherein a center line average surface roughness Ra of the pad surface is a laser. A CMP pad for a cerium oxide abrasive, characterized in that it is defined by a ratio of the abrasive particles to a D99% particle size measured by a scattering type particle size distribution meter.
【請求項2】 パッド表面の中心線平均表面あらさRa
とレーザ散乱式粒度分布計で測定した研磨剤粒子のD9
9%粒径との比が、0.2以上1.3以下である請求項
1記載の酸化セリウム研磨剤用CMPパッド。
2. The center line average surface roughness Ra of the pad surface
Of abrasive particles measured with a laser scattering particle size distribution analyzer
The CMP pad for a cerium oxide abrasive according to claim 1, wherein a ratio with respect to a 9% particle size is 0.2 or more and 1.3 or less.
【請求項3】 パッド表面の中心線平均表面あらさRa
とレーザ散乱式粒度分布計で測定した研磨剤粒子のD9
9%粒径との比が、2〜20である請求項1記載の酸化
セリウム研磨剤用CMPパッド。
3. The center line average surface roughness Ra of the pad surface
Of abrasive particles measured with a laser scattering particle size distribution analyzer
The CMP pad for a cerium oxide abrasive according to claim 1, wherein a ratio to a 9% particle size is 2 to 20.
【請求項4】 基板を請求項1〜3いずれか記載の酸化
セリウム研磨剤用CMPパッドに押し当て、酸化セリウ
ム研磨剤を研磨膜とCMPパッドとの間に供給しなが
ら、基板もしくは研磨定盤を動かすことにより研磨膜を
研磨することを特徴とする基板の研磨方法。
4. A substrate or a polishing platen while pressing a substrate against the CMP pad for cerium oxide abrasive according to claim 1 and supplying the cerium oxide abrasive between the polishing film and the CMP pad. A polishing method for a substrate, characterized by polishing a polishing film by moving a substrate.
【請求項5】 基板が、SiO絶縁膜が形成された基
板である請求項4記載の基板の研磨方法。
5. The method for polishing a substrate according to claim 4, wherein the substrate is a substrate on which an SiO 2 insulating film is formed.
【請求項6】 研磨中パッド表面の中心線平均表面あら
さRaとレーザ散乱式粒度分布計で測定した研磨剤粒子
のD99%粒径との比を研磨中に変化させる請求項4〜
5いずれか記載の基板の研磨方法。
6. The polishing method according to claim 4, wherein the ratio between the center line average surface roughness Ra of the pad surface during polishing and the D99% particle size of the abrasive particles measured by a laser scattering type particle size distribution meter is changed during polishing.
5. The method for polishing a substrate according to any one of 5.
【請求項7】 酸化セリウム研磨剤の砥粒が多結晶酸化
セリウムである請求項4〜6いずれか記載の基板の研磨
方法。
7. The method for polishing a substrate according to claim 4, wherein the abrasive grains of the cerium oxide abrasive are polycrystalline cerium oxide.
JP2000345663A 2000-11-13 2000-11-13 Cmp pad for cerium oxide polishing agent and method of polishing wafer Pending JP2002151448A (en)

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Country Link
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004061925A1 (en) * 2002-12-31 2004-07-22 Sumitomo Mitsubishi Silicon Corporation Slurry composition for chemical mechanical polishing, method for planarization of surface of semiconductor element using the same, and method for controlling selection ratio of slurry composition
CN104028423A (en) * 2014-06-24 2014-09-10 东莞市海中机械有限公司 Lithium battery material double-sided coating machine
CN107112201A (en) * 2015-02-09 2017-08-29 住友电气工业株式会社 InP substrate, the method for checking InP substrate and the method for manufacturing InP substrate
JP2023501448A (en) * 2019-11-11 2023-01-18 キェムトン カンパニー・リミテッド Method for producing cerium oxide particles, abrasive particles, and polishing slurry composition containing the same

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JPH09286975A (en) * 1996-02-19 1997-11-04 Showa Denko Kk Composition for precision polishing
JPH1148130A (en) * 1997-07-31 1999-02-23 Sony Corp Abrasive cloth, manufacture thereof, chemical-mechanical polishing device and method for semiconductor wafer
JPH1149599A (en) * 1997-08-01 1999-02-23 Fujikura Ltd Polycrystal thin film, its production, oxide superconducting conductor and manufacture of the same conductor
WO1999031195A1 (en) * 1997-12-18 1999-06-24 Hitachi Chemical Company, Ltd. Abrasive, method of polishing wafer, and method of producing semiconductor device
JP2000232082A (en) * 1998-12-11 2000-08-22 Toray Ind Inc Polishing pad and apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09286975A (en) * 1996-02-19 1997-11-04 Showa Denko Kk Composition for precision polishing
JPH1148130A (en) * 1997-07-31 1999-02-23 Sony Corp Abrasive cloth, manufacture thereof, chemical-mechanical polishing device and method for semiconductor wafer
JPH1149599A (en) * 1997-08-01 1999-02-23 Fujikura Ltd Polycrystal thin film, its production, oxide superconducting conductor and manufacture of the same conductor
WO1999031195A1 (en) * 1997-12-18 1999-06-24 Hitachi Chemical Company, Ltd. Abrasive, method of polishing wafer, and method of producing semiconductor device
JP2000232082A (en) * 1998-12-11 2000-08-22 Toray Ind Inc Polishing pad and apparatus

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004061925A1 (en) * 2002-12-31 2004-07-22 Sumitomo Mitsubishi Silicon Corporation Slurry composition for chemical mechanical polishing, method for planarization of surface of semiconductor element using the same, and method for controlling selection ratio of slurry composition
CN104028423A (en) * 2014-06-24 2014-09-10 东莞市海中机械有限公司 Lithium battery material double-sided coating machine
CN107112201A (en) * 2015-02-09 2017-08-29 住友电气工业株式会社 InP substrate, the method for checking InP substrate and the method for manufacturing InP substrate
CN107112201B (en) * 2015-02-09 2020-07-28 住友电气工业株式会社 Indium phosphide substrate, method for inspecting indium phosphide substrate, and method for manufacturing indium phosphide substrate
JP2023501448A (en) * 2019-11-11 2023-01-18 キェムトン カンパニー・リミテッド Method for producing cerium oxide particles, abrasive particles, and polishing slurry composition containing the same
JP7402565B2 (en) 2019-11-11 2023-12-21 キェムトン カンパニー・リミテッド Method for producing cerium oxide particles, abrasive particles and polishing slurry compositions containing the same

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