JP2002199731A - Three-phase ac-dc converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem of the dimensional reduction of a three-phase AC-DC converter is difficult. SOLUTION: First, second, and third insulating converters 2, 3, and 4 are connected between respective lines of three-phase AC input terminals 1r, 1s, and 1t. The DC output terminals of the first, second, and the third converters are connected to a common smoothing capacitor 6. The first, second, and third converters 2, 3, and 4 are controlled, so as to make the output voltages constant and to make the input power factors one.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a three-phase AC / DC converter having a switching circuit and an insulating transformer for converting three-phase AC power into DC power.

[0002]

2. Description of the Related Art When an insulating rectifier for use in a battery charger or the like is constructed, an insulating transformer is provided on the commercial frequency side, and a rectifying circuit and a PWM switching circuit for voltage adjustment are provided on the secondary side of the transformer. , The transformer becomes larger. To solve this problem, a three-phase AC power
A WM rectifier, that is, an AC-DC converter is connected, a DC link capacitor is connected between output terminals of the converter, an inverter having a transformer is connected to an output stage of the DC link capacitor, and a rectifying and smoothing circuit is provided at an output stage of the inverter. Sometimes. In this case, since the transformer is a high-frequency transformer having a small loss, the size can be reduced.

[0003]

However, the converter,
Since a DC link capacitor, an inverter, a transformer, and a rectifying / smoothing circuit are required, parts other than the transformer become large, and loss occurs in each circuit, making it difficult to increase overall efficiency.

It is an object of the present invention to reduce the size of a three-phase AC / DC converter having an insulating transformer and a switching circuit.

[0005]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems and to achieve the above-mentioned object, the present invention provides first, second, and third AC input terminals connected to a three-phase AC power supply, and A first AC-DC converter connected to first and second AC input terminals; a second AC-DC converter connected to the second and third AC input terminals;
A third AC-DC converter connected to the AC input terminal of the first, second, and third converters, and a DC output of the first, second, and third AC-DC converters Parallel connection means for connecting terminals in parallel with each other, wherein each of the first, second and third AC-DC converters intermittently connects an AC voltage to a transformer and a primary winding of the transformer. An insulation type converter including a switching circuit for applying a voltage and a rectifier circuit for rectifying a voltage of a secondary winding of the transformer, wherein the control circuit includes:
The present invention relates to a three-phase AC-DC converter, wherein the switching circuit is controlled so as to improve the power factor of three-phase AC power at the first, second, and third AC input terminals. It is.

[0006] As described in claim 2, the first,
A voltage detecting circuit for detecting first, second, and third line voltages of the second and third AC input terminals, wherein the control circuit includes a first, second, and third AC-terminals; It is desirable to have means for selectively stopping one of the DC converters to which the lowest line voltage is input. According to a third aspect of the present invention, the control circuit controls a switching timing of a switching circuit of two AC-current converters operating in the first, second, and third AC-DC converters. It is desirable to have a shifting means. According to a fourth aspect of the present invention, the control circuit includes a first, a second, and a third duty ratio command indicating the duty ratios of the switching circuits of the first, second, and third AC-DC converters. First, second, and third duty ratio command generators for generating values; sawtooth wave generating means for selectively generating a first sawtooth wave having a rising slope and a second sawtooth wave having a falling slope; , The first, second and third
The first, second, and third PWM control signals are formed by comparing the duty ratio command value with the first or second sawtooth wave, and the first, second, and third AC-DC converters are formed. For the first, second and third comparators to supply the switching circuit of the converter and one of the two operating in said first, second and third AC-DC converters. Means for supplying the first sawtooth wave to the comparator and controlling the sawtooth wave generating means to supply the second sawtooth wave to the comparator for the other of the two sets. It is desirable to have. According to a fifth aspect of the present invention, the control circuit includes a first, a second, and a third duty ratio command indicating a duty ratio of a switching circuit of the first, second, and third AC-DC converters. First, second, and third duty ratio command value generators for generating values; sawtooth wave generating means for selectively generating first and second sawtooth waves having phases different from each other by 180 degrees; The first, second and third duty ratio command values are compared with the first or second sawtooth wave to determine the first, second, and third sawtooth waves.
A first, a second, and a third comparator for forming second and third PWM control signals and supplying the second and third PWM control signals to a switching circuit of the first, second, and third AC-DC converters; 1,
Operating in the second and third AC-DC converters 2
Providing the first sawtooth wave to the comparator for one of the stages and the second sawtooth wave to the comparator for the other of the two stages. It is desirable to have means for controlling the generating means.

[0007]

According to the invention, the AC voltage is intermittently switched on and off in the switching circuit on the primary side of the insulating transformer, and the AC-DC conversion is performed only by rectifying and smoothing the output of the secondary winding. Therefore, the AC-DC converter can be simplified and the efficiency can be improved as a whole. In addition, since the line voltages of the three-phase AC are converted into DC by the first, second and third AC-DC converters and their output terminals are connected in common, changes in the line voltages are compensated for each other. DC output can be obtained, and the smoothness is improved. According to the second aspect of the present invention, the converter to which the lowest line voltage among the three-phase line voltages is input is stopped, so that the efficiency can be improved. That is, a converter with a low input voltage has a low efficiency, and a converter with a high input voltage has a high efficiency. According to the second aspect of the present invention, since two efficient units are selected and operated, the overall efficiency is also increased. Further, since it is not necessary to operate the converter in a region where the input voltage is low, the input voltage range of the converter can be narrowed. Claim 3
According to the inventions of (1) to (5), the switching timing is shifted by the PWM control signal, so that the smoothness is improved.
Power ripple generated when power is supplied to the load can be reduced.

[0008]

Next, an embodiment of the present invention will be described with reference to the drawings.

[0009]

[First Embodiment] AC of the first embodiment shown in FIG.
The DC converter includes first, second and third AC input terminals 1
r, 1s, 1t, the first, second, and third converters 2, 3, 4, a common control circuit 5, a common smoothing capacitor 6, a pair of DC output terminals 7a, 7b, and an input. Voltage detection circuit 8, output voltage detection circuit 9, current detector 1
0, 11, 12 and reactor 1 for removing high frequency components
3, 14, and 15.

The first, second and third AC input terminals 1r,
1s and 1t are for inputting R-phase, S-phase, and T-phase voltages of a three-phase AC having a commercial frequency (50 Hz or 60 Hz).

The first, second and third converters 2, 3,
Reference numeral 4 denotes a PWM isolated converter having a PWM switching circuit, an isolation transformer, and a rectifier circuit.
The input lines 16 and 17 of the first converter 2 are connected to the first and second AC input terminals 1 through the reactors 13 and 14, respectively.
r, 1s, and converts the first line voltage Vrs between the R phase and the S phase into a DC voltage. The input lines 18 and 19 of the second converter 3 are connected to the second and third AC input terminals 1s and 1t via the reactors 14 and 15, respectively, and a second line between the S phase and the T phase is provided. The intermediate voltage Vst is converted into a DC voltage. Input line 2 of third converter 4
0 and 21 are the first and third via the reactors 13 and 15
Are connected to the AC input terminals 1r and 1t of the
The third line voltage Vtr between the phases is converted to a DC voltage.
The DC output lines 22, 23 of the first converter 2 and the second
The DC output lines 24, 25 of the converter and the DC output lines 26, 27 of the third converter 4 are connected in parallel with each other and connected to the smoothing capacitor 6. The smoothing capacitor 6 is connected to a pair of DC output terminals 7a and 7b. Power is supplied to the load 7 between the output terminals 7a and 7b via the smoothing capacitor 6. Although FIG. 1 shows a pair of DC output terminals 7a and 7b and one load 7, a plurality of DC output terminals may be provided to connect a plurality of loads.

The first, second and third AC input terminals 1r,
An input voltage detection circuit 8 connected to 1s and 1t detects R, S and T-phase voltages Vr, Vs, and Vt of three-phase AC voltages,
This is sent to the control circuit 5 on lines 28, 29 and 30. Note that, for ease of explanation, the input and output of the input voltage detection circuit 8 are denoted by the same symbols.

An output voltage detection circuit 9 connected to the pair of DC output terminals 7a and 7b detects an output voltage V0 between the output terminals 7a and 7b, and sends the output voltage V0 to the control circuit 5 via a line 31. For the sake of simplicity, the input and output of the output voltage detection circuit 9 are denoted by the same reference symbols.

First, second and third current detectors 10, 1
1, 12 are first, second and third converters 2, 3, 4
And detects the converter input currents Irs, Ist, Itr and sends them to the control circuit 5 via lines 32, 33, 34.
It should be noted that the current detectors 10, 11, and
Twelve inputs and outputs are indicated by the same symbols.

The control circuit 5 has three-phase AC input terminals 1r, 1r,
The first and second power factors are set so that the power factor at s and 1t approaches 1.
And forming a PWM control signal for controlling a switching circuit included in the third converters 2, 3, 4;
Converters 2, 3, 4 by lines 35, 36, 37
Send to

FIG. 2 shows details of the first, second and third converters 2, 3, 4 of FIG. Since the first, second, and third converters 2, 3, and 4 have the same circuit configuration,
Identical circuit elements are given the same reference numerals and suffix a,
b, c, the first, second and third converters 2,
3 and 4 are distinguished. Also, the configuration of the first converter 2 will be described, and the description of the second and third converters 3 and 4 will be omitted. The first converter 2 includes an insulating transformer 40a having a primary winding 41a and a secondary winding 42a, and first and second switches 43a and 43
4a and first and second primary side diodes 45a, 46
a, and first and second secondary-side diodes 47a, 48a
And an AC capacitor 49a. Primary winding 41a
A series circuit including the first and second switches 43a and 44a is connected between the R-phase input line 16 and the S-phase input line 17. First and second switches 43a, 44a
Are connected to opposite polarities. The first and second primary-side diodes 45a and 46a are connected to the first and second switches 43a and 44a in reverse parallel. The first and second primary-side diodes 45a and 46a may be built-in diodes or parasitic diodes of the first and second switches 43a and 44a formed of FETs. The combination of the first and second switches 43a and 44a and the first and second primary-side diodes 45a and 46a constitutes an AC switch circuit, and generates a positive half-wave and a negative half-wave of AC. Both can be turned on and off. An AC capacitor 49a is connected between the pair of AC input lines 16 and 17, and includes first and second switches 43a and 43a.
The high frequency components generated by turning on / off 4a are removed. The secondary winding 42a has a center tap, and the center tap is connected to the DC output line 23 on the negative side. First
The second secondary diodes 47a and 48a are connected between one end and the other end of the secondary winding 42a and the positive output line 22. Therefore, the first and second secondary diodes 47a, 48a constitute a full-wave rectifier circuit.

The first and second switches 43a and 44a are turned on at a frequency sufficiently higher than the frequency of the input AC voltage.
Turn off. During the positive half-wave period of the input AC voltage,
When the switch 43a is turned on, the line 16,
A current flows through the path of the primary winding 41a, the first switch 43a, the second primary-side diode 46a, and the line 17;
On the secondary side, the first secondary diode 47a conducts. When the second switch 44a is on during the period of the negative half-wave of the AC voltage, the path of the line 17, the second switch 44a, the first primary side diode 45a, the primary winding 41a, and the line 16 , A current flows, and on the secondary side, the second secondary-side diode 48a conducts. The second and third converters 3 and 4 operate similarly to the first converter 2. However, the input voltages of the first, second, and third converters 2, 3, and 4, that is, the first, second, and third line voltages Vrs, Vst, and Vtr have different phases. The power supply from the second and third converters 2, 3, 4 varies with time.

FIG. 3 shows the control circuit 5 of FIG. 1 in detail. The control circuit 5 has (1) a function of controlling the output voltage V0 to be constant, (2) a function of controlling the input power factor to 1, and (3)
It has a function of selectively driving the first, second, and third converters 2, 3, and 4.

A reference voltage generator 50, a voltage fluctuation detecting subtractor 51, and a current amplitude command calculator 52 are provided to execute constant voltage control. The subtractor 51 calculates the DC output voltage V of the line 31 from the reference voltage V01 of the reference voltage generator 50.
Subtract 0. Based on the output of the subtractor 51, the current amplitude command calculator 52 generates a current amplitude command value I0 for keeping the output voltage V0 constant. The current amplitude command value I0 can also be called an output voltage control command value. In this embodiment, since the DC output voltage is achieved by the current control on the AC side, I0 is called the current amplitude command value.

First, the common current amplitude command value I0
First, second, and third multipliers 53, 54, 55 are provided to control the second and third converters 2, 3, 4. First, second and third multipliers 53, 5
4 and 55 are R, S, and T phase voltages Vr, consisting of sine waves shown in FIG.
By multiplying Vs and Vt by the current amplitude command value I0, FIG.
The first, second, and third phase current command values I0r, I0s,
Outputs I0t. The phase current command values I0r, I0s, I0t
Is a three-phase AC signal corresponding to a target current command value for approximating the AC input current to a sine wave, setting the power factor to 1, and setting the output voltage V0 to a target value.

The arithmetic unit 56 has an R, S, and T phase current command value I
The first, second, and third converter current command values Ia, Ib, and Ic corresponding to 0r, I0s, and I0t are obtained.
In order to create a flag as a control signal used in the arithmetic unit 56, first, second and third subtractors 57, 5
8, 59 and a comparison arithmetic unit 60 are provided. The first subtractor 57 calculates the value of the R phase voltage Vr of the line 28 from the line 29
The S-phase voltage Vs is subtracted to obtain the RS voltage, that is, the first line voltage Vrs. The second subtractor 28 outputs S
The T phase voltage Vt of the line 30 is subtracted from the phase voltage Vs to obtain S
A voltage between T, that is, a second line voltage Vst is obtained. The third subtractor 59 outputs the T phase voltage Vt of the line 30 from the R
By subtracting the phase voltage Vr, the voltage between TRs, that is, the third line voltage V
Find tr. FIG. 4B shows the first, second, and third line voltages Vrs, Vst, and Vtr.

Comparison arithmetic unit 60 as flag creating means
Are the first, second, and third line voltages Vrs, Vst, V obtained from the first, second, and third subtractors 57, 58, 59.
The absolute values of tr are compared with each other, and when the first line voltage Vrs is the lowest, the first flag 1 is generated, and the second line voltage Vst
Is the lowest, the second flag 2 is generated, and when the third line voltage Vtr is the lowest, the third flag 3 is generated. FIG.
(D) shows a flag obtained from the comparison operation unit 60. As is clear from this, the interval between t0 and t1 (0 ° to 60 °)
And the first flag 1 is obtained in the interval from t3 to t4 (180 ° to 240 °), and in the interval from t1 to t2 (60 ° to 12 °).
0 °) and the t4 to t5 section (240 ° to 300 °), the second flag 2 is obtained, and the t2 to t3 section (120
゜ -180 ゜) and the section between t5 and T6 (300 ゜ 360)
In 3), a third flag 3 is obtained. That is, first,
The relationship between the second and third line voltages Vrs, Vst, Vtr and the flags can be expressed by the following equation (1). Flag = 1 when Vst <Vrs <Vtr or Vst>Vrs>Vtr; flag = 2 when Vrs <Vst <Vtr or Vrs>Vst>Vtr; flag = 3 when Vrs <Vtr <Vst or Vrs>Vtr>Vst; 1)

The arithmetic unit 56 includes the first and second units shown in FIG.
And the third phase current command values I0r, I0s, I0t and FIG.
The following arithmetic processing is executed based on the flag of FIG.
The first, second, and third converter current command values Ia shown in FIG.
, Ib, Ic. When the flag is 1, Ia = 0 Ib = I0s Ic = -I0r When the flag is 2, Ia = -I0s Ib = 0 Ic = I0t When the flag is 3, Ia = I0r Ib = -I0t Ic = 0. ... (2)

In the above equation (2), when the converter current command values Ia, Ib, Ic are zero, the corresponding converters 2, 3, 4 are controlled to be inactive.

The absolute value calculator 6 connected to the calculator 56
1, 62 and 63 are absolute values Ia ', Ib' and Ic of the first, second and third inverter current command values Ia, Ib and Ic.
'.

In order to execute the control of the power factor 1, the first, second and third converter current detection signal lines 32, 3
The first, second and third low-pass filters 6 and 3
4, 65 and 66 are connected. Low-pass filter 6
4, 65 and 66 remove high frequency ripples due to switching contained in the first, second and third converter currents Irs, Ist and Itr. The first, second, and third absolute value calculators 67, 68, and 69 connected to the first, second, and third low-pass filters 64, 65, and 66 perform first, second, and third filter operations on which high-frequency components have been removed. The absolute values Irs', Ist ', Itr' of the second and third converter currents Irs, Ist, Itr are determined.

Fourth, fifth and sixth subtractors 70, 71,
72 is the first, second and third converter current command values I obtained from the absolute value calculators 61, 62 and 63 on one side.
The first, second and third converter currents Irs, Ist, Itr obtained from the absolute value calculators 67, 68, 69 on the other side from the absolute values Ia ', Ib', Ic 'of a, Ib, Ic. Are subtracted from the absolute values Irs', Ist 'and Itr' of
a, Idb and Idc are obtained. That is, the fourth, fifth and sixth subtractors 70, 71 and 72 are error signal forming arithmetic units for calculating Ia'-Irs' = IdaIb'-Ist '= IdbIc'-Itr' = Idc. is there.

Fourth, fifth and sixth subtractors 70, 71,
The first, second, and third duty ratio command generators 73, 74, 75 connected to 72 amplify or calculate the first, second, and third error signals Ida, Idb, Idc. , The switches 43a, 44a of the second and third converters 2, 3, 4;
43b, 44b, 43c, and 44c, the duty ratio command values Pa,
Pb and Pc are determined. The first, second, and third duty ratio command values Pa, Pb, Pc have values proportional to the first, second, and third error signals Ida, Idb, Idc. However, the first, second, and third duty ratio command generators 73, 7
Reference numerals 4 and 75 are controlled by the output of the comparison calculator 60 as a flag generator. When the flag is 1, the first duty ratio command value Pa becomes zero, and when the flag is 2, the second duty ratio command value Pa is set. When Pb becomes zero and the flag is 3, the third duty ratio command value Pc becomes zero. When the duty ratio command value is zero, converters 2, 3, and 4 are turned off.

The sawtooth wave generator 76 applies a sawtooth wave Va for forming a PWM pulse to a frequency (for example, 20 to 40 Hz) sufficiently higher than the input AC voltages Vr, Vs, Vt as schematically shown in FIG. 150 kHz). In FIG. 5A, the minimum of the sawtooth wave Va is set to zero, and the maximum is the duty ratio command value Pa.
, Pb, and Pc.

First, second and third PWM comparators 7
7, 78 and 79 are command values Pa, Pb, obtained from the first, second and third duty ratio command generators 73, 74 and 75, respectively.
Pc and the sawtooth wave Va of the sawtooth wave generator 76 are compared as shown in FIG. 5A, and PWM control signals Ga, Gb, and Gc shown in FIGS. 5B, 5C, and 5D are formed. These are line 3
The switches 43a, 44 of FIG.
a, 43b, 44b, 43c, and 44c. In this embodiment, when Pa, Pb, and Pc are larger than the sawtooth wave Va, a high-level PWM pulse for turning on the switches 43a and 44a is generated. First PW
The M control signal Ga is supplied by a line 35 to the control terminals of both the first and second switches 43a, 44a of the first converter 2. The second PWM control signal Gb is supplied by a line 36 to the control terminals of both the first and second switches 43b, 44b of the second converter 3.
The third PWM control signal Gc is applied by a line 37 to the first and second switches 43c, 44c of the third converter 4.
Are supplied to both control terminals. The lines 35, 3
Reference numerals 6 and 37 are connected to switches 43a to 44c via a well-known switch driving circuit (not shown).

In the 0 ° -60 ° section and the 180 ° -240 ° section with respect to the R phase, the P
Since the WM control signal Ga is kept at zero, the switch 43
a and 44a are not ON-controlled. Similarly, from 60 to 12
During the 0 ° interval and the 240 ° to 300 ° interval, the PWM control signal Gb of the second converter 3 is kept at zero, and the switch 4
3b and 44b are not turned on. In addition, 120 ゜ -1
In the 80 ° section and the 300 ° to 360 ° section, the PWM control signal Gc of the third converter 4 is kept at zero, and the switches 43c and 44c are not turned on. Since the idle periods of the first, second, and third converters 2, 3, and 4 are all periods in which these input voltages are lower than the input voltage of the operating converter, the idle periods of the converters 2, 3, and 4 Does not cause a reduction in DC power supply performance. The converter with the higher input voltage of the two converters in operation produces a higher DC voltage than the converter with the lower input voltage, so that when the switches are turned on simultaneously, the smoothing capacitor 6 and the load 7 The current supply is from the higher converter. First, second and third converters 2, 3, 4
Performs AC-DC conversion on both the positive half-wave and the negative half-wave of the AC input voltage, the combined output of the first, second, and third converters 2, 3, and 4 is a three-phase full-wave rectifier. The waveform has a small ripple like the waveform.

Input currents Irs, Is of converters 2, 3, and 4
The st and Itr are controlled so as to follow the sine wave converter current command values Ia, Ib, and Ic having the same phase as the sine wave input voltage waveforms Vr, Vs, and Vt of the converters 2, 3, and 4, respectively. Accordingly, the input power factor of each of the converters 2, 3, and 4 and the power factor at the entire input terminals 1r, 1s, and 1t are controlled so as to approach 1, and the input current waveform is an approximate sine wave having few harmonic components. .

When the DC output voltage V0 becomes higher than the target value V01, for example, the output of the subtractor 51 increases, the output of the output voltage control subtractor 51 decreases, and the current amplitude command value I0 decreases. As duty ratio command values Pa and Pb
, Pc also decreases, the width of the PWM pulse decreases, the output voltages of converters 2, 3, and 4 decrease, and DC output terminal 7 decreases.
The voltages V0 of a and 7b are returned to the target values. Output voltage V0
Is lower than the target value V01, the operation is the reverse of the above.

This embodiment has the following advantages. (1) The high-frequency transformers 40a, 40b, and 40c of the first, second, and third converters 2, 3, and 4 electrically insulate the AC side and the DC side.
40b and 40c can be reduced in size as compared with a low-frequency transformer. (2) The three-phase AC input terminals 1r, 1s, and 1t of the first, second, and third converters 2, 3, and 4 are dispersedly connected to each other, and their DC output terminals are connected in parallel with each other. Therefore, the first, second, and third converters 2, 3,... According to changes in the first, second, and third line voltages Vrs, Vst, and Vtr.
4 to supply DC power sequentially. As a result, three times the power capacity of one converter can be supplied. Therefore, it is possible to prepare three small converters having relatively small power capacities and supply three times as much power as one converter. For example, when a 3KW AC-DC converter is configured according to the conventional method,
A 3KW three-phase converter, a 3KW insulated three-phase or single-phase inverter, and a 3KW rectifier circuit are required, and the overall size is increased. On the other hand, in the present embodiment, 1K
Since 3 KW DC power can be supplied by three W-insulated converters, the size and cost can be reduced as a whole. (3) First, second and third converters 2, 3, 4
Are configured to switch both the positive half-wave and the negative half-wave of the AC voltage, and the transformers 40a, 40
Since a full-wave rectifier circuit is provided on the secondary side of b and 40c, both rectification and PWM control can be performed by one converter, and the overall configuration of the AC-DC converter is greatly reduced. It can be simplified and downsized. (4) Since the first, second, and third converters 2, 3, and 4 are sequentially controlled to be inactive at intervals of 60 degrees of the sine wave input AC voltage, power loss can be reduced.

[0035]

Second Embodiment Next, referring to FIG. 6 and FIG.
An AC-DC converter according to the embodiment will be described. 6 and 7 and FIGS. 8 to 1 showing another embodiment described later.
In FIG. 8, the same portions as those in FIGS. 1 to 5 or the same portions as each other are denoted by the same reference numerals and description thereof will be omitted. Also,
Parts common to the second and later embodiments refer to FIGS. 1 to 5.

The AC-DC converter shown in FIG. 6 uses the first, second and third current detection circuits provided on the input lines of the first, second and third converters 2, 3 and 4 in FIG. The units 10, 11, and 12 are moved to the R, S, and T phase main power supply lines connected to the first, second, and third AC input terminals 1r, 1s, and 1t, and the modified control circuit 5a is The other parts are the same as those shown in FIG.

In FIG. 6, first, second and third current detectors 10, 11, and 12 are R, S, and T phase currents passing through first, second, and third AC input terminals 1r, 1s, and 1t. Ir, I
s, It are detected and sent to the control circuit 5a via lines 32, 33, 34. In order to simplify the drawing, FIG.
In the figure, the lines 32, 33 and 34 are divided.

As shown in detail in FIG. 7, the control circuit 5a includes first, second and third converter currents Irs, Ist, Itr instead of the low-pass filters 64, 65, 66 of FIG.
The first, second, and third converter current calculators 64 ', 65', 66 'for obtaining the following are obtained. First converter current calculator 64 '
Is connected to lines 32 and 33, the second converter current calculator 65 'is connected to lines 33 and 35, and the third
Is connected to lines 32 and 35. In order to selectively obtain a current detection signal based on the same flag as in FIG.
And third converter current calculators 64 ', 65', 6
A comparison arithmetic unit 60 for generating a flag is connected to 6 '.

The first converter current calculator 64 'outputs the following first converter current Irs according to the value of the flag. That is, when the flag = 1, the arithmetic unit 64 '
= 0, Ir = -Is when flag = 2, Irs = Ir when flag = 3.

The second converter current calculator 65 'outputs the following second converter current Ist according to the value of the flag. That is, when the flag = 1, the arithmetic unit 65 '
When st = Is, flag = 2, Ist = 0, and when flag = 3, Ist = -It is output.

The third converter current calculator 66 'outputs the following third converter current Itr according to the value of the flag. That is, when the flag = 1, the computing unit 66 '
tr = −Ir, flag = 2, Itr = It, flag = 3
At the time, Itr = 0 is output.

The first, second and third converter currents Irs, Ist, Is obtained from the arithmetic units 64 ', 65', 66 '
tr is sent to the absolute value calculators 67, 68 and 69 which are the same as those in FIG. Thereby, the control circuit 5 of the second embodiment shown in FIG.
As for a, it becomes possible to perform the same control as the control circuit 5 of the first embodiment of FIG. As a result, the same effects as in the first embodiment can be obtained in the second embodiment.

[0043]

Third Embodiment An AC-DC converter according to a third embodiment is obtained by modifying the control circuit 5 of the AC-DC converter according to the first embodiment shown in FIG. 1 into a control circuit 5b shown in FIG. Otherwise, the configuration is the same as that of FIG.

The control circuit 5b shown in FIG.
Are provided with first, second and third sawtooth wave correctors 81, 82 and 83, and the other components are the same as those shown in FIG. The first, second and third sawtooth wave compensators 81, 82 and 83 functioning as a part of the sawtooth wave generating means are connected to the sawtooth wave generator 76 and the first and second sawtooth wave generators.
It is connected between the second and third comparators 77, 78, 79. Further, a comparison arithmetic unit 6 as a flag generating means
0 is the first, second, and third sawtooth wave correctors 81, 82, 83
It is connected to the.

The first sawtooth wave compensator 81 performs the sawing in the sections t0 to t1 (0 ° to 60 °) and t3 to t4 (180 ° to 240 °) in which the flag shown in FIG. The generation of the wave Va is stopped, and the flag becomes 2 from t1 to t2 (60 ° to 60 °).
120 ゜) Section and t4 to t5 (240 ゜ to 300 ゜)
In the section, a sawtooth wave Va having a rising slope shown in FIG. 9A is generated, and the flag is set to t2 to t3 (120 to 180).
゜) A sawtooth wave Vb having a falling slope shown in FIG. 9C is generated in the section and in the section from t5 to t6 (300 ° to 360 °). The second sawtooth corrector 82 generates the falling sawtooth wave Vb of FIG. 9C in the section between t0 and t1 and the section between t3 and t4 when the flag is set to 1, and sets t1 to t2 when the flag is set to 2. Section and t4
The generation of the sawtooth wave is stopped in the interval from t5 to t5, and the sawtooth wave Va having a rising slope is generated in the interval from t2 to t3 and the interval from t5 to t6 when the flag becomes 3. The third sawtooth wave corrector 83 sets the flag to 1
A sawtooth wave Va having a rising slope is generated in the sections t0 to t1 and t3 to t4, and a sawtooth wave Vb having a falling slope is generated in the sections t1 to t2 and t4 to t5 where the flag is 2.
The generation of the sawtooth wave is stopped in the interval from t2 to t3 and the interval from t5 to t6 when the flag becomes 3. The relationship between the outputs H1, H2, H3 of the first, second and third sawtooth wave correctors 81, 82, 83 and the sawtooth wave in each section is as follows. Flag 1 from t0 to t1
And t3 to t4 section H1 = 0 H2 = Vb H3 = Va flag 2 t1 to t2 and t4 to t5 section H1 = Va H2 = 0 H3 = Vb flag 3 t2 to t3 and t5 to t6 section H1 = Vb H2 = Va H3 = 0 Note that Va and Vb have a relationship of Vb = -Va. The outputs H1, H2, H of the sawtooth correctors 81, 82, 83
Instead of setting 3 to zero, it can be modified to generate a sawtooth wave Va or Vb. The zeros of the outputs H1, H2, H3 mean that the converter is stopped. In synchronization with this, the duty ratio command values Pa, Pb, Pc are also zero, so that the PWM control pulse is output from the comparators 77, 78, 79. Does not occur.

The comparators 77, 78, 79 of FIG. 8 operate in a similar manner to those of FIG. 3, with PWM on lines 35, 36, 37.
Send a control signal. FIG. 9 shows the inputs and outputs of the first and third comparators 77 and 79 in a part of the section from t1 to t2 (60 ° to 120 °) in FIG. The sawtooth wave Va having a rising slope shown in FIG. 9A and the sawtooth wave Vb having a falling slope shown in FIG. 9C are generated in synchronization with each other and have opposite slopes.
Each of the comparators 77, 78, 79 has a duty ratio command value Pa, Pb,
It is formed to generate a positive pulse when Pc is higher than the sawtooth wave Va or Vb. Therefore, in the case of the sawtooth wave Va having the rising slope shown in FIG. 9A, the PWM is performed at t1, t3, t5, etc. synchronized with the rising of the slope voltage as shown in FIG. 9B.
The pulse generation starts, and in the case of the falling sawtooth wave Vb shown in FIG. 9C, the generation of the PWM pulse is started from t2, t4, etc. in the middle of the falling slope as shown in FIG. 9D. Starting, the PWM pulse ends at t3, t5, etc., synchronized with the end of the ramp. As is clear from the comparison between FIG. 9B and FIG. 9D, the overlap period between the output pulse of one comparator 77 and the output pulse of the other comparator 79 is eliminated or reduced. The generation period of the PWM pulse is determined by converters 2, 3, 4
, The power supply to the smoothing capacitor 6 in FIG. 1 can be dispersed, and the ripple is smaller than in the first embodiment. That is, in the first embodiment, the first, second, and third comparators 77, 7
Since the sawtooth wave Va having the same rising slope has been input to the first and second PWM control signals 8 and 79, the first, second and third PWM control signals Ga and Gb have been input.
, Gc rise synchronously, the PWM pulse overlap increases, and the voltage ripple of the smoothing capacitor 6 increases. On the other hand, in the third embodiment,
As is clear from FIGS. 9B and 9D, the overlapping of the PWM control pulses on the time axis is suppressed, the power supply to the smoothing capacitor 6 is performed in a short rest period, and the ripple is reduced. The same effect as the section between t1 and t2 can be obtained in a section other than the section between t1 and t2 in FIG. 9 shown in FIG. Further, the same effects as those of the first embodiment can also be obtained by the third embodiment.

[0047]

Fourth Embodiment An AC-DC converter according to a third embodiment is obtained by modifying the control circuit 5 of the AC-DC converter according to the first embodiment shown in FIG. 1 into a control circuit 5c shown in FIG. The other components are the same as those shown in FIG.

The control circuit 5c shown in FIG. 10 includes first, second and third sawtooth wave selectors 81 ', 82',
83 'is added, and the rest is configured the same as in FIG. First, second and third sawtooth wave selectors 81 ', 8
2 'and 83' are first and second sawtooth generators 76 and 7
6a and the first, second and third comparators 77, 78 and 79. Further, the comparison calculator 60 as the flag generating means is provided with the first, second and third sawtooth wave selectors 8.
1 ', 82', 83 '.

The first sawtooth wave generator 76 generates the first sawtooth wave Va shown in FIG. 11A as in the first to third embodiments. The second sawtooth generator 76a generates a second sawtooth wave Vb 'shown in FIG. This second sawtooth wave Vb '
Is equivalent to a phase shift of the first sawtooth wave Va by 180 degrees.

The first, second and third sawtooth wave selectors 81 ',
82 'and 83' are supplied from the comparator 60 in FIG.
The first and second sawtooth waves Va in response to the flag shown in FIG.
, Vb '. The relationship between the flag of FIG. 4D and the first and second sawtooth waves Va and Vb 'is as follows. In the sections from t0 to t1 and t3 to t4 when the flag becomes 1, the first sawtooth wave selector 81 'outputs zero or selects one of the first and second sawtooth waves Va and Vb'. , The second sawtooth selector 82 'selects the second sawtooth Vb', and the third sawtooth selector 83 'selects the first sawtooth Va. Flag is 2
In the sections t1 to t2 and t4 to t5, the first sawtooth wave selector 82 'selects the first sawtooth wave Va and the second sawtooth wave selector 82' outputs zero or the first sawtooth wave. And the second sawtooth wave V
a, Vb ', and a third sawtooth wave selector 8
3 'selects the second sawtooth wave Vb'. In the sections t2 to t3 and t5 to t6 when the flag is 3, the first sawtooth selector 81 'selects the second sawtooth Vb' and the second sawtooth selector 82 'switches to the first sawtooth. The wave Va is selected and the third saw wave selector 8
3 'outputs zero or the first and second sawtooth waves Va, V
Select one of b '.

FIG. 11 shows the inputs and outputs of the first and third comparators 77 and 79 in a part of the section between t1 and t2 in FIG. The first comparator 77 compares the first sawtooth wave Va with the first duty ratio command value Pa as shown in FIG. 11A, and compares the first sawtooth wave Va with the first PWM control signal Ga in FIG. 11B. Is output.
The third comparator 79 compares the second sawtooth wave Vb 'with the third duty ratio command value Pc as shown in FIG.
(D) A third PWM control signal Gc is output. The pulse of the first PWM control signal Ga rises at t1, t4, etc. in synchronization with the first sawtooth wave Va, and the second PWM control signal G
The pulse b rises at times t3, t5, etc., in synchronization with the second sawtooth wave Vb '. Therefore, also in the fourth embodiment, the PWM between the plurality of PWM control signals is similar to the third embodiment.
A pulse shift occurs, and the ripple reduction effect of the output voltage V0 can be obtained as in the third embodiment. Of course, the fourth embodiment has the same effects as the first embodiment.

[0052]

Fifth Embodiment An AC-DC converter according to a fifth embodiment is obtained by modifying the control circuit 5 of the AC-DC converter according to the first embodiment shown in FIG. 1 into a control circuit 5d shown in FIG. The other components are the same as those shown in FIG.

The control circuit 5d of FIG. 12 includes first, second, and third sawtooth wave correctors 81, 82, and 83 in the control circuit 5 of FIG.
Are added, and the other configuration is the same as that of FIG.
The first, second and third sawtooth wave correctors 81 and 82 of FIG.
83 is a sawtooth generator 76 and the first, second and third comparators 7
7, 78 and 79 are connected. First,
First, second and third subtractors 57, 58, 59 for obtaining the second and third line voltages Vrs, Vst, Vtr are first,
It is connected to the second and third sawtooth wave correctors 81, 82, 83.

First, second and third sawtooth wave compensators 81 and 8
Reference numerals 2 and 83 selectively transmit the falling slope sawtooth wave Vb in the same manner as shown by the same reference numerals in FIG. 8 showing the third embodiment. However, the first, second, and third sawtooth wave correctors 81, 82, and 83 of FIG.
And the first obtained from the third subtractors 57, 58, 59,
The second and third line voltages Vrs, Vst and Vtr are used to determine the selection of the rising and falling sawtooth waves Va and Vb.

FIG. 13 illustrates the selection of the rising and falling slope sawtooth waves Va and Vb by the first, second and third sawtooth wave correctors 81, 82 and 83. FIG. 13 (A)
13 (F) are the same as FIGS. 4 (A) to 4 (F), and FIG.
(G), (H), and (I) show the outputs H1, H2, and H3 of the first, second, and third sawtooth correctors 81, 82, and 83, respectively. First
As shown in FIG. 13 (G), the sawtooth wave corrector 81
Are higher than the second and third line voltages Vst and Vtr in the positive half-wave period t1 to t3 (60 ° to 1).
80 °), a rising slope sawtooth wave Va is generated, and the first line voltage Vrs is a negative half-wave, and its absolute value is higher than the absolute values of the second and third line voltages Vst and Vtr during a period t4. ~ T6
(240 ° -360 °), a falling slope sawtooth wave Vb is generated. As shown in FIG. 13 (H), the second sawtooth wave corrector 82 performs the period t0 to the second line voltage Vst which is higher than the first and third line voltages Vrs and Vtr in the positive half-wave. t2 (0
゜ to 60 ゜) and t5 to t6 (300 to 360 立), the rising slope sawtooth wave Va is generated, and when the second line voltage Vrs is a negative half wave, its absolute value is the first and third lines. Voltage V
A falling slope sawtooth wave Vb is generated during a period t2 to t4 (120 ° to 240 °) higher than the absolute values of rs and Vtr. As shown in FIG. 13 (I), the third sawtooth wave corrector 83 performs a period t3 in which the third line voltage Vts is higher than the first and second line voltages Vrs and Vst in the positive half-wave. ~ T5 (180 ゜ ~ 3
00 °), a rising slope sawtooth wave Va is generated, and the third line voltage Vtr is a negative half-wave and its absolute value is higher than the absolute values of the first and second line voltages Vrs and Vst during a period t0. ~ T2
(0 ° to 120 °), a falling slope sawtooth wave Vb is generated.
The rising slope sawtooth wave Va of the fifth embodiment is the same as that shown in FIG. 9A, and the falling slope sawtooth wave Vb is shown in FIG.
Are the same as those shown in FIG.

According to the fifth embodiment, two sawtooth waves Va are also provided.
, Vb, the overlap of the PWM pulses is suppressed as in FIG. 9, and the ripple of the output voltage V0 can be reduced. Further, the fifth embodiment has the same effect as the first embodiment.

[0057]

Sixth Embodiment An AC-DC converter according to a sixth embodiment comprises the first, second and third converters 2, 3 shown in FIG.
4 with the first, second, and third converters 2a, 3a of FIG.
a and 4a, and the control circuit 5 of FIGS.
The control circuit 5e is formed in the same manner as the first embodiment shown in FIG.

The first, second and third converters 2a, 3a and 4a in FIG. 14 are push-pull converters. The first converter 2a will be described as an example. In the first converter 2a, a primary winding of a transformer 40a 'has a center tap and is divided into a winding 41a and a winding 41a'. The winding 41a that forms one half of the push-pull circuit, the first and second switches 43a and 44a, and the first
The second diodes 45a and 46a are formed in the same manner as those indicated by the same reference numerals in FIG. 2, and are connected between the converter input lines 16 and 17 in the same manner as in FIG. The circuit comprising the winding 41a ', the third and fourth switches 43a' and 44a ', and the third and fourth diodes 45a' and 46a 'constituting the other half of the push-pull circuit is the same as the one half. And is connected between the input lines 16 and 17. The first and second switches 43a and 44a and the third and fourth switches 43a 'and 44a' are alternately turned on and off. First between input lines 16 and 17
When the first and second switches 43a and 44a are turned on when the positive half-wave of the line voltage Vrs is input,
A current flows through the path of the line 16, the second switch 44a, the first diode 45a, the winding 41a, and the line 17,
A voltage in the direction in which the diode 47a conducts is generated in the secondary winding 42a. When the third and fourth switches 43a 'and 44a' are turned on during the positive half-wave period, the line 16, the fourth switch 44a 'and the third diode 45 are turned on.
a ', the winding 41a', the current flows through the path of the line 17,
A voltage in the direction in which the diode 48a conducts is generated in the secondary winding 42a. 2 during the negative half-wave of the input voltage Vrs
A voltage is generated in the next winding 42a in a direction opposite to that in the case of the above positive half wave. The secondary side of the transformer 40a 'has the same configuration as that of FIG. 2 except that it has a reactor 80a for smoothing. The second and third converters 3a, 4a are formed identically to the first converter 2a.

As shown in FIG. 15, a control circuit 5e for controlling the push-pull circuit newly includes a second sawtooth wave generator 76a and fourth, fifth and sixth comparators 77 ', 78',
79 'are provided, and the others are formed substantially the same as in FIG. However, the first sawtooth generator 76 shown in FIG. 15 converts the first sawtooth Va ′ corresponding to the odd-numbered sawtooth of the sawtooth Va shown in FIG. 5A as shown in FIG. 16A. The second sawtooth generator 76a of FIG. 15 is formed so as to generate a second sawtooth wave Vb 'corresponding to the even-numbered sawtooth of the sawtooth wave Va of FIG. First, second and third comparators 77,
78, 79 are first, second and third duty ratio command values Pa
, Pb, Pc and the first sawtooth wave Va '.
First and second switches 43a, 44a, 43b, 44b, 43 of the second and third converters 2a, 3a, 4a
c, 44c, PWM control signals Ga, Gb for controlling
, Gc. Fourth, fifth and sixth comparators 7
7 ', 78', 79 'are first, second and third duty ratio command generators 73, 74, 75 and a second sawtooth wave generator 76a.
And the first, second and third duty ratio command values Pa
, Pb, Pc and the second sawtooth wave Vb '.
Third and fourth switches 43a ', 44a', 43b ', 44 of the second and third converters 2a, 3a, 4a
PWM control signals Ga ', Gb', Gc 'for controlling b', 43c ', 44c' are generated. FIG. 16 shows the inputs and outputs of the first and fourth comparators 77 and 77 'of FIG. 15, but the other comparators operate similarly.

As shown in FIGS. 14 to 16, the sixth embodiment in which the first, second, and third converters 2a, 3a, and 4a are push-pull converters has the same effect as the first embodiment. Obtainable.

[0061]

Seventh Embodiment An AC-DC converter according to a seventh embodiment comprises the first, second and third converters 2, 3 shown in FIG.
4 with the first, second and third converters 2b, 3b of FIG.
The modified control circuit 5f is provided for b and 4b, and the other is formed in the same manner as the first embodiment shown in FIG.

The first, second and third converters 2b, 3b and 4b in FIG. 17 are half-bridge type converters. Taking the first converter 2b as an example, the first converter 2b is a primary winding 41a of a transformer 40a.
Is connected to one input line 16 via one AC switch circuit composed of first and second switches 43a and 44a and first and second diodes 45a and 46a, and is connected to the third and third switches. A fourth switch 43a ',
44a 'and third and fourth diodes 45a', 46
a 'is connected to the other input line 17 via the other AC switch circuit composed of the a. The other end of the primary winding 41a is connected to one input line 16 via one resonance first capacitor 81a and to the other input line 17 via a second resonance capacitor 82a. It is connected. The secondary side of the transformer 41a is the same as FIG. When the first and second switches 43a and 44a are turned on during the positive half-wave period of the input AC voltage, the first capacitor 81a, the first switch 43a, the first diode 46a, and the primary winding 41a The current in the first direction flows through the path. When the third and fourth switches 43a 'and 44a' are turned on during the positive half-wave period, the second capacitor 82a, the primary winding 41a, the third switch 43a ', and the fourth diode A current in the second direction flows through the path 46a '. When the first and second switches 43a, 44a are turned on during the negative half-wave period of the input AC voltage, the first capacitor 81a, the primary winding 4
1a, second switch 44a, first diode 45a
The current in the second direction flows through the path. When the third and fourth switches 43a 'and 44a' are turned on during the negative half-wave period, the second capacitor 82a, the fourth switch 44a ', the third diode 45a', and the primary winding are controlled. Line 41
A current in the first direction flows through the path a. Therefore, a voltage can be obtained in the secondary winding 42a in both the positive half wave and the negative half wave of the input AC voltage. The second and third converters 3b, 4b operate similarly to the first converter 2b.

The control circuit 5f of FIG. 18 transforms the duty ratio command calculators 73, 74 and 75 of the control circuit 5 of FIG. 3 into frequency command calculators 73 ', 74' and 75 '. First, second and third gate signal generators 91, 92, 93
Are provided, and NOT circuits 94, 95, and 96 are provided, and the other configuration is the same as that of FIG. The first of FIG.
The second and third converters 2b, 3b, 4b are provided with an inductance of the primary windings 41a to 41c and a capacitor 81a.
-81c, 82a-82c, the secondary winding side by changing the switching frequency even if the duty ratio of the first to fourth switches is kept constant at 50%. The amount of power supplied to the power supply changes. Therefore, the control of the DC output voltage V0 can be achieved by controlling the switching frequency. Also,
The magnitude of the converter input current can be achieved by controlling the switching frequency. The frequency command calculators 73 ', 74', and 75 'for executing the frequency control are based on the outputs of the preceding stage subtractors 70, 71 and 72, similarly to the duty ratio command calculators 73, 74 and 75 of FIG. The frequency command values Fa, Fb, and Fc are created. The first, second, and third gate signal generators 91, 92, 93 provide frequency command values Fa,
A control pulse having a duty ratio of 50% is generated at a frequency designated by Fb and Fc. The repetition frequency of the control pulse is, for example, 20 to 150 kHz. A first including a control pulse,
The second and third control signals Ga, Gb, Gc correspond to the first, second and third converters 2b, 3b, 4b of FIG.
And second switches 43a, 44a, 43b, 44b,
It is supplied to the gates 43c and 44c. The first, second and third NOT circuits 94, 95 and 96 connected to the gate signal generators 91, 92 and 93 generate phase inverted signals of the first, second and third control signals Ga, Gb and Gc. Ga ', Gb
, Gc ', and the first to third converters 2b,
3b, 4b third and fourth switches 43a ', 44
a ', 43b', 44b ', 43c', 44c '.

According to the seventh embodiment, the same effect as that of the first embodiment can be obtained.

[0065]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) First, second and third converters 2, 3, 4,
Converter types other than 2a, 3a, 4a, 2b, 3b, 4b can be used. For example, the first of FIG.
And second capacitors 81a to 81c, 82a to 82c
Are voltage dividing capacitors, and the first to fourth switches 4
3a to 44a ', 43b to 44b' and 43c to 44c 'can be PWM controlled. Also, a pair of AC switches similar to the first to fourth switches can be connected to the positions of the first and second capacitors 81a and 82a to form a bridge type converter. (2) Push-pull type converters 2a and 3 shown in FIG.
a, 4a and the half-bridge type converter 2 of FIG.
Also in b, 3b, and 4b, the current detection is the R, S, and T phase current detection as in FIG. 6, and the control circuit can convert the current into the converter current as in FIG. (3) Push-pull type converters 2a and 3 shown in FIG.
Also in FIGS. 8A and 8A, the PWM control signal can be created by combining the rising and falling sawtooth waves as in FIG. (4) The push-pull converters 2a and 3 shown in FIG.
a and 4a also have different phases 2 as shown in FIG.
One sawtooth wave can be used to form a PWM signal. Further, the resonance type converters 2b, 3b, 4b of FIG.
Alternatively, even in a bridge type converter, the switching phases of the R, S, and T phases can be shifted. (5) An analog-to-digital converter (ADC) may be provided at the input stage of each of the control circuits 5 to 5f so that the control circuit has a digital circuit configuration.

[Brief description of the drawings]

FIG. 1 is a circuit diagram illustrating an AC-DC converter according to a first embodiment.

FIG. 2 is a circuit diagram illustrating first, second, and third converters of FIG. 1 in detail.

FIG. 3 is a circuit diagram showing a control circuit of FIG. 1 in detail.

FIG. 4 is a waveform chart showing a state of each unit in FIG. 3;

FIG. 5 is a waveform diagram schematically showing inputs and outputs of the comparator of FIG. 3;

FIG. 6 is a circuit diagram illustrating an AC-DC converter according to a second embodiment.

FIG. 7 is a circuit diagram showing a control circuit of FIG. 6;

FIG. 8 is a circuit diagram illustrating a control circuit according to a third embodiment.

FIG. 9 is a waveform diagram schematically showing inputs and outputs of the comparator of FIG.

FIG. 10 is a circuit diagram illustrating a control circuit according to a fourth embodiment.

FIG. 11 is a waveform diagram schematically showing inputs and outputs of the comparator of FIG.

FIG. 12 is a circuit diagram illustrating a control circuit according to a fifth embodiment.

13 is a waveform chart showing a state of each unit in FIG.

FIG. 14 is a circuit diagram illustrating an AC-DC converter according to a sixth embodiment.

FIG. 15 is a circuit diagram showing the control circuit of FIG. 14 in detail.

16 is a waveform diagram schematically showing inputs and outputs of the comparator of FIG.

FIG. 17 is a circuit diagram illustrating an AC-DC converter according to a seventh embodiment.

18 is a circuit diagram showing the control circuit of FIG. 17 in detail.

[Explanation of symbols]

1r, 1s, 1t Three-phase AC input terminals 2-2b, 3-3b, 4-4b First, second and third converters 5-5f Control circuit 6 Smoothing capacitor

────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] December 7, 2001 (2001.12.
7)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0033

[Correction method] Change

[Correction contents]

When the DC output voltage V0 becomes higher than the target value V01, for example , the output of the output voltage control subtracter 51 becomes lower, and the current amplitude command value I0 decreases. As a result, the duty ratio command values Pa, Pb, Pc also decreases, the width of the PWM pulse decreases, the output voltages of converters 2, 3, and 4 decrease, and voltage V0 of DC output terminals 7a and 7b returns to the target value. When the output voltage V0 becomes lower than the target value V01, the operation is the reverse of the above operation.

Claims (5)

[Claims] A first AC-DC converter connected to a three-phase AC power supply; a first AC-DC converter connected to the first and second AC input terminals; A second AC connected to the second and third AC input terminals;
A DC converter; a third AC-DC converter connected to the first and third AC input terminals;
A control circuit for the second and third converters, and parallel connection means for connecting the DC output terminals of the first, second and third AC-DC converters in parallel with each other; And a third AC-DC converter includes a transformer, a switching circuit for intermittently applying an AC voltage to a primary winding of the transformer, and a rectifier for rectifying a voltage of a secondary winding of the transformer. A control circuit that controls the switching circuit so as to improve the power factor of three-phase AC power at the first, second, and third AC input terminals. A three-phase AC-DC converter. 2. A voltage detection circuit for detecting first, second, and third line voltages of the first, second, and third AC input terminals, and the control circuit includes: , Second and third
3. The three-phase AC-DC converter according to claim 1, further comprising means for selectively stopping one of the AC-DC converters to which the lowest line voltage is input. 3. The control circuit includes two AC-DC converters operating in the first, second, and third AC-DC converters.
3. The three-phase AC / DC converter according to claim 2, further comprising means for shifting a switching timing of a switching circuit of the DC converter. 4. The control circuit according to claim 1, wherein the control circuit generates first, second, and third duty ratio command values indicating duty ratios of the switching circuits of the first, second, and third AC-DC converters. 1,
Second and third duty ratio command value generators; sawtooth wave generating means for selectively generating a first sawtooth wave having a rising slope and a second sawtooth wave having a falling slope; The first, second, and third PWM control signals are formed by comparing the second and third duty ratio command values with the first or second sawtooth wave to form the first, second, and third PWM control signals. A first, a second, and a third comparator for supplying a switching circuit of an AC-DC converter; and a second comparator that operates in the first, second, and third AC-DC converters. The comparator for one of the
And a means for controlling the saw-tooth wave generating means so as to supply the second saw-tooth wave to the comparator for the other one of the two saw-tooth waves. The three-phase AC-DC converter according to claim 2, wherein 5. The control circuit according to claim 1, wherein the control circuit generates first, second, and third duty ratio command values indicating the duty ratios of the switching circuits of the first, second, and third AC-DC converters. 1,
Second and third duty ratio command value generators; sawtooth wave generating means for selectively generating first and second sawtooth waves having phases different from each other by 180 degrees; the first, second and third sawtooth wave generators; The first, second, and third PWM control signals are formed by comparing the duty ratio command value with the first or second sawtooth wave, and the first, second, and third AC-DC converters are formed. A first, a second and a third comparator for supplying a switching circuit of the first and second AC-DC converters for operating one of the first, second and third AC-DC converters. The first of the comparators
And a means for controlling the saw-tooth wave generating means so as to supply the second saw-tooth wave to the comparator for the other one of the two saw-tooth waves. The three-phase AC-DC converter according to claim 2, wherein