JP2002199005A - 相互接続構造を設計する方法 - Google Patents

相互接続構造を設計する方法

Info

Publication number
JP2002199005A
JP2002199005A JP2001339977A JP2001339977A JP2002199005A JP 2002199005 A JP2002199005 A JP 2002199005A JP 2001339977 A JP2001339977 A JP 2001339977A JP 2001339977 A JP2001339977 A JP 2001339977A JP 2002199005 A JP2002199005 A JP 2002199005A
Authority
JP
Japan
Prior art keywords
flow
node
source
port
interconnect structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001339977A
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English (en)
Japanese (ja)
Other versions
JP2002199005A5 (https=
Inventor
Julie A Ward
ジュリ・アン・ワード
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JP2002199005A publication Critical patent/JP2002199005A/ja
Publication of JP2002199005A5 publication Critical patent/JP2002199005A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Structure Of Telephone Exchanges (AREA)
JP2001339977A 2000-11-06 2001-11-05 相互接続構造を設計する方法 Pending JP2002199005A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US707227 2000-11-06
US09/707,227 US7000011B1 (en) 2000-11-06 2000-11-06 Designing interconnect fabrics

Publications (2)

Publication Number Publication Date
JP2002199005A true JP2002199005A (ja) 2002-07-12
JP2002199005A5 JP2002199005A5 (https=) 2005-07-07

Family

ID=24840857

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001339977A Pending JP2002199005A (ja) 2000-11-06 2001-11-05 相互接続構造を設計する方法

Country Status (3)

Country Link
US (4) US7000011B1 (https=)
EP (1) EP1204251A3 (https=)
JP (1) JP2002199005A (https=)

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US20180159786A1 (en) 2016-12-02 2018-06-07 Netspeed Systems, Inc. Interface virtualization and fast path for network on chip
US10313269B2 (en) 2016-12-26 2019-06-04 Netspeed Systems, Inc. System and method for network on chip construction through machine learning
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US10983910B2 (en) 2018-02-22 2021-04-20 Netspeed Systems, Inc. Bandwidth weighting mechanism based network-on-chip (NoC) configuration
US10896476B2 (en) 2018-02-22 2021-01-19 Netspeed Systems, Inc. Repository of integration description of hardware intellectual property for NoC construction and SoC integration
US10547514B2 (en) 2018-02-22 2020-01-28 Netspeed Systems, Inc. Automatic crossbar generation and router connections for network-on-chip (NOC) topology generation
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Also Published As

Publication number Publication date
US20020091845A1 (en) 2002-07-11
US20020091804A1 (en) 2002-07-11
US7076537B2 (en) 2006-07-11
EP1204251A2 (en) 2002-05-08
US7000011B1 (en) 2006-02-14
US7233983B2 (en) 2007-06-19
US7032013B2 (en) 2006-04-18
US20020083159A1 (en) 2002-06-27
EP1204251A3 (en) 2003-08-13

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