JP2002198326A - Method for dividing semiconductor substrate - Google Patents

Method for dividing semiconductor substrate

Info

Publication number
JP2002198326A
JP2002198326A JP2000392814A JP2000392814A JP2002198326A JP 2002198326 A JP2002198326 A JP 2002198326A JP 2000392814 A JP2000392814 A JP 2000392814A JP 2000392814 A JP2000392814 A JP 2000392814A JP 2002198326 A JP2002198326 A JP 2002198326A
Authority
JP
Japan
Prior art keywords
light emitting
semiconductor substrate
light
scribe line
dicing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000392814A
Other languages
Japanese (ja)
Inventor
Susumu Nishimura
晋 西村
Shoji Inaba
稲葉  昌治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP2000392814A priority Critical patent/JP2002198326A/en
Publication of JP2002198326A publication Critical patent/JP2002198326A/en
Pending legal-status Critical Current

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  • Dicing (AREA)
  • Led Device Packages (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method for dividing a semiconductor substrate by which light-emitting elements, which have an excellent optical-property and reliability and can be closely arranged, are obtained. SOLUTION: To divide the semiconductor substrate 1, on which a plurality of light-emitting junctions 21 are scattered like a matrix in a wafer 2, into the light-emitting elements 20 of a predetermined size, a process for forming a dicing notch 6, which does not reach a depth of the light-emitting junctions 21, on a surface S2 of a side opposite to a light-emitting surface S2, a process for forming a scriber line 7 on a bottom of the dicing notch 6, and a process for cleaving the semiconductor 1 at a position of the scriber line 7 and dividing in into each of the light-emitting elements 20 are carried out.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は光プリンタヘッド等
に用いられる発光素子を、半導体基板を分割して製造す
る方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a light emitting element used for an optical printer head or the like by dividing a semiconductor substrate.

【0002】[0002]

【従来の技術】ウェハー内に複数個の発光接合部をマト
リックス状に点在させた化合物半導体基板を分割し、所
定寸法の発光素子を製造するにあたっては、スクライブ
法又はダイシング法により基板分割を行うのが普通であ
る。スクライブ法では半導体基板の表面にスクライブ線
を形成して加圧し、へき開現象を利用して基板を分割す
る。ダイシング法ではダイシングカッターにより基板を
切断する。しかしながら、スクライブ法、ダイシング法
ともに、固有の問題がある。以下これにつき説明する。
2. Description of the Related Art When a compound semiconductor substrate in which a plurality of light emitting junctions are scattered in a matrix in a wafer is divided and a light emitting device having a predetermined size is manufactured, the substrate is divided by a scribing method or a dicing method. Is common. In the scribe method, a scribe line is formed on the surface of a semiconductor substrate and pressurized, and the substrate is divided using a cleavage phenomenon. In the dicing method, the substrate is cut by a dicing cutter. However, both the scribe method and the dicing method have inherent problems. This will be described below.

【0003】まずスクライブ法であるが、へき開現象に
より基板表面と垂直の割れ目が確実に生じるのは基板厚
さが約150μmまでの場合であって、それ以上に厚く
なると斜めに割れる場合が多くなる。また「バリ」や
「欠け」が生じる確率も増す。例えば300μm程度の
厚さのGaAsP基板の場合、図12に示すように基板
101に形成したスクライブ線102のところから斜め
にへき開面103が走ったとすると、スクライブ線10
2の位置とへき開面103の出口の角との位置ずれ量G
1は5〜52μmにも達する。一方、基板101を分割
した発光素子の配置には次のような配慮が必要となる。
図13は発光素子110の配置状況を模型的に示すもの
であり、図中P1は発光素子110の表面に形成された
発光領域111の整列ピッチ、P2は隣接する発光素子
110間の間隙幅を表す。発光領域111は整列ピッチ
P1の1/2から2/3の割合を占めており、このため
P2の値はP1の約1/10に制限される。発光素子1
10のへき開面に図12のような位置ずれG1が生じて
おり、その値が大きいとすると、隣接する発光素子11
0とへき開面同士が干渉し合い、この箇所では正しい整
列ピッチP1を確保できないというケースが生じる。
First, a scribing method is used. A cleavage perpendicular to the substrate surface is surely caused by a cleavage phenomenon when the substrate thickness is up to about 150 μm. . Also, the probability of occurrence of “burrs” and “chips” increases. For example, in the case of a GaAsP substrate having a thickness of about 300 μm, assuming that a cleavage plane 103 runs obliquely from the scribe line 102 formed on the substrate 101 as shown in FIG.
2 between the position 2 and the exit corner of the cleavage plane 103
1 reaches 5 to 52 μm. On the other hand, the following considerations are required for the arrangement of the light emitting elements obtained by dividing the substrate 101.
FIG. 13 schematically shows the arrangement of the light emitting elements 110. In the figure, P1 indicates the alignment pitch of the light emitting regions 111 formed on the surface of the light emitting element 110, and P2 indicates the gap width between the adjacent light emitting elements 110. Represent. The light emitting region 111 occupies a ratio of か ら to の of the alignment pitch P1, so that the value of P2 is limited to about 1/10 of P1. Light emitting element 1
If a position shift G1 as shown in FIG. 12 occurs on the cleavage surface of FIG.
0 and the cleavage planes interfere with each other, and a correct alignment pitch P1 cannot be secured at this location.

【0004】また基板101として、一般に使用されて
いる厚さ300μm程度のものをスクライブ法で分割す
ると、基板101の縁に、図14に示すような「欠け」
120が生じたり、図15に示すような「バリ」121
が生じたりする。図16に示すように、段差パターンが
規則的に繰り返される「ウナリ」122がへき開面に生
じることもある。「欠け」120、「バリ」121、
「ウナリ」122等が存在すると、基板中の発光接合部
又はその付近に応力歪が発生し、発光効率が低下した
り、寿命が低下する等、光学特性や信頼性が悪化する。
分割部に対し発光接合部が近接していれば近接している
ほど、この応力歪による悪影響を受けやすくなる。
When the substrate 101 having a thickness of about 300 μm, which is generally used, is divided by the scribe method, the edge of the substrate 101 has “chips” as shown in FIG.
120 or “burr” 121 as shown in FIG.
May occur. As shown in FIG. 16, “unari” 122 in which the step pattern is regularly repeated may occur on the cleavage surface. "Lack" 120, "Burr" 121,
When the “unari” 122 or the like is present, stress distortion occurs at or near the light-emitting junction in the substrate, and the light-emitting efficiency is reduced, the life is shortened, and the optical characteristics and reliability are deteriorated.
The closer the light emitting junction is to the split, the more likely it is to be adversely affected by this stress strain.

【0005】次にダイシング法であるが、これも基板1
01の縁に「欠け」「バリ」を生じさせやすい。またダ
イシング法固有の問題として、ダイシングカッターの摩
耗が挙げられる。すなわち図17に示すように、長く使
用したダイシングカッター130は刃先の方ほど摩耗し
て肉薄になっている。刃先と刃元とのこのような形状差
により、基板101の切り口には一方の表面における切
断位置と他方の表面における切断位置との間に位置ずれ
G2が生じ、その値は18〜43μmにも達する。この
位置ずれG2もまた、正しい整列ピッチを確保する上で
大きな障害になる。
Next, the dicing method, which is also applied to the substrate 1
"Chip" and "burr" tend to occur at the edge of 01. Another problem inherent to the dicing method is wear of the dicing cutter. That is, as shown in FIG. 17, the dicing cutter 130 used for a long time is worn and thinner toward the cutting edge. Due to such a shape difference between the cutting edge and the cutting edge, a position shift G2 occurs between the cutting position on one surface and the cutting position on the other surface in the cut surface of the substrate 101, and the value is as large as 18 to 43 μm. Reach. This displacement G2 also becomes a major obstacle in securing a correct alignment pitch.

【0006】発光素子110の整列ピッチの問題を改善
するため、スクライブ法とダイシング法を併用する分割
手法も開発されている。すなわち基板の発光面と反対側
の面に、発光接合部に届かない程度の深さまでダイシン
グ溝を切り込む。すなわちこの部分では基板の厚さが薄
くなり、へき開現象により確実に基板表面と垂直の割れ
目が生じる条件が整う。基板の発光面には、前記ダイシ
ング溝と基板の厚みを隔てて対峙する位置にスクライブ
線を形成する。その後加圧し、スクライブ線の箇所でへ
き開して分割するものである。
[0006] In order to improve the problem of the alignment pitch of the light emitting elements 110, a division method using both the scribe method and the dicing method has been developed. That is, the dicing groove is cut into the surface opposite to the light emitting surface of the substrate to a depth that does not reach the light emitting junction. In other words, in this portion, the thickness of the substrate becomes thin, and the condition for reliably generating a crack perpendicular to the substrate surface due to the cleavage phenomenon is established. A scribe line is formed on the light emitting surface of the substrate at a position facing the dicing groove with the thickness of the substrate therebetween. Thereafter, pressure is applied to cleave at the location of the scribe line for division.

【0007】上記併用手法は、スクライブ法のみ、ある
いはダイシング法のみの場合に比べ、光学特性や信頼性
の面ではやや有利であるが、併用したために次のような
固有の問題が生じる。
[0007] The above combined method is somewhat advantageous in terms of optical characteristics and reliability as compared with only the scribe method or the dicing method alone, but the following inherent problems arise due to the combined use.

【0008】スクライブ線のところでへき開しようとす
るとき、ダイシング溝の内面の凹凸が種となり、へき開
面に歪(しわ・断層)が生じやすい。光プリンタヘッド
に用いる発光素子の場合、分割部近傍まで発光接合部が
存在するので、前記歪が発光接合部の近傍に迫ることに
なり、発光素子表面の所定の発光領域以外から発光す
る、いわゆる光漏れが発生してしまう。個々の光点をに
じみのないくっきりとしたものにしなければならない光
プリンタヘッド用の発光素子にあっては、これは致命的
な問題となる。
When cleaving is performed at the scribe line, irregularities on the inner surface of the dicing groove become seeds, and distortion (wrinkles / faults) easily occurs on the cleaved surface. In the case of a light-emitting element used in an optical printer head, since the light-emitting junction exists near the division, the strain approaches the vicinity of the light-emitting junction, and light is emitted from a light-emitting element surface other than a predetermined light-emitting area. Light leakage will occur. This is a fatal problem for light-emitting elements for optical printer heads, where individual light spots must be clear and clear.

【0009】また、併用手法により製作した発光素子に
限ったことではないが、光プリンタヘッドを組み立てる
際、発光素子同士の距離が近いと、発光素子を取付ベー
スに固定する接着剤が毛管現象で発光素子間の間隙を這
い上がり、発光領域の表面ににじみ出してしまう。接着
剤で発光領域を汚された発光素子は使いものにならない
ので、結局光プリンタヘッド全体が欠陥品となってしま
う。これを防ぐため、発光素子間の間隔をある程度広く
しておく必要があり、光プリンタヘッドの分解能(dp
i)を上げる上での妨げとなっていた。
Although not limited to light emitting elements manufactured by the combined use method, when assembling an optical printer head, if the distance between the light emitting elements is short, the adhesive for fixing the light emitting elements to the mounting base is formed by capillary action. Crawling up the gap between the light emitting elements and oozing to the surface of the light emitting region. Since the light emitting element whose light emitting area is contaminated by the adhesive is useless, the entire optical printer head is eventually defective. In order to prevent this, it is necessary to increase the distance between the light emitting elements to some extent, and the resolution (dp
i) was hindered.

【0010】[0010]

【発明が解決しようとする課題】本発明は上記問題点を
解決すべくなされたもので、光学特性及び信頼性に優れ
るとともに、近接配置の可能な発光素子を製造すること
のできる半導体基板の分割方法を提供することを目的と
する。
SUMMARY OF THE INVENTION The present invention has been made in order to solve the above-mentioned problems, and it is an object of the present invention to divide a semiconductor substrate which is excellent in optical characteristics and reliability and can manufacture a light emitting element which can be arranged close to each other. The aim is to provide a method.

【0011】[0011]

【課題を解決するための手段】上記課題を解決するた
め、本発明では、ウェハー内に複数個の発光接合部をマ
トリックス状に点在させた半導体基板を所定寸法の発光
素子に分割するにあたり、発光面と反対側の面に、発光
接合部に達しない深さのダイシング溝を形成する工程
と、前記ダイシング溝の底にスクライブ線を形成する工
程と、前記スクライブ線の箇所で半導体基板をへき開し
分割する工程とを遂行することを特徴とするものであ
る。
In order to solve the above problems, the present invention provides a method for dividing a semiconductor substrate, in which a plurality of light emitting junctions are scattered in a matrix in a wafer, into light emitting elements of a predetermined size. Forming a dicing groove on the surface opposite to the light emitting surface to a depth that does not reach the light emitting junction; forming a scribe line at the bottom of the dicing groove; and cleaving the semiconductor substrate at the location of the scribe line And performing a dividing step.

【0012】発光接合部を形成した半導体基板は、発光
接合部の近傍が他の箇所よりもろくなっている。そのた
め、発光面にスクライブ線を形成する従来方式ではスク
ライブ線により発生する歪・ストレスが発光接合部に伝
播し、劣化につながる。また、スクライブ線形成時の荷
重により、発光面に割れ・ヒビが生じ、その割れ・ヒビ
の箇所で光が反射し、発光素子の表面から見ると発光パ
ターン異常となってしまう。これに対し本発明の方法で
は、発光接合部に遠い側からダイシング溝を形成し、こ
のダイシング溝の底にスクライブ線を形成するので、歪
・ストレスが発光接合部に伝播しにくい。また割れ・ヒ
ビが生じたとしてもそれは発光素子の表面から見て発光
接合部の裏側に位置するので、発光パターン異常とはな
りにくい。さらに、発光素子を接着剤で取付ベースに固
定する場合、発光面と反対側に位置するダイシング溝が
接着剤溜まりの役割を果たしてここで接着剤をくい止
め、接着剤を発光面まで這い上がらせないので、発光素
子をごく近接した形で配置することができる。
In the semiconductor substrate on which the light emitting junction is formed, the vicinity of the light emitting junction is more fragile than other portions. Therefore, in the conventional method in which the scribe line is formed on the light emitting surface, the strain and stress generated by the scribe line propagate to the light emitting junction and lead to deterioration. Further, a load at the time of forming the scribe line causes cracks or cracks on the light emitting surface, and light is reflected at the cracks or cracks, resulting in an abnormal light emitting pattern when viewed from the surface of the light emitting element. On the other hand, in the method of the present invention, since the dicing groove is formed from the far side of the light emitting junction and the scribe line is formed at the bottom of the dicing groove, strain and stress are not easily transmitted to the light emitting junction. Also, even if cracks or cracks occur, they are located on the back side of the light emitting junction when viewed from the surface of the light emitting element, so that it is unlikely that the light emitting pattern is abnormal. Furthermore, when the light emitting element is fixed to the mounting base with an adhesive, the dicing groove located on the side opposite to the light emitting surface serves as an adhesive pool and stops the adhesive here, and does not allow the adhesive to climb up to the light emitting surface. Therefore, the light emitting elements can be arranged very close to each other.

【0013】また本発明では、ウェハー内に複数個の発
光接合部をマトリックス状に点在させた半導体基板を所
定寸法の発光素子に分割するにあたり、発光面と反対側
の面にスクライブ線を形成する工程と、前記スクライブ
線の箇所で半導体基板をへき開し分割する工程と、前記
スクライブ線を形成した面に、前記発光接合部に達しな
い深さのダイシング溝を、スクライブ線をなぞる形で形
成する工程とを遂行することを特徴とするものである。
According to the present invention, a scribe line is formed on a surface opposite to a light-emitting surface when a semiconductor substrate having a plurality of light-emitting junctions scattered in a matrix in a wafer is divided into light-emitting elements having predetermined dimensions. And a step of cleaving and dividing the semiconductor substrate at the location of the scribe line, and forming a dicing groove having a depth that does not reach the light emitting junction on the surface on which the scribe line is formed, in a shape following the scribe line. And performing the steps of:

【0014】この方法においても、発光接合部に遠い側
にスクライブ線を刻むので、歪・ストレスが発光接合部
に伝播しにくい。また、スクライブにより割れ・ヒビや
欠け、バリが生じても、その領域をダイシングにより削
り取ってしまうので発光素子の性能に悪影響が生じな
い。ダイシングによって発生する欠けやバリは発光素子
の表面から見て発光接合部の裏側に位置し、発光パター
ン異常を構成しない。さらに、発光素子を接着剤で取付
ベースに固定する場合、発光面と反対側に位置するダイ
シング溝が接着剤溜まりの役割を果たしてここで接着剤
をくい止め、接着剤を発光面まで這い上がらせないの
で、発光素子をごく近接した形で配置することができ
る。
Also in this method, since the scribe line is formed on the side far from the light emitting junction, distortion and stress are not easily transmitted to the light emitting junction. Further, even if cracks, cracks, chips, or burrs occur due to scribing, the area is removed by dicing, so that the performance of the light emitting element is not adversely affected. Chips and burrs generated by dicing are located on the back side of the light emitting junction when viewed from the surface of the light emitting element, and do not constitute an abnormal light emitting pattern. Furthermore, when the light emitting element is fixed to the mounting base with an adhesive, the dicing groove located on the side opposite to the light emitting surface serves as an adhesive pool and stops the adhesive here, and does not allow the adhesive to climb up to the light emitting surface. Therefore, the light emitting elements can be arranged very close to each other.

【0015】[0015]

【発明の実施の形態】以下、本発明の第1の実施形態を
図1から図8までの図に基づき説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS.

【0016】図5は発光素子を切り出す半導体基板1の
表面の一部を示す。半導体基板1はウェハー2内に発光
接合部21と電極22を形成したものであり、1個の発
光接合部10と1個の電極22の対がマトリックス状に
点在している。発光接合部21は図5に矢印で示すX方
向においては配列ピッチが狭くびっしりと並ぶが、Y方
向においては隣接対の電極22との間にややゆとりを持
って配置されている。そこで、発光接合部21と電極2
2の対同士の間にX方向分割線3を入れるのには通常の
ダイシング法を適用し、発光接合部21と電極22の対
同士の間にY方向分割線4を入れるのには本発明の方法
を適用する。X方向分割線3とY方向分割線4で分割さ
れた個々の発光素子20は図6のような形状になる。
FIG. 5 shows a part of the surface of the semiconductor substrate 1 from which the light emitting element is cut out. The semiconductor substrate 1 has a light emitting junction 21 and an electrode 22 formed in a wafer 2, and a pair of one light emitting junction 10 and one electrode 22 is scattered in a matrix. The light emitting junctions 21 are arranged closely and narrowly in the X direction indicated by the arrow in FIG. 5, but are arranged with a margin between the adjacent pair of electrodes 22 in the Y direction. Therefore, the light emitting junction 21 and the electrode 2
The ordinary dicing method is applied to insert the X-direction dividing line 3 between the two pairs, and the present invention is applied to insert the Y-directional dividing line 4 between the pair of the light emitting junction 21 and the electrode 22. Apply the method. Each light emitting element 20 divided by the X direction dividing line 3 and the Y direction dividing line 4 has a shape as shown in FIG.

【0017】半導体基板1の分割は次の手順で行う。ま
ず、ダイシングカッターにより半導体基板1にX方向分
割線4を入れ、複数個の帯状基板1aに切り分ける。こ
こで、発光接合部21が光を放出する側の面を「発光
面」と定義し、その反対側の面を「裏面」と定義する。
この定義は半導体基板1、帯状基板1a、発光素子20
に共通して使用する。また図においては「発光面」にS
1の符号を付し、「裏面」にはS2の符号を付すものと
する。さて、切り分けた帯状基板1aを、表面に粘着剤
を塗布したシート5に、発光面S1を下にして貼りつけ
る。これが図1の状態である。この帯状基板1aに、図
2に示す如く、裏面S2からダイシング溝6を形成す
る。ダイシング溝6を形成する位置は隣接する発光接合
部21同士の間である。また、ダイシング溝6の深さは
発光接合部21に達しない。
The division of the semiconductor substrate 1 is performed in the following procedure. First, an X-direction dividing line 4 is inserted into the semiconductor substrate 1 by a dicing cutter, and cut into a plurality of band-shaped substrates 1a. Here, the surface on the side from which the light emitting junction 21 emits light is defined as “light emitting surface”, and the surface on the opposite side is defined as “back surface”.
This definition includes the semiconductor substrate 1, the strip-shaped substrate 1a, the light emitting element 20
Used commonly for. Also, in the figure, S
The reference numeral 1 is assigned, and the “back surface” is assigned the reference numeral S2. The cut strip-shaped substrate 1a is attached to a sheet 5 having a surface coated with an adhesive, with the light emitting surface S1 facing down. This is the state of FIG. As shown in FIG. 2, dicing grooves 6 are formed on the rear surface S2 of the strip-shaped substrate 1a. The position where the dicing groove 6 is formed is between the adjacent light emitting junctions 21. Further, the depth of the dicing groove 6 does not reach the light emitting junction 21.

【0018】続いて図3のように、ダイシング溝6の底
にダイヤモンドカッタ等によりスクライブ線7を形成す
る。スクライブ線7の位置は発光接合部21同士の丁度
中間とする。この状態で帯状基板1aを金属ローラ等で
加圧すると、スクライブ線7のところからへき開現象が
生じ、帯状基板1aであったものが図4のようにへき開
面8により複数個の発光素子20に分割される。この
後、シート5を引き延ばして発光素子20同士の間隔を
広げ、組立装置へと運ぶことになる。
Subsequently, as shown in FIG. 3, a scribe line 7 is formed at the bottom of the dicing groove 6 by a diamond cutter or the like. The position of the scribe line 7 is set exactly in the middle between the light emitting junctions 21. When the band-shaped substrate 1a is pressurized by a metal roller or the like in this state, a cleavage phenomenon occurs from the scribe line 7, and the band-shaped substrate 1a is converted into a plurality of light emitting elements 20 by the cleavage surface 8 as shown in FIG. Divided. Thereafter, the sheet 5 is stretched to increase the distance between the light emitting elements 20 and to be transported to the assembling apparatus.

【0019】組立装置へと運ばれた発光素子20はシー
ト5から分離される。図7のように発光面S1を上にし
た姿勢がこれ以降発光素子20の定常姿勢となる。この
定常姿勢で発光素子20を取付ベース(図示せず)の上
に置くと、図8に示すように、取付ベースに塗布された
接着剤9がダイシング溝6の中に入り込む。このように
ダイシング溝6の中に接着剤9が溜まるため、発光素子
20同士の間隙を接着剤9が這い上がってくるようなこ
とがなく、発光素子20同士をごく近接させた状態で配
置することが可能になる。
The light emitting element 20 carried to the assembling apparatus is separated from the sheet 5. The posture in which the light emitting surface S1 is upward as shown in FIG. When the light emitting element 20 is placed on a mounting base (not shown) in this steady posture, the adhesive 9 applied to the mounting base enters the dicing groove 6 as shown in FIG. Since the adhesive 9 accumulates in the dicing groove 6 as described above, the adhesive 9 does not creep up in the gap between the light emitting elements 20, and the light emitting elements 20 are arranged in a state of being very close to each other. It becomes possible.

【0020】次に、本発明の第2の実施形態を図9〜図
11に基づき説明する。半導体基板1にX方向分割線3
を入れて複数個の帯状基板1aに切り分け、この帯状基
板1aを、表面に粘着剤を塗布したシート5に発光面S
1を下にして貼りつけるところまでは第1の実施形態と
同じである。この帯状基板1aの裏面S2に、ダイヤモ
ンドカッタ等により図9のようにスクライブ線11を形
成する。スクライブ線11の位置は発光接合部21同士
の丁度中間である。この状態で帯状基板1aを金属ロー
ラ等で加圧すると、スクライブ線11のところからへき
開現象が生じ、帯状基板1aであったものが図10のよ
うにへき開面12により複数個の発光素子20に分割さ
れる。
Next, a second embodiment of the present invention will be described with reference to FIGS. X-direction dividing line 3
Is cut into a plurality of band-shaped substrates 1a, and the band-shaped substrates 1a are illuminated on a sheet 5 having a surface coated with an adhesive.
The process is the same as that of the first embodiment up to the point of sticking with 1 down. The scribe line 11 is formed on the back surface S2 of the band-shaped substrate 1a by a diamond cutter or the like as shown in FIG. The position of the scribe line 11 is exactly halfway between the light emitting junctions 21. When the band-shaped substrate 1a is pressed with a metal roller or the like in this state, a cleaving phenomenon occurs from the scribe line 11, and the band-shaped substrate 1a is converted into a plurality of light emitting elements 20 by the cleavage surface 12 as shown in FIG. Divided.

【0021】続いて、同じく裏面S2にダイシング溝1
3を形成する。ダイシング溝13は発光接合部21に達
しない深さまで、スクライブ線11をなぞる形で切り込
む。この後、第1の実施形態のときと同様、シート5を
引き延ばして発光素子20同士の間隔を広げ、組立装置
へと運ぶ。組立装置へと運ばれた発光素子20はシート
5から分離され、図7のように発光面S1を上にした姿
勢で取付ベース(図示せず)に装着される。ダイシング
溝13が接着剤溜まりとして機能し、発光素子20同士
をごく近接した状態で配置することが可能になるのも第
1の実施形態と同様である。
Subsequently, the dicing groove 1 is formed on the back surface S2.
Form 3 The dicing groove 13 is cut along the scribe line 11 to a depth that does not reach the light emitting junction 21. Thereafter, as in the first embodiment, the sheet 5 is stretched to increase the distance between the light emitting elements 20, and is conveyed to the assembling apparatus. The light emitting element 20 carried to the assembling apparatus is separated from the sheet 5 and mounted on a mounting base (not shown) with the light emitting surface S1 facing upward as shown in FIG. As in the first embodiment, the dicing groove 13 functions as an adhesive reservoir, and the light emitting elements 20 can be arranged in a very close state.

【0022】以上、本発明の各種実施形態につき説明し
たが、この他、発明の主旨を逸脱しない範囲で更に種々
の変更を加えて実施することができる。
Although various embodiments of the present invention have been described, other various modifications can be made without departing from the gist of the present invention.

【0023】[0023]

【発明の効果】本発明は次のような効果を奏するもので
ある。 ウェハー内に複数個の発光接合部をマトリックス状に
点在させた半導体基板を所定寸法の発光素子に分割する
半導体基板の分割方法において、発光面と反対側の面
に、発光接合部に達しない深さのダイシング溝を形成す
る工程と、前記ダイシング溝の底にスクライブ線を形成
する工程と、前記スクライブ線の箇所で半導体基板をへ
き開し分割する工程とを遂行するものであり、発光接合
部に遠い側からダイシング溝を形成し、このダイシング
溝の底にスクライブ線を形成するので、歪・ストレスが
発光接合部に伝播しにくく、発光接合部の劣化等にはつ
ながりにくい。またスクライブ線形成時に割れやヒビが
生じたとしても、それは発光素子の表面から見て発光接
合部の裏側に位置するので、発光パターン異常とはなり
にくい。さらに、発光素子を接着剤で取付ベースに固定
する場合、発光面と反対側に位置するダイシング溝が接
着剤溜まりの役割を果たしてここで接着剤をくい止め、
接着剤を発光面まで這い上がらせないので、発光素子を
ごく近接した形で配置することができ、光プリントヘッ
ド等の解像度を向上させることができる。 また本発明では、ウェハー内に複数個の発光接合部を
マトリックス状に点在させた半導体基板を所定寸法の発
光素子に分割する半導体基板の分割方法において、発光
面と反対側の面にスクライブ線を形成する工程と、前記
スクライブ線の箇所で半導体基板をへき開し分割する工
程と、前記スクライブ線を形成した面に、前記発光接合
部に達しない深さのダイシング溝を、スクライブ線をな
ぞる形で形成する工程とを遂行するものであり、発光接
合部に遠い側にスクライブ線を刻むので、歪・ストレス
が発光接合部に伝播しにくい。また、スクライブにより
割れ・ヒビや欠け、バリが生じても、その領域をダイシ
ングにより削り取ってしまうので発光素子の性能に悪影
響が生じない。ダイシングによって発生する欠けやバリ
は発光素子の表面から見て発光接合部の裏側に位置し、
発光パターン異常を構成しない。さらに、発光素子を接
着剤で取付ベースに固定する場合、発光面と反対側に位
置するダイシング溝が接着剤溜まりの役割を果たしてこ
こで接着剤をくい止め、接着剤を発光面まで這い上がら
せないので、発光素子をごく近接した形で配置すること
ができ、光プリントヘッド等の解像度を向上させること
ができる。
The present invention has the following effects. In a semiconductor substrate dividing method in which a semiconductor substrate in which a plurality of light emitting joints are scattered in a matrix in a wafer is divided into light emitting elements having a predetermined size, the light emitting surface does not reach the light emitting joint. Forming a dicing groove having a depth, forming a scribe line at the bottom of the dicing groove, and cleaving and dividing the semiconductor substrate at the scribe line. Since a dicing groove is formed from the side farther from the substrate and a scribe line is formed at the bottom of the dicing groove, distortion and stress are less likely to propagate to the light emitting junction, and are less likely to deteriorate the light emitting junction. Also, even if cracks or cracks occur during the formation of the scribe line, they are located on the back side of the light-emitting junction when viewed from the surface of the light-emitting element, so that the light-emitting pattern is unlikely to be abnormal. Furthermore, when the light emitting element is fixed to the mounting base with an adhesive, the dicing groove located on the side opposite to the light emitting surface serves as an adhesive pool and stops the adhesive here,
Since the adhesive is not allowed to crawl up to the light emitting surface, the light emitting elements can be arranged very close to each other, and the resolution of the optical print head or the like can be improved. Further, according to the present invention, in a method of dividing a semiconductor substrate in which a plurality of light emitting junctions are scattered in a matrix in a wafer into light emitting elements of a predetermined size, a scribe line is formed on a surface opposite to a light emitting surface. Forming a semiconductor substrate at the location of the scribe line, dividing the semiconductor substrate, and tracing a dicing groove having a depth that does not reach the light emitting junction on the surface on which the scribe line is formed. And forming a scribe line on the side far from the light emitting junction, so that distortion and stress are not easily transmitted to the light emitting junction. Further, even if cracks, cracks, chips, or burrs occur due to scribing, the area is removed by dicing, so that the performance of the light emitting element is not adversely affected. Chips and burrs generated by dicing are located behind the light emitting junction when viewed from the surface of the light emitting element,
Does not constitute an emission pattern abnormality. Furthermore, when the light emitting element is fixed to the mounting base with an adhesive, the dicing groove located on the side opposite to the light emitting surface serves as an adhesive pool and stops the adhesive here, and does not allow the adhesive to climb up to the light emitting surface. Therefore, the light emitting elements can be arranged very close to each other, and the resolution of the optical print head or the like can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の第1の実施形態の第1説明図FIG. 1 is a first explanatory view of a first embodiment of the present invention.

【図2】 本発明の第1の実施形態の第2説明図FIG. 2 is a second explanatory view of the first embodiment of the present invention.

【図3】 本発明の第1の実施形態の第3説明図FIG. 3 is a third explanatory view of the first embodiment of the present invention.

【図4】 本発明の第1の実施形態の第4説明図FIG. 4 is a fourth explanatory view of the first embodiment of the present invention.

【図5】 半導体基板の部分平面図FIG. 5 is a partial plan view of a semiconductor substrate.

【図6】 発光素子の平面図FIG. 6 is a plan view of a light emitting element.

【図7】 発光素子の側面図FIG. 7 is a side view of a light emitting element.

【図8】 発光素子の取付状況を示す側面図FIG. 8 is a side view showing a mounting state of the light emitting element.

【図9】 本発明の第2の実施形態の第1説明図FIG. 9 is a first explanatory view of a second embodiment of the present invention.

【図10】 本発明の第2の実施形態の第2説明図FIG. 10 is a second explanatory view of the second embodiment of the present invention.

【図11】 本発明の第2の実施形態の第3説明図FIG. 11 is a third explanatory view of the second embodiment of the present invention.

【図12】 スクライブ法により分割した場合の問題を
示す説明図
FIG. 12 is an explanatory diagram showing a problem in the case of division by the scribe method.

【図13】 発光素子配列上の留意点を示す説明図FIG. 13 is an explanatory diagram showing points to be noted in light emitting element arrangement.

【図14】 基板分割により「欠け」が生じた状況を示
す部分斜視図
FIG. 14 is a partial perspective view showing a situation where “chips” have occurred due to the division of the substrate;

【図15】 基板分割により「バリ」が生じた状況を示
す部分斜視図
FIG. 15 is a partial perspective view showing a state in which “burrs” have occurred due to substrate division.

【図16】 基板分割により「ウナリ」が生じた状況を
示す部分斜視図
FIG. 16 is a partial perspective view showing a situation in which “unari” has occurred due to substrate division.

【図17】 ダイシングカッターの形状が基板の切断面
に及ぼす影響につき説明する図
FIG. 17 is a diagram illustrating the effect of the shape of a dicing cutter on a cut surface of a substrate.

【符号の説明】[Explanation of symbols]

1 半導体基板 1a 帯状基板 2 ウェハー 3 X方向分割線 4 Y方向分割線 5 シート 6 ダイシング溝 7 スクライブ線 8 へき開面 9 接着剤 11 スクライブ線 12 へき開面 13 ダイシング溝 20 発光素子 21 発光接合部 22 電極 S1 発光面 S2 裏面(発光面と反対側の面) DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 1a Strip substrate 2 Wafer 3 X direction dividing line 4 Y direction dividing line 5 Sheet 6 Dicing groove 7 Scribe line 8 Cleaved surface 9 Adhesive 11 Scribe line 12 Cleaved surface 13 Dicing groove 20 Light emitting element 21 Light emitting junction 22 Electrode S1 Light-emitting surface S2 Back surface (surface opposite to light-emitting surface)

───────────────────────────────────────────────────── フロントページの続き (72)発明者 稲葉 昌治 鳥取県鳥取市南吉方3丁目201番地 鳥取 三洋電機株式会社内 Fターム(参考) 5F041 CA02 CA12 CA76 CB24 FF13 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Shoji Inaba 3-201 Minamiyoshikata, Tottori City, Tottori Prefecture F-term in Tottori Sanyo Electric Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ウェハー内に複数個の発光接合部をマト
リックス状に点在させた半導体基板を所定寸法の発光素
子に分割する半導体基板の分割方法において、 発光面と反対側の面に、発光接合部に達しない深さのダ
イシング溝を形成する工程と、 前記ダイシング溝の底にスクライブ線を形成する工程
と、 前記スクライブ線の箇所で半導体基板をへき開し分割す
る工程とを具備したことを特徴とする半導体基板の分割
方法。
1. A method of dividing a semiconductor substrate into a plurality of light emitting elements of a predetermined size in which a plurality of light emitting junctions are scattered in a matrix in a wafer. Forming a dicing groove having a depth that does not reach the bonding portion; forming a scribe line at the bottom of the dicing groove; and cleaving and dividing the semiconductor substrate at the location of the scribe line. A method for dividing a semiconductor substrate.
【請求項2】 ウェハー内に複数個の発光接合部をマト
リックス状に点在させた半導体基板を所定寸法の発光素
子に分割する半導体基板の分割方法において、 発光面と反対側の面にスクライブ線を形成する工程と、 前記スクライブ線の箇所で半導体基板をへき開し分割す
る工程と、 前記スクライブ線を形成した面に、前記発光接合部に達
しない深さのダイシング溝を、スクライブ線をなぞる形
で形成する工程とを具備したことを特徴とする半導体基
板の分割方法。
2. A method for dividing a semiconductor substrate into a plurality of light emitting elements of a predetermined size in which a plurality of light emitting junctions are scattered in a matrix in a wafer, wherein a scribe line is provided on a surface opposite to the light emitting surface. Forming a semiconductor substrate at the location of the scribe line, dividing the semiconductor substrate, and tracing a dicing groove having a depth not reaching the light emitting junction on the surface on which the scribe line is formed. A method of dividing a semiconductor substrate.
JP2000392814A 2000-12-25 2000-12-25 Method for dividing semiconductor substrate Pending JP2002198326A (en)

Priority Applications (1)

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JP2000392814A JP2002198326A (en) 2000-12-25 2000-12-25 Method for dividing semiconductor substrate

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Publication Number Publication Date
JP2002198326A true JP2002198326A (en) 2002-07-12

Family

ID=18858742

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Country Link
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004235626A (en) * 2003-01-10 2004-08-19 Toshiba Corp Manufacturing apparatus for semiconductor device and manufacturing method therefor
US7294558B2 (en) 2004-03-08 2007-11-13 Kabushiki Kaisha Toshiba Method and apparatus for cleaving a wafer through expansion resulting from vaporization or freezing of liquid
KR100852811B1 (en) 2005-11-09 2008-08-18 가부시끼가이샤 도시바 Method of manufacturing semiconductor device
CN103178007A (en) * 2011-12-20 2013-06-26 杭州士兰集成电路有限公司 Scribing method, chip manufacturing method and convex glass packaging diode
TWI488726B (en) * 2010-09-30 2015-06-21 Disco Corp Segmentation method
TWI490073B (en) * 2010-12-16 2015-07-01 Disco Corp Segmentation method
CN104916723B (en) * 2014-03-14 2017-07-04 台湾积体电路制造股份有限公司 Solar cell cross tie part and its manufacture method
US11515226B2 (en) 2020-05-04 2022-11-29 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004235626A (en) * 2003-01-10 2004-08-19 Toshiba Corp Manufacturing apparatus for semiconductor device and manufacturing method therefor
JP4542789B2 (en) * 2003-01-10 2010-09-15 株式会社東芝 Semiconductor device manufacturing apparatus and manufacturing method thereof
US7294558B2 (en) 2004-03-08 2007-11-13 Kabushiki Kaisha Toshiba Method and apparatus for cleaving a wafer through expansion resulting from vaporization or freezing of liquid
KR100852811B1 (en) 2005-11-09 2008-08-18 가부시끼가이샤 도시바 Method of manufacturing semiconductor device
US7642113B2 (en) 2005-11-09 2010-01-05 Kabushiki Kaisha Toshiba Semiconductor wafer dividing method
TWI488726B (en) * 2010-09-30 2015-06-21 Disco Corp Segmentation method
TWI490073B (en) * 2010-12-16 2015-07-01 Disco Corp Segmentation method
CN103178007A (en) * 2011-12-20 2013-06-26 杭州士兰集成电路有限公司 Scribing method, chip manufacturing method and convex glass packaging diode
CN104916723B (en) * 2014-03-14 2017-07-04 台湾积体电路制造股份有限公司 Solar cell cross tie part and its manufacture method
US11515226B2 (en) 2020-05-04 2022-11-29 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same
US12094794B2 (en) 2020-05-04 2024-09-17 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same

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