JP2002170973A - Semiconductor element and method for forming the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently form a semiconductor element where multiple silicon system thin films are laminated. SOLUTION: The forming method of the semiconductor element has a process for forming a plurality of pin junctions constituted of silicon system materials on a substrate by a high frequency plasma CVD method with the pressure of not more than atmospheric pressure. The forming method has a process for exposing a p-layer or an n-layer exposed to the surface of the pin junction to an atmosphere including oxygen after one pin junction is formed among the pin junctions, and a process for forming the n-layer or the p-layer of the other pin junction adjacent to one pin junction on the p-layer or the n-layer exposed to the atmosphere including oxygen and forming a pn interface.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for forming a semiconductor device and a semiconductor device.

[0002]

2. Description of the Related Art The high-frequency plasma CVD method has an advantage that a large area and a low temperature can be easily formed and the process throughput is improved, and is one of the promising means for forming a silicon-based thin film.

Considering a solar cell as an example of a semiconductor device having a semiconductor junction made of a silicon-based thin film, an energy source of a solar cell using a silicon-based thin film is smaller than that of existing energy using fossil fuel. Although it has the advantage of being inexhaustible and having a clean power generation process, it is necessary to further reduce the unit price per generated power amount in order to promote its use. To that end, we have established a production technology to realize cost reduction, a technology to increase the photoelectric conversion efficiency, and a technology related to uniformity to form a semiconductor element with stable and desired characteristics. The establishment of a technique for improving the environmental resistance in consideration of the actual use condition that it is often installed outdoors is an important technical issue.

As a method for producing a semiconductor device having a semiconductor junction formed of a silicon-based thin film, a method of sequentially forming semiconductor layers of a desired conductivity type in a single semiconductor formation container, p.
There is known a method called a batch method in which a layer, an i-layer, and an n-layer are formed in an independent semiconductor formation container to prevent entry of an impurity gas.

US Pat. No. 4,400,400 discloses a production method for preventing mixing of impurities and realizing further cost reduction.
No. 409 includes Roll to Roll
A continuous plasma CVD method employing a (Roll) method is disclosed. In this method, a semiconductor layer of a desired conductivity type is sequentially formed by transporting a substrate so as to pass through a plurality of glow discharge regions provided through gas gates provided to prevent entry of impurity gas. Is possible. In the roll-to-roll method, a process is performed in which a substrate is conveyed while being unwound from a roll and wound around another roll.

[0006]

The high-frequency plasma CVD method proposed so far is an excellent method for forming a semiconductor element. However, the method includes a case where a plurality of pin junctions are included, a p-layer, and an i-layer. When the layers and the n-layers have a multilayer structure, the number of necessary semiconductor forming containers increases. Here, in the process of forming the semiconductor element, when all the semiconductor forming containers are connected via a gas gate or directly to form a semiconductor layer continuously, the maintenance of some of the semiconductor forming containers is performed. inspection·
It is necessary to stop the operation of the entire apparatus every time repair or the like is required. Further, in the formation method in which the discharge is continued for a long time, there is a problem that the characteristics are time-dependent due to changes in the amount of heat and degassing generated during the long-time discharge, and the characteristics of the semiconductor element vary. Occurs.

The present invention relates to a method for forming a semiconductor element having a configuration in which a large number of silicon-based thin films are stacked, and to a semiconductor element having better uniformity and characteristics. It is an object of the present invention to provide a method for forming a semiconductor element and a semiconductor element having excellent adhesion, environmental resistance and the like.

[0008]

SUMMARY OF THE INVENTION The present invention is a method for forming a semiconductor device, comprising the step of forming a plurality of pin junctions made of a silicon-based material on a substrate by a high-frequency plasma CVD method at a pressure lower than the atmospheric pressure. Exposing a p-layer (p-type semiconductor layer) or an n-layer (n-type semiconductor layer) exposed on the surface of the pin junction after forming one of the pin junctions; An n-layer or p-layer of another pin junction adjacent to the one pin junction on the p-layer or n-layer exposed to the oxygen-containing atmosphere.
Forming a layer to form a pn interface.

In a preferred aspect of the present invention, a layer formed last (p layer or n layer) of a certain pin junction is exposed to an oxygen-containing atmosphere, and then a layer formed first of adjacent pin junctions is exposed. (N-layer or p-layer: a layer of the opposite conductivity type to the layer exposed to the oxygen atmosphere).

In the present invention, the oxygen partial pressure in the oxygen-containing atmosphere is preferably 1 Pa or more. Alternatively, air may be used as the oxygen-containing atmosphere.

In the present invention, one of the i-layers (i-type semiconductor layers) in the pin junction formed before and after the step of exposing to the oxygen-containing atmosphere may be an amorphous phase and the other may include a crystalline phase. preferable. A preferred example of such an embodiment is that after exposing the last layer (p layer or n layer) of a pin junction having an amorphous i layer to an oxygen-containing atmosphere,
The first formed layer (n-layer or p-layer: a layer exposed to an oxygen atmosphere) among adjacent pin junctions (i-layer is a crystalline layer such as microcrystal or polycrystal or includes a crystal phase) (A layer of the opposite conductivity type). Conversely, the last layer (p-layer or n-layer) of a crystalline i-layer such as microcrystal or polycrystal or a pin junction having an i-layer containing a crystal phase was exposed to an oxygen-containing atmosphere. Later, a layer (n-layer or p-layer: a layer of a conductivity type opposite to a layer exposed to an oxygen atmosphere) formed first among adjacent pin junctions (i-layer is an amorphous layer) is formed. Those are also preferred examples.

In the present invention, after the step of exposing to the oxygen-containing atmosphere, at least one step of heating, cooling and heating is performed.
After performing the above operations, the n-layer or p-layer
Preferably, a layer is formed. A preferred example of such an embodiment is to heat, cool, and reheat the substrate and the formed semiconductor layer exposed to the oxygen-containing atmosphere. As a means for such heating and cooling, it is convenient to provide a heater on the side of the substrate opposite to the semiconductor layer. When the temperature of the heater is low, it can serve as a cooling means. The cooling may be natural cooling. The steps of heating, cooling, and heating are preferably performed in a hydrogen atmosphere.

In a preferred embodiment of the present invention, a roll-roul-roll plasma CVD method is used. As a preferred example thereof, a step of carrying the substrate in a roll-to-roll system while forming the one pin junction by a high-frequency plasma CVD method and winding the substrate into a roll, The method includes a step of exposing the substrate to an oxygen-containing atmosphere and a step of forming the another pin junction by a high-frequency plasma CVD method while transporting the substrate while pulling the substrate from the roll by a roll-to-roll method. When the roll-to-roll method is used, the steps of heating, cooling, and heating are performed by transporting the substrate in a space having a temperature difference (for example, a space in which a heater is partially provided). Is preferred.

In the present invention, it is preferable that different tensile stresses be applied to the substrate before and after the step of exposing to the oxygen-containing atmosphere. More specifically, it is preferable that a tensile stress applied to the substrate before the step of exposing to the oxygen-containing atmosphere is larger than a tensile stress applied to the substrate after the step of exposing to the oxygen-containing atmosphere. More preferably, a tensile stress applied to the substrate when forming the one pin junction is different from a tensile stress applied to the substrate when forming the other pin junction.

As a specific means for changing the tensile stress in this manner, the substrate is exposed to an oxygen-containing atmosphere while being wound on a roll, and is applied to the substrate in a transport process by a roll-to-roll method before and after that. Means for changing the tensile stress may be used.

In the present invention, it is preferable that the method further includes a step of reducing a tensile stress in the middle of the step of transporting the substrate by the roll-to-roll method. More specifically, a step of transferring at least one of a tensile stress applied to the substrate when forming the one pin junction and a tensile stress applied to the substrate when forming the other pin junction. Lower on the way.

The present invention also provides a semiconductor device formed by the above method.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As a result of intensive studies to solve the above-mentioned problems, the present inventor has found that the method of forming a semiconductor device provided by the present invention has a structure in which a number of silicon-based thin films are stacked. A semiconductor element can be formed efficiently, and further, a semiconductor element having better uniformity and characteristics can be formed.
It has been found that a semiconductor element having excellent environmental resistance and the like can be formed.

With the above configuration, the following operations are provided.

In a semiconductor device having a plurality of pin junctions,
A pn interface is formed at a portion where the pin junctions are in contact with each other.
In the part where the pn interface is formed, the dopant in the p-type and n-type semiconductor layers is diffused to lower the effective dopant concentration, so that the function as the conductive layer is reduced. In order to prevent this and maintain a sufficient function as a conductive layer even when diffusion of the dopant occurs, the dopant concentration of at least one of the p-type semiconductor layer and the n-type semiconductor layer is required by a single pin junction. Means for making the concentration higher than the concentration are employed. Although this exhibits a certain effect in terms of maintaining an effective dopant concentration, it causes diffusion of dopant atoms to the i-type semiconductor side, which causes a deterioration in characteristics of the semiconductor element.
Here, by exposing the junction interface of the pn junction (the surface of the first layer formed of the p layer and the n layer) to an oxygen-containing atmosphere, a minute oxygen atom layer is formed at the pn interface. Suppresses the diffusion of the dopant at the pn interface, thereby suppressing the above problem.

The combination of the timing of forming the pin junction and the timing of exposing to the oxygen-containing atmosphere is as follows: in the case of a semiconductor device having two pin junctions, pin / oxygen-containing atmosphere /
In the case of a semiconductor device having a pin and three pin junctions, pin / oxygen-containing atmosphere / pinpin, pi
npin / oxygen-containing atmosphere / pin, pin / oxygen-containing atmosphere / pin / oxygen-containing atmosphere pin.
The same can be considered for a semiconductor device having four or more pin junctions. (Note that the term “pin” in this specification includes not only the case of forming a p-layer, an i-layer, and an n-layer, but also the case of forming an n-layer, an i-layer, and a p-layer.)

Here, the oxygen-containing atmosphere preferably has an oxygen partial pressure of 1 Pa or more. Thereby, a minute oxygen atom layer can be formed uniformly at the pn interface. Further, when the step of exposing to the oxygen-containing atmosphere is performed by exposing to the atmosphere, an oxygen atom layer can be formed at a pn interface at a higher speed, which is also preferable because it is a simple method. .

When exposed to an oxygen-containing atmosphere, excess oxygen atoms are present on the surface (pn interface) of the semiconductor layer, and when exposed to the atmosphere, the surface of the semiconductor layer is exposed to gas or moisture in the air. May be adsorbed. The adsorbate, when forming a semiconductor layer after exposure to an oxygen-containing atmosphere,
It is possible to remove the semiconductor layer effectively under a negative pressure environment or through a heating, cooling, and heating process.
Here, it is more preferable that at least the first heating be performed in an atmosphere different from the semiconductor formation atmosphere, since the desorbed substance does not enter the semiconductor layer. Specifically, after heating under a certain atmosphere to desorb unnecessary substances on the surface, a process of transporting to another atmosphere via a gate or a gas gate and a process of cooling are performed, and then semiconductor formation is performed. It is preferable that the semiconductor layer is formed by heating again in an atmosphere. Examples of the heating means include a method in which heating is performed indirectly using a sheath heater or a lamp heater, or a method in which heating is performed by directly contacting with a heater block incorporating these. Preferred examples of the cooling method include a method through a cooling pipe through which a liquid or a gas is passed, and a method of blowing a cooling gas. Further, cooling using a heater having a low temperature, natural cooling, or cooling by blowing a gas such as hydrogen can also be used.

Performing the heating, cooling, and heating steps in a hydrogen atmosphere improves the film quality by cleaning the semiconductor surface and passivating the semiconductor layer surface by covering the semiconductor layer surface with hydrogen atoms. And then pn
This is preferable because the adhesion of the joint is improved.

When a semiconductor element is formed by a high-frequency plasma CVD method, when a plurality of pin junctions are included in the semiconductor element, or when a p-layer, an i-layer, and an n-layer have a multilayer structure, each semiconductor element is formed. If the layers are formed in separate semiconductor formation containers, the number of required semiconductor formation containers will increase. Here, in the step of forming the semiconductor element, all the semiconductor forming containers are continuously connected,
In the case where the semiconductor layer is formed continuously, it is necessary to stop the operation of the entire apparatus every time maintenance, inspection, or repair of a part of the semiconductor forming container is required.
In these semiconductor forming containers, the required maintenance frequency generally differs. Among the layers forming a semiconductor element, in the step of forming a layer having a large film thickness, a higher film forming rate is required, and the film forming rate becomes a large condition. In addition, the amount of generated powder becomes relatively large, and as a result, the frequency of necessary maintenance increases, which greatly affects the operation rate of the entire apparatus.

Considering a photoelectric conversion element having a pin junction as an example of a semiconductor element, an i-type semiconductor layer functioning as a light absorption layer is larger than a p-type semiconductor layer and an n-type semiconductor layer. This is a part that requires a thickness and has the largest proportion of the semiconductor layer. Therefore, various methods for increasing the deposition rate of the i-type semiconductor layer are being studied for the purpose of increasing the productivity of the semiconductor element and reducing the size of the device. As the film formation conditions for increasing the deposition rate, or increasing the RF power to be introduced, or increasing the flow rate of the raw material gas, or close the distance between the substrate and the high-frequency power supply unit, increases the high frequency power per plasma space Such prescriptions are conceivable, but these are
This induces adhesion of the film in the semiconductor forming container and an increase in the amount of generated powder, which is a factor of increasing the frequency of maintenance.

On the other hand, in order to improve the characteristics of the photoelectric conversion element, a plurality of pin junctions are provided so as to stack semiconductor layers having different energy gaps, so that a wider light energy spectrum can be collected. Stack type is known as one of the powerful means. By using a wide bandgap material on the light incident side and combining it with a narrow bandgap material, the spectral sensitivity of the entire photoelectric conversion element can be increased. As a specific configuration example, a-Si / a-Si
Ge, a-SiC / a-Si, a-Si / μC-Si, and the like. These may have a structure in which three or more pin junctions are combined.

As described above, when the photoelectric conversion element has a stack type configuration, the i-type semiconductor layers are separated from each other, and the i-type semiconductor layers generally have a film thickness,
Since the compositions are different, the frequency of maintenance and the time required for maintenance are also different. Therefore, when all the semiconductor formation containers are connected continuously and the semiconductor layer is formed continuously, the operation rate of the entire apparatus is limited by the maintenance of the i-type semiconductor formation container which is most frequently maintained. Will be done. Here, when the device is configured to be exposed to the air during the process of forming the separated i-type semiconductor layer, if necessary, the pin junction of a part of the semiconductor element may be performed by the device without maintenance. It is also possible to create and store these regions, so that the productivity of the entire semiconductor element can be improved. In addition, by preparing a plurality of semiconductor forming apparatuses and forming a semiconductor layer with a high maintenance frequency with more semiconductor forming apparatuses, productivity can be further improved.

When exposure to an oxygen-containing atmosphere (including exposure to air) is performed in a step between the formation of the adjacent p-type semiconductor layer and n-type semiconductor layer, a semiconductor element comprising a plurality of pin junctions is exposed. A partial region can be extracted in the form of a pin junction, and a partial region in a semiconductor element having a pin junction composed of a plurality of silicon-based thin films is
The characteristics can be evaluated as a pin junction element. This makes it possible to perform a characteristic check by extracting a partial region of the semiconductor element during exposure to the atmosphere during the production process. By incorporating this characteristic check into the production process, a more detailed check becomes possible. If a defect is found in the intermediate check, the cause can be suppressed immediately if the cause is investigated, and the cause of the defect can be narrowed down. It becomes possible.

Further, when the film is continuously formed for a long time, the region surrounding the plasma in the semiconductor forming vessel is heated by the long-time plasma irradiation, and the plasma atmosphere changes over time. If the amount of outgassing from the apparatus into the plasma atmosphere fluctuates, the characteristics of the semiconductor element to be formed will have a time dependency, which will be a factor that impairs the uniformity of the semiconductor element. .

Here, when the step of exposing to the oxygen-containing atmosphere is included in the step of forming the semiconductor layer as in the present invention, the steps before and after the exposure to the oxygen-containing atmosphere are respectively performed by the first semiconductor layer (pin junction). In the case of the formation step and the second semiconductor layer (pin junction) formation step, the region created in the initial stage of the first semiconductor layer formation step is created in the later stage of the second semiconductor layer formation step, The region created at a later stage of the semiconductor layer forming step is formed in the initial stage of the second semiconductor layer forming step, so that the time dependence of the characteristics of the semiconductor element is canceled out and the semiconductor element formed Is improved.

When the semiconductor element is formed by the roll-to-roll method, and when the substrate is wound into a roll and exposed to an oxygen atmosphere, the initial portion of the first semiconductor forming step is performed as follows: When the winding of the substrate is performed after the first semiconductor forming step, the winding is performed so as to be located inside the winding section, and the latter part of the first semiconductor forming step is performed in the winding section. Winding is performed so as to be located outside. For this reason, in the case where the second semiconductor is formed while the substrate is pulled out of the roll after exposure to the oxygen atmosphere, in the second semiconductor formation step, the latter part of the first semiconductor formation step necessarily includes the second semiconductor. Since the formation process is performed at an early stage, the above-described operation is automatically performed in this case. Therefore, the above-described configuration can be obtained without performing complicated process control, which is preferable. Further, when winding the substrate, it is preferable to wind the protective material so as to sandwich the protective material at the same time, since it is possible to prevent occurrence of scratches on the substrate. In particular, when a fibrous material such as interleaf paper is used as the protective material, the substrate is brought into close contact with the protective material, and since oxygen is contained in the material and on the surface, a more uniform oxygen atom Layer formation is possible and preferred.

As described above, a plurality of pin connections
In a semiconductor device having a combination, the i-type semiconductor layers are separated from each other.
There are a plurality of them, and their i-type semiconductor layers are generally
Structures such as film thickness, composition and crystallinity are different,
In many cases, there are differences in the conditions during layer formation, especially in the formation temperature.
No. For semiconductor devices formed by roll-to-roll method
In general, the substrate delivery container as shown in FIG.
Deposited film with vacuum container for conductor formation and substrate winding container
Applying tensile stress to the substrate using a forming device
Is formed. Here, the tensile stress applied to the substrate
Enables smooth board transfer and adds heat to the board.
The film and substrate to be deposited are matched by poor expansion and contraction
Optimized under the condition of ensuring good adhesion
You. Semiconductor device with multiple pin junctions, i-type semiconductor
When the optimal tensile stress differs due to the different layer morphology
In this case, as in the preferred embodiment of the present invention, the adjacent pin
At least one point of the pn interface existing between the junctions
Exposure to oxygen atmosphere with the plate wound up on a roll
And each pin junction can be formed independently
It is necessary to control each tensile stress
It is preferable because it becomes possible. Scratch in the semiconductor formation process
A preferable range of the tensile stress is 6.0 N / mm. ^TwoOr
20 N / mm^TwoIs mentioned. Also, pull in the post-process
If the stress is greater, apply tensile stress.
When the board is unwound, the board
It may cause handling problems or scratches due to tight tightening.
Pull before exposure to an oxygen atmosphere.
The stress is greater than the tensile stress after exposure to the oxygen atmosphere.
Is also preferably large.

When the length of the substrate in the transport direction (the length wound on a roll) is long, the tensile stress is continuously or stepwise increased in each semiconductor forming step in order to prevent winding deviation. It is preferable to make it smaller as a whole. As for the magnitude of the tensile stress, the tensile stress at the end is 50% to 90% of the tensile stress at the start.
%.

Next, the components of the photovoltaic element will be described as an example of the semiconductor element of the present invention.

FIG. 1 is a schematic sectional view showing an example of the photovoltaic device of the present invention. In the figure, 101 is a substrate, 102 is a semiconductor layer, 103 is a second transparent conductive layer, and 104 is a current collecting electrode. 101-1 is a base, 101-2 is a metal layer, and 101-3 is a first transparent conductive layer. These are components of the substrate 101.

(Base) As the base 101-1, a metal,
A plate-like member or a sheet-like member made of resin, glass, ceramics, semiconductor bulk, or the like is preferably used. The surface may have fine irregularities. A structure in which light is incident from the substrate side using a transparent substrate may be employed. Further, by forming the base into a long shape, continuous film formation using a roll-to-roll method can be performed. In particular, flexible materials such as stainless steel and polyimide are used for the substrate 101-.
It is suitable as the material of (1).

(Metal Layer) The metal layer 101-2 has a role as an electrode and a role as a reflection layer that reflects light reaching the base 101-1 and reuses it in the semiconductor layer 102. The materials include Al, Cu, Ag, Au,
CuMg, AlSi, or the like can be suitably used. As the forming method, methods such as vapor deposition, sputtering, electrodeposition, and printing are suitable. The metal layer 101-2 preferably has irregularities on its surface. Accordingly, the optical path length of the reflected light in the semiconductor layer 102 can be extended, and the short-circuit current can be increased. When the base 101-1 has conductivity, the metal layer 101-2 need not be formed.

(First Transparent Conductive Layer) First Transparent Conductive Layer 1
01-3 has a role of increasing the irregular reflection of incident light and reflected light and extending the optical path length in the semiconductor layer 102. Also,
It has a role of preventing the element of the metal layer 101-2 from diffusing or migrating into the semiconductor layer 102 and preventing the photovoltaic element from shunting. Furthermore, by having an appropriate resistance, it has a role of preventing a short circuit due to a defect such as a pinhole in the semiconductor layer. Further, it is desirable that the first transparent conductive layer 101-3 has an unevenness on the surface thereof, similarly to the metal layer 101-2. The first transparent conductive layer 101-3 is preferably made of a conductive oxide such as ZnO or ITO, and is preferably formed using a method such as evaporation, sputtering, CVD, or electrodeposition. A substance that changes the conductivity may be added to these conductive oxides.

The zinc oxide layer is preferably formed by a method such as sputtering or electrodeposition, or a combination of these methods.

The conditions for forming a zinc oxide film by the sputtering method are greatly affected by the method, the type and flow rate of the gas, the internal pressure, the input power, the film forming speed, the substrate temperature, and the like. For example, DC
When a zinc oxide film is formed by a magnetron sputtering method using a zinc oxide target, the types of gas include Ar, Ne, Kr, Xe, Hg, and O ₂ .
The flow rate depends on the size of the apparatus and the pumping speed. For example, when the volume of the film formation space is 20 liters, the flow rate is 1 sccm.
To 100 sccm is desirable. The internal pressure during film formation is 1
It is preferable that the pressure be from ^10-4 Torr to 0.1 Torr. The input power is 15cm in diameter, depending on the size of the target.
In the case of the above, 10W to 100KW is desirable. The preferable range of the substrate temperature is 1 μm
When forming a film at / h, the temperature is desirably 70 ° C. to 450 ° C.

The conditions for forming the zinc oxide film by the electrodeposition method are preferably to use an aqueous solution containing nitrate ions and zinc ions in a corrosion-resistant container. The concentration of nitrate ion and zinc ion is 0.001mol / l to 1.0mo
1 / l, preferably 0.01 mol / l
More preferably in the range of from 0.5 mol / l to
More preferably, it is in the range of 0.1 mol / l to 0.25 mol / l. The source of nitrate ion and zinc ion is not particularly limited, and zinc nitrate, which is a source of both ions, or a water-soluble nitrate such as ammonium nitrate, which is a source of nitrate ion, and zinc ion It may be a mixture of zinc salts such as zinc sulfate as a source. Furthermore, it is also preferable to add a carbohydrate to these aqueous solutions in order to suppress abnormal growth and improve adhesion. The type of carbohydrate is not particularly limited, but monosaccharides such as glucose (glucose) and fructose (fructose), disaccharides such as maltose (maltose) and saccharose (sucrose), and polysaccharides such as dextrin and starch. Alternatively, a mixture of these can be used. The amount of carbohydrate in the aqueous solution depends on the type of carbohydrate, but is generally 0.001 g / l.
To 300 g / l, preferably 0.00
More preferably, it is in the range of 5 g / l to 100 g / l, even more preferably in the range of 0.01 g / l to 60 g / l. When depositing a zinc oxide film by an electrodeposition method, it is preferable that the substrate on which the zinc oxide film is deposited in the aqueous solution is used as a cathode and zinc, platinum, carbon or the like is used as an anode. At this time, the current density flowing through the load resistor is 1
It is preferably from 0 mA / dm to 10 A / dm.

(Substrate) The substrate 101-
A substrate 101 is formed by laminating a metal layer 101-2 and a first transparent conductive layer 101-3 on the substrate 1 as needed. Further, an insulating layer may be provided on the substrate 101 as an intermediate layer in order to facilitate integration of elements.

(Semiconductor Layer) Si is used as a main material of the semiconductor layer 102 of which the silicon-based thin film of the present invention is a part. In addition to Si, an alloy of Si and C or Ge may be used. The semiconductor layer contains a Group III element to be a p-type semiconductor layer, and contains a Group V element to be an n-type semiconductor layer. Regarding the electric characteristics of the p-type layer and the n-type layer, those having an activation energy of 0.2 eV or less are preferable, and those having an activation energy of 0.1 eV or less are optimal. The specific resistance is preferably 100 Ωcm or less, and most preferably 1 Ωcm or less. In the case of a stack cell, pin
The junction i-type semiconductor layer has a wide band gap and a far pi
It is preferable that the band gap becomes narrower as the n-junction becomes. As the doped layer (p-type layer or n-type layer) on the light incident side, a crystalline semiconductor with little light absorption or a semiconductor with a wide band gap is suitable.

The semiconductor layer 102 as a component of the present invention will be further described. FIG. 3 shows a semiconductor layer 1 having two sets of pin junctions as an example of a photovoltaic element of the present invention.
It is a typical sectional view showing 02. 102-1, 1 in the figure
02-4 is a semiconductor layer showing the first conductivity type, i.e., i-type semiconductor layers 102-2 and 102-5, and semiconductor layers 102-3 and 102-6 showing the second conductivity type.

The combination of i-type silicon-based semiconductor layers of a stack cell in which two pin junctions are stacked includes (amorphous silicon semiconductor layer, amorphous silicon semiconductor layer), (amorphous silicon semiconductor layer, and microcrystal) from the light incident side. Silicon semiconductor layer) and (a silicon semiconductor layer containing microcrystals, a silicon semiconductor layer containing microcrystals). In addition, three pin junctions
Examples of stacked photovoltaic elements are: As a combination of i-type silicon-based semiconductor layers, from the light incident side (amorphous silicon semiconductor layer, amorphous silicon semiconductor layer, amorphous silicon semiconductor layer), (amorphous silicon semiconductor layer, amorphous silicon Semiconductor layer, silicon semiconductor layer containing microcrystals), (amorphous silicon semiconductor layer, silicon semiconductor layer containing microcrystals, silicon semiconductor layer containing microcrystals), (amorphous silicon semiconductor layer, silicon containing microcrystals) A semiconductor layer, an amorphous silicon germanium semiconductor layer), (a silicon semiconductor layer containing microcrystals, a silicon semiconductor layer containing microcrystals, and a silicon semiconductor layer containing microcrystals). For the i-type semiconductor layer, the absorption coefficient (α) of light (630 nm) is 5000 cm ⁻¹ or more, and the photoconductivity (σp) of simulated sunlight irradiation by a solar simulator (AM 1.5, 100 mW / cm ² ) is 10 ×. 10 ^-5 S /
cm, the dark conductivity (σd) is preferably 10 × 10 ⁻⁶ S / cm or less, and the Urbach energy by the constant photocurrent method (CPM) is preferably 55 meV or less. A slightly p-type or n-type semiconductor layer can be used as the i-type semiconductor layer. In the case where a silicon germanium semiconductor layer or a silicon semiconductor layer containing microcrystals is used for the i-type semiconductor layer, at least the p / i interface and the n / i interface are used for the purpose of reducing the interface state and increasing the open circuit voltage. A configuration in which an amorphous silicon i-type semiconductor layer is inserted into one of them may be adopted.

(Method of Forming Semiconductor Layer) In order to form the silicon-based thin film and the semiconductor layer 102 of the present invention, a high-frequency plasma CVD method is suitable. Hereinafter, high frequency plasma CV
A preferred example of a procedure for forming the semiconductor layer 102 by the method D will be described.

The pressure inside the vacuum chamber for semiconductor formation, which can be reduced in pressure, is reduced to a predetermined deposition pressure.

A material gas such as a source gas or a dilution gas is introduced into the deposition chamber, and the deposition chamber is set to a predetermined deposition pressure while exhausting the deposition chamber by a vacuum pump.

The substrate 101 is set at a predetermined temperature by a heater.

The high frequency oscillated by the high frequency power supply is introduced into the deposition chamber. The method of introducing into the deposition chamber is as follows: when the high frequency is microwaves, it is guided by a waveguide and introduced into the deposition chamber through a dielectric window such as quartz, alumina, aluminum nitride, or when the high frequency is VHF or RF. For example, there is a method in which the material is guided by a coaxial cable and introduced into a deposition chamber via a metal electrode.

The source gas is decomposed by generating plasma in the deposition chamber, and a deposited film is formed on the substrate 101 placed in the deposition chamber. This procedure is repeated a plurality of times as needed to form the semiconductor layer 102.

The conditions for forming the semiconductor layer 102 are as follows: the substrate temperature in the deposition chamber is 100 to 450 ° C., and the pressure is 0.067.
Pa (0.5 mTorr) to 1.5 × 10 ⁴ Pa (11
3 Torr), high frequency power density 0.001-2 W /
cm ³ is a preferable condition. It is also preferable that a DC power supply is connected to the high-frequency introducing section via a choke coil as necessary, and a DC component is superimposed on the high frequency.

Source gases suitable for forming the semiconductor layer 102 of the present invention include SiF ₄ , SiH ₂ F ₂ , SiH ₃ F and S
When using a fluorinated silicon compound such as i ₂ F ₆ , a silicon hydride compound such as SiH ₄ or Si ₂ H _6, or an alloy system, a gasification containing Ge or C such as GeH ₄ or CH ₄ is further performed. It is desirable that the obtained compound be diluted with hydrogen gas gas and introduced into the deposition chamber. Further, an inert gas such as He may be added. B ₂ H ₆ , BF ₃ or the like is used as a dopant gas for turning the semiconductor layer into a p-type layer. PH ₃ , PF _3, or the like is used as a dopant gas for converting the semiconductor layer into an n-type layer. Crystalline phase thin film,
When depositing a layer having a small light absorption or a wide band gap such as SiC, it is preferable to increase the ratio of the diluent gas to the source gas and to introduce a high frequency having a relatively high power density.

In order to form a semiconductor layer in a large area, a plurality of holes are provided in a high-frequency introduction section as a method of introducing a source gas into a vacuum vessel, and the source gas is introduced into the plasma space in a shower shape through the holes. A method and a method of disposing a gas introduction tube having a plurality of holes in a plasma space are preferable because a uniform plasma can be formed.

(Second transparent conductive layer) Second transparent conductive layer 1
Reference numeral 03 denotes an electrode on the light incident side, and can also serve as an anti-reflection film by appropriately setting its film thickness. The second transparent conductive layer 103 is a semiconductor layer 102
Is required to have a high transmittance in a wavelength region that can absorb light and to have a low resistivity. Preferably 550
The transmittance in nm is 80% or more, more preferably 85%.
% Is desirable. The resistivity is 5 × 10 ^-3 Ωc
m, more preferably 1 × 10 ⁻³ Ωcm or less. As a material of the second transparent conductive layer 103, ITO, ZnO, In ₂ O ₃ or the like can be preferably used. As the formation method, methods such as vapor deposition, CVD, spray, spin-on, and immersion are suitable. A substance that changes conductivity may be added to these materials.

(Current Collecting Electrode) The current collecting electrode 104 is provided on the transparent electrode 103 to improve current collecting efficiency. As the forming method, a method of forming a metal of an electrode pattern by sputtering using a mask, a method of printing a conductive paste or a solder paste, a method of fixing a metal wire with a conductive paste, and the like are preferable.

Incidentally, protective layers may be formed on both surfaces of the photovoltaic element as required. At the same time, an auxiliary material such as a steel plate may be used on the back surface (light incident side and reflection side) of the photovoltaic element.

[0059]

EXAMPLES In the following examples, the present invention will be concretely described by taking a solar cell as an example of a semiconductor element, but these examples do not limit the content of the present invention at all.

Example 1 The photovoltaic element shown in FIG. 5 was formed by the following procedure using the deposited film forming apparatus 201 shown in FIG. FIG. 5 is a schematic sectional view showing an example of a photovoltaic device having a silicon-based thin film of the present invention. In the figure,
The same members as those in FIG. 1 are denoted by the same reference numerals and description thereof will be omitted. The semiconductor layers of this photovoltaic element include an amorphous n-type semiconductor layer 102-1A and a microcrystalline i-type semiconductor layer 102-2.
A and microcrystalline p-type semiconductor layer 102-3A, amorphous n
Semiconductor layer 102-4A and amorphous i-type semiconductor layer 1
02-5A and a microcrystalline p-type semiconductor layer 102-6A. That is, this photovoltaic element is a so-called pi
It is an npin type double cell photovoltaic element.

FIG. 2 is a schematic sectional view showing an example of a deposited film forming apparatus for producing a silicon-based thin film and a photovoltaic element according to the present invention. The deposited film forming apparatus 201 shown in FIG.
Substrate sending container 202, semiconductor forming vacuum container 211
213, the substrate take-up container 203 is the gas gate 22
1 through 224. A strip-shaped conductive substrate 204 is set in the deposition film forming apparatus 201 through each container and each gas gate. The strip-shaped conductive substrate 204 is placed in the substrate delivery container 20.
The substrate is unwound from the bobbin provided in the second bobbin 2 and wound on another bobbin in the substrate winding container 203.

The vacuum chambers 211 to 213 for forming semiconductors are:
Each has a deposition chamber for forming a plasma generation region. In general, the deposition chamber is a discharge space where plasma is generated,
The upper and lower sides are limited by the conductive substrate and the high-frequency introducing section, and the lateral direction is limited by a discharge plate provided so as to surround the high-frequency introducing section.

The plate-like high frequency introducing section 241 in the deposition chamber
Glow discharge is generated by applying high-frequency power from the high-frequency power supplies 251 to 253 to 243, thereby decomposing the source gas and depositing the semiconductor layer on the conductive substrate 204. The high-frequency introducing sections 241 to 243 face the conductive substrate 204 and have a height adjustment mechanism (not shown). By the height adjustment mechanism, it is possible to change the distance between the conductive substrate and the high-frequency introduction unit,
At the same time, the volume of the discharge space can be changed. Further, gas introduction pipes 231 to 233 for introducing a source gas and a dilution gas are connected to the respective vacuum chambers 211 to 213 for semiconductor formation.

Each vacuum chamber for semiconductor formation is provided with a film formation region adjusting plate (not shown) for adjusting the contact area between the conductive substrate 204 and the discharge space in each deposition chamber.

First, a strip-shaped substrate (50 cm in width, 1500 m in length, 0.125 mm in thickness) made of stainless steel (SUS430BA) was sufficiently degreased and washed, mounted on a continuous sputtering device (not shown), and the Ag electrode was targeted. A 100 nm thick Ag thin film was deposited by sputtering. Further, using a ZnO target, a thickness of 1.2 μm
The ZnO thin film was sputter-deposited on the Ag thin film to form a strip-shaped conductive substrate 204.

Next, a bobbin around which the conductive substrate 204 is wound is mounted on the substrate delivery container 202, and the conductive substrate 204 is loaded with the gas gate on the loading side, and the semiconductor forming vacuum containers 211, 2
12, 213, through a gas gate on the carry-out side, the substrate was passed to the substrate take-up container 203, and a tensile stress was applied at 13 N / mm ² so that the strip-shaped conductive substrate 204 did not slack. Then, the substrate delivery container 202, the semiconductor formation vacuum containers 211, 212, and 213, and the substrate take-up container 20
3 is evacuated by a vacuum pump (not shown)
The chamber was sufficiently evacuated to 6.7 × 10 ⁻⁴ Pa (5 × 10 ⁻⁶ Torr) or less.

While operating the vacuum evacuation system, gas introduction pipes 231,
Source gases and dilution gas were supplied from 232 and 233.
Here, the discharge chamber in the semiconductor formation vacuum vessel 212 used had a length in the longitudinal direction of 1 m and a width of 50 cm. At the same time, 500 sccm of H ₂ gas was supplied as a gate gas from each gate gas supply pipe (not shown) to each gas gate. In this state, the evacuation capacity of the evacuation system was adjusted to adjust the pressure in the semiconductor formation vacuum vessels 211, 212, and 213 to a predetermined pressure. The forming conditions are as shown in Table 1.

Semiconductor-forming vacuum vessels 211, 212, and 2
When the pressure in the substrate 13 is stabilized, the substrate
The movement of the conductive substrate 204 in the direction from 02 to the substrate take-up container 203 was started.

Next, the semiconductor forming vacuum vessels 211 and 21
High frequency power is introduced from high frequency power supplies 251, 252, 253 to the high frequency introducing parts 241, 242, 243 in the semiconductor devices 2, 213 to generate a glow discharge in the deposition chambers in the vacuum chambers 211, 212, 213 for semiconductor formation, and An amorphous n-type semiconductor layer (thickness 30 nm), a microcrystalline i-type semiconductor layer (thickness 2.0 μm), and a microcrystalline p-type semiconductor layer (thickness 10 nm) are formed on a substrate 204 to form a bottom cell pin junction. did.

In this case, a high-frequency power having a frequency of 13.56 MHz and a power density of 5 mW / cm ³ is supplied to the semiconductor-forming vacuum vessel 211 by using a high-frequency introducing section 2 made of an Al metal electrode.
From FIG. 41, the frequency 6
0 MHz high frequency, power density 400 mW / cm ³
A high-frequency power is introduced from a high-frequency introducing section 242 made of an Al metal electrode while adjusting so that the frequency becomes 13.56 MHz and a high-frequency power having a power density of 30 mW / cm ³ is supplied to the vacuum chamber 213 for semiconductor formation. It was introduced from a high-frequency introduction part 243 made of a metal electrode.

After the formation of the pin junction of the bottom cell was completed, the substrate take-up container 203 was leaked, and the conductive substrate 204 was taken out and exposed to the atmosphere. At this time, the atmospheric exposure conditions (temperature, humidity, and time) were 25 ° C., 30 ° C.
%, 20 minutes.

Subsequently, a pin junction of the top cell was formed. The conductive substrate 2 is placed in the substrate delivery container 202.
04 is mounted, and the conductive substrate 204 is loaded with the gas gate on the loading side, and the vacuum chambers 211 and 21 for forming semiconductors.
2, 213, through a gas gate on the carry-out side, the substrate was passed to the substrate take-up container 203, and a tensile stress was applied at 13 N / mm ² so that the strip-shaped conductive substrate 204 did not slack. Then, the substrate delivery container 202, the semiconductor formation vacuum containers 211, 212, 213, and the substrate take-up container 203 are 6.7 × by a vacuum exhaust system including a vacuum pump (not shown).
The chamber was sufficiently evacuated to 10 ^-4 Pa (5 × 10 ^-6 Torr) or less.

The formation of the top cell was performed so that the portion formed in the latter half of the step of forming the bottom cell became an initial formation region.

While operating the vacuum evacuation system, gas introduction pipes 231,
Source gases and dilution gas were supplied from 232 and 233.
At the same time, 500 sccm of H ₂ gas was supplied as a gate gas from each gate gas supply pipe (not shown) to each gas gate. In this state, the evacuation capacity of the evacuation system was adjusted to adjust the pressure in the semiconductor formation vacuum vessels 211, 212, and 213 to a predetermined pressure. The forming conditions are as shown in Table 2.

Semiconductor-forming vacuum vessels 211, 212, and 2
When the pressure in the substrate 13 is stabilized, the substrate
The movement of the conductive substrate 204 in the direction from 02 to the substrate take-up container 203 was started.

Next, the semiconductor forming vacuum vessels 211 and 21
High frequency power is introduced from high frequency power supplies 251, 252, 253 to the high frequency introducing parts 241, 242, 243 in the semiconductor devices 2, 213 to generate a glow discharge in the deposition chambers in the vacuum chambers 211, 212, 213 for semiconductor formation, and On a substrate 204, an amorphous n-type semiconductor layer (thickness 30 nm), an amorphous i-type semiconductor layer (thickness 30 nm), and a microcrystalline p-type semiconductor layer (thickness 10 nm) were formed to form a pin junction of a top cell.

In this case, a high-frequency power having a frequency of 13.56 MHz and a power density of 5 mW / cm ³ is supplied to the high-frequency introducing section 2 made of an Al metal electrode in the semiconductor forming vacuum vessel 211.
From FIG. 41, the frequency 6
0MHz high frequency, power density 100mW / cm ³
A high-frequency power is introduced from a high-frequency introducing section 242 made of an Al metal electrode while adjusting so that the frequency becomes 13.56 MHz and a high-frequency power having a power density of 30 mW / cm ³ is supplied to the vacuum chamber 213 for semiconductor formation. It was introduced from a high-frequency introduction part 243 made of a metal electrode.

Next, using a continuous module device (not shown), the formed band-shaped photovoltaic element was
(Example 1).

Next, the deposited film forming apparatus 201 shown in FIG.
Using -A, a solar cell module was prepared using the same formulation as in Example 1-1, except that the bottom cell was not exposed to the air after forming the bottom cell (Comparative Example 1).

The photoelectric conversion efficiency of the solar cell module prepared as described above was measured using a solar simulator (AM).
1.5, 100 mW / cm ² ). Table 3 shows the results.

As shown in Table 3, the solar cell module of Example 1 has a relatively high photoelectric conversion efficiency as compared with the solar cell of Comparative Example 1, and the uniformity of the photoelectric conversion efficiency over the strip-shaped conductive substrate. It was excellent. From the above, it is understood that the solar cell including the semiconductor element of the present invention has excellent characteristics.

Example 2 The photovoltaic element shown in FIG. 5 was formed using the deposited film forming apparatuses 201 and 201-B shown in FIGS.

The conditions for forming each semiconductor layer were as follows, except that the top cell was performed by the deposited film forming apparatus 201-B.
A solar cell module was prepared in the same manner as in Example 1 (Example 2). Here, the deposited film forming apparatus 201
Before forming the amorphous n-type semiconductor layer 102-4A in the -B semiconductor formation vacuum vessel 211-A, the semiconductor is heated to 300C by a lamp heater and cooled to 150C by a cooling pipe through which cooling water is passed. Heated again to 300 ° C.

The photoelectric conversion efficiency of the solar cell module prepared as described above was measured using a solar simulator (AM).
1.5, 100 mW / cm ² ). Further, the adhesiveness of the solar cell module was examined by using a cross-cut tape method (interval between cuts of 1 mm and number of squares of 100). Table 4 shows the results.

As shown in Table 4, the solar cell module of Example 2 was superior to Example 1 in photoelectric conversion efficiency. In the peeling test, the solar cell modules of Example 1 and Example 2 were excellent, but the solar cell module of Example 2 was more excellent. From the above, it can be seen that the solar cell module including the semiconductor element of the present invention has excellent features.

Example 3 The photovoltaic element shown in FIG. 5 was formed using the deposited film forming apparatus 201 shown in FIG.

A solar cell module was produced in the same manner as in Example 1 except that the tensile stress applied to the substrate when forming the top cell was changed to 10 N / mm ² (Example 3).

The photoelectric conversion efficiency of the solar cell module prepared as described above was measured using a solar simulator (AM).
1.5, 100 mW / cm ² ). In addition, the solar cell module whose initial photoelectric conversion efficiency was measured in advance was placed in a dark place at a temperature of 85 ° C. and a humidity of 85% and held for 30 minutes, then lowered to −20 ° C. over 70 minutes and held for 30 minutes again. After repeating this cycle of returning the temperature to 85 ° C. and the humidity of 85% over 70 minutes 100 times, the photoelectric conversion efficiency was measured again, and the change in the photoelectric conversion efficiency by the temperature and humidity test was examined. Table 5 shows the results.

As shown in Table 5, the solar cell module of Example 3 was superior in photoelectric conversion efficiency to Example 1. In the temperature and humidity test, the solar cell modules of Example 1 and Example 3 were excellent, but the solar cell module of Example 3 was more excellent. From the above, it can be seen that the solar cell module including the semiconductor element of the present invention has excellent features.

Example 4 The photovoltaic element shown in FIG. 5 was formed using the deposited film forming apparatus 201 shown in FIG.

The tensile stress applied to the substrate at the time of forming the bottom cell was set to 13 N / mm ² at the start of film formation, gradually reduced during the film formation process, and set to 11 N / mm ² at the end of film formation to form the top cell. A solar cell module was prepared in the same manner as in Example 3 except that the tensile stress applied to the substrate at the time was set to 10 N / mm ² at the start of film formation and 8.0 N / mm ² at the end of film formation. (Example 4).

The solar cell module of Example 4 was excellent in the results of the photoelectric conversion efficiency and the temperature / humidity test as in Example 3. Furthermore, in Example 4, the winding deviation when wound on the bobbin in the substrate winding container 203 was small. From the above, it can be seen that the solar cell module including the semiconductor element of the present invention has excellent features.

Example 5 The photovoltaic element shown in FIG. 5 was formed using the deposited film forming apparatus 201-C shown in FIG. The deposited film forming apparatus 201-C includes a vacuum vessel 217 for forming an oxygen atmosphere while forming the bottom cell and the top cell.
Are disposed, and other than the above, the deposited film forming apparatus 2
It is equivalent to 01-A. A gas containing oxygen gas can be introduced from the gas introduction pipe 237 into the oxygen atmosphere forming vacuum vessel 217. The oxygen atmosphere creating vacuum vessel 217 is adjusted by adjusting the exhaust capacity of the exhaust system. The oxygen partial pressure inside can be adjusted. The gas gates 224 and 228 prevent oxygen in the oxygen atmosphere forming vacuum container 217 from diffusing into the semiconductor forming vacuum container.

While changing the oxygen partial pressure in the oxygen atmosphere forming vacuum container 217, the residence time of the substrate in the oxygen atmosphere was set to 5 minutes, and the other conditions were the same as those in Comparative Example 1. Created a module.

The photoelectric conversion efficiency of the solar cell module prepared as described above was measured using a solar simulator (AM).
1.5, 100 mW / cm ² ). Table 6 shows the results.

According to Table 6, after the bottom cell was created, 1
The solar cell module passed through an atmosphere having an oxygen partial pressure of Pa or more had high photoelectric conversion efficiency. From the above,
It is understood that the solar cell including the semiconductor element of the present invention has excellent characteristics.

[0097]

According to the present invention, a semiconductor device having a structure in which a number of silicon-based thin films are stacked can be efficiently formed, and further, a semiconductor device having better uniformity and characteristics can be formed. It is possible to form a semiconductor element having excellent adhesion, environmental resistance, and the like.

[0098]

[Table 1]

[0099]

[Table 2]

[0100]

[Table 3] The substrate position is such that the position where the bottom cell of the strip-shaped substrate is started is 0 m, and the position where the bottom cell is completed is 1500 m.

[0101]

[Table 4] As for the substrate position, the position where the bottom cell of the strip-shaped substrate was started was set to 0 m, and the position at the end of the production was set to 1500 m. In the peeling test, the number of peeled squares was ◎ 0, ○ 1-2,
△ 3-10, × 10-100 means

[0102]

[Table 5] The substrate position was 0 m at the position where the bottom cell of the strip-shaped substrate was started, and 1500 m at the end position. The temperature / humidity test was (photoelectric conversion efficiency after test) / (photoelectric conversion efficiency before test). )The value of the

[0103]

[Table 6] The photoelectric conversion efficiency is a value obtained by standardizing 1 at the 0 m position in Comparative Example 1 to 1.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing an example of a photovoltaic device including a semiconductor device of the present invention.

FIG. 2 is a schematic cross-sectional view showing an example of a deposited film forming apparatus for manufacturing a semiconductor device and a photovoltaic device of the present invention.

FIG. 3 is a schematic cross-sectional view illustrating an example of a semiconductor layer including a semiconductor element of the present invention.

FIG. 4 is a schematic sectional view showing an example of a deposited film forming apparatus for manufacturing a semiconductor device and a photovoltaic device according to the present invention.

FIG. 5 is a schematic cross-sectional view showing an example of a photovoltaic device including the semiconductor device of the present invention.

FIG. 6 is a schematic sectional view showing an example of a deposited film forming apparatus for manufacturing a semiconductor device and a photovoltaic device of the present invention.

FIG. 7 is a schematic sectional view showing an example of a deposited film forming apparatus for manufacturing a semiconductor device and a photovoltaic device of the present invention.

[Explanation of symbols]

101: Substrate 101-1: Base 101-2: Metal layer 101-3: First transparent conductive layer 102: Semiconductor layer 102-1, 102-4: Semiconductor layer 102-1A, 102 showing first conductivity type -4A: amorphous n-type semiconductor layer 102-2, 102-5: i-type semiconductor layer 102-2A: microcrystalline i-type semiconductor layer 102-3, 102-6: semiconductor layer showing the second conductivity type 102-3A , 102-6A: microcrystalline p-type semiconductor layer 102-5A: amorphous i-type semiconductor layer 103: transparent electrode 104: current collecting electrode 201, 201-A, 201-B, 201-C: deposited film forming apparatus 202: substrate Discharge container 203: substrate winding container 204: conductive substrate 211 to 216, 211-A: semiconductor forming vacuum container 217: oxygen atmosphere forming vacuum container 221 to 228: gas generator Preparative 231-237: gas introduction pipe 241 to 246: high-frequency power supply unit 251 to 256: high frequency power source

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yuzo Koda 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Akira Sakai 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon (72) Inventor Koichi Matsuda 3-30-2 Shimomaruko, Ota-ku, Tokyo F-term (reference) 4K030 AA06 BA29 CA02 CA17 DA08 FA01 GA14 LA16 5F051 AA04 CA03 CA04 CA16 CA22 CB12 DA15 FA04 GA05 GA14

Claims (14)

[Claims] 1. A high-frequency plasma C at a pressure lower than the atmospheric pressure
A method for forming a semiconductor device, comprising forming a plurality of pin junctions made of a silicon-based material on a substrate by a VD method, wherein one of the pin junctions is formed and then exposed to the surface of the pin junction. Exposing the p-layer or the n-layer to an oxygen-containing atmosphere, and an n-layer or a p-layer of another pin junction adjacent to the one pin junction on the p-layer or the n-layer exposed to the oxygen-containing atmosphere Forming a pn interface to form a pn interface. 2. The oxygen-containing atmosphere has an oxygen partial pressure of 1P.
2. The method according to claim 1, wherein the atmosphere is not less than a. 3. The method according to claim 1, wherein the step of exposing to an atmosphere containing oxygen includes exposing to air. 4. An i-layer in a pin junction formed before and after the step of exposing to an oxygen-containing atmosphere is an amorphous phase;
2. The method according to claim 1, wherein the other includes a crystal phase. 5. After the step of exposing to the oxygen-containing atmosphere,
2. The method for forming a semiconductor device according to claim 1, wherein the step of heating, cooling and heating is performed at least once, and then the other n-layer or p-layer of the pin junction is formed. 6. The method according to claim 5, wherein the steps of heating, cooling and heating are performed in a hydrogen atmosphere. 7. The method according to claim 1, wherein the high-frequency plasma CVD method is a roll-to-roll method. 8. The method according to claim 7, wherein different tensile stresses are applied to the substrate before and after the step of exposing to the oxygen-containing atmosphere. 9. The method of claim 8, wherein a tensile stress applied to the substrate before the step of exposing to the oxygen-containing atmosphere is larger than a tensile stress applied to the substrate after the step of exposing to the oxygen-containing atmosphere. The method for forming a semiconductor device according to claim 1. 10. The method for forming a semiconductor device according to claim 7, further comprising a step of reducing a tensile stress during the step of transporting the substrate by the roll-to-roll method. . 11. A step of transporting the substrate by a roll-to-roll method while forming the one pin junction by a high-frequency plasma CVD method and winding the substrate around a roll, and applying oxygen to the substrate while being wound around the roll. 2. The semiconductor device according to claim 1, further comprising: exposing the substrate to a contained atmosphere; and transporting the substrate while extracting the substrate from the roll by a roll-to-roll method, and forming the another pin junction by a high-frequency plasma CVD method. Forming method. 12. The method according to claim 11, wherein a tensile stress applied to the substrate when forming the one pin junction is different from a tensile stress applied to the substrate when forming the other pin junction. The method for forming a semiconductor device according to claim 1. 13. The step of transferring at least one of a tensile stress applied to the substrate when forming the one pin junction and a tensile stress applied to the substrate when forming the other pin junction. The method for forming a semiconductor device according to claim 11, wherein the lowering is performed halfway. 14. A semiconductor device formed by the method for forming a semiconductor device according to claim 1. Description: