JP2002164430A - 集積デバイス用デュアルダマシン接触 - Google Patents

集積デバイス用デュアルダマシン接触

Info

Publication number
JP2002164430A
JP2002164430A JP2001262581A JP2001262581A JP2002164430A JP 2002164430 A JP2002164430 A JP 2002164430A JP 2001262581 A JP2001262581 A JP 2001262581A JP 2001262581 A JP2001262581 A JP 2001262581A JP 2002164430 A JP2002164430 A JP 2002164430A
Authority
JP
Japan
Prior art keywords
layer
level
conductive
conductor
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001262581A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002164430A5 (enrdf_load_stackoverflow
Inventor
Richardson O Adebanjo
オー アデバヨ リチャードソン
Winston Yan Iifen
ウィンストン ヤン イーフェン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems Guardian Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems Guardian Corp filed Critical Agere Systems Guardian Corp
Publication of JP2002164430A publication Critical patent/JP2002164430A/ja
Publication of JP2002164430A5 publication Critical patent/JP2002164430A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Layout of the interconnection structure
    • H01L23/5283Cross-sectional geometry
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2001262581A 2000-08-31 2001-08-31 集積デバイス用デュアルダマシン接触 Withdrawn JP2002164430A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US65244900A 2000-08-31 2000-08-31
US09/652449 2000-08-31

Publications (2)

Publication Number Publication Date
JP2002164430A true JP2002164430A (ja) 2002-06-07
JP2002164430A5 JP2002164430A5 (enrdf_load_stackoverflow) 2004-09-09

Family

ID=24616872

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001262581A Withdrawn JP2002164430A (ja) 2000-08-31 2001-08-31 集積デバイス用デュアルダマシン接触

Country Status (3)

Country Link
JP (1) JP2002164430A (enrdf_load_stackoverflow)
KR (1) KR20020018610A (enrdf_load_stackoverflow)
GB (1) GB2371146A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004312007A (ja) * 2003-04-03 2004-11-04 Samsung Electronics Co Ltd 金属−絶縁体−金属キャパシタを含む二重ダマシン配線構造及びその製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7859112B2 (en) * 2006-01-13 2010-12-28 Micron Technology, Inc. Additional metal routing in semiconductor devices

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5693563A (en) * 1996-07-15 1997-12-02 Chartered Semiconductor Manufacturing Pte Ltd. Etch stop for copper damascene process
FR2754391B1 (fr) * 1996-10-08 1999-04-16 Sgs Thomson Microelectronics Structure de contact a facteur de forme eleve pour circuits integres
JP3228181B2 (ja) * 1997-05-12 2001-11-12 ヤマハ株式会社 平坦配線形成法
US6100190A (en) * 1998-02-19 2000-08-08 Rohm Co., Ltd. Method of fabricating semiconductor device, and semiconductor device
JP3293792B2 (ja) * 1999-01-12 2002-06-17 日本電気株式会社 半導体装置及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004312007A (ja) * 2003-04-03 2004-11-04 Samsung Electronics Co Ltd 金属−絶縁体−金属キャパシタを含む二重ダマシン配線構造及びその製造方法

Also Published As

Publication number Publication date
GB0121198D0 (en) 2001-10-24
GB2371146A (en) 2002-07-17
KR20020018610A (ko) 2002-03-08

Similar Documents

Publication Publication Date Title
US6177329B1 (en) Integrated circuit structures having gas pockets and method for forming integrated circuit structures having gas pockets
US6744090B2 (en) Damascene capacitor formed in metal interconnection layer
US5801094A (en) Dual damascene process
US7843035B2 (en) MIM capacitors with catalytic activation layer
US6767788B2 (en) Semiconductor device having a metal insulator metal capacitor
US6624053B2 (en) Damascene-type interconnection structure and its production process
US6337282B2 (en) Method for forming a dielectric layer
US8735279B2 (en) Air-dielectric for subtractive etch line and via metallization
US6011311A (en) Multilevel interconnect structure for integrated circuits
US8822331B2 (en) Anchored damascene structures
US6905964B2 (en) Method of fabricating self-aligned metal barriers by atomic layer deposition on the copper layer
US20090280643A1 (en) Optimal tungsten through wafer via and process of fabricating same
KR100468069B1 (ko) 인터레벨 금속 접속을 위한 자기-정렬 금속 캡
US7670946B2 (en) Methods to eliminate contact plug sidewall slit
US6495448B1 (en) Dual damascene process
US6391713B1 (en) Method for forming a dual damascene structure having capacitors
US6406992B1 (en) Fabrication method for a dual damascene structure
US6352920B1 (en) Process of manufacturing semiconductor device
US5880030A (en) Unlanded via structure and method for making same
KR20010082972A (ko) 반도체 장치의 배선 및 이의 제조 방법
US20210296169A1 (en) Self-aligned top vias over metal lines formed by a damascene process
JP2001118928A (ja) 集積回路の製造方法
US6559030B1 (en) Method of forming a recessed polysilicon filled trench
US6660650B1 (en) Selective aluminum plug formation and etchback process
JP2002164430A (ja) 集積デバイス用デュアルダマシン接触

Legal Events

Date Code Title Description
A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20050112