JP2002159173A - Power source - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power source suitable for reduction in size and having good follow-up properties to a load current change and a good power efficiency to a load current of a wide range. SOLUTION: A voltage change of a DC power source connected to an input end is detected. A signal of a pulse train of a duty cycle in response to its detected result and voltage set data corresponding to a desired output voltage is guided to a switching type drive circuit. The input voltage is intermittently controlled by the signal of the pulse train, and an obtained voltage is smoothed to generate a desired output voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device for controlling an input voltage to generate and supply a predetermined DC output voltage.

[0002]

2. Description of the Related Art Conventionally, for example, a voltage drop control element such as a transistor is provided between an input terminal and a load, and a dropper method (series control) for controlling a voltage drop amount at the element to obtain a desired output voltage. Type) power supply circuit and input voltage O
2. Description of the Related Art There is known a switching-type power supply circuit that performs N / OFF control to control a time width during which a DC input is transmitted to an output side, and obtains a desired output voltage by smoothing an obtained voltage. In these power supply circuits, feedback control is generally used in which an output voltage is monitored and negative feedback is provided.

In recent years, portable telephones and PDAs (Pe
With the spread of portable terminal devices such as rsonal digital assistance), the necessity of miniaturizing the devices and increasing the speed of processing is increasing. These devices usually require a plurality of power supply circuits, and from the viewpoint of miniaturization of the devices, a voltage drop type stabilized power supply circuit that can be easily reduced in size by integration into an integrated circuit (IC) is mainly used. Used in

On the other hand, to increase the processing speed, a CPU or DSP (Digital Signal Pro
As the process speed increases, the voltage applied to the integrated circuit (operating voltage) tends to decrease. For example, some devices operate at a voltage of 1 V or less.

When the above-mentioned low operating voltage is generated and supplied by a voltage drop type power supply circuit, for example, the power loss in the voltage control element increases due to the relationship with the output voltage of the battery as a voltage source, and the power consumption increases. The efficiency is significantly reduced, and the amount of heat generated in the integrated circuit including the power supply circuit is increased. Therefore, a power supply circuit (device) that employs an efficient switching method is desired instead of a voltage drop type power supply circuit (device).

[0006]

However, the conventional switching type power supply has a problem that the output voltage becomes insufficient when a sudden increase in the load current occurs due to insufficient followability of the feedback control. is there. For example, when a CPU as a load changes from a so-called sleep state to an active state, a sudden increase in load current occurs, and the power supply cannot follow the load, resulting in a shortage of output voltage. In order to prevent this, if a large capacitor is used for the output stage,
This is contrary to the desired direction of miniaturizing the power supply.

In addition, a conventional switching type power supply circuit has a problem that a rectifying diode or the like is indispensable, and it is not easy to reduce the size by using an IC. Furthermore, even if the power efficiency can be increased in the large current region, the power efficiency cannot be increased in the small current region (for example, when the load IC or the like is in a sleep state and the load current is about microamperes). There is also.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and has as its object to be able to follow a change in load current, to be suitable for miniaturization, and to provide power over a wide range of load current. An object is to provide an efficient power supply device.

Another object of the present invention is to provide a low-power-loss power supply device that can obtain a plurality of voltages with a simple configuration and is particularly suitable for being mounted on a portable telephone or a PDA.

[0010]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention relates to a power supply apparatus for converting an input voltage into a predetermined output voltage and supplying the output voltage to a load side. Means and a first
A first signal generating means for outputting a second signal, a second signal generating means for outputting a second signal in accordance with information related to the output voltage, and a predetermined signal based on the first and second signals. A third signal generating means for generating a third signal having a duty ratio; and a means for performing switching control on the input voltage using the third signal as a drive signal; And a power supply device that uses a voltage obtained by smoothing the above as the output voltage.

Such a configuration functions to supply a stable power supply that can follow a sudden change in output current and does not instantaneously run out of voltage.

Preferably, the first signal is a signal reflecting a result of comparison between the input voltage and a predetermined reference voltage, and the second signal is a signal of the output voltage preset as the information. This is a signal corresponding to the voltage setting information. Preferably, the duty ratio of the third signal is equal to the ratio between the second value indicated by the second signal and the first value indicated by the first signal.

According to another aspect of the present invention, there is provided a monitoring means for monitoring an input voltage, a first signal generating means for outputting a first signal based on the monitoring result, and a means for responding to information relating to the output voltage. A second signal generating means for outputting a second signal, a third signal generating means for generating a third signal having a predetermined duty ratio based on the first and second signals, A plurality of power supply units each including a unit for performing switching control on the input voltage using the signal of the above as a drive signal are connected in parallel, and among these power supply units, the monitoring unit of the first power supply unit and the second unit There is provided a power supply device having a configuration in which one signal generation unit is shared by all of these power supply devices connected in parallel.

Such a configuration enables the power supply device to be downsized, and functions to easily extract a plurality of different output voltages from each power supply circuit.

[0015]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

<First Embodiment> FIG. 1 is a block diagram showing a configuration of a main part of a power supply device according to a first embodiment of the present invention. As shown in FIG. 1, the power supply device 100 includes a voltage detection unit 110, a voltage setting unit 120, a control logic circuit 13
0, a driving unit 140, and a smoothing unit 150.
Of these, a DC power supply such as a battery is connected to the input terminals T1 and T2 of the voltage detection unit 110, as described later.
The output terminals T3 and T4 of the smoothing unit 150 include, for example,
A load composed of an analog circuit, a digital circuit, or the like is connected.

The voltage detecting section 110 has an input terminal T
1, to monitor the voltage applied to T2 (for example, the output voltage of a storage battery such as a nickel caddy mounted on the device)
The voltage value P1 obtained by the division by the resistors 301 and 302 is input to the converter 310. A / D converter 306 of converter 310
Generates a predetermined signal according to the input voltage P1 and the voltage from the reference voltage generator 307, and outputs the signal to the control logic circuit 130.

The voltage setting section 120 has a setting device 121 for setting a voltage value and the like and a register 122 in order to output a desired voltage from the output terminals T3 and T4 of the power supply device. Further, the control logic circuit 130 generates a duty cycle corresponding to the signal corresponding to the voltage value set in the voltage setting unit 120 and the signal from the voltage detection unit 110 described above.
A pulse train signal having a cycle is generated as a control pulse signal, and is output to the drive unit 140.

The driving unit 140 includes switching elements 141 and 142 such as a field effect transistor (FET).
And driven by a control signal from the control logic circuit 130 to switch the DC voltage applied between the terminals P2 and P3. Then, the signal after switching is input to the smoothing unit 150, and the voltage obtained by smoothing with the smoothing coil (output inductor) 151 and the output capacitor 152 is stabilized from the output terminals T3 and T4 to a load (not shown). Is supplied as an appropriate voltage.

Here, the principle of operation of the power supply according to the present invention will be briefly described with reference to FIG. As shown in FIG. 2A, input terminals T1,
DC power supply 201 connected to T2 can be equivalently represented by a circuit in which DC voltage source 202, output resistance (internal resistance) 203, and capacitor 204 are connected in series and parallel. Specifically, the DC voltage source 202 and the output resistor 203 are connected in series, and the DC voltage source 202 and the capacitor 204 are connected in parallel.

Now, the output terminals T3, T4 of the power supply device 100
Is changed from the standby state to the active state, for example, and the load fluctuation causes the load current Io at time T1, as shown in FIG. 2B.
Is rapidly changed from Io1 to Io2. In this case, the temporal change of the load current is as shown by a curve 221 in FIG.

On the other hand, on the DC power supply 201 side, the output current Ii increases to follow this current change, and a voltage drop is caused by the equivalent internal resistance 203 accordingly. The state at that time is shown by a curve 231 in FIG. That is, when the load current changes from Io1 to Io2, the DC voltage Vi drops from Vi1 to Vi2.

Therefore, an internal circuit (to be described in detail later) of the power supply device 100 monitors the voltage Vi of the DC power supply 201, detects a change in the load current Io based on the voltage Vi, and changes the output voltage Vo. Feedforward control is performed to maintain the value at a predetermined value. As a result, the present power supply becomes a power supply having good tracking ability to the change in the load current Io, and the power supply shown in FIG.
32, the output voltage Vo is equal to the load current Io
Is constant irrespective of the change in

Hereinafter, the operation of the present power supply device including the above components will be described. As described above, the voltage detection unit 110 includes the resistors 301 and 302 and the conversion unit 310.
The conversion unit 310 further includes an A / D converter 30
6 and a reference voltage generator 307. Resistance 301,
Numerals 302 are connected in series, and both ends thereof are connected to input terminals T1 and T2 as shown in FIG. As a result, a voltage divided by the resistance division ratio appears at a connection point P1 between the resistors 301 and 302, and the voltage is input to the converter 310.

Here, the voltage applied between the terminals T1 and T2 is Vi, and the resistance values of the resistors 301 and 302 are R1 and R2, respectively.
Assuming that 2, the voltage Vad input to the conversion unit 310 is expressed as follows: Vad = Vi × R2 / (R1 + R2) (1) Then, conversion section 310 outputs a digital signal having a value corresponding to input voltage Vad.
The specific circuit configuration and the like for that purpose will be described later.

As described above, the converter 310 converts the input analog voltage Vad into an analog / digital converter (A / D
D conversion), a predetermined constant is held therein as information, and the digitally converted signal is multiplied by this constant value to output an AA value. Therefore, as shown in FIG.
A / D converter 306 and a reference voltage generator 307 are provided.

That is, the A / D converter 306 converts the voltage Vad and the reference voltage Vr generated by the reference voltage generator 307 into a digital signal represented by the following equation: AA = FF × (Vad / Vr) (2) Is output. Here, FF is a constant, and takes the maximum value represented by, for example, 256 bits. Then, the digital signal having the AA value is input to the control logic circuit 130.

On the other hand, when the output voltage Vo to the load of the power supply device is set to the voltage setting section 120 composed of the setting device 121 and the register 122, information (voltage setting data) related to the voltage Vo is stored in the voltage setting section 120. , Are set using the setting unit 121, and the value after the setting is stored in the register 122.
The register 122 holds the set value as digital data. Then, the register 122 outputs the held digital data as an XX value to the control logic circuit 130 at a predetermined clock rate.

The control logic circuit 130 is represented by, for example, Dt = XX / AA (3) from the output (AA value) from the conversion unit 310 and the output (XX value) from the voltage setting unit 120. Pulse train (signal having a pulse width modulated (PWM) waveform) with a different duty cycle.

Here, the AA value and the XX value are adjusted such that the duty cycle Dt satisfies the following relationship: Dt = Vo / Vi (4) For that, X
The X value is equal to or less than the AA value, and XX = AA × Vo / Vi
Must be satisfied.

According to the power supply device shown in FIG. 1, the average value of the PWM waveform is output (Vo) to the output of the smoothing unit 150.
Is done. Therefore, from the above equations (3) and (4), Vo = Vi × Dt = Vi × (XX / AA) (5), and the above equations (1) and (2) are added to the equation (5). When substituted, Vo is represented by the following equation: Vo = XX × (R1 + R2) × Vr / (FF × R2) (6)

According to the equation (6) obtained as described above, the output voltage Vo is a constant Vr, R1, R2, F
F and a constant value determined only by the register value XX related to the set voltage. That is, the output voltage Vo of the power supply device is
It can be seen that the value is stable regardless of the input voltage.

FIG. 3 is a block diagram showing a detailed circuit configuration of the power supply device according to the first embodiment. FIG.
4 is a timing chart showing signal waveforms in main parts of the circuit shown in FIG. A / D converter 3 shown in FIG.
The input voltage (for example, the voltage of the battery (BTT) 201) is applied to the Vin terminal 06 as described with reference to FIG.
Is divided by the resistors 301 and 302 (that is, the voltage Vad described above), and at the same time, the voltage generated by the reference voltage generator 307 is applied to the reference voltage input terminal Vref.

The A / D converter 306 constantly monitors the input voltage Vad with respect to the above-mentioned reference voltage, and converts a value corresponding to the result into 8-bit digital signals B _{1 to} B ₈ and outputs them. Then, this signal is used as the AA value described above, and the input terminals A to A of the next-stage counter (CNT1) 351
Input to H.

On the other hand, under the control of a control unit (not shown),
The voltage setting data set by the setting device 121 is input to the input terminals A to H of the register 122. This data is
This is setting data for obtaining a desired output voltage from the present power supply device, and as an XX value, the output terminal Q ₁ of the register 122.
ＱQ ₈ are input to the input terminals AＨH of the counter (CNT 2) 352 at the next stage.

The counter (CNT1) 351 and the counter (CNT2) 352 are presettable down counters, and the counter 351 includes the A / D converter 30
6 and the voltage setting data XX from the register 122 are preset to the counter 352 in synchronization with the timeout of the counter 351.

That is, in FIG. 4, the waveform "CNT"
As indicated by 1 ", when the count value of the counter (CNT1) 351 becomes 0 and the output B of the flip-flop (FF1) 354 becomes logical 0, in synchronization with the next rising edge of the clock CK. , FF2 (355) have a logic 0 (the inverted output of the Q is, of course, a logic 1), so that the clock CK is input to one terminal and the other terminal receives the clock CK from the FF2. The output of the AND circuit 371 having received the inverted output is the waveform D in FIG.
, Transition from logic 0 to logic 1.

The output terminal of the AND circuit 371 is connected to the counter (CNT1) 351 and the counter (CNT2) 352 at L level.
Since these counters are connected to the "oad" terminal, these counters preset the AA and XX values in synchronization with the rise of the output pulse of the AND circuit 371 (the waveforms "CNT1" and "CNT2" in FIG. 4). ").

After the preset, the counter (CNT)
1) Both the set value (preset value) 351 and the counter (CNT2) 352 are counted down according to the input clock. And the count value is 0
, The outputs of the 8-input NOR circuits 353 and 363 connected to the output terminals (B _{1 to} B ₈ ) of the respective counters become logic 1.

As described above, when the outputs of the NOR circuits 353 and 363 become logic 1, the FFs 354 and 364 are reset, and the counting operation of the counter is stopped. Normally, since the above-mentioned duty cycle Dt is Dt <1, from the above equation (3), in a normal operation state, X
X <AA. Therefore, as shown in FIG. 4, the counter (CNT2) 352 is
Stop counting earlier than one.

As described above, in the present power supply device, the counter (CNT1) 351 and the counter (CNT2) 352 are preset in synchronization with the time-out of the counter (CNT1) 351 and when the count value becomes zero. ,
At the next clock, the operation of presetting is repeated again. Therefore, the count cycle of the counter (CNT1) 351 has a length proportional to AA, and the count cycle of the counter (CNT2) 352 has a length proportional to XX.

Here, focusing on the waveform at point E in FIG. 3 (see waveform E in FIG. 4), the counter (CNT2) 3
During a period in which 52 is counting down the set value XX, the waveform at the point E is logic 1. Then, after the countdown ends, the logic value becomes logic 0, and again becomes logic 1 in synchronization with the rise of the output pulse of the AND circuit 371 described above. That is, the repetition period of the waveform at the point E is determined by the AA value, and the duty is XX / AA.

Therefore, in the present power supply device, the waveform at point E is represented by P
The WM waveform is guided to the switching elements 141 and 142 via the buffer 370, and is used as a drive signal for these elements. Note that these switching elements are two MOS-FETs (field effect transistors) having different channel types.
141 is a p-channel MOS, MOS-FET 142 is n
It is a channel MOS.

As shown in FIG. 3, the MOS-FET 14
The gates 1 and 142 are connected to each other, and a driving pulse is supplied from a buffer 370 to the connection point. Further, the source of the MOS-FET 141 is directly connected to the + terminal of the battery 201 as a power supply source,
-The source side of the FET 142 is connected to the ground side (-terminal of the battery 201) of the power supply circuit. The connection point between the drains of the MOS-FETs 141 and 142 is connected to the output inductor 151.

FIG. 5 illustrates two M via buffer 370.
2 shows a driving waveform (a waveform applied to a gate) supplied to an OS-FET and a waveform of a current flowing through the FET. FIG. 5A schematically shows a signal waveform of a pulse train applied to the gate of the MOS-FET, and has a waveform that repeats ON / OFF at the above-described duty ratio XX / AA. And each MOS-FET is
When one is in the ON state, the other is in the OFF state.

That is, when a logic 1 pulse is applied to the gate, the MOS-FET 142 is turned on and the MOS-FE
When T141 is turned off and the gate voltage is logic 0,
The opposite situation occurs. FIG. 5B shows a MOS-FET
141 shows a current i1 flowing through the MOS-141.
The current i2 shown in FIG.

As described above, the two MOS-FETs 141,
The switching operation of 142 causes T1, T2
The voltage Vi applied in between is input to the smoothing unit 150 as a voltage of a pulse waveform having a duty ratio of a pulse train output from the control logic circuit 130. Note that the smoothing unit 150 includes an output inductor 151 and a capacitor 152.
And the MOS-FET 142 is a MOS-FET
When 141 is OFF, it functions to release the energy stored in inductor 151.

When the load current of the power supply device, for example, the integrated circuit (IC) is in a sleep state and the load current becomes very small, the electric charge accumulated in the capacitor 152 must be discharged. The load voltage will gradually increase. The MOS-FET 142 also has a function of forming a discharge loop and suppressing its voltage rise.

As described above, according to the first embodiment, in order to output a desired power supply voltage and a result obtained by constantly monitoring the voltage fluctuation of the DC supply source due to a change in the load current, By comparing with the voltage setting data set in advance and performing the feedforward control that varies the duty ratio of the switching waveform of the driving element based on the result, compared with the conventional switching power supply adopting the feedback control method, A rapid change in output current can be followed, and a stable power supply can be supplied without instantaneous voltage shortage.

Further, a large-capacity capacitor for responding to a sudden change in output current is not required, and the switching element disposed at the output stage of the power supply device is formed of a MOS-FE.
Since the rectifier diode and the like are eliminated by using only T, it is convenient for circuit integration (IC), and as a result, the power supply device can be easily reduced in size.

Furthermore, by employing a switching power supply configuration with low ON resistance using CMOS, power loss can be suppressed over a wide range of load currents from micro-amperes to hundreds of milliampers. Thus, a power supply with good power efficiency can be realized.

<Second Embodiment> Hereinafter, a second embodiment of the present invention will be described. FIG. 6 shows a configuration of a power supply device according to the second embodiment. The power supply device shown in FIG.
It is a power supply that can handle a case where a plurality of output voltages are required. In FIG. 6, the same components as those of the power supply device according to Embodiment 1 shown in FIG. 1 are denoted by the same reference numerals, and the description of their operations and the like is omitted here.

As shown in FIG. 6, the power supply device has a configuration in which a plurality of power supply circuits are connected in parallel in order to obtain a plurality of different output voltages (outputs 1 and 2 in FIG. 6). That is, the power supply circuit A 601 has the same configuration as the power supply device according to the first embodiment (see FIG. 1) in order to obtain a predetermined output voltage (output 1), and outputs the output in parallel with the circuit. 2 is connected to the power supply circuit B602. Hereinafter, similarly, other power supply circuits of the same configuration are connected in parallel.

The characteristic feature here is that the power supply circuit A 601
The A / D converter 306 for monitoring the output voltage of the battery (connected to the terminals T1 and T2) and the reference voltage generator 307 are shared by each power supply circuit. . Therefore, the output of the A / D converter 306 is simultaneously supplied to the control logic circuit 130a of the power supply circuit A 601 and the control logic circuit 130b of the power supply circuit B 602.

On the other hand, in order to obtain a plurality of different output voltages, each power supply circuit is provided with registers 122a and 122b for storing individually set voltage values and the like.
By providing the individual control logic circuits 130a, 130b, the switching elements 141a, 142a, 141b, 142b, etc., desired outputs 1, 2,... Are obtained from each power supply circuit based on preset data. It has become.

That is, the present power supply device includes
By setting different voltage setting data in 2a and 122b, different desired output voltages can be obtained from each power supply circuit. Conversely, when the same data is set in the register, a plurality of power supply circuits that output the same voltage are configured.

As described above, according to the second embodiment, when a plurality of output voltages are required, a power supply circuit corresponding to each output voltage is connected in parallel, and one of the power supply circuits is connected.
Finally, a single input voltage detector common to each circuit is provided, and the register for storing the voltage setting data is arranged individually for each circuit, thereby minimizing the size by avoiding duplication of components. And a plurality of different output voltages can be easily extracted from each circuit.

Third Embodiment A third embodiment of the present invention will be described below. The power supply device according to the third embodiment is configured to be able to cope with a case where a device serving as a load has a so-called sleep function. For example,
In some mobile phones, the operation of the microprocessor is set to a sleep mode or an active mode and intermittently operated according to the state of use.

The above intermittent operation will be specifically described. For example, when a mobile phone as a mobile device is in a standby state, a message is sent from a base station at a predetermined time interval. Therefore, a timer that operates in synchronization with the base station is provided on the mobile phone side, and the microprocessor and the phone itself are put into a sleep state during unnecessary time periods, and the phone and the like are placed in an active state immediately before a message is sent. Has been restored.

The power consumption of the portable telephone can be greatly reduced by such an intermittent operation. However, when a microprocessor or the like enters a sleep mode, the current consumption in the telephone circuit including the processor is measured in units of microampere. The situation changes when it falls. That is, in a normal switching power supply, there is a problem that high power conversion efficiency cannot be maintained at the time of low current consumption due to the reactive power due to the switching.

Thus, the third embodiment discloses a power supply device that can cope with a load having a device having a sleep function directly connected to a low current consumption state. FIG. 7 is a block diagram showing a detailed circuit configuration of the power supply device according to the third embodiment. In the circuit configuration shown in FIG. 1, portions other than the logic circuit portions 700 and 750 surrounded by broken lines are shown in FIG.
This is the same as the power supply device according to the first embodiment.

In the logic circuit section 700 of FIG. 7, the clock CK2 is a clock for determining the interval of the intermittent operation in the present power supply device, and is usually a signal having a period of several milliseconds to several hundred milliseconds. Here, the power supply device is designed to operate intermittently at this interval. In addition,
In the figure, an intermittent clock described later is input from a terminal marked “GCK”.

First, the standby signal STBY is set to logic 0
The circuit operation in the case of (corresponding to the above-mentioned sleep mode) will be described. When the clock CK2 having the above-described period is input to the logic circuit unit 700, the up-counter (CNT3) 701 and the flip-flop (FF5) 7
02 is reset. At this time, a logical 1 signal is output from the inverted output terminal of the FF5 (702), and the clock signal input from the CK terminal is output to the AND circuit 707,
The signal is input to the GCK terminal via the 704 and the OR circuit 706. In this case, the present power supply device performs exactly the same operation as the power supply device according to the above-described first embodiment based on the clock.

The counter (CNT3) 701 finishes counting up (full count state), and its output signal (B
_{When 1 to} B ₄ ) become “1111 (binary)”, the FF5 (702) is set to “1” by the next clock signal, and the output Q = 1. As a result, the inverted output of Q becomes logic 0, so that the AND circuit 707 does not output the clock signal CK. This means that there is no clock input to the GCK terminal, that is, the clock supply to the power supply circuit has been cut off.

In this case, A in the logic circuit portion 750
Since a signal of logic 0 is also sent from the FF5 (702) to the ND circuit 752 and the NAND circuit 751, both the switching elements (FETs) 141 and 142 are turned off. Therefore, no current is supplied to the smoothing circuit including the output inductor 151 and the output capacitor 152.

However, at this time, the load of the power supply device is
In a state of operation with a current consumption of microamperes (sleep mode), the electric charge accumulated in the output capacitor 152 of the smoothing circuit is gradually discharged, whereby the operating current is supplied to the load. . Note that the cycle of the clock CK2 is determined by the load current in the sleep mode and the capacity of the output capacitor 152. The reason is that the output voltage value of the present power supply device is, for example, 5% or more of the operating voltage of the load circuit. It is set so as not to cause an error.

On the other hand, when the standby signal STBY is logic 1, it indicates that the load state of the power supply corresponds to the active mode. In this case, the clock CK is continuously input to the GCK terminal via the AND circuit 705 and the OR circuit 706 of the logic circuit unit 700. Therefore, the present power supply device operates in a normal state (the same as the power supply device according to the first embodiment).

Here, the counter (CNT3) 7
Although the number of output bits of 01 is 4 bits, the number of bits may be changed according to the load current in the sleep mode. For example, as the load current increases, the number of bits increases, or a load pattern (load current pattern) that is known in advance is stored in an up counter (CNT3) 701 as a state register, and The number of bits may be arbitrarily set.

As described above, according to the present embodiment, the load device is set to the sleep mode and the active mode.
When operating repeatedly in the mode, the power supply synchronized with these modes is controlled by turning off all the switching elements located in the power supply stage and stopping the current supply to the smoothing circuit in the sleep mode. The operation can be switched, and the power supply efficiency can be greatly improved at the time of current consumption in units of micro-ampere.

The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, in each of the above embodiments, a digital counter circuit is used for a control logic circuit or the like that processes an input digital signal. Instead, a microprocessor or a digital signal processor (DSP) may be used. Or the like may be used to execute a predetermined calculation to equivalently generate a pulse waveform (switching waveform) with a duty XX / AA.

[0071]

As described above, according to the present invention,
In a power supply device for converting an input voltage to a predetermined output voltage and supplying the output voltage to a load side, a monitoring means for monitoring the input voltage, and a first signal generator for outputting a first signal based on the monitoring result Means, second signal generating means for outputting a second signal in accordance with the information relating to the output voltage, and generating a third signal having a predetermined duty ratio based on the first and second signals. A third signal generating means for performing a switching control on the input voltage using the third signal as a drive signal, so that it can follow a sudden change in output current, and Stable power can be supplied without running out.

According to another aspect of the present invention, there is provided a state register for storing a predetermined value corresponding to the operation state of the load, and the switching control is performed by switching or thinning out the clock signal based on the stored value. By performing the on / off control, the power supply efficiency can be significantly improved even at a small current consumption.

Further, according to the present invention, the monitoring means for monitoring the input voltage, the first signal generating means for outputting the first signal based on the monitoring result, and the response to the information relating to the output voltage. Second signal generating means for outputting a second signal by
Third signal generating means for generating a third signal having a predetermined duty ratio based on the first and second signals, and performing switching control on the input voltage using the third signal as a drive signal. And a plurality of power supply units each including a power supply unit.
The power supply monitoring means and the first signal generating means are shared by all of the power supplies connected in parallel, so that a compact power supply can be constructed, and a plurality of different output voltages from each power supply circuit can be configured. Can be easily taken out.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a main part of a power supply device according to Embodiment 1 of the present invention.

FIG. 2 is a diagram for explaining the operation principle of the power supply device according to the present invention.

FIG. 3 is a block diagram showing a detailed circuit configuration of the power supply device according to the first embodiment.

FIG. 4 is a timing chart showing signal waveforms of main parts of the circuit shown in FIG.

FIG. 5 is a diagram showing a drive waveform and a current waveform supplied to a switching element (MOS-FET).

FIG. 6 is a diagram illustrating a configuration of a power supply device that outputs a plurality of voltages according to a second embodiment.

FIG. 7 is a block diagram showing a detailed circuit configuration of a power supply device according to a third embodiment.

[Explanation of symbols]

110: voltage detection unit, 120: voltage setting unit, 122: register, 130: control logic circuit, 140: drive unit, 1
41, 142: switching element (field effect transistor (FET)), 150: smoothing part, 151: smoothing coil (output inductor), 152: output capacitor, 201
... DC power supply, 202 ... DC voltage source, 203 ... output resistance (internal resistance), 204 ... capacitor, 301, 302 ...
Resistor, 306 A / D converter, 307 Reference voltage generator, 310 Converter, 351, 352, 701 Counter (CNT), 354, 364, 365, 702 Flip flop, 370 Buffer

Claims (10)

[Claims] 1. A power supply device for converting an input voltage to a predetermined output voltage and supplying the output voltage to a load side, wherein a monitoring means for monitoring the input voltage, and a first signal for outputting a first signal based on the monitoring result. 1 signal generating means, 2nd signal generating means for outputting a second signal according to the information related to the output voltage, and 3rd having a predetermined duty ratio based on the first and second signals. A third signal generating unit for generating a signal of the following, and a unit for performing switching control on the input voltage using the third signal as a drive signal, wherein the voltage after the switching control is obtained by smoothing. A power supply device, wherein a voltage is the output voltage. 2. The signal according to claim 1, wherein the first signal reflects a comparison result between the input voltage and a predetermined reference voltage,
The power supply device according to claim 1, wherein the second signal is a signal corresponding to voltage setting information of the output voltage set in advance as the information. 3. The duty ratio of the third signal is equal to a ratio between a second value indicated by the second signal and a first value indicated by the first signal. Claim 2
The power supply as described. 4. The third signal maintains a predetermined voltage state for a time width required to count down the second value in accordance with a clock signal having a predetermined period, and changes the first value in accordance with the clock signal. Pulse width modulation (PW) having a repetition period determined by the counted down time width
M) a signal having a waveform.
The power supply as described. 5. The method according to claim 1, further comprising:
The power supply device according to claim 1, further comprising a unit configured to perform on / off control of the switching control. 6. A state register for storing a predetermined value corresponding to the operation state, wherein the on / off control switches or thins out the clock signal based on the stored value. The power supply according to claim 5, wherein the power supply is executed. 7. The power supply device according to claim 6, wherein the state register stores an operation pattern of the load. 8. The means for performing switching control comprises a field effect transistor (FET) of a different channel type.
7. The device according to claim 6, further comprising:
The power supply as described. 9. A power supply device according to claim 1, wherein a plurality of the power supply devices are connected in parallel, and among these power supply devices, a first power supply device monitoring means and a first signal generation means are provided. A power supply device having a configuration shared by all of these power supply devices connected in parallel. 10. The power supply according to claim 9, wherein the number of the power supplies connected in parallel is equal to the number of output voltages supplied to the load.