JP2002153046A - Power supply circuit and liquid crystal display using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply circuit that has high voltage-converting efficiency and that does not require a separate generating source of a switching clock signal in a power supply circuit having a voltage-boosting part that generates a common side driving voltage using a voltage-boosting clock signal and a reference voltage. SOLUTION: This circuit comprises a voltage-boosting part 11 into which a reference voltage Vin and a voltage-boosting clock signal CLK are inputted to generate a voltage Vout higher than the reference voltage by a charging voltage of a capacitor, a VSH generating part 12 that generates a common side driving voltage VSH higher than the Vin from the Vout: and a VBH- generating part 15 that generates a segment side driving voltage VBH lower than the Vin. In the VBH-generating part 15, a comparator 16 compares a voltage Vb obtained by shunting the VSH by divided resistors 13, 14 with the output voltage. The output signal and the CLK are inputted into an AND circuit 17 to generate an operating signal for FETs. This operating signal controls the 'on and off' of FETs 18, 19 to output a voltage of the same potential with the Vb as the VBH.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device used as a display device for an OA device such as a word processor or a personal computer, an AV device for handling images, an information display device for a portable information terminal, and the like. Power supply circuit.

[0002]

2. Description of the Related Art In recent years, it has been used as a display device for display of OA devices such as word processors and personal computers and AV devices for handling images, and more recently as a display device for information display of portable information terminals.
Liquid crystal display devices are widely used. This is because the liquid crystal display device has features such as thin and light weight and low power consumption as compared with other display devices.

[0003] In particular, display devices mounted on electronic equipment, such as portable information terminals and portable telephones, which are powered by batteries are required to have even lower power consumption. This is because most of the power consumption is due to the display device when the electronic device is in a standby state (a state in which the CPU is stopped and only information display is performed), and thus the display device is mounted. This is because the time during which the electronic device can be used is determined.

[0004] Many of the electronic devices using such batteries as a power supply source have a power supply of +3 for a display device.
A voltage of about V is applied. Here, taking a liquid crystal display device as an example, to drive the liquid crystal display device, +2
Since a COM (common) side voltage of about 0 V is required, the internal power supply circuit of the liquid crystal display device requires +3 V to +20 V
Needs to be boosted.

Conventionally, a booster circuit using a transformer or a charge pump type booster circuit using a capacitor has been used as the power supply circuit. However, the former booster circuit using a transformer can only achieve a conversion efficiency of about 60% at the maximum, and further, in the case of a low current load such as a liquid crystal display device for a portable information terminal, the conversion efficiency is not increased. It will be used in low places. For this reason, recently, the latter charge pump type booster circuit, which has a good voltage conversion efficiency in a state where the load current is small, has attracted attention. As a power supply circuit of a liquid crystal display device adopting the charge pump method, there is one as disclosed in JP-A-2000-166220.

[0006]

When a high conversion efficiency of the common side voltage which is boosted from + 3V to about + 20V is realized by adopting the charge pump system, it is close to the input voltage that the next largest power loss occurs. This is a power supply line on the SEG (segment) side through which a relatively large current flows with a voltage. Conventionally, an operational amplifier has been used to generate this voltage, but in this case, the following problems occur.

When the input voltage is 3 V, for example, 2.9 V is applied by a voltage follower circuit composed of an operational amplifier.
Even if an attempt is made to obtain an output voltage up to about 2.9 V, it is not possible to output up to 2.9 V due to the limitation of the saturation region of the operational amplifier. Therefore, in order to output a voltage of 2.9 V, it is necessary to create a voltage that is boosted from an input voltage of 3 V to at least about 4 V. In this case, since the voltage once boosted is used after being reduced, a large power loss occurs.

The present invention has been made to solve the problems of the prior art, and has a power supply having a booster for generating a common-side drive voltage using a booster clock signal and a reference voltage. In the circuit, the segment side drive voltage lower than the input voltage is created by using the boosting clock signal, so that the voltage conversion efficiency is high and the power supply circuit which does not require a separate switching clock signal generation source and the power supply circuit. It is an object to provide a liquid crystal display device using the same.

[0009]

A power supply circuit according to the present invention comprises: a boosting unit to which a reference voltage and a boosting clock signal are input and for generating a voltage higher than the reference voltage by using a charging voltage for a capacitor; A power supply circuit to which a voltage generated by the booster is input and which has a first voltage generator for generating a first voltage higher than the reference voltage; a voltage obtained by dividing the first voltage by a dividing resistor; And a second voltage generator for receiving the reference voltage and the boosting clock signal and generating a second voltage lower than the reference voltage, thereby achieving the above object.

The second voltage generator includes a comparator for comparing a voltage obtained by dividing the first voltage by a dividing resistor with an output voltage from the second voltage generator, and a boosting clock. The signal and the output signal from the comparator are input, and FE
And an AND circuit for outputting an operation signal of T
A first FET connected to the output of the D circuit and having a source connected to the reference voltage; a gate connected to the output of the AND circuit; a source connected to the drain of the first FET; A second FET may be connected to an output of the second voltage generator and an input of the comparator.

The first voltage generator generates a common-side drive voltage of the liquid crystal display device, and the second voltage generator generates
A segment-side drive voltage of the liquid crystal display device may be created.

As the boosting clock signal, a liquid crystal driving signal input from the outside may be used, or a signal generated based on the liquid crystal driving signal may be used.

[0013] The liquid crystal display device of the present invention uses the power supply circuit of the present invention, thereby achieving the above object.

The operation of the present invention will be described below.

According to the present invention, a reference voltage and a boosting clock signal are input, and a boosting unit for generating a voltage higher than the reference voltage by using a charging voltage for the capacitor; A first voltage generator (VSH) that generates a first voltage (common-side drive voltage) higher than the reference voltage
A second voltage for generating a second voltage (segment-side drive voltage) lower than the reference voltage by inputting a voltage obtained by dividing the first voltage by a dividing resistor, a reference voltage, and a clock signal for boosting; And a voltage generation unit (VBH generation unit). The second voltage generator includes, for example, a comparator, an AND circuit, and two FETs. As described in an embodiment described later, a voltage obtained by dividing the first voltage by the dividing resistor and an output voltage from the second voltage generator are compared by a comparator, and the output signal and the boosting clock signal are compared. The signal is input to an AND circuit and output as an operation signal of the FET. By this operation signal, the first FET and the second FET
Of the FET is controlled, and a voltage having the same potential as the voltage obtained by dividing the first voltage by the dividing resistor is output as the second voltage. According to this configuration, unlike the related art using an operational amplifier, a large power loss does not occur, and a desired second voltage can be obtained. Further, since the boosting clock signal is used, a switching clock generation source for controlling the operation of the second voltage generator is not required separately.

As the boosting clock signal, an externally input liquid crystal driving signal may be used, or a signal generated based on the liquid crystal driving signal may be used. In this case,
No additional source of boost clock or switching clock is required.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment) FIG. 1 is a block diagram for explaining a configuration of a power supply circuit according to an embodiment of the present invention. Here, a charge pump boosting circuit of 6 times boosting is used as the boosting unit 11, and the input voltage Vin (reference voltage) is boosted to Vout = 6 times × Vin by the boosting operation by the boosting clock signal CLK input from the outside. . The booster 11 has a circuit configuration as shown in FIG. 2B, for example, and includes a switch unit 21 composed of an FET, a capacitor, a diode, and a resistor as shown in FIG. 2A. Each switch unit 21 alternately turns ON / OFF on the P-channel side and the N-channel side in synchronization with the input boosting clock signal CLK. As a result, the charging and discharging of each capacitor are repeated, and the input voltage Vin is boosted six times to output Vout.

As shown in FIG. 3, for example, the VSH generator 12 is composed of a differential amplifier circuit composed of an operational amplifier 31 using Vout as a power supply, and operates in common with an output control voltage Vcon input from the outside. The driving voltage VSH is variable.

In the next VBH generating section 15, the common-side drive voltage VSH generated in this manner is divided by the dividing resistor 13,
A segment-side drive voltage VBH lower than the input voltage Vin is generated based on the voltage Vb divided by 14 and the boosting clock signal CLK used in the booster 11. In the related art, the voltage VbH is generated by the voltage follower circuit configured by the operational amplifier. In the present embodiment, the above-described problem caused in the conventional technology is caused by the VBH generating unit 15 indicated by a broken line in FIG. Solved.

In the VBH generator 15, the comparator 16 divides the common side drive voltage VSH into the divided resistors 13, 1
4 is compared with the output voltage VBH, and when VBH> Vb, an “L” level is output.
When BH <Vb, an “H” level is output. Note that V
When BH = Vb, the state differs depending on the characteristics and configuration of the comparator used, but in the present invention, this state does not continue for a long time. In this embodiment, the dividing resistor 13,
The ratio of 14 was 5: 1.

The AND circuit 17 supplies an operation signal to the subsequent FETs 18 and 19 based on the boosting clock signal CLK supplied from the booster 11 and the output signal of the comparator 16. This operation signal is fixed at the “L” level when the output signal of the comparator 16 is at the “L” level, and the boosting clock signal CLK is output when the output signal of the comparator 16 is at the “H” level.

The FET 18 is a P-channel type FET,
FET 19 is an N-channel type FET, and FET 1
9, a resistor, a diode, and a capacitor are connected to an input signal (here, an AND circuit 17) to the gate.
This is provided for performing a level shift of an operation signal supplied from the controller. The charging capacitor 110 and the smoothing capacitor 111 are provided for stabilizing the power supply.

The operation of the power supply circuit thus configured will be described below. The input voltage Vin is 3V, the voltage Vout after boosting 6 times is 18V, and the common side drive voltage VSH is 17V.
In this case, the voltage Vb obtained by the divided resistors 13 and 14 (resistance ratio 5: 1) is 2.8V. In the initial state, the segment side drive voltage VBH is 0 V, so that VBH>
Vb, and the comparator 16 outputs the “H” level. In response to this, the AND circuit 17 outputs the boosting clock signal CLK to the FETs 18 and 19,
Repeats ON / OFF alternately. When the FET 18 is ON and the FET 19 is OFF, the charging capacitor 110
When the FET 18 is OFF and the FET 19 is ON, the charge is transferred from the charging capacitor 110 to the smoothing capacitor 111. By repeating this, the potential of the segment side drive voltage VBH is increased.

Next, when the potential of the segment side drive voltage VBH rises and exceeds the potential of the voltage Vb of 2.83 V, the comparator 16 outputs the "L" level. In response to this, the output of the AND circuit 17 is fixed at the “L” level,
The ON / OFF operation of the ETs 18 and 19 stops. FET
When the operations of 18 and 19 are stopped, the segment side drive voltage VB is supplied by supplying current to a load (for example, a liquid crystal panel) or the like.
The H potential begins to drop. Then, when the potential of the segment-side drive voltage VBH becomes lower than the potential of the voltage Vb again, the above-described operation of increasing the potential of the segment-side drive voltage VBH is performed. By repeating this, the segment side drive voltage VBH converges to the same potential as the voltage Vb, and 2.83 V is output.

According to the power supply circuit of the present embodiment, the common-side drive voltage VSH is further increased to increase the voltage Vb to 2.9V.
Even when the voltage becomes approximately the same, the same potential as the voltage Vb can be obtained as the output of the segment side drive voltage VBH. Further, even when the load on the VBH line is large (for example, several mA), the power supply is performed not by the operational amplifier but by the FET, so that the segment side driving voltage does not decrease.

FIG. 4A shows an example of a liquid crystal driving signal. In this figure, LP is a signal for horizontal scanning of the liquid crystal, and the oscillation circuit can be omitted by using a signal LP 'generated by dividing the frequency as a clock signal for boosting or switching. FIG.
As shown in (b), since the liquid crystal drive signal already has an AC signal M created from LP, it can be used as it is as a boosting or switching clock.

FIG. 5 shows an example in which the power supply circuit of the present invention is applied to a liquid crystal display device. In a liquid crystal display device, VSL is a negative (-) side voltage required to drive the liquid crystal,
It is created by inverting the polarity of VSH. This clock signal C
By using LP 'or M as shown in FIG. 4A instead of LK, the oscillation circuit can be omitted.

(Comparative Example) FIG. 6 is a block diagram for explaining the configuration of a conventional power supply circuit. Step-up unit 41, VSH
The circuit configuration and operation of the creating unit 42 and the dividing resistors 43 and 44 are the same as those of the embodiment, and the description is omitted here.

The VBH generator 45 includes a voltage Vb obtained by dividing the common side driving voltage VSH by the dividing resistors 13 and 14.
And the boosting clock signal CLK is used only by the boosting unit 41. Also, as a power supply of the operational amplifier 46,
The voltage Voph doubled from the booster 41 is supplied to the VBH generator 45.

In the VBH generating section 45, based on the input voltage Vb, an operational amplifier 46 configured as a voltage follower circuit generates a segment side driving voltage V
BH is output. 47 is a smoothing capacitor provided for stabilizing the power supply.

In the conventional power supply circuit configured as described above, the input voltage Vin (3
Since the voltage Voph obtained by boosting V) twice is used after being reduced, a large loss occurs. To avoid this loss,
When the power supply of the operational amplifier 46 is shared with the input voltage Vin (3 V), the segment-side drive voltage VBH cannot be output to 2.9 V as in the embodiment because the saturation region of the operational amplifier 46 exists. Restrictions arise. Furthermore, the potential near the power supply (in this case, 3
Some operational amplifiers can output up to V), but cannot supply a current on the order of mA.

[0033]

As described in detail above, according to the present invention,
In a power supply circuit having a booster for generating a first voltage (common-side drive voltage) higher than the reference voltage using the reference voltage and the boosting clock signal, the boosting clock signal is used. By generating the second voltage (segment-side drive voltage) lower than the reference voltage, it is possible to provide a power supply circuit that has high voltage conversion efficiency and does not require a switching clock generation source separately.

Further, by using a liquid crystal driving signal inputted from the outside or a signal generated based on the liquid crystal driving signal as the boosting clock signal, the generation source of the boosting clock or the switching clock is used. A power supply circuit with high voltage conversion efficiency can be provided without requiring a separate device.

By applying the power supply circuit of the present invention to a display device, it is possible to reduce the power consumption of the display device and extend the use time (battery life) of an electronic device equipped with the display device. it can.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a power supply circuit according to an embodiment of the present invention.

FIGS. 2A and 2B are circuit diagrams illustrating a configuration of a booster in a power supply circuit according to an embodiment.

FIG. 3 is a circuit diagram for explaining a configuration of a VSH generator in the power supply circuit of the embodiment.

FIGS. 4A and 4B are timing diagrams illustrating examples of liquid crystal driving signals.

FIG. 5 is a block diagram showing a configuration when the power supply circuit of the present invention is applied to a liquid crystal display device.

FIG. 6 is a block diagram illustrating a configuration of a conventional power supply circuit.

[Description of Signs] 11 Booster section 12 VSH creating section 13 Dividing resistor 14 Dividing resistor 15 VBH creating section 16 Comparator 17 AND circuit 18 P-channel type FET 19 N-channel type FET 21 Switch section 31 Operational amplifier 41 Boosting section 42 VSH creating Unit 43 dividing resistor 44 dividing resistor 45 VBH creating unit 46 operational amplifier 47 smoothing capacitor 110 charging capacitor 111 smoothing capacitor Vin input voltage (reference voltage) GND ground potential CLK boosting clock signal Vout 6 times boosting voltage VSH common side driving voltage VBH Segment side drive voltage VSL Liquid crystal drive signal (negative side voltage) Vb Divided potential Vcon Output control voltage Voph Power supply voltage for operational amplifier (double boosted voltage)

Continued on the front page F term (reference) 2H093 NA07 NA18 NB09 NB13 NC03 NC05 ND39 5C006 BB01 BB11 BF42 BF45 BF46 FA47 5C080 AA10 BB01 BB05 DD26 JJ02 JJ03 JJ04 5H730 AA16 AS04 AS05 BB02 BB03 BB57 BB86 DD32

Claims (5)

[Claims] A booster for receiving a reference voltage and a boosting clock signal, for generating a voltage higher than the reference voltage by using a charging voltage for a capacitor, and a voltage generated by the booster; A power supply circuit having a first voltage generator for generating a first voltage higher than the reference voltage; a voltage obtained by dividing the first voltage by a dividing resistor; the reference voltage; And a second voltage generator for generating a second voltage lower than the reference voltage. 2. The comparator according to claim 2, wherein the second voltage generator is configured to compare a voltage obtained by dividing the first voltage by a dividing resistor with an output voltage from the second voltage generator. An AND circuit for receiving a clock signal for use and an output signal from the comparator, outputting an operation signal of an FET, a gate connected to an output of the AND circuit, and a source connected to the reference voltage. An FET, a gate connected to the output of the AND circuit, a source connected to the drain of the first FET, and a drain connected to the output of the second voltage generator and the input of the comparator. The power supply circuit according to claim 1, further comprising a second FET. 3. The liquid crystal display device according to claim 1, wherein the first voltage generating unit generates a common side driving voltage of the liquid crystal display device, and the second voltage generating unit generates a segment side driving voltage of the liquid crystal display device. The power supply circuit according to claim 2. 4. The liquid crystal display device according to claim 1, wherein an externally input liquid crystal driving signal is used as the boosting clock signal, or a signal generated based on the liquid crystal driving signal is used. Power supply circuit as described. 5. A liquid crystal display device using the power supply circuit according to claim 1.