JP2002151541A - Electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent stripping of a solder film during storage. SOLUTION: A multilayer solder film 12 has a three layer structure where an Sn film 12b is sandwiched between Au films 12a and 12c. Film thickness t1, t3 of the Au films 12a and 12c is designed such that the thickness t1 of the outermost Au film 12c is less than twice of the thickness t3 of an Au film 11a touching an aluminum electrode and the substrate region 10a on the periphery thereof.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a soldering technique, and more particularly, to a structure of an Au-Sn laminated solder film formed on an electronic component such as a circuit element and a substrate.

[0002]

2. Description of the Related Art Soldering is widely used for mounting electronic components. For example, an Au-Sn alloy-based solder having a typical composition of Au-20 wt% Sn (melting point: 280 ° C.) and excellent in mechanical properties is often used for die bonding of optical elements, LSIs and the like.

By the way, as the miniaturization and high-density mounting of electronic components progress, it becomes necessary to supply an appropriate amount of solder to a finer area. Therefore, instead of the conventional solder supply method using ribbon solder or the like, a solder supply method using a lift-off method of a photoresist technique has been newly adopted. In this new solder supply method, a solder resist pattern is formed on the substrate after the barrier metal is formed using photoresist.
(Reverse pattern of solder film) is formed, and after vapor deposition of Au and Sn, the solder resist pattern is removed together with the vapor deposition film thereon to form a laminated solder film of Au film and Sn film on the barrier metal. are doing. Japanese Patent Application Laid-Open No. 9-283909 describes a technique for forming a laminated solder film of an Au film and a Sn film by using this new solder supply method. In this technique, oxidation of Sn in the laminated solder film is prevented by using the Au film as the uppermost layer of the laminated solder film. Further, by making the Sn content in the laminated solder film 20 to 38 wt%, the wettability of the solder is improved.

[0004]

However, when the uppermost layer of the laminated solder film is made of an Au film, the laminated solder film may be naturally separated from the base material with the passage of time. In particular, (1) When the laminated solder film protrudes in the peripheral region of the barrier metal to supply sufficient solder, (2) When the surface of the barrier metal is contaminated, etc.
When the adhesion between the laminated solder film and the base material is not good, such peeling is likely to occur. Then, when Sn is exposed by peeling of the laminated solder film, the Sn is oxidized, so that the wettability of the solder is reduced.

In general, the deposition of a laminated solder film is often performed on a plurality of wafers at once from the viewpoint of cost reduction and the like. For this reason, storage may be required in each of the subsequent processing steps (lift-off, cleaning, dicing, sorting, inspection, and the like). Therefore, it is desired that the occurrence of peeling of the laminated solder film during the storage period be prevented.

Accordingly, an object of the present invention is to provide an electronic component in which peeling of a solder film over time does not easily occur.

[0007]

In order to achieve the above-mentioned object, the present invention provides a method of forming a metal film including a metal film including a tin film between two layers of a gold film which is farther from a base material. The thickness of the gold film closer to the base material is set to be twice or less.

Hereinafter, specific embodiments of the present invention will be described. However, the configurations cited therein have as many degrees of freedom as possible in combination, and any combination thereof constitutes the invention. . That is, an embodiment in which a part of the configuration is appropriately deleted from the embodiment described below can be another embodiment of the present invention.

[0009]

Embodiments of the present invention will be described below with reference to the accompanying drawings.

First, the structure of the electronic component according to the present embodiment will be described with reference to FIG. Here, a circuit board is given as an example of the electronic component.

The electronic component according to the embodiment is shown in FIG.
As shown in FIG. 1, a substrate having one or more aluminum electrodes (not shown) (for example, a silicon substrate, a ceramic substrate, an organic printed board, etc.) 10, a multilayer metal film (barrier metal) 11 formed on each electrode, Laminated solder film 1 formed on each barrier metal 11 and surrounding substrate surface 10a
2.

The barrier metal 11 has a three-layer structure. Lowermost layer 11 in contact with aluminum electrode of substrate 10
The film-forming material a is made of Ti having high adhesion to the electrode material.
Alternatively, Mo—Mn is used, and Au having high adhesion to the solder material is used as a film forming material of the uppermost layer 11 c that comes into contact with the laminated solder film 12. Also, the intermediate layer 11
Pt or Ni for preventing the diffusion of Au from the Au film 11c is used as the film forming material b.

The laminated solder film 12 is a two-layer Au film 12
It has a three-layered structure in which an Sn film 12b is interposed between a and 12c. Each metal film 1 constituting the laminated solder film 12
The film thicknesses t ₁ , t ₂ , and t ₃ of 2a, 12b, and 12c indicate that the average composition of the laminated solder film 12 is the eutectic composition of the Au—Sn based solder alloy.
(Au-20 wt% Sn).
The thicknesses t ₁ , t ₃ of the Au films 12a, 12c satisfy the above conditions, and furthermore, the Au film 12
c thickness t ₁ is, 0.5 [mu] m or more, and a barrier metal 1
Film 1 in contact with substrate region 1 and its surrounding substrate region 10a
It is designed to be less than twice the thickness t ₃ of 2a. In the present embodiment, as described above, in the three-layer laminated solder film 12, two A layers sandwiching the Sn film 12 b are provided.
The reason why the design thicknesses t ₁ and t ₃ of the u films 12a and 12c are set will be described below with reference to experimental results.

The thickness ratio t _{1/2 of the} two Au films 12a and 12b
a silicon substrate t ₃ are different laminated solder film 12 is formed to each other (Sample # 1 - # 6) was allowed to stand in a room temperature atmosphere, wait three months from the deposition, each sample ♯1~
The laminated solder film 12 of # 6 was observed. Table 1 shows the results.

[0015]

[Table 1]

As can be seen from Table 1, the outermost Au film 1
2c the thickness t ₁ of, for Au film 12a samples ♯1~♯3 that a thickness t ₃ following contacting the substrate surface, peeling of the solder laminated film from the substrate 10 was observed.
That is, the laminated solder film 1 with the lapse of time from the evaporation
It was confirmed that peeling of No. 2 was prevented. The reason is,
It is estimated as follows.

When two metals are brought into close contact, diffusion occurs between the two metals. Therefore, between the Sn film 12b and the Au films 12a and 12c adhered to each other as shown in FIG.
Diffusion of Sn into Au film 12a, 12c from Sn film 12
The diffusion of Au into b occurs. However, the rate of diffusion into a metal generally increases as the temperature of the metal approaches the melting point. Therefore, in an atmosphere at room temperature (5 ° C. to 35 ° C.), the diffusion rate of Au into Sn having a melting point of 232 ° C. is higher than that of Au having a melting point of 1064 ° C. Therefore, the laminated solder film 1 is placed in an atmosphere at room temperature.
2 is left as it is, with the passage of time, the Sn film 12b
Gradually increases, and the upper and lower two layers of Au film 1 sandwiching the volume gradually increase.
2a and 12c gradually decrease. As a result, a force is generated between the uppermost Au film 12a and the Sn film 12b in a direction to warp the laminated solder film 12 to the substrate 10 side,
Au film 12a and Sn film 11b in contact with substrate surface 10a
A force is generated between the first and second directions to warp the laminated solder film 12 to the side opposite to the substrate 10.

However, if the Au film 12c as the outermost layer and the Au film 11a in contact with the substrate surface are designed to have substantially the same thickness (t ₁ ≒ t ₃ ), as shown in FIG. Since the relative shrinkage of each of the Au films 12a and 12c with respect to the Sn film 11b becomes substantially equal, the laminated solder film 12 is
The force that causes the laminated solder film 12 to warp convexly to the side and the force that warps the laminated solder film 12 to the side opposite to the substrate cancel each other. For this reason, stress in the direction in which the laminated solder film 12 is peeled from the substrate is not generated in the laminated solder film 12, and peeling of the laminated solder film with the passage of time from vapor deposition is prevented.

As shown in FIG. 2A, the outermost layer A
Au film 12a is in contact with substrate surface 10a.
If it is thinner (t ₁ <t ₃ ), as shown in FIG. 2B, the uppermost Au film 12c disappears before the Au film 12a in contact with the substrate surface 10a. That is, A which generates a force to warp the laminated solder film 12 to the substrate 10 side
The u film 12c disappears before the Au film 12a which generates a force to warp the laminated solder film 12 to the side opposite to the substrate. For this reason, stress in the direction in which the laminated solder film 12 is peeled off from the substrate 10 is not generated in the laminated solder film 12, and peeling of the laminated solder film with the passage of time from vapor deposition is prevented.

On the other hand, the thickness t of the outermost Au film 12c
_1, as shown in FIG. 3 (A), sample ♯4~♯ that the Au film 12a thickness t ₃ or more in contact with the substrate surface 10a
With regard to No. 6, as shown in Table 1, the following changes were observed.

In sample # 4, in which the thickness t ₁ of the outermost Au film 12c was twice the thickness t ₃ of the Au film 12a in contact with the substrate, no peeling of the laminated solder film was observed. As shown in FIG. 3B, only samples # 5 and # 6 in which the thickness t ₁ of the outer Au film 12c is larger than twice the thickness t ₃ of the Au film 12a in contact with the substrate surface 10a are shown in FIG. Then, peeling of the laminated solder film 12 from the substrate surface 10a was observed. That is, even if the thickness t ₁ of the outermost Au film 12c is larger than the thickness t _{3 of} the Au film 12a in contact with the substrate surface 10a, the thickness t _{3 of} the Au film 12a in contact with the substrate surface 10a.
It is confirmed that when the value is not more than twice the peeling of the laminated solder film 12 from the substrate surface 10a is prevented. The reason is presumed as follows.

The outermost Au film 12c is formed on the substrate surface 10a.
If the thickness of the Au film 12a is larger than that of the Au film 12a that contacts the substrate surface 10 (t ₁ > t ₃ ), the Au film 12a that contacts the substrate surface 10a disappears before the Au film 12c of the uppermost layer (for example, FIG. B)).
In other words, the Au film 12c that generates a force to warp the laminated solder film 12 to the side opposite to the substrate 10 disappears before the Au film 12a that generates a force to warp the laminated solder film 12 to the substrate 10 side. . Therefore, the substrate surface 10a
Then, a stress in a direction in which the laminated solder film 12 is peeled off is generated in the laminated solder film 12. If the thickness t ₁ of the outermost Au film 12c is larger than twice the thickness t ₃ of the Au film 12a in contact with the substrate surface 10a, as shown in FIG.
The force generated by the uppermost Au film 12c remaining after the disappearance of the Au film 12a in contact with the substrate surface 10a becomes larger than the adhesion between the laminated solder film 12 and the substrate surface 10a,
It is considered that the laminated solder film 12 starts peeling from the outer edge portion. However, the thickness t of the outermost Au film 12c
₁ is the thickness t _{3 of} the Au film 12a in contact with the substrate surface 10a.
If the thickness is not more than twice, the adhesion force between the laminated solder film 12 and the substrate surface 10a withstands the force generated by the Au film 12c of the uppermost layer remaining after the disappearance of the Au film 12a in contact with the substrate surface 10a, It is considered that peeling of the laminated solder film 12 from the surface 10a is prevented.

As described above, the three-layer laminated solder film 1
2, Au films 12a and 12c sandwiching Sn film 12b
By setting the design film thicknesses t ₁ , t ₃ to satisfy the condition of t ₁ ≦ 2t ₃ , the peeling of the laminated solder film with the passage of time from the deposition on the silicon substrate is prevented. Was confirmed by experiments. Similar to the silicon substrate, it is considered that the same result as described above can be obtained for a substrate (a ceramic substrate, an organic printed board, or the like) made of a material having poor adhesion to solder. Therefore, in the present embodiment, based on this finding, the outermost Au film 12c
Design the film thickness t _1, the Au film 11a in contact with the barrier metal and the substrate region 10a near its design thickness t ₃ 2
It is set at twice or less to prevent peeling of the laminated solder film with the passage of time from the vapor deposition.

In the case where the uppermost Au film of the laminated solder film 12 is a vapor-deposited film, if its thickness t ₁ is about 0.5 μm, it may take several months corresponding to the storage period between processing steps after vapor deposition. Has the effect of preventing electrode oxidation. Therefore, in the present embodiment, the design thickness t ₁ of the outermost Au film 12c is set to 0.5 μm.
m to prevent oxidation of the electrodes during the storage period.

Next, a method of manufacturing the electronic component of FIG. 1 and a method of manufacturing a circuit device including the electronic component will be described with reference to FIG.

A solder resist pattern (inverted pattern of the laminated solder film 12) is formed with a photoresist on a substrate 10 such as a silicon substrate on which the barrier metal 11 has been previously formed (S40). Barrier metal 11 and its peripheral region 10
The substrate area other than a is covered with the solder resist pattern formed at this time.

Thereafter, the substrate 10 is set in a reaction vessel of a vapor deposition device. Then, the substrate 1 is formed by electron beam (EB) evaporation, resistance heating evaporation, sputtering, or the like.
A metal film that satisfies the above-described conditions is deposited on O in the order of Au, Sn, and Au (S41). In this way, Au /
After the Sn / Au laminated metal film is formed on the substrate 10, the substrate 10 is ultrasonically cleaned in an organic solvent such as acetone.
(S42). Thereby, the solder resist pattern is removed together with the laminated metal film thereon, and the laminated metal film remains as the laminated solder film 12 only on the barrier metal 11 and the outer peripheral region 10a.

Thereafter, the substrate 10 is dried (S4
3) A wax is applied to the back surface of the substrate 10 (the surface opposite to the surface on which the laminated solder film is formed), and the substrate 10 is fixed on a worktable by the adhesive force of the wax. Then, dicing of the substrate 10 is performed (S44). The separated electronic components of an appropriate size are subjected to ultrasonic cleaning in an organic solvent to remove wax (S45). Thereby, the electronic component of FIG. 1 is completed.

The electronic components manufactured in this way are sorted and stored (S46), and are appropriately sent to a subsequent step such as an element connecting step. However, the laminated solder film 12 formed on the electronic component has a thickness of a metal film constituting the laminated solder film 12.
Since the above-mentioned condition is satisfied, there is little possibility of peeling from the substrate 10 during this storage period. Therefore, it is possible to stably supply an electronic component having the laminated solder film 12 containing no oxide in the element connecting step. as a result,
In the element connection step, a good solder connection portion can be formed as described below.

As shown in FIG. 5A, the electrode pad 51 of the element 50 is pressed against the laminated solder film 12 of the electronic component. Thereby, the electrode pad 51 of the element 50 is temporarily fixed to the laminated solder film 12 of the electronic component.
(S47).

Thereafter, by performing main heating in the reflow, the laminated solder film 12 of the electronic component is melted (S4).
8). As described above, in the present embodiment, since the formation of oxides in the laminated solder film 12 of the electronic component during storage is prevented, the molten solder generated by the main heating is
Electrode pad 51 of element 50 and barrier metal 1 of electronic component
1 and spread enough to get wet. The molten solder on the outer periphery of the barrier metal 11 is also repelled by the surface of the substrate and gathers between the barrier metal 11 of the electronic component and the electrode pad of the element. Therefore, as shown in FIG. 5B, a sufficient amount of molten solder 52 is supplied between the barrier metal 11 of the electronic component and the electrode pad of the element, and a good solder joint is formed. Then, after that, necessary steps (for example, sealing step etc.)
Through this, the electronic device is completed.

In the above description, a three-layer structure of Au / Sn / Au is described as the structure of the laminated solder film. However, the laminated solder film formed on the electronic component according to the present embodiment is not necessarily Au. It does not need to have a three-layer structure of / Sn / Au. For example, as shown in FIG. 6A, an Au film 12a directly in contact with the barrier metal 11 and the like and an uppermost layer A
an intermediate layer interposed between the u film 12c, rather than the Sn film single layer, multilayer film 12 and Au film 12b ₁ and Sn film 12b ₂
It may be b '. In this case, the laminated solder film 12
Is divided into two regions on the surface passing through the position of half the thickness t / 2 of the film thickness t, the region 60 farthest from the substrate 10
The total thickness of the Au film included in the upper half region 60 (hereinafter, referred to as the upper half region 60 of the laminated solder film 12) is equal to the Au film included in the remaining half region 61 (hereinafter, referred to as the lower half region 61 of the laminated solder film 12). It is necessary that the total thickness of the film is twice or less. Thus, each Au film 12a,
12c, by setting the design thickness of 12b _1, why delamination of laminated solder layer 12 from the substrate is prevented,
Hereinafter, description will be made with reference to experimental results.

The ratio T ₁ / T ₃ of the total thickness T ₁ of the Au film in the upper half region 60 to the total thickness T ₃ of the Au film in the lower half region 61.
The silicon substrate (samples # 7 to # 9) on which the laminated solder films 12 different from each other were formed was allowed to stand in the air at room temperature, and three months after the vapor deposition, the laminated solder of each of the samples # 7 to # 9 The film 12 was observed. Table 2 shows the results.

[0034]

[Table 2]

As can be seen from Table 2, the samples # 7 and # 8 in which the total thickness T ₁ of the Au film in the upper half region 60 was twice or less than the total thickness T ₃ of the Au film in the lower half region 61. Regarding the test, no peeling of the solder laminated film from the substrate 10 was observed. That is, it was confirmed that peeling of the laminated solder film 12 with the passage of time from the vapor deposition was prevented. The reason is presumed as follows.

An intermediate layer 12b 'interposed between the Au film 12a directly in contact with the substrate surface and the uppermost Au film 12c.
Is a multilayer film having a large contact area between the Sn film and the Au film, so that the film is more uniform than the Au film 12a and the uppermost Au film 12c in direct contact with the substrate surface within a short time after the deposition, and FIG. An alloy film as shown in B) is obtained.

When the total thickness T ₁ of the Au film in the upper half region 60 and the total thickness T ₃ of the Au film in the lower half region 61 are designed to be substantially the same (T ₁ ≒ T ₃ ). Is the middle layer 12
Upper and lower two Au films 12a and 12c remaining after b 'is uniform
It is considered that the volumes of the Au films 12a and 12c relative to the intermediate layer 12c 'after the uniformization become substantially equal. For this reason, for the same reason as in the case of the laminated solder film having a three-layer structure, it is considered that peeling of the laminated solder film with the passage of time from the vapor deposition is prevented.

When the total thickness T ₁ of the Au film in the upper half region 60 is designed to be smaller than the total thickness T ₃ of the Au film in the lower half region 61 (T ₁ <T ₃ ). In the middle layer 12
After the uniformization of c ′, it is considered that the uppermost Au film 12c disappears before the Au film 12a in contact with the substrate surface 10a. For this reason, for the same reason as in the case of the laminated solder film having a three-layer structure, it is considered that peeling of the laminated solder film with the passage of time from the vapor deposition is prevented.

Even if the total thickness T ₁ of the Au film in the upper half region 60 is designed to be larger than the total thickness T ₃ of the Au film in the lower half region 61, A
If the total thickness T ₁ of the u film is not more than twice the total thickness T ₃ of the Au film in the lower half region 61 (T ₃ <T ₁ ≦ 2T ₃ ), after the uniformization of the intermediate layer 12 c ′, Au film 1 in direct contact with the substrate surface
2a disappears before the uppermost Au film 12c,
As in the case of the three-layered laminated solder film, it is considered that the adhesive force between the laminated solder film 12 and the substrate surface 10a withstands the force generated by the remaining uppermost Au film 12c. Therefore, it is considered that peeling of the laminated solder film 12 from the substrate surface 10a is prevented.

On the other hand, as shown in FIG. 7A, the total thickness T ₁ of the Au film in the upper half region 60 is smaller than the Au film in the lower half region 61.
For sample # 9 designed to be thicker than twice the total film thickness T _3, the laminated solder film 1 shown in FIG.
2 was observed. The reason is presumed as follows. If the total thickness T ₁ of the Au film in the upper half region 60 is larger than twice the total thickness T ₃ of the Au film in the lower half region 61 (T ₁ > 2T ₃ ), the uniformity of the intermediate layer 12 c ′ is obtained. It is considered that the force generated by the uppermost Au film 12c remaining after the formation becomes larger than the adhesion between the laminated solder film 12 and the substrate surface 10a. Therefore, similar to the three-layer laminated solder film,
It is considered that the laminated solder film 12 starts peeling from the outer edge portion.

As described above, even when the laminated solder film has a multilayer structure of three or more layers, the A
By setting the total film thickness T ₁ of the u film to twice or less the total film thickness T ₃ of the Au film in the lower half region 61, it is possible to prevent the laminated solder film from being peeled over time from the vapor deposition. ,
Confirmed by experiment.

Although the embodiments of the present invention have been described by taking a circuit board as an example, the present invention is not limited to a circuit board as long as it is an electronic component on which a solder film is formed. The present invention is also applicable to electronic components (such as circuit elements).

[0043]

According to the present invention, it is possible to prevent solder film peeling over time.

[Brief description of the drawings]

FIG. 1A is a cross-sectional view of a laminated solder film portion of an electronic component according to an embodiment of the present invention, and FIG. 1B is a cross-sectional view of the same portion after a lapse of several months from vapor deposition.

FIG. 2A is a cross-sectional view of a laminated solder film portion of a sample electronic component for confirming the effect of preventing peeling of the laminated solder film, and FIG. 2B is a cross-sectional view of the same portion after several months from vapor deposition. FIG.

3A is a cross-sectional view of a laminated solder film portion of a sample electronic component for confirming the effect of preventing peeling of the laminated solder film, and FIG. 3B is a cross-sectional view of the same portion after several months from vapor deposition. FIG.

FIG. 4 is a flowchart including a manufacturing process and a subsequent process of the electronic component according to the embodiment of the present invention.

FIG. 5A is a diagram showing a state in which an electrode pad of an element is temporarily fixed on a laminated solder film of an electronic component according to an embodiment of the present invention, and FIG. FIG. 4 is a diagram showing a state in which a laminated solder film is melted.

FIG. 6A is a cross-sectional view of a layered solder film portion of an electronic component according to an embodiment of the present invention, and FIG. 6B is a cross-sectional view of the same portion after a lapse of several months from vapor deposition.

FIG. 7A is a cross-sectional view of a laminated solder film portion of a sample electronic component for confirming the effect of preventing peeling of the laminated solder film, and FIG. 7B is a cross-sectional view of the same portion after several months from vapor deposition. FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Substrate 11 ... Barrier metal 12 ... Laminated solder film 12a ... Au film 12b ... Sn film 12b '... Intermediate layer which consists of Sn film and Au film 12c ... Au film

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Masahide Tokuda 1-280 Higashi Koigakubo, Kokubunji-shi, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd. (72) Inventor Mari Mari Matsuyoshi 216 Totsukacho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd.Communications Division (72) Inventor Toshiyuki Mogi, Kanagawa Prefecture, Yokohama, Totsuka-ku, Tokyo, Japan 216 Totsuka-cho, Ltd. Hitachi, Ltd. Hitachi, Ltd.Communications Division (72) Inventor Toru Nishikawa 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside of Hitachi, Ltd. F-term in Hitachi, Ltd. Production Engineering Laboratory (reference) 5E319 AA03 AB05 AC01 BB01 BB09 CC22 CD26 GG03

Claims (5)

[Claims] 1. An electronic component comprising a base material and a solder material formed on the base material, wherein the solder material comprises: a first gold film; and the base material with the first gold film interposed therebetween. A tin film formed on the opposite side of the first gold film and having a thickness of twice or less the thickness of the first gold film formed on the opposite side of the first gold film with the tin film interposed therebetween. An electronic component comprising: a second gold film; 2. An electronic component having a base material and a solder material formed on the base material, wherein the solder material includes a first gold film, a gold film, and a tin film from the base material side. A layer formed by laminating, and a second gold film, in this order, a gold film closer to the second gold film than the first gold film and the second gold film Wherein the total thickness of the first gold film and the gold film closer to the first gold film than the second gold film is twice or less. 3. The electronic component according to claim 1, wherein the second gold film has a thickness of 0.5 μm or more. 4. A method for manufacturing an electronic component, comprising: manufacturing an electronic component having a base material and a solder material formed on the base material, wherein the base material includes a first gold film, a tin film, The thickness of the gold film 2
A method for manufacturing an electronic component, comprising a step of laminating a second gold film having a thickness of twice or less in this order. 5. A method of manufacturing an electronic component, comprising: manufacturing an electronic component having a base material and a solder material formed on the base material, wherein the base material includes a first gold film, a gold film, and tin. The laminated film of the film, the second gold film, the total thickness of the gold film and the second gold film closer to the second gold film than the first gold film, the second gold film Laminated so that the total thickness of the gold film closer to the first gold film than the film and the total thickness of the first gold film is twice or less,
Manufacturing method of electronic components.