JP2002124615A - Lead frame for semiconductor device, and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a lead frame for a semiconductor device, which can be inexpensively manufactured and in which inner leads can be formed with high density and high accuracy. SOLUTION: An inner lead main part 3b is formed by etching or by punch processing, and a V-shaped groove 6 is formed on a part 23 to be a mutual boundary between the main part and an end part scheduled region 21 in the front thereof. Subsequently, the opposite surface of the region 21 is ground to reach the V-shaped groove 6, then a common region 22 in the front of the region 21 is punched, to separately form an inner lead part 3a.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for a semiconductor device constituting a package for mounting a highly integrated circuit chip and a method of manufacturing the same, and in particular, has a good stamping stability and a high reliability even in miniaturization. The present invention relates to an inexpensive lead frame for a semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art The above-described lead frame for a semiconductor device is
Generally, it is formed by progressive punching using a press. However, this punching process increases the cost of the mold and increases the number of inner leads, which complicates the mold and makes it difficult to mold the lead frame to the desired accuracy. There is a problem that is limited.

On the other hand, in addition to the above-described punching, a lead frame is also formed by a photoetching method. This photoetching method has the advantage that the tool cost is low and the range of application is wide, but on the other hand, there is a problem that the manufacturing cost is considerably high due to the complicated processing steps. In the photo-etching method, at least 90% of the thickness of the metal conductor is required as the minimum distance between the tips of the inner leads. If the rate is less than 90%, it becomes difficult to form the tip shape, resulting in poor productivity. .

In order to further arrange the inner leads at a high density, it is necessary to use a mounting method such as tape automated bonding (TAB).
When the number of products is small, the cost is considerably high, and there are drawbacks that require advanced techniques for handling and assembling operations.

[0005]

Therefore, the tips of the inner leads are integrally formed in a state where they are connected to each other by etching or punching, and the tips are cut using a CO ² laser or a YAG laser. By
Attempts have been made to achieve an inner lead tip spacing of 0.080 mm.

However, in this case, in order to prevent the metal conductor melted and removed by the laser from adhering to the workpiece, it is necessary to blow a large amount of gas such as N ² onto the processing portion. There was a problem that the cost was high.

Further, it is not possible to completely prevent the melted and removed metal conductor from adhering to the workpiece, and there are many practical problems such as irregularities being generated on the cut surface by the laser.

Furthermore, in the conventional etching process, if the tip pitch of the inner lead is reduced, the cross section of the tip of the inner lead has a trapezoidal shape in which the width on the side to which the bonding wire is connected is larger than the width on the back side. become. This tendency becomes more remarkable as the pitch of the tip of the inner lead is made smaller. Therefore, when a bonding wire is connected to the tip of the inner lead, there is a problem that the connection part is likely to be twisted to cause a connection failure.

An object of the present invention is to provide a lead frame for a semiconductor device and a method for manufacturing the same, in which the manufacturing cost is low and the inner leads can be formed with high density and high precision, and the above-mentioned problems are solved. The purpose is.

[0010]

Means for Solving the Problems In order to achieve the above object, the present invention is configured as follows.

(1) A lead frame for a semiconductor device according to the present invention is a lead frame for a semiconductor device in which a plurality of inner leads are arranged toward a mounting portion of a highly integrated circuit chip. The part is formed by forming a V-groove from one surface at a position to be a mutual boundary of the predetermined region of the front end portion, and the other surface is ground to reach the V-groove to separate the front end portion. And a flat surface that has been subjected to (1).

A lead frame for a semiconductor device according to the present invention comprises:
It has good stamping stability and high reliability even when miniaturized, and has a structure that can be manufactured at low cost.
As the degree of miniaturization, for example, the thickness of the metal conductor of the inner lead is 0.10 mm or more and 0.25 mm or less, the tip pitch of the tip is 0.135 mm or more and 0.200 mm or less, and the tip width is 0.09 mm or more. (Claim 2).

(2) In the method of manufacturing a lead frame for a semiconductor device according to the third aspect of the present invention, an inner lead having a tip portion to which a bonding wire is connected and an inner lead trunk is directed toward a mounting portion of a highly integrated circuit chip. In a method of manufacturing a lead frame for a semiconductor device in which a plurality of rows are arranged, an inner lead trunk is formed by etching or punching, and a V-groove is formed at a location that is to be a mutual boundary of a front end scheduled area ahead of the inner lead trunk, Then, the surface opposite to the predetermined end portion area is ground until the surface reaches the V-groove, and thereafter, the common region ahead of the predetermined front end portion region is punched out to separately form the front end portion of the inner lead.

According to this manufacturing method, the tip of the lead can be separated only by inexpensive machining, and there is no unevenness in the cross section of the lead unlike cutting by a laser. it can.

(3) In the method of manufacturing a lead frame for a semiconductor device according to the present invention, the inner lead having the tip portion to which the bonding wire is connected and the inner lead trunk is directed toward the mounting portion of the highly integrated circuit chip. In the method of manufacturing a lead frame for a semiconductor device in which a plurality of rows are arranged, the inner lead trunk portion is formed by etching or punching, leaving the end scheduled region of the inner lead and the common region ahead thereof in a continuous state,
By etching or punching, a V-groove is formed from one surface at a position to be a mutual boundary between the predetermined front end regions, and then the opposite surface of the predetermined front end region is subjected to the V-shaped groove.
Grinding is performed until the groove reaches the groove, and thereafter, the common region ahead of the predetermined region of the front end portion is punched to separate and form the front end portion of the inner lead.

The manufacturing method according to the fourth aspect is different from the third aspect in that the formation of the V-groove and the formation of the inner lead trunk portion are as follows.
In the third aspect of the present invention, the steps are performed simultaneously in the same etching or punching step, whereas in the manufacturing method of the fourth aspect, the steps are performed with a time lag in the separate etching or punching steps. The function and effect are the same, and the case of the manufacturing method of claim 4 is the same as that described above. That is, the leading end of the lead can be separated only by inexpensive machining, and there is no unevenness in the cross section of the lead unlike cutting by a laser, so that there is a specific effect that the lead frame can be manufactured efficiently and at low cost.

(4) In the method of manufacturing a lead frame for a semiconductor device according to the fifth aspect of the present invention, the V-groove may be 80% of a plate thickness.
It is characterized by performing the above.

According to this feature, the grinding amount is reduced,
It is possible to reduce the grinding time and the consumption of the grinding material.

(5) In the method of manufacturing a lead frame for a semiconductor device according to the invention of claim 6, the tip portion before the V-groove is subjected to half-etching in advance to reduce the thickness of the portion to be processed in advance. It is characterized in that

According to this feature, as a result of reduction in the volume of the portion to be processed, it is possible to reduce the grinding and the grinding time.

[0021]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

In terms of dimensions, the lead frame of the present embodiment comprises a metal conductor having a thickness of 0.10 mm or more and 0.25 mm or less for forming a package for mounting a highly integrated circuit chip. In a lead frame arranged in a plurality of rows toward a chip mounting portion, the tip of an inner lead to which a bonding wire is connected is
It is separated from each other by the formation of the groove and the grinding process from the back side, so that the tip pitch is 0.135 mm or more and 0.200 mm
Hereinafter, it is formed to have a tip width of 0.09 mm or more.

In addition, the manufacturing method of the present embodiment has a thickness of 0.10 mm because it is configured in a package for mounting a highly integrated circuit chip in terms of the dimensions of the lead frame.
In a method of manufacturing a lead frame in which a plurality of metal conductors of 0.25 mm or less are arranged toward a high-integrated circuit chip mounting portion, etching is performed without cutting off the tips of inner leads to which bonding wires are connected. And, at the same time as the inner lead trunk is integrally formed by punching, a V-groove is formed in the tip end scheduled area,
By grinding the opposite surface provided with the V-groove, the tip pitch is 0.15 mm or more and 0.200 mm or less, and the tip width is 0.0
Grinding to 9 mm or more to form the tip part halfway (cutting the side part of the tip part), then punching out a common area ahead of the expected tip part area to completely separate and form the tip part Things.

FIG. 6 is a plan view showing a lead frame 1 for a semiconductor device according to an embodiment of the present invention, and FIG. 7 is a view showing a state in which a highly integrated circuit semiconductor chip C as a highly integrated circuit chip is mounted. It is.

The lead frame 1 includes a semiconductor chip C
And a metal conductor 2 having a thickness of 0.10 mm or more and 0.25 mm or less is moved toward the semiconductor chip mounting portion 9 formed at the center of the package. From a plurality of lines. The lead frame 1 is covered with a resin, ceramics, or the like, and has an inner lead 3 to which a bonding wire 11 is connected to a tip 3a, and an outer lead connected to the inner lead 3 and exposed to the outside of the package 12. have. As the metal conductor forming the lead frame 1, an iron-nickel alloy or a copper alloy is preferably used.

The inner lead 3 has a tip 3a to which the bonding wire 11 is connected and an inner lead trunk 3b. The tip 3a of the inner lead 3
(The part up to about 0.8mm from the tip) is the tip pitch P
Is set to 0.135 mm or more and 0.20 mm or less, and the tip width D is set to 0.09 mm or more. The lower limit of the tip width D of the inner lead 3 is determined in consideration of the minimum width required for bonding.
It is formed wider than b.

Next, a method of manufacturing the lead frame having the above configuration will be described with reference to the process chart of FIG.

First, using the progressive die for the lead frame,
The inner lead 3 is formed halfway. That is, as shown in FIG. 2, the inner lead trunk portion 3b is formed by etching or punching, and the front end scheduled region 21 of the inner lead 3 and the common region 22 beyond the same are left in a continuous state (FIG. a)). As described above, the lead frame 1 is integrally formed by etching or punching while leaving the distal end portions 3a of the inner leads 3 in a continuous state.

At the same time as the above-mentioned etching or punching processing for forming the inner lead trunk 3b, one side, that is, the chip mounting surface 4 is enlarged from FIG. V as shown
A groove 6 is provided (FIG. 1B). Here, the tip pitch is 0.
First, a V-groove 6 is formed in order to form a product having a length of 135 mm or more and 0.200 mm or less and a tip width of 0.09 mm or more.

The V-groove processing is performed by forming a V-shaped portion having a depth of 80% or more of the thickness of the material in the predetermined region 21 at the end portion of the inner lead 3.
This is performed so that the groove 6 is formed. Set the depth of the V groove 6 to 8
The reason for setting it to 0% or more is that if it is less than 80%, the amount of material to be ground increases, loss such as grinding time and consumption of the grinding material increases, leading to an increase in lead frame cost. In addition, the increase in the amount of grinding reduces the thickness of the distal end portion 3a, which greatly changes the conditions for mounting and packaging the chip.

Next, the surface opposite to the expected end portion area 21, that is, the chip mounting back surface 5 is ground (polished and removed) to the grinding removal line L reaching the V-groove 6 to obtain a desired tip shape (FIG. 1). (C)). FIG. 3 shows the removed portion 7 reaching the V groove 6. By this polishing step, the distal end portion 3a separated at the portion 23 that should be the boundary between the expected distal end portions 21 is obtained. However, the tip 3a is located in the common area 22.
Then it is still in a continuous state.

That is, in this polishing step, the opposite surface on which the V-groove processing has been performed is ground and removed in the longitudinal direction of the strip material (ground removal portion 7), so that the formation of the tip portion 3a is performed halfway. Do. At this time, the pitch P and the lead interval S of the lead tips are formed, but the tip portions 3a are still connected continuously.

Thereafter, the lead frame 1 in the above-described state is wound on a dedicated reel, and then is washed under a reel-to-reel (Real to Real) system to remove abrasive powder. Plating is performed on the tip of the lead in order to enhance the wire bonding property (FIG. 1D).

Lead frame 1 after cleaning and plating
As shown in FIG. 4, depending on the shape of the semiconductor chip to be mounted, the semiconductor chip fixing tape 8 is pasted and depressed from a predetermined area, for example, from the expected front end area 21 to the common area 22 (FIG. 1 (e)). )).

At the same time as or after the application of the semiconductor chip fixing tape 8 and the depressing process, the common region 22 ahead of the expected front end portion 21 is punched out (FIG. 1).
(F)). Thereby, the inner lead tip portion 3a is completely separated and formed. That is, by punching out the common region 22 ahead of the distal end portion 3a, not only the lateral side of the distal end portion 3a but also the distal end side is cut off, and finally the lead distal end portions 3a arranged at high density are completed.

As shown in FIG. 5, the completed inner lead has, as shown in FIG. 5, a side surface 31 formed by forming a V-groove 6 from one surface at a position to be a mutual boundary between the end scheduled regions, And a flat surface 32 whose tip is cut off by grinding the other surface until it reaches the V-groove.

In the above embodiment, the step of forming the V-groove 6 is performed simultaneously with the etching or punching process for forming the inner lead trunk 3b. However, a separate etching or punching process following the step of forming the inner lead trunk 3b is performed. The V groove 6 can also be formed by processing.

Further, instead of grinding the tip end scheduled region 21 to the grinding removal line L, the grinding removal portion 7 can be removed by a chemical method.

Since the present invention employs a technique of polishing a metal strip, it can be applied to the formation of a deformed material.

[0040]

As described above, according to the manufacturing method of the present invention (claims 3 to 6), the tip of the inner lead is formed by etching or punching at the same time as forming the inner lead trunk, or by etching or punching separately therefrom. A V-groove is formed at a location that is to be a boundary between the predetermined portions, and then the opposite surface of the predetermined portion is ground until the V-groove is reached. Since the tip of the inner lead is separated and formed by punching, the tip of the lead can be separated only by inexpensive machining, and there is no unevenness in the cross section of the lead unlike cutting by laser. And at low cost.

In particular, in the case where the tip of the inner lead is subjected to half-etching to reduce the thickness of the portion to be processed in advance (claim 6), the volume of the portion to be processed is reduced, resulting in grinding and grinding. The cutting time can be reduced and improved, and the manufacturing cost can be further reduced.

Further, according to the lead frame of the present invention and the method of manufacturing the same (claims 1 to 5), the tip of the inner lead has a tip pitch of 0.135 mm or more and 0.200 mm or less.
High-density arrangement with a tip width of 0.09 mm or more can be realized.

[Brief description of the drawings]

FIG. 1 is a flowchart showing a manufacturing method of the present invention.

FIG. 2 is a diagram showing a state in which the formation of an inner lead trunk portion and the processing of a V-groove are performed in a region where the tip of the inner lead is to be formed in accordance with the manufacturing method of the present invention.

FIG. 3 is a sectional view showing a V-groove and a grinding depth applied to a predetermined region of a tip end of an inner lead.

FIG. 4 is a view showing a state in which a chip fixing tape is attached to the lead frame in a processed state in FIG. 2;

FIG. 5 is a cross-sectional view of a completed lead tip portion obtained by punching out a common area ahead of a tip end scheduled area in FIG.

FIG. 6 is a view showing a semiconductor device lead frame to which the present invention is applied;

FIG. 7 is a view showing a state where a semiconductor chip is mounted on a lead frame of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Lead frame 3 Inner lead 3a Tip part 3b Inner lead trunk 6 V groove 7 Grinding removal part 8 Fixing tape 9 Semiconductor chip mounting part 10 Semiconductor chip 21 Predetermined tip part area 22 Common area 23 Location to be a boundary D Tip width L Grinding removal line P Tip pitch S Lead spacing

Claims (6)

[Claims] 1. A lead frame for a semiconductor device in which a plurality of inner leads are arranged toward a mounting portion of a highly integrated circuit chip, wherein a tip of an inner lead to which a bonding wire is connected is a mutual boundary of a predetermined region of the tip. A side surface formed by forming a V-groove from one surface at a location where
A lead surface for grinding the other surface to reach the V-groove and cutting off a tip portion thereof. 2. The thickness of the metal conductor of the inner lead is 0.10 mm or more and 0.25 mm or less, the tip pitch of the tip is 0.135 mm or more and 0.200 mm or less, and the tip width is 0.09 mm or more. 2. The lead frame for a semiconductor device according to claim 1, wherein: 3. A method for manufacturing a lead frame for a semiconductor device in which a plurality of inner leads having a tip portion to which a bonding wire is connected and an inner lead trunk portion are arranged in a row toward a mounting portion of a highly integrated circuit chip. At the same time as forming the inner lead trunk, a V groove is formed at a position that should become a mutual boundary of the front end scheduled region, and then the opposite surface of this front end planned region is reached until the V groove is reached. A method for manufacturing a lead frame for a semiconductor device, wherein grinding is performed, and thereafter, a common region ahead of a predetermined end portion is punched out to separately form a front end portion of an inner lead. 4. A method for manufacturing a lead frame for a semiconductor device in which a plurality of inner leads having a tip portion to which a bonding wire is connected and an inner lead trunk portion are arranged toward a mounting portion of a highly integrated circuit chip. Forming an inner lead trunk portion to leave a predetermined region of the end portion of the inner lead and a common region ahead thereof in a continuous state, and then to form a boundary between the predetermined regions of the front end portion by etching or punching. A V-groove is formed on one side from the one side, and then the opposite side of the predetermined region is ground until the V-groove is reached, and then the common region ahead of the predetermined region is punched out. A method for manufacturing a lead frame for a semiconductor device, comprising forming portions separately. 5. A method for manufacturing a lead frame for a semiconductor device according to claim 3, wherein said V-groove is formed at 80% or more of a plate thickness. 6. A semiconductor device according to claim 3, wherein the predetermined region of the front end portion before applying the V-groove is subjected to half-etching in advance to form a thinner plate in advance. Lead frame manufacturing method.