JP2002123483A5 - - Google Patents

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Publication number
JP2002123483A5
JP2002123483A5 JP2001259323A JP2001259323A JP2002123483A5 JP 2002123483 A5 JP2002123483 A5 JP 2002123483A5 JP 2001259323 A JP2001259323 A JP 2001259323A JP 2001259323 A JP2001259323 A JP 2001259323A JP 2002123483 A5 JP2002123483 A5 JP 2002123483A5
Authority
JP
Japan
Prior art keywords
data bus
common data
bus
isolated
arbitrating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001259323A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002123483A (ja
Filing date
Publication date
Priority claimed from US09/649,037 external-priority patent/US6415369B1/en
Application filed filed Critical
Publication of JP2002123483A publication Critical patent/JP2002123483A/ja
Publication of JP2002123483A5 publication Critical patent/JP2002123483A5/ja
Pending legal-status Critical Current

Links

JP2001259323A 2000-08-29 2001-08-29 スプリットバス及びタイムスロットインターフェースバス調停を用いる共有デバイス並びにメモリ Pending JP2002123483A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/649037 2000-08-29
US09/649,037 US6415369B1 (en) 2000-08-29 2000-08-29 Shared devices and memory using split bus and time slot interface bus arbitration

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008032749A Division JP5061268B2 (ja) 2000-08-29 2008-02-14 スプリットバス及びタイムスロットインターフェースバス調停を用いる共有デバイス並びにメモリ

Publications (2)

Publication Number Publication Date
JP2002123483A JP2002123483A (ja) 2002-04-26
JP2002123483A5 true JP2002123483A5 (enExample) 2004-11-18

Family

ID=24603217

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2001259323A Pending JP2002123483A (ja) 2000-08-29 2001-08-29 スプリットバス及びタイムスロットインターフェースバス調停を用いる共有デバイス並びにメモリ
JP2008032749A Expired - Fee Related JP5061268B2 (ja) 2000-08-29 2008-02-14 スプリットバス及びタイムスロットインターフェースバス調停を用いる共有デバイス並びにメモリ

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2008032749A Expired - Fee Related JP5061268B2 (ja) 2000-08-29 2008-02-14 スプリットバス及びタイムスロットインターフェースバス調停を用いる共有デバイス並びにメモリ

Country Status (2)

Country Link
US (1) US6415369B1 (enExample)
JP (2) JP2002123483A (enExample)

Families Citing this family (21)

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US6996656B2 (en) * 2002-10-31 2006-02-07 Src Computers, Inc. System and method for providing an arbitrated memory bus in a hybrid computing system
US6842844B1 (en) * 2000-02-24 2005-01-11 Agere Systems Inc. Parameter memory for hardware accelerator
US6934823B2 (en) * 2001-03-29 2005-08-23 Intel Corporation Method and apparatus for handling memory read return data from different time domains
US6741096B2 (en) * 2002-07-02 2004-05-25 Lsi Logic Corporation Structure and methods for measurement of arbitration performance
US20040181601A1 (en) * 2003-03-14 2004-09-16 Palsamy Sakthikumar Peripheral device sharing
JP4580158B2 (ja) * 2003-09-11 2010-11-10 株式会社ピーエーネット技術研究所 遊技システム
EP1680741B1 (en) * 2003-11-04 2012-09-05 Kimberly-Clark Worldwide, Inc. Testing tool for complex component based software systems
US7191366B2 (en) * 2004-02-26 2007-03-13 International Business Machines Corporation Method and intelligent slave device transfer control unit for implementing seamless error resumption in a shared memory bus structure
US7350002B2 (en) * 2004-12-09 2008-03-25 Agere Systems, Inc. Round-robin bus protocol
US7483422B2 (en) * 2005-02-10 2009-01-27 International Business Machines Corporation Data processing system, method and interconnect fabric for selective link information allocation in a data processing system
JP4419868B2 (ja) * 2005-02-25 2010-02-24 ソニー株式会社 情報処理装置および方法、メモリ制御装置および方法、記録媒体、並びにプログラム
US9606795B1 (en) * 2005-05-05 2017-03-28 Alcatel-Lucent Usa Inc. Providing intelligent components access to an external interface
US7395361B2 (en) * 2005-08-19 2008-07-01 Qualcomm Incorporated Apparatus and methods for weighted bus arbitration among a plurality of master devices based on transfer direction and/or consumed bandwidth
US20080222312A1 (en) * 2007-03-09 2008-09-11 Westell Technologies, Inc. Apparatus and method for optimizing use of a modem jack
US8359576B2 (en) * 2008-11-14 2013-01-22 Fujitsu Limited Using symbolic execution to check global temporal requirements in an application
WO2012125149A1 (en) 2011-03-14 2012-09-20 Hewlett-Packard Development Company, L.P. Memory interface
WO2013145062A1 (ja) 2012-03-30 2013-10-03 日本電気株式会社 バスアクセス調停回路およびバスアクセス調停方法
US9535860B2 (en) * 2013-01-17 2017-01-03 Intel Corporation Arbitrating memory accesses via a shared memory fabric
US9563579B2 (en) * 2013-02-28 2017-02-07 Intel Corporation Method, apparatus, system for representing, specifying and using deadlines
US9298654B2 (en) 2013-03-15 2016-03-29 International Business Machines Corporation Local bypass in memory computing
CN107066413B (zh) * 2016-12-30 2023-11-24 幻境(珠海)科技有限公司 一种用于处理多个总线设备数据的方法及其总线系统

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US4374413A (en) * 1980-06-26 1983-02-15 Gte Automatic Electric Labs Inc. Arbitration controller providing for access of a common resource by a plurality of central processing units
JPS6422141A (en) * 1987-07-17 1989-01-25 Nippon Telegraph & Telephone Transmission control system
JPH04137161A (ja) * 1990-09-28 1992-05-12 Nec Corp バス調停方式
JP3144794B2 (ja) * 1990-11-09 2001-03-12 株式会社日立製作所 マルチプロセッサシステム
JPH0589033A (ja) * 1991-09-27 1993-04-09 Fujitsu Ltd 半導体集積回路
US5239631A (en) * 1991-10-15 1993-08-24 International Business Machines Corporation Cpu bus allocation control
US5237695A (en) * 1991-11-01 1993-08-17 Hewlett-Packard Company Bus contention resolution method for network devices on a computer network having network segments connected by an interconnection medium over an extended distance
DE69326705T2 (de) * 1992-02-14 2000-04-27 Motorola, Inc. Verfahren und Anordnung zur Feststellung der Befehlsablauffolge in einem Datenverarbeitungssystem
JP2848738B2 (ja) * 1992-04-17 1999-01-20 大日本スクリーン製造株式会社 データの時分割転送装置
JPH064462A (ja) * 1992-06-19 1994-01-14 Fujitsu Ltd バス結合方式
JPH06214946A (ja) * 1993-01-20 1994-08-05 Hitachi Ltd 多段バスのバス使用権調停方式
US5666551A (en) * 1994-06-30 1997-09-09 Digital Equipment Corporation Distributed data bus sequencing for a system bus with separate address and data bus protocols
US5887146A (en) * 1995-08-14 1999-03-23 Data General Corporation Symmetric multiprocessing computer with non-uniform memory access architecture
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US6157989A (en) * 1998-06-03 2000-12-05 Motorola, Inc. Dynamic bus arbitration priority and task switching based on shared memory fullness in a multi-processor system

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