JP2002108805A5 - - Google Patents
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- Publication number
- JP2002108805A5 JP2002108805A5 JP2001215775A JP2001215775A JP2002108805A5 JP 2002108805 A5 JP2002108805 A5 JP 2002108805A5 JP 2001215775 A JP2001215775 A JP 2001215775A JP 2001215775 A JP2001215775 A JP 2001215775A JP 2002108805 A5 JP2002108805 A5 JP 2002108805A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US616105 | 2000-07-14 | ||
US09/616,105 US6687779B1 (en) | 2000-07-14 | 2000-07-14 | Method and apparatus for transmitting control information across a serialized bus interface |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2002108805A JP2002108805A (ja) | 2002-04-12 |
JP2002108805A5 true JP2002108805A5 (ja) | 2008-08-07 |
Family
ID=24468050
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001215775A Abandoned JP2002108805A (ja) | 2000-07-14 | 2001-07-16 | 直列化されたバス・インターフェースにより制御情報を送信する方法および装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US6687779B1 (ja) |
EP (1) | EP1172733B1 (ja) |
JP (1) | JP2002108805A (ja) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030065869A1 (en) * | 2001-10-01 | 2003-04-03 | Francois Balay | PCI/LVDS half bridge |
US6990549B2 (en) * | 2001-11-09 | 2006-01-24 | Texas Instruments Incorporated | Low pin count (LPC) I/O bridge |
US6968464B2 (en) * | 2002-01-10 | 2005-11-22 | National Instruments Corporation | System and method for reconfiguring a system coupled to a host computer through a split bridge |
US6996650B2 (en) * | 2002-05-16 | 2006-02-07 | International Business Machines Corporation | Method and apparatus for implementing multiple configurable sub-busses of a point-to-point bus |
US7346094B2 (en) * | 2002-12-13 | 2008-03-18 | International Business Machines Corporation | System and method for transmitting data and additional information simultaneously within a wire based communication system |
WO2005091144A2 (fr) | 2004-02-23 | 2005-09-29 | Stmicroelectronics S.A. | Surveillance de l’execution d’un programme par un processeur d’un circuit electronique |
US20050230821A1 (en) * | 2004-04-15 | 2005-10-20 | Kheng Lee T | Semiconductor packages, and methods of forming semiconductor packages |
JP4171456B2 (ja) * | 2004-12-03 | 2008-10-22 | 三洋電機株式会社 | Av機器 |
KR100657411B1 (ko) | 2005-09-09 | 2006-12-14 | 한국과학기술원 | 천이 수를 유지하는 내로우 버스 인코딩/디코딩 장치 |
US7769939B2 (en) * | 2006-06-26 | 2010-08-03 | Thomson Licensing | Apparatus and method for interfacing electronic devices |
US20080183937A1 (en) * | 2007-01-31 | 2008-07-31 | Brian James Cagno | Method and Apparatus to Reduce EMI Emissions Over Wide Port SAS Buses |
JP5310175B2 (ja) * | 2009-03-25 | 2013-10-09 | 富士通株式会社 | スイッチシステム、及びスイッチシステムの制御方法 |
JP5588949B2 (ja) * | 2011-09-30 | 2014-09-10 | 富士フイルム株式会社 | 内視鏡システム及び内視鏡の外部制御装置 |
US20130208809A1 (en) * | 2012-02-14 | 2013-08-15 | Microsoft Corporation | Multi-layer rate control |
JP6087037B1 (ja) * | 2015-07-24 | 2017-03-01 | オリンパス株式会社 | 画像データ伝送システム |
US9946536B2 (en) * | 2015-12-03 | 2018-04-17 | International Business Machines Corporation | Automatic refactoring of javascript code for multi-thread execution |
US11115623B2 (en) * | 2018-05-07 | 2021-09-07 | Maxim Integrated Products, Inc. | Systems and methods for asymmetric image splitter with line mark memory |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4486739A (en) | 1982-06-30 | 1984-12-04 | International Business Machines Corporation | Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code |
JP2694807B2 (ja) | 1993-12-16 | 1997-12-24 | 日本電気株式会社 | データ伝送方式 |
US5764924A (en) | 1995-08-24 | 1998-06-09 | Ncr Corporation | Method and apparatus for extending a local PCI bus to a remote I/O backplane |
US5751975A (en) | 1995-12-28 | 1998-05-12 | Intel Corporation | Method and apparatus for interfacing a device compliant to a first bus protocol to an external bus having a second bus protocol and for providing virtual functions through a multi-function intelligent bridge |
US5987539A (en) | 1996-06-05 | 1999-11-16 | Compaq Computer Corporation | Method and apparatus for flushing a bridge device read buffer |
US5968144A (en) | 1996-06-27 | 1999-10-19 | Vlsi Technology, Inc. | System for supporting DMA I/O device using PCI bus and PCI-PCI bridge comprising programmable DMA controller for request arbitration and storing data transfer information |
EP0844567A1 (en) | 1996-11-21 | 1998-05-27 | Hewlett-Packard Company | Long haul PCI-to-PCI bridge |
KR100198448B1 (ko) | 1996-12-20 | 1999-06-15 | 이계철 | Nb2p 부호화 장치 및 nb2p 복호화 장치 |
US5875313A (en) | 1997-04-08 | 1999-02-23 | National Instruments Corporation | PCI bus to IEEE 1394 bus translator employing write pipe-lining and sequential write combining |
US5937175A (en) | 1997-04-08 | 1999-08-10 | National Instruments Corporation | PCI bus to IEEE 1394 bus translator employing pipe-lined read prefetching |
US6459700B1 (en) * | 1997-06-23 | 2002-10-01 | Compaq Computer Corporation | Multiple segment network device configured for a stacked arrangement |
US5968172A (en) | 1997-11-12 | 1999-10-19 | Sony Corporation Of Japan | Hardware and software triggered programmable reset circuitry for serial communication device |
JP3166692B2 (ja) | 1997-12-09 | 2001-05-14 | 日本電気株式会社 | 符号化回路 |
US6070214A (en) | 1998-08-06 | 2000-05-30 | Mobility Electronics, Inc. | Serially linked bus bridge for expanding access over a first bus to a second bus |
US6516352B1 (en) * | 1998-08-17 | 2003-02-04 | Intel Corporation | Network interface system and method for dynamically switching between different physical layer devices |
US6920520B2 (en) * | 1998-10-08 | 2005-07-19 | Broadcom Corporation | Methods and circuits for stacking bus architecture |
US6161157A (en) * | 1998-10-27 | 2000-12-12 | Intel Corporation | Docking system |
US6418494B1 (en) * | 1998-10-30 | 2002-07-09 | Cybex Computer Products Corporation | Split computer architecture to separate user and processor while retaining original user interface |
JP3289707B2 (ja) * | 1999-06-23 | 2002-06-10 | 日本電気株式会社 | 送受信回路及び送受信方法並びに記録媒体 |
US6380873B1 (en) * | 2000-06-30 | 2002-04-30 | Quantum Corporation | Method for reducing radio frequency emissions on high-speed serial buses |
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2000
- 2000-07-14 US US09/616,105 patent/US6687779B1/en not_active Expired - Lifetime
-
2001
- 2001-07-16 JP JP2001215775A patent/JP2002108805A/ja not_active Abandoned
- 2001-07-16 EP EP01000297.0A patent/EP1172733B1/en not_active Expired - Lifetime