JP2002093176A5 - - Google Patents

Download PDF

Info

Publication number
JP2002093176A5
JP2002093176A5 JP2001148893A JP2001148893A JP2002093176A5 JP 2002093176 A5 JP2002093176 A5 JP 2002093176A5 JP 2001148893 A JP2001148893 A JP 2001148893A JP 2001148893 A JP2001148893 A JP 2001148893A JP 2002093176 A5 JP2002093176 A5 JP 2002093176A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001148893A
Other languages
Japanese (ja)
Other versions
JP2002093176A (en
JP4748877B2 (en
Filing date
Publication date
Application filed filed Critical
Priority claimed from JP2001148893A external-priority patent/JP4748877B2/en
Priority to JP2001148893A priority Critical patent/JP4748877B2/en
Priority to DE2001133281 priority patent/DE10133281A1/en
Priority to KR10-2001-0040791A priority patent/KR100452902B1/en
Priority to TW90116721A priority patent/TW523742B/en
Priority to CNB011224827A priority patent/CN1162914C/en
Priority to US09/900,969 priority patent/US6538954B2/en
Publication of JP2002093176A publication Critical patent/JP2002093176A/en
Publication of JP2002093176A5 publication Critical patent/JP2002093176A5/ja
Publication of JP4748877B2 publication Critical patent/JP4748877B2/en
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

JP2001148893A 2000-07-10 2001-05-18 Storage device Expired - Lifetime JP4748877B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2001148893A JP4748877B2 (en) 2000-07-10 2001-05-18 Storage device
DE2001133281 DE10133281A1 (en) 2000-07-10 2001-07-09 Memory device e.g. multiport SRAM used in integrated circuit, has switch connected between write data bit line and storage node, which conducts only when both write word line and write control line are active
KR10-2001-0040791A KR100452902B1 (en) 2000-07-10 2001-07-09 Memory device
TW90116721A TW523742B (en) 2000-07-10 2001-07-09 Memory device
CNB011224827A CN1162914C (en) 2000-07-10 2001-07-10 Storage
US09/900,969 US6538954B2 (en) 2000-07-10 2001-07-10 Multi-port static random access memory equipped with a write control line

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2000207848 2000-07-10
JP2000-207848 2000-07-10
JP2000207848 2000-07-10
JP2001148893A JP4748877B2 (en) 2000-07-10 2001-05-18 Storage device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011096158A Division JP2011165313A (en) 2000-07-10 2011-04-22 Memory device

Publications (3)

Publication Number Publication Date
JP2002093176A JP2002093176A (en) 2002-03-29
JP2002093176A5 true JP2002093176A5 (en) 2008-05-29
JP4748877B2 JP4748877B2 (en) 2011-08-17

Family

ID=26595666

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001148893A Expired - Lifetime JP4748877B2 (en) 2000-07-10 2001-05-18 Storage device

Country Status (4)

Country Link
JP (1) JP4748877B2 (en)
CN (1) CN1162914C (en)
DE (1) DE10133281A1 (en)
TW (1) TW523742B (en)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004041331B4 (en) * 2004-08-26 2007-05-10 Infineon Technologies Ag Code transmitter, in particular for use in a memory controller
JP2006236443A (en) * 2005-02-23 2006-09-07 Seiko Epson Corp Ferroelectric memory device
JP2007172813A (en) * 2005-11-25 2007-07-05 Semiconductor Energy Lab Co Ltd Semiconductor memory device and method of operating semiconductor memory device
JP4877094B2 (en) * 2007-06-22 2012-02-15 日本テキサス・インスツルメンツ株式会社 Semiconductor device, semiconductor memory device, and semiconductor memory cell
JP5282430B2 (en) * 2008-03-27 2013-09-04 富士通株式会社 Semiconductor memory device
KR100953055B1 (en) * 2008-05-20 2010-04-15 주식회사 하이닉스반도체 Method of operating a non volatile memory device
US7859919B2 (en) * 2008-08-27 2010-12-28 Freescale Semiconductor, Inc. Memory device and method thereof
US8111542B2 (en) * 2008-11-19 2012-02-07 Taiwan Semiconductor Manufacturing Co., Ltd. 8T low leakage SRAM cell
TWI410971B (en) * 2009-12-01 2013-10-01 Faraday Tech Corp Static random access memory
US8456945B2 (en) 2010-04-23 2013-06-04 Advanced Micro Devices, Inc. 10T SRAM for graphics processing
US8779488B2 (en) 2011-04-15 2014-07-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device
GB2508221B (en) 2012-11-26 2015-02-25 Surecore Ltd Low-Power SRAM Cells
GB2510828B (en) 2013-02-13 2015-06-03 Surecore Ltd Single wordline low-power SRAM cells
US10860318B2 (en) 2016-12-06 2020-12-08 Gsi Technology, Inc. Computational memory cell and processing array device using memory cells
US10770133B1 (en) 2016-12-06 2020-09-08 Gsi Technology, Inc. Read and write data processing circuits and methods associated with computational memory cells that provides write inhibits and read bit line pre-charge inhibits
US10891076B1 (en) 2016-12-06 2021-01-12 Gsi Technology, Inc. Results processing circuits and methods associated with computational memory cells
US10854284B1 (en) 2016-12-06 2020-12-01 Gsi Technology, Inc. Computational memory cell and processing array device with ratioless write port
US10943648B1 (en) 2016-12-06 2021-03-09 Gsi Technology, Inc. Ultra low VDD memory cell with ratioless write port
US10998040B2 (en) 2016-12-06 2021-05-04 Gsi Technology, Inc. Computational memory cell and processing array device using the memory cells for XOR and XNOR computations
US10777262B1 (en) 2016-12-06 2020-09-15 Gsi Technology, Inc. Read data processing circuits and methods associated memory cells
US11227653B1 (en) 2016-12-06 2022-01-18 Gsi Technology, Inc. Storage array circuits and methods for computational memory cells
US10847213B1 (en) 2016-12-06 2020-11-24 Gsi Technology, Inc. Write data processing circuits and methods associated with computational memory cells
US10847212B1 (en) 2016-12-06 2020-11-24 Gsi Technology, Inc. Read and write data processing circuits and methods associated with computational memory cells using two read multiplexers
US10860320B1 (en) 2016-12-06 2020-12-08 Gsi Technology, Inc. Orthogonal data transposition system and method during data transfers to/from a processing array
US10877731B1 (en) 2019-06-18 2020-12-29 Gsi Technology, Inc. Processing array device that performs one cycle full adder operation and bit line read/write logic features
US10958272B2 (en) 2019-06-18 2021-03-23 Gsi Technology, Inc. Computational memory cell and processing array device using complementary exclusive or memory cells
US10930341B1 (en) 2019-06-18 2021-02-23 Gsi Technology, Inc. Processing array device that performs one cycle full adder operation and bit line read/write logic features

Similar Documents

Publication Publication Date Title
BE2022C531I2 (en)
BE2022C502I2 (en)
BE2022C547I2 (en)
BE2017C055I2 (en)
BE2017C051I2 (en)
BE2017C032I2 (en)
BE2015C046I2 (en)
BE2014C052I2 (en)
BE2014C036I2 (en)
BE2014C026I2 (en)
BE2014C004I2 (en)
BE2014C006I2 (en)
BE2017C050I2 (en)
BE2011C034I2 (en)
BE2007C047I2 (en)
AU2002307149A8 (en)
BRPI0209186B1 (en)
BE2014C008I2 (en)
CH1379220H1 (en)
BRPI0204884B1 (en)
BE2016C021I2 (en)
JP2002093176A5 (en)
JP2002070460A5 (en)
BRPI0101486B8 (en)
BE2012C051I2 (en)