JP2002076849A - Oscillator - Google Patents
OscillatorInfo
- Publication number
- JP2002076849A JP2002076849A JP2000268059A JP2000268059A JP2002076849A JP 2002076849 A JP2002076849 A JP 2002076849A JP 2000268059 A JP2000268059 A JP 2000268059A JP 2000268059 A JP2000268059 A JP 2000268059A JP 2002076849 A JP2002076849 A JP 2002076849A
- Authority
- JP
- Japan
- Prior art keywords
- output
- inverters
- ring oscillator
- inverter
- oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、リングオシレータ
を使用して高い発振周波数を得ることができる発振器に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillator that can obtain a high oscillation frequency by using a ring oscillator.
【0002】[0002]
【従来の技術】従来、発振器の一例としてリングオシレ
ータが知られている。このリングオシレータは、インバ
ータ、ナンドゲート、ノアゲートなどの反転出力の論理
ゲートを奇数段直列に接続し、最終段の出力を初段に帰
還して自己発振させるものである。2. Description of the Related Art Conventionally, a ring oscillator is known as an example of an oscillator. In this ring oscillator, logic gates of inverted outputs, such as an inverter, a NAND gate, and a NOR gate, are connected in odd-numbered stages in series, and the output of the last stage is fed back to the first stage and self-oscillates.
【0003】[0003]
【発明が解決しようとする課題】ところで、従来のリン
グオシレータは、発振器を構成する各論理ゲートの平均
伝搬遅延時間の総和の2倍の周期で発振するため、論理
ゲートの段数を増加するほど発振周波数は低くなる。こ
のため、従来のリングオシレータでは、高い発振周波数
の出力が得られるものを実現するのが困難であった。The conventional ring oscillator oscillates at a period twice as long as the total sum of the average propagation delay times of the logic gates constituting the oscillator. Therefore, the oscillation increases as the number of logic gate stages increases. The frequency will be lower. For this reason, it has been difficult to realize a conventional ring oscillator that can output a high oscillation frequency.
【0004】そこで、本発明の目的は、リングオシレー
タを活用することにより、高い発振周波数の出力が得ら
れるようにした発振器を提供することにある。An object of the present invention is to provide an oscillator capable of obtaining an output with a high oscillation frequency by utilizing a ring oscillator.
【0005】[0005]
【課題を解決するための手段】上記課題を解決し、本発
明の目的を達成するために、請求項1及び請求項2に記
載の各発明は以下のように構成した。すなわち、請求項
1に記載の発明は、インバータを奇数段直列接続し、最
終段の出力を初段に帰還して自己発振させるリングオシ
レータ回路と、前記インバータの各出力のうちの各ピー
ク部分を順次取り出すピーク検出回路と、を備えている
ことを特徴とするものである。Means for Solving the Problems In order to solve the above problems and achieve the object of the present invention, the inventions according to the first and second aspects are configured as follows. That is, according to the first aspect of the invention, a ring oscillator circuit in which inverters are connected in series in an odd number of stages and the output of the last stage is fed back to the first stage and self-oscillates, and each peak portion of each output of the inverter is sequentially arranged. And a peak detection circuit for extracting.
【0006】請求項2に記載の発明は、請求項1に記載
の発振器において、前記ピーク検出回路は、前記各イン
バータの各出力端子に接続されてソースフォロワ動作す
る複数のトランジスタと、その複数の各トランジスタに
共通に接続される定電流源と、を含んでいることを特徴
とするものである。このように本発明では、リングオシ
レータ回路におけるインバータの各出力のうちの各ピー
ク部分を順次取り出すピーク検出回路を設けるようにし
たので、リングオシレータを活用することにより、高い
発振周波数の出力を得ることができる。According to a second aspect of the present invention, in the oscillator according to the first aspect, the peak detection circuit is connected to each output terminal of each of the inverters and operates as a source follower. And a constant current source commonly connected to each transistor. As described above, in the present invention, the peak detection circuit for sequentially taking out each peak portion of each output of the inverter in the ring oscillator circuit is provided. Therefore, by utilizing the ring oscillator, it is possible to obtain an output with a high oscillation frequency. Can be.
【0007】[0007]
【発明の実施の形態】以下、本発明発振器の実施形態の
構成について、図1および図2の回路図を参照して説明
する。この実施形態にかかる発振器は、図1に示すよう
に、リングオシレータ回路1と、ピーク検出回路2とを
備え、出力端子3から発振出力を取り出すようになって
いる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of an oscillator according to an embodiment of the present invention will be described below with reference to the circuit diagrams of FIGS. As shown in FIG. 1, the oscillator according to this embodiment includes a ring oscillator circuit 1 and a peak detection circuit 2, and takes out an oscillation output from an output terminal 3.
【0008】リングオシレータ回路1は、奇数個のイン
バータ11〜13を直列接続し、最終段のインバータ1
3の出力を初段のインバータ11に帰還して自己発振す
るようになっている。各インバータ11〜13は、例え
ば図2に示すように、入力を反転出力するNMOSトラ
ンジスタQ11、このNMOSトランジスタQ11の負
荷として機能する定電流源I11と、NMOSトランジ
スタQ11のドレインとアース間に接続される負荷容量
CLとから構成されている。The ring oscillator circuit 1 includes an odd number of inverters 11 to 13 connected in series, and a final-stage inverter 1
The output of No. 3 is fed back to the first-stage inverter 11 and self-oscillates. For example, as shown in FIG. 2, each of the inverters 11 to 13 is connected between an NMOS transistor Q11 that inverts and outputs an input, a constant current source I11 that functions as a load of the NMOS transistor Q11, and a drain of the NMOS transistor Q11 and the ground. And a load capacity CL.
【0009】ピーク検出回路2は、インバータ11〜1
3の各出力電圧V1〜V3のうちの各ピーク部分を順次
取り出すものであり、図1に示すように、インバータ1
1〜13の各出力端子に接続されてソースフォロワ動作
するNMOSトランジスタQ1〜Q3と、NMOSトラ
ンジスタQ1〜Q3に共通に接続されるとともにその共
通の負荷として機能する定電流源I1とから構成され
る。The peak detection circuit 2 includes inverters 11 to 1
3 are sequentially taken out of each of the output voltages V1 to V3 of the inverter 3, and as shown in FIG.
The NMOS transistors Q1 to Q3 are connected to the output terminals 1 to 13 and operate as a source follower, and the constant current source I1 is connected to the NMOS transistors Q1 to Q3 and functions as a common load. .
【0010】さらに具体的に説明すると、インバータ1
1〜13の各出力端子が、NMOSトランジスタQ1〜
Q3の各ゲートに接続されている。NMOSトランジス
タQ1〜Q3の各ソースは共通に接続され、その共通接
続部が定電流源I1を介して接地されるとともに、出力
端子3に接続されている。さらに、NMOSトランジス
タQ1〜Q3の各ドレインには、電源電圧VDDが供給
されるようになっている。[0010] More specifically, the inverter 1
The output terminals 1 to 13 are connected to the NMOS transistors Q1 to Q1.
It is connected to each gate of Q3. The sources of the NMOS transistors Q1 to Q3 are commonly connected, and the common connection is grounded via a constant current source I1 and connected to the output terminal 3. Further, the power supply voltage VDD is supplied to each drain of the NMOS transistors Q1 to Q3.
【0011】次に、このような構成からなる実施形態に
かかる発振器の動作の一例について、図面を参照して説
明する。リングオシレータ回路1が自己発振を開始する
と、インバータ11〜13の各出力電圧V1〜V3は、
例えば図3に示すように、それぞれ位相がずれたものと
なる。Next, an example of the operation of the oscillator according to the embodiment having such a configuration will be described with reference to the drawings. When the ring oscillator circuit 1 starts self-oscillation, the output voltages V1 to V3 of the inverters 11 to 13 become:
For example, as shown in FIG. 3, the phases are shifted from each other.
【0012】インバータ11〜13の各出力電圧V1〜
V3は、NMOSトランジスタQ1〜Q3の各ゲートに
それぞれ印加されるので、NMOSトランジスタQ1〜
Q3には、その各出力電圧V1〜V3に応じた各電流が
流れ、この各電流の総和の電流が定電流源I1に流れ込
む。NMOSトランジスタQ1〜Q3の各ソースには、
共通の定電流源I1が接続されているので、NMOSト
ランジスタQ1〜Q3の各電流の総和は、定電流源I1
の電流値I1に制限される。The output voltages V1 to V1 of the inverters 11 to 13
V3 is applied to each gate of the NMOS transistors Q1 to Q3.
Each current according to each of the output voltages V1 to V3 flows through Q3, and the total current of these currents flows into the constant current source I1. Each source of the NMOS transistors Q1 to Q3 has
Since the common constant current source I1 is connected, the sum of the currents of the NMOS transistors Q1 to Q3 is equal to the constant current source I1.
Is limited to the current value I1.
【0013】この結果、ピーク検出回路2の出力端子3
からの出力電圧Voutは、図3の実線で示すように、
インバータ11〜13の各出力電圧V1〜V3のうちの
各ピーク部分を順次取り出した波形となり、高い発振周
波数の出力が得られる。以上説明したように、この実施
形態によれば、ピーク検出回路2によりインバータ11
〜13の各出力電圧V1〜V3のうちの各ピーク部分を
順次取り出すようにしたので、リングオシレータ回路1
の活用により発振周波数が高い出力を得ることができ
る。As a result, the output terminal 3 of the peak detection circuit 2
The output voltage Vout from is as shown by the solid line in FIG.
A waveform is obtained by sequentially extracting each peak portion of each of the output voltages V1 to V3 of the inverters 11 to 13, and an output having a high oscillation frequency is obtained. As described above, according to this embodiment, the inverter 11 is controlled by the peak detection circuit 2.
13 are sequentially taken out of each of the output voltages V1 to V3, so that the ring oscillator circuit 1
By using the above, an output having a high oscillation frequency can be obtained.
【0014】[0014]
【発明の効果】以上述べたように、本発明によれば、リ
ングオシレータ回路におけるインバータの各出力のうち
の各ピーク部分を順次取り出すピーク検出回路を設ける
ようにした。このため、リングオシレータを活用するこ
とにより、高い発振周波数の出力を得ることができる。As described above, according to the present invention, the peak detecting circuit for sequentially extracting each peak portion of each output of the inverter in the ring oscillator circuit is provided. Therefore, by utilizing the ring oscillator, an output with a high oscillation frequency can be obtained.
【図1】本発明の実施形態の構成を示す回路図である。FIG. 1 is a circuit diagram showing a configuration of an embodiment of the present invention.
【図2】図1の各インバータの具体的な構成を示す回路
図である。FIG. 2 is a circuit diagram showing a specific configuration of each inverter of FIG.
【図3】図1の各部の電圧を示す電圧波形図である。FIG. 3 is a voltage waveform diagram showing voltages of respective parts in FIG.
1 リングオシレータ回路 2 ピーク検出回路 3 出力端子 11〜13 インバータ Q1〜Q3 NMOSトランジスタ I1 定電流源 DESCRIPTION OF SYMBOLS 1 Ring oscillator circuit 2 Peak detection circuit 3 Output terminal 11-13 Inverter Q1-Q3 NMOS transistor I1 Constant current source
Claims (2)
の出力を初段に帰還して自己発振させるリングオシレー
タ回路と、 前記インバータの各出力のうちの各ピーク部分を順次取
り出すピーク検出回路と、 を備えていることを特徴とする発振器。A ring oscillator circuit in which inverters are connected in series in an odd number of stages and an output of the last stage is fed back to the first stage and self-oscillates; a peak detection circuit for sequentially extracting each peak portion of each output of the inverter; An oscillator comprising:
ロワ動作する複数のトランジスタと、 その複数の各トランジスタに共通に接続される定電流源
と、 を含んでいることを特徴とする請求項1に記載の発振
器。2. The peak detection circuit includes: a plurality of transistors connected to respective output terminals of the respective inverters to perform a source follower operation; and a constant current source commonly connected to the respective plurality of transistors. The oscillator according to claim 1, wherein
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000268059A JP4601787B2 (en) | 2000-09-05 | 2000-09-05 | Oscillator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000268059A JP4601787B2 (en) | 2000-09-05 | 2000-09-05 | Oscillator |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2002076849A true JP2002076849A (en) | 2002-03-15 |
JP4601787B2 JP4601787B2 (en) | 2010-12-22 |
Family
ID=18754878
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000268059A Expired - Fee Related JP4601787B2 (en) | 2000-09-05 | 2000-09-05 | Oscillator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4601787B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100434432B1 (en) * | 2002-05-30 | 2004-06-07 | (주)다윈텍 | PVT compensated self-oscillator for low power and high speed |
CN1312839C (en) * | 2003-10-22 | 2007-04-25 | 雅马哈株式会社 | Voltage-controlled oscillator |
JP2008244787A (en) * | 2007-03-27 | 2008-10-09 | Seiko Epson Corp | Oscillation suspension detecting circuit, oscillator unit, semiconductor device, electronic equipment, and clock |
GB2473180A (en) * | 2009-07-24 | 2011-03-09 | Texas Instruments Ltd | Voltage controlled oscillator with reduced noise |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56166640A (en) * | 1980-05-28 | 1981-12-21 | Toshiba Corp | Or circuit |
JPS61206308A (en) * | 1985-03-11 | 1986-09-12 | Seiko Instr & Electronics Ltd | Voltage controlled oscillator |
JPS63127614A (en) * | 1986-11-18 | 1988-05-31 | Sumitomo Electric Ind Ltd | Peek detector circuit |
JPH0583089A (en) * | 1991-09-20 | 1993-04-02 | Fujitsu Ltd | Oscillation circuit |
JPH06343022A (en) * | 1993-06-01 | 1994-12-13 | Fujitsu Ltd | Voltage controlled oscillation circuit |
JPH10256907A (en) * | 1997-03-11 | 1998-09-25 | Rohm Co Ltd | Circuit for generating reference pulse |
JP2000134067A (en) * | 1998-10-21 | 2000-05-12 | Isei Denshi Kofun Yugenkoshi | Low voltage and low jitter voltage controlled oscillator |
-
2000
- 2000-09-05 JP JP2000268059A patent/JP4601787B2/en not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56166640A (en) * | 1980-05-28 | 1981-12-21 | Toshiba Corp | Or circuit |
JPS61206308A (en) * | 1985-03-11 | 1986-09-12 | Seiko Instr & Electronics Ltd | Voltage controlled oscillator |
JPS63127614A (en) * | 1986-11-18 | 1988-05-31 | Sumitomo Electric Ind Ltd | Peek detector circuit |
JPH0583089A (en) * | 1991-09-20 | 1993-04-02 | Fujitsu Ltd | Oscillation circuit |
JPH06343022A (en) * | 1993-06-01 | 1994-12-13 | Fujitsu Ltd | Voltage controlled oscillation circuit |
JPH10256907A (en) * | 1997-03-11 | 1998-09-25 | Rohm Co Ltd | Circuit for generating reference pulse |
JP2000134067A (en) * | 1998-10-21 | 2000-05-12 | Isei Denshi Kofun Yugenkoshi | Low voltage and low jitter voltage controlled oscillator |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100434432B1 (en) * | 2002-05-30 | 2004-06-07 | (주)다윈텍 | PVT compensated self-oscillator for low power and high speed |
CN1312839C (en) * | 2003-10-22 | 2007-04-25 | 雅马哈株式会社 | Voltage-controlled oscillator |
JP2008244787A (en) * | 2007-03-27 | 2008-10-09 | Seiko Epson Corp | Oscillation suspension detecting circuit, oscillator unit, semiconductor device, electronic equipment, and clock |
GB2473180A (en) * | 2009-07-24 | 2011-03-09 | Texas Instruments Ltd | Voltage controlled oscillator with reduced noise |
Also Published As
Publication number | Publication date |
---|---|
JP4601787B2 (en) | 2010-12-22 |
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