JP2002073416A - Cache memory and image output device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve reference rate considering data reference times. SOLUTION: A data block storage part 112 has several regions to store data blocks. A reference number storage part 113 stores the reference numbers of each data block stored in the data block memory 112. When a controller 111 writes the new data blocks in the data block memory 112 and if there is not empty region, it writes the new data blocks to the region where the data block with a small number of the data reference is stored.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a cache memory and an image output device.

[0002]

2. Description of the Related Art For example, when a color printer is used, a color space (R) of data created by a computer device is used.
(Red), G (green), and B (blue)) and the color spaces (C (cyan), M (magenta), Y (yellow), and K (black)) to be realized by the printer device, Further, a color space conversion process is required according to the characteristics of the paint or paper used.

When performing color processing, reference is made to non-linear data stored in an external memory or the like, and the calculation from the original color space data to the converted color space data is performed using a technique such as tetrahedral interpolation. Is going. Since the same data is referred to from the external memory during the processing of one page, the processing speed is improved by using the cache memory.

A conventional cache memory can protect (lock) data read out from the cache memory by a signal from an arithmetic unit such as a CPU, but dynamically locks the data according to a situation in a circuit. I couldn't. FIFO (First In Fi
Circuits such as the rst out (Least Out) replacement method and the LRU (Least Recently Used) replacement method are employed to reduce the probability that data that is referenced many times is discarded from the cache memory, thereby improving the data reference speed.

[0005]

If the lock of the cache memory is to be realized by a signal from a CPU or the like, software control is performed. The actual speed is reduced.

In the case of the FIFO replacement method or the LRU replacement method, the number of data that can be simultaneously stored on the same index is only the number of cache lines (cache columns). May be destroyed. Even if the discarded data is needed next time, it must be read from the external memory again, so even if the data is frequently used throughout, it is discarded because it is not referred to several times in the cache column, and it is read again. May be performed to lower the overall processing speed. Further, in order to improve the reference rate (the probability that necessary data exists in the cache memory) of the cache memory, a larger memory is required.

It is an object of the present invention to improve the reference rate in a cache memory in consideration of the number of data references.

[0008]

In order to achieve the above object, a cache memory according to the present invention comprises: a data block storage means having a plurality of areas for storing data blocks; A reference count storage unit for storing a reference count of each data block, and a new data block written to the data block storage unit. Control means for writing a new data block in the area where the data block is located.

Here, the cache memory further includes determination information storage means for storing determination information indicating whether or not the number of references to each data block stored in the data block storage means is equal to or greater than a threshold value. When writing a new data block into the data block storage unit, if there is no free space, the control unit checks the determination information to determine a data block in which the reference count is less than a threshold. A new data block may be written in an area storing one of the data blocks.

Here, the cache memory further includes reference history storage means for storing a reference history of the data block, and the control means controls the determination information in an order according to FIFO or LRU based on the reference history. Can be examined.

[0011] An image output device according to the present invention includes the cache memory.

According to the above configuration, the reference rate can be improved in the cache memory in consideration of the number of data references.

[0013]

FIG. 1 is a block diagram showing a configuration example of an image output apparatus (for example, a printer) according to this embodiment. The image output device 102 according to the present embodiment includes a cache memory 110, a CPU 121, a memory 122,
Printer engine control device 123, printer engine 1
24, and an interface 125, and outputs an image based on image data sent from an image output control device (for example, a personal computer) 101.

The CPU 121 can take the form of a microprocessor and performs various controls. Memory 122
Stores various programs (for example, a program for color processing) and various data. The printer engine 124 outputs an image based on the image data under the control of the printer engine control device 123.

FIG. 2 is a block diagram showing a configuration example of the cache memory according to the present embodiment. The cache memory 110 includes a control unit 111 that performs various controls, a data block storage unit 112 that stores a data block (a block of data), and a storage unit 113 that stores the number of references of each data block. In the present embodiment, the cache memory 110 is realized as a semiconductor.

When receiving an access request for certain data from the CPU 121, the control unit 111 checks whether or not the data is stored in the data block storage unit 112. If stored, the data is transferred to the CPU 1
21 and, if not stored, read a data block containing that data from memory 122,
The data stored in the data block storage unit 112 is transferred to the CPU 121 in response to the access request.

FIG. 3 is a diagram for explaining the area of the data block storage unit 112. Data block storage unit 1
12 has a plurality of areas for storing data blocks. In the example of FIG. 3, for each of the indexes (I1 to In), four cache lines (CL1 to CL4)
Is provided. That is, a total of n × 4 areas are provided, and a data block can be stored in each area. The capacity of the data block storage unit 112 may be, for example, 4 kilobytes or 2 kilobytes.

In this embodiment, an index is obtained from the address of a data block, and the data block is stored in any area (cache line) of the index. However, the data block can be stored in any area regardless of the index.

When a new data block is to be stored, if all four cache lines of the corresponding index are closed (there is no free space),
Any area will be overwritten.

FIG. 4 is a diagram showing an example of information stored in the storage unit 113 such as the number of times of reference. In the present embodiment, a data block name, the number of references (of the CPU), and threshold value determination information (here, represented by bits) are stored for each cache line of each index. The reference count is set to 0 when the data block is stored in the data block storage unit 112, and is incremented by one each time the CPU refers to the data block. The threshold value determination information (bit) is information indicating whether the number of times of reference to the data block is equal to or greater than the threshold value. In the example of FIG. 4, the threshold value is 10, and since the number of times of reference is equal to or greater than the threshold value for data blocks A and C, the threshold value determination bit is 1, and for data blocks B and D, Since the reference count is less than the threshold value, the threshold value determination bit is 0.

When writing a new data block into the data block storage unit 112, if there is no free space, the control unit 111 checks the threshold determination information and determines a data block whose reference count is less than the threshold. The determination is made, and a new data block is written in the area storing one of the data blocks. Therefore, in the example of FIG. 4, a new data block is overwritten on the area storing the data block B or D.

When selecting a data block to be overwritten, a data block less than the threshold with the least number of references may be selected in consideration of the number of references.
A data block smaller than the first found threshold value may be selected.

If there is no data block smaller than the threshold value, for example, it is conceivable that the data block with the least number of references is to be overwritten.

The reference history of the data block is stored in the reference count storage unit 113, and the FI is stored based on the reference history.
The threshold determination bits may be checked in an order according to the FO or the LRU.

In this embodiment, when selecting (deciding) a data block to be overwritten, both the reference count and the threshold value judgment bit are used. It is also possible to select a small number of data blocks.

In this embodiment, an example in which the present invention is applied to an image output device has been described. However, the present invention can be applied to other devices requiring a cache memory.

[0027]

As described above, according to the present invention, in the cache memory, the number of data references is considered,
The reference rate can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of an image output device according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration example of a cache memory according to the embodiment of the present invention.

FIG. 3 is a diagram for explaining an area of a data block storage unit;

FIG. 4 is a diagram illustrating an example of information stored in a storage unit such as a reference count.

[Explanation of symbols]

 Reference Signs List 101 Image output control device 102 Image output device 110 Cache memory 111 Control unit 112 Data block storage unit 113 Reference count etc. storage unit 121 CPU 122 Memory 123 Printer engine control device 124 Printer engine 125 Interface

Claims (4)

[Claims] 1. A data block storage unit having a plurality of areas for storing data blocks, a reference count storage unit for storing a reference count of each data block stored in the data block storage unit, and a new data block. When writing to the data block storage means, if there is no free area, a control means for writing a new data block in the area storing the data block with a small number of references is provided. Cache memory to do. 2. The apparatus according to claim 1, further comprising: determination information storage means for storing determination information indicating whether or not the number of times of reference to each data block stored in said data block storage means is equal to or greater than a threshold value. When writing a new data block into the data block storage means, if there is no free space, the determination information is checked to determine a data block whose reference count is less than a threshold value, and one of the data blocks is determined. 2. The cache memory according to claim 1, wherein a new data block is written in the storage area. 3. The apparatus according to claim 1, further comprising: a reference history storage unit configured to store a reference history of the data block, wherein the control unit checks the determination information in an order according to FIFO or LRU based on the reference history. 3. The cache memory according to claim 2, wherein: 4. An image output device comprising the cache memory according to claim 1.