JP2002057028A - Solenoid drive control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solenoid drive control circuit capable of enabling a dither current necessary in the whole range of a solenoid exciting current to flow. SOLUTION: Detection signal of an exciting current is inputted into an arithmetic device 7 for obtaining an arithmetic output signal V0. The signal V0 and an instruction signal Vin which gives the target value of an exciting current are inputted into a comparator CP1, and a switching circuit 5 is turned ON or OFF corresponding to the output of the CP1, by which the exciting current of the solenoid 1 is controlled. A dither component generating signal Vb whose level changes with the output change of the comparator CP1 is inputted into the arithmetic device 7 to change the arithmetic output signal V0, and a dither current is superposed on an exciting current Is.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solenoid drive control device for controlling an exciting current flowing through a solenoid so as to maintain a target value.

[0002]

2. Description of the Related Art A solenoid is used for causing a mechanical displacement of a predetermined control target. The solenoid is an electromagnet provided with a movable iron core and an exciting coil, and causes an exciting current to flow through the exciting coil to generate a displacement in the movable iron core substantially in proportion to the exciting current.

For example, in a speed control device for controlling the rotation speed of an internal combustion engine so as to keep it at a designated speed, a solenoid is used as a drive source for operating a fuel supply amount adjusting member for adjusting the supply amount of fuel to the internal combustion engine. Often.

[0004] The solenoid has hysteresis in its operating characteristics. When the value of the exciting current is increased once from a certain value and then reduced to the same value, the position of the movable iron core returns to the original position. There is a property that does not return. for that reason,
When controlling the solenoid, it is necessary to superimpose a dither current having a predetermined amplitude on the excitation current in order to remove the hysteresis.

FIG. 8 shows a conventional solenoid drive control device for controlling the excitation current flowing through the solenoid to a target value. In FIG. 8, reference numeral 1 denotes a solenoid, and 2 denotes a DC for supplying an excitation current to the solenoid 1. A battery 3 as a power supply is a constant voltage power supply circuit to which the voltage of the battery 2 is input through the power switch 4. The constant voltage power supply circuit 3
The voltage of 12 [V] output from the battery 2 is converted to a constant voltage of 8 [V].

5 is a p-channel MOSFET F1
And a PNP transistor T
The output voltage of the battery 2 is applied to the solenoid 1 through the power switch 4 and the main switch element 5a of the switch circuit 5 in a solenoid drive switch circuit including a control switch 5b composed of R1. The MOSFET F1 constituting the main switch element 5a of the switch circuit 5 is
When the transistor TR1 that constitutes the control switch 5b is off, the transistor TR1 is on and the transistor TR1 is off.
It goes off when 1 goes on.

Rs is a current detecting resistor connected in series to the solenoid 1 to detect an exciting current Is flowing through the solenoid 1. Both ends of the current detecting resistor are proportional to the exciting current Is. The current detection signal Vs having the set voltage value is obtained. This current detection signal Vs is input to a non-inverting amplifier 7 'that operates using the output voltage of the constant voltage power supply circuit 3 as a power supply voltage.

The amplifier 7 'includes an operational amplifier OP1 and a resistor R
a, Rb and R1 and a capacitor C1.
The current detection signal Vs 'is input and a current detection signal Vs' having a magnitude proportional to the exciting current of the solenoid is output.

When the resistances of the resistors Ri, Ra and Rb are indicated by the same signs as those indicating the resistances and the multiplication symbol is *, the current detection signal Vs' is given by the following equation.
Here, the resistance value of the current detection resistor Rs is set to a sufficiently small value of about 0.1Ω.

Vs ′ = {1+ (Rb / Ra)} * (Rs * Is) (1) When this current detection signal Vs ′ is illustrated with respect to the excitation current Is, it becomes as shown in FIG. Vs' changes linearly with the exciting current Is. Current detection signal V
o is given to the subtraction input terminal of the arithmetic unit 8 for performing addition and subtraction.

Reference numeral 9 denotes an instruction signal input terminal for inputting an instruction signal Vin having a voltage value that gives a target value of the exciting current Is of the solenoid. In the illustrated example, there is provided a terminal 9 'to which a PWM signal Vp composed of a pulse of a predetermined PWM frequency (for example, 5 KHz) is input, and the duty ratio Df of the PWM signal is proportional to the target value of the exciting current Is. It has become.

The PWM signal Vp is supplied to a low-pass filter (L
The input signal is converted into an instruction signal Vin composed of a DC voltage by the PF) 10 and supplied to the instruction signal input terminal 9. The instruction signal Vin is input to the addition input terminal of the arithmetic unit 8. P
Duty ratio Df [%] of WM signal Vp and filter 10
FIG. 1 shows the relationship with an instruction signal Vin output from
0, and the instruction signal Vin changes linearly with respect to the duty ratio Df of the PWM signal.

Reference numeral 11 denotes a dither signal generation circuit (oscillation circuit) for outputting a triangular waveform dither signal Vd. The triangular waveform dither signal Vd output from this circuit is input to a subtraction input terminal of the arithmetic unit 8. In order to balance the arithmetic unit 8,
The voltage Va corresponding to the average value of the triangular wave of the dither signal Vd is input to the addition input terminal of the arithmetic unit 8.

In order to prevent the average value Va of the dither signal Vd from remaining as a target value when the instruction signal Vin is zero,
An arithmetic unit output cutoff circuit 12 that shuts off the output of the arithmetic unit 8 when the instruction signal Vin becomes zero is provided.

The arithmetic unit 8 outputs a deviation signal between the instruction signal Vin on which the dither signal Vd is superimposed and the current detection signal Vo. This deviation signal is proportional-integral operation circuit (PI operation circuit)
After being input to 13 and subjected to a proportional integral operation, it is input to a PWM circuit 14. The PWM circuit 14 supplies a pulse signal of a PWM frequency intermittently with a predetermined duty ratio to the base of the control transistor 5b of the drive circuit 5 to turn on and off the control transistor 5b at the PWM frequency, thereby forming the main switch element 5a. The current detection signal Vo is controlled to match the DC instruction signal Vin by turning on and off the FET.

In the control device shown in FIG. 8, an instruction signal (PW
FIG. 11 shows the relationship between the duty ratio Df of the (M signal) Vp and the excitation current Is of the solenoid 1.

In the control device shown in FIG. 8, the dither signal V
Since the current detection signal Vo is increased or decreased by the amplitude of d, the dither current Id is superimposed on the exciting current of the solenoid 1. When a dither signal Vd as shown in FIG. 12A is given from the dither circuit, the exciting current Is becomes
As shown in (B), the waveform decreases with the rise of the dither signal Vd and rises with the fall of the dither signal Vd.
That is, the waveform of the exciting current Is is a waveform in which the dither current Id having a waveform opposite in phase to the dither signal Vd is superimposed on the target value Ip.

In the example shown in FIG. 8, a target value of the exciting current is given in the form of a PWM signal Vp having a duty ratio equal to the target value of the exciting current, and the PWM signal is converted into a DC voltage to thereby provide an instruction signal. However, the instruction signal Vin may be supplied to the instruction signal input terminal 9 in the form of a DC voltage from the beginning.

[0019]

In the conventional solenoid drive control device shown in FIG. 8, since the frequency and amplitude of the dither signal Vd are constant, the frequency and amplitude of the dither signal Vd depend on the inductance of the solenoid coil and the target value of the exciting current Is. Has a problem that the target dither current Id cannot flow.

FIG. 13A shows a dither signal Vd supplied from the dither circuit, and FIG. 13B shows the target value I of the exciting current when the inductance of the solenoid coil is large.
The waveform of the exciting current Is when p is small is shown. As described above, when the inductance of the solenoid coil is large and the target value of the exciting current is small, the dither signal V
In the process of increasing the excitation current Is following the decrease of d, the excitation current is PWM-controlled by turning on / off the switch element 5a of the drive circuit at a predetermined duty ratio, but the excitation current is controlled following the rise of the dither signal. In the process of decreasing, since the exciting current does not readily decrease due to the large inductance of the solenoid coil, the PWM control circuit
The duty ratio is set to 0%, and the main switch element 5a of the drive circuit is kept off. In the process in which the duty ratio of the PWM control becomes 0%, the main switch element 5a of the drive circuit
Is kept in the OFF state, the exciting current of the solenoid 1 is not controlled, and attenuates according to an attenuation constant determined by the inductance of the coil of the solenoid and the resistance of the circuit.

FIG. 13C shows a case where the target value of the exciting current is set to a value larger than the rated value.
In this case, when the exciting current reaches the rated value, the exciting current cannot flow any more.
When the duty ratio is set to 100% to increase the exciting current, the exciting current is saturated. In the process of decreasing the exciting current following the rise of the dither signal, PWM control of the exciting current is performed. When the dither frequency is increased and the dither current is increased, the range of the uncontrollable exciting current is further increased.

FIG. 14 shows the relationship between the exciting current Is and the dither current Id when the solenoid is controlled by the conventional constant current control device. The target value of the exciting current Is is in the range of Is1 to Is2. In some cases, the target dither current Id1 can flow. However, when the target value of the exciting current is less than the critical value Is1 and exceeds the threshold value Is2, the target dither current Id1 cannot flow. When the target value of the dither current is increased as shown by Id2 (> Id1), the range of the exciting current in which the target dither current can flow shifts to a large current range, and the target value of the exciting current becomes Is1. ´
If it does not exceed (> Is1), the target dither current cannot flow.

As described above, in the conventional constant current control device, when the target value of the exciting current is extremely small or larger than the rated value, a period occurs in which the exciting current cannot be controlled in response to the dither signal. In addition, there is a problem that the dither current is insufficient and the hysteresis characteristic of the solenoid cannot be removed.

In addition, since the conventional constant current control device employs PWM control, a PI operation circuit and a PWM circuit are required, and a dither circuit 11, a circuit for applying the average voltage Va, and an operation unit output cutoff are required. Since the circuit 12 had to be provided, there was a problem that the circuit configuration became complicated.

An object of the present invention is to provide a solenoid drive control circuit capable of removing a hysteresis of a solenoid by allowing a required dither current to flow in the entire range of the excitation current of the solenoid. It is in.

Another object of the present invention is to provide a simple circuit configuration,
An object of the present invention is to provide a solenoid drive control circuit capable of obtaining a control characteristic without hysteresis by controlling an exciting current of a solenoid.

[0027]

SUMMARY OF THE INVENTION The present invention comprises a switch element that is turned on and off when an on command signal is given and when an off command signal is given, respectively. A solenoid drive switch circuit for flowing an exciting current to the solenoid through the switch element, an instruction signal input terminal for inputting an instruction signal having a voltage value for giving a target value (average value) of the exciting current of the solenoid, and an exciting current flowing through the solenoid Current detection means for outputting, as a current detection signal, a voltage proportional to the excitation current detected by detecting the difference between the excitation current detected by the current detection means and the target value of the excitation current given by the instruction signal. And a switch control circuit for controlling the solenoid drive switch circuit so that To. In the present invention, the switch control circuit compares the instruction signal and the operation output signal with the operation unit that receives the current detection signal as an input and outputs a voltage signal having an average value corresponding to the current detection signal as an operation output signal. When the level of the operation output signal is equal to or lower than the level of the instruction signal, an ON command signal is supplied to the switch circuit, and when the level of the operation output signal exceeds the level of the instruction signal, an OFF instruction signal is supplied to the switch circuit. A comparator, and when the comparator generates an off command signal, raises the operation output signal by an amount corresponding to one half of the amplitude of a dither current superimposed on the excitation current in order to remove hysteresis of the solenoid, When the comparator generates the ON command signal, the voltage level is adjusted according to the output of the comparator so as to lower the operation output signal by an amount corresponding to half the amplitude of the dither current. And generating a dither component generation signal Le is changed, and a dither component generation signal generating circuit for inputting said dither component generation signal to the computing unit. With the above configuration, the comparator gives an ON command signal to the switch circuit when the average value of the exciting current is equal to or less than the target value, so that the switch circuit is turned on and the exciting current flows through the solenoid. When the average value of the exciting current exceeds the target value, the comparator gives an off command signal to the switch circuit, so that the switch circuit is turned off and the exciting current is attenuated. The repetition of these operations keeps the exciting current substantially at the target value. As described above, in the present invention, the PI operation circuit and the PWM circuit are not required, and the circuit for applying the average voltage Va and the operation unit output cutoff circuit need not be provided, so that the configuration of the device can be simplified. it can.

Further, as described above, the dither component generation signal whose voltage level changes in accordance with the change in the output of the comparator is input to the arithmetic unit, so that the arithmetic output signal input to the comparator is changed. If you try to generate components,
It is not necessary to change the excitation current following the externally applied dither signal.Therefore, the inductance of the solenoid coil is large, regardless of the target value of the excitation current, over the entire range where the excitation current can be controlled. Even in this case, a dither current having a predetermined amplitude can always flow.

Further, as described above, a dither component generation signal whose voltage level changes in accordance with a change in the output of the comparator is input to the arithmetic unit, thereby changing the arithmetic output signal input to the comparator. When the dither component is generated, the target value of the exciting current is set to １ ／ of the amplitude of the dither current.
Below this, the comparator remains in the state of generating the off command signal, and the exciting current is cut off. Therefore, it is possible to omit the current interruption circuit conventionally required to prevent the exciting current from remaining when the target value of the exciting current is set to zero.

The arithmetic unit has a first addition input terminal, a second addition input terminal, and a subtraction input terminal.
A first voltage having a magnitude obtained by multiplying the value of the voltage input to the addition input terminal by the first coefficient and a magnitude obtained by multiplying the value of the voltage input to the second addition input terminal by the second coefficient A voltage having a magnitude obtained by subtracting a third voltage having a magnitude obtained by multiplying a value of the voltage inputted to the subtraction input terminal by a third coefficient from a voltage of the sum of the second voltage having the second voltage and the operation output signal It is preferable to use one that outputs as

In this case, a dither component generation signal consisting of a constant level of DC voltage is generated when the comparator is outputting an off command signal, and the dither component is generated when the comparator is outputting an on command signal. A dither component generation signal generation circuit for stopping generation of the generation signal is provided, and a current detection signal and a dither component generation signal are input to a first addition input terminal and a second addition input terminal of the arithmetic unit, respectively. It is preferable that a constant DC voltage is input to the subtraction input terminal.

The dither component generation signal generation circuit can be constituted by an inversion circuit (inverter circuit) for inverting the output of the comparator.

As described above, when the exciting current is cut off when the target value of the exciting current becomes 1/2 or less of the amplitude of the dither current, when the amplitude of the dither current is set to be large, In addition, there arises a problem that the lower limit of the range in which the exciting current can be controlled becomes large and the exciting current cannot be controlled in a small current range.

In order to solve such a problem, a capacitor and a charging circuit for charging the capacitor with a constant time constant with the output voltage of the constant voltage power supply circuit when the comparator is outputting the OFF command signal. A discharge circuit that discharges the charge of the capacitor when the comparator is generating an ON command signal, and indicates a level corresponding to the voltage across the capacitor when the comparator is outputting an OFF command signal. A control voltage generating circuit that outputs a control voltage indicating a level substantially equal to the output voltage of the constant voltage power supply circuit when the comparator is outputting the ON command signal; Indicates a high level when is below a threshold set to a value lower than the output voltage of the constant voltage power supply circuit, and a dither component which falls to zero level when the control voltage reaches the threshold. A dither component generation signal generation circuit for outputting a generation signal; and a current detection signal and a dither component generation signal input to a first addition input terminal and a second addition input terminal of the addition / subtraction unit, respectively. It is preferable that the output voltage of the constant voltage power supply circuit is input to the subtraction input terminal.

In this case, the charging time constant of the capacitor is the time required for the control voltage to reach the threshold value when the capacitor is charged with the time constant, and the target value of the exciting current is 1 / (the amplitude of the dither current). When it is equal to 2, it is set to be slightly longer than the time required for the exciting current to decay to the target value.

With this configuration, even when the target value of the exciting current becomes equal to or less than 1/2 of the amplitude of the dither current, the dither component generation signal is set to zero level when the control voltage reaches the threshold value. Thus, the level of the operation output signal can be reduced to a level lower than the instruction signal, so that the ON command signal can be generated from the comparator, and the exciting current can flow. Therefore, the exciting current can be controlled up to a small current range.

[0037]

FIG. 1 shows an example of the configuration of a solenoid drive control device according to the present invention.
Reference numeral 1 denotes a solenoid having an exciting coil 1a and a movable iron core 1b, the movable iron core being displaced in proportion to an exciting current flowing through the exciting coil, 2 a battery as a DC power supply, 3 an output voltage of the battery 2 through a switch 4 The input constant voltage power supply circuit. In this example, the solenoid 1 controls a fuel supply amount adjusting member (for example, a throttle lever) of the engine in order to control the rotation speed of the internal combustion engine to be maintained at the instructed speed.
It is assumed that it will be used as an actuator for operating the.

When the solenoid is used to operate accessories of the internal combustion engine, the battery 2 is charged through the charging circuit by the output of the magnet generator attached to the engine. Therefore, the output voltage of the battery 2 fluctuates to some extent around the rated voltage (12 V in this example).
The constant voltage power supply circuit 3 converts the output voltage of the battery 1 to a constant voltage VE (8 V in the illustrated example) and supplies it to each part of the control circuit. A Zener diode ZD1 and a power supply capacitor C2 are connected between the input terminal and the output terminal of the constant voltage power supply circuit 3, respectively.

The switch 4 may be a manual switch,
It may be a normally open contact of a relay which is excited when a manual switch such as a key switch is closed.

Reference numeral 5 denotes a solenoid drive switch circuit for turning on and off a current flowing from the battery 2 to the coil 1a of the solenoid 1. This switch circuit controls a main switch element 5a for turning on and off an exciting current and on / off control of the main switch element. And a control switch 5b. The illustrated main switch element 5a is a p-channel type MOSFET.
The source is connected to the positive output terminal of the battery 2 through the switch 4, and the drain is connected to one end of the exciting coil 1a of the solenoid.
Between the source and the gate of the FET F1, a protective zener diode ZD2 for limiting the voltage between the source and the gate of the FET F1 is connected with its anode facing the gate of the FET. The control switch element 5b comprises a PNP transistor TR1, the emitter of which is connected to the source of the FET F1, and the collector of which is connected to the gate of the FET F1 through a resistor R2. The collector of the transistor TR1 is grounded through the resistor R3. In this switch circuit 5, while the transistor TR1 is off, the FET
When a battery voltage is applied between the source and drain of F1, the FET (main switch element) is turned on, and when the transistor TR1 is turned on, FE is turned on.
TF1 is turned off.

In this switch circuit 5, the terminal 5A connected to the base of the transistor TR1 is a control input terminal, and when an ON command signal is supplied to the control input terminal and when an OFF command signal is supplied to the control input terminal. The main switch element 5a is turned on and off, respectively.

In the illustrated example, since a PNP transistor is used as the transistor TR1 constituting the control switch 5b, the transistor is turned on when the base potential is at zero level (earth potential). And turns off when the potential of its base is brought high relative to ground. Therefore, in this example, the ON command signal applied to the control input terminal 5A is a zero level signal,
The off command signal is a high level signal.

The other end of the solenoid exciting coil 1a is grounded through a current detecting resistor Rs, and a flywheel diode having an anode directed to the ground side in parallel with a series circuit of the exciting coil 1a and the current detecting resistor Rs. D1 is connected.

The current detecting resistor Rs is composed of a resistor having a sufficiently small resistance value of about 0.1Ω, and a current detection signal (voltage signal) Vs is generated at both ends of the resistor Rs in proportion to the exciting current Is of the solenoid. . In this example, a current detecting means for detecting an exciting current flowing through the solenoid 1 by the current detecting resistor Rs and outputting a voltage proportional to the detected exciting current as a current detection signal.

The current detection signal Vs is input to the calculator 7. The arithmetic unit 7 is an addition / subtraction arithmetic unit comprising an operational amplifier OP1, a resistor R1, and Ra to Rd and a capacitor C1.
A first addition input terminal 7a and a second addition input terminal 7b
And one subtraction input terminal 7c and one output terminal 7d. In the arithmetic unit 7 shown in the figure, resistors having the same reference numerals (for example, Ra and Ra) have the same resistance value.

In the figure, the resistors Ra and Rc and Rb and Rd are shown separately for easy understanding of the configuration of the arithmetic unit. However, the resistors Ra and Rc connected in parallel to each other In the circuit, it is replaced by one resistor having a resistance equal to the parallel combination of both resistors. Similarly,
The resistors Rb and Rd connected in parallel to each other are also replaced by one resistor having a resistance equal to the parallel combined value of both resistors.

The arithmetic unit 7 shown in the figure has a first addition input terminal 7.
a first voltage having a value obtained by multiplying the value of the voltage input to a by the first coefficient and a value obtained by multiplying the value of the voltage input to the second addition input terminal 7b by the second coefficient A voltage having a magnitude obtained by subtracting a third voltage having a magnitude obtained by multiplying the value of the voltage input to the subtraction input terminal 7c by a third coefficient from the sum of the voltage having the second voltage and the operation output signal Vo Output as

A current detection signal Vs is input to a first addition input terminal 7a of the arithmetic unit 7, and a dither component generation signal Vb described later is input to a second addition input terminal 7b. Further, the constant voltage VE output from the constant voltage circuit 3 is input to the subtraction input terminal 7c, and the operation output signal Vo obtained from the output terminal 7d of the operation unit is input to the inversion input terminal of the voltage comparator CP1.

Also in this example, the input terminal 9 'to which the PWM signal Vp whose duty ratio is equal to the target value of the exciting current is input.
Is provided, and a PWM signal supplied to this input terminal is converted into an instruction signal (DC voltage) by the low-pass filter 10.
It is converted to Vin. This instruction signal Vin is input to the non-inverting input terminal of the comparator CP1 through the instruction signal input terminal 9.

The output terminal of the comparator CP1 is connected to the control input terminal 5A of the switch circuit 5 and to the input terminal of the inverting circuit (inverter) INV1, and the dither component generation signal output from the inverter INV1. V
b is input to the second addition input terminal 7 b of the arithmetic unit 7.

A power terminal (not shown) of the comparator CP1 has
A constant voltage VE is applied from the constant voltage power supply circuit 3. The potential Vc of the output terminal of the comparator CP1 is equal to the operation output signal Vo.
Indicates a high level (= constant voltage VE) when the level is equal to or lower than the level of the instruction signal Vin, and indicates a zero level (earth potential) when the level of the arithmetic output signal Vo exceeds the level of the instruction signal Vin. The output Vb of the inverting circuit INV1 becomes 0 when the output of the comparator CP1 is VE, and becomes VE when the output of the comparator CP1 is 0.

In the present invention, this inverting circuit INV1
Is input to the arithmetic unit 7 as a dither component generation signal, thereby changing the arithmetic output signal Vo in accordance with the level change of the signal Vb, thereby changing the excitation current Is, and changing the excitation current Is Superimpose current.

In the solenoid drive control device shown in FIG. 1, if the resistance values of the resistors Ra to Rd of the arithmetic unit 7 are represented by the same symbols as the symbols indicating the respective resistances, the arithmetic output signal Vo output from the arithmetic unit 7 becomes It is given by the following equation.

Vo = (Rb / Ra) * Vs + (Rb / Rc) * Vb− (Rb / Rd) * VE (2) The first voltage is represented by the first term (Rb) on the right side of the equation (2). / R
a) * Vs, and Rb / Ra is the first coefficient. This first voltage (Rb / Ra) * Vs is the current detection signal Vs
It is a component corresponding to.

The above-mentioned second and third voltages are respectively the second and third terms on the right side of the equation (2).
b / Rc and Rb / Rd are the second coefficient and the third coefficient, respectively.
Is the coefficient of

Here, the difference (Rb / Rc) * Vb- (Rb / Rd) * VE between the second voltage and the third voltage depends on the change (VE or 0) of the output level of the comparator CP1. And the amplitude of the dither current superimposed on the exciting current is 1 /
This is a dither component corresponding to 2. In the present invention, the second coefficient is set so that the voltage of the difference between the second voltage and the third voltage has a magnitude corresponding to の of the amplitude Id of the dither current superimposed on the exciting current of the solenoid. Rb / Rc and a third coefficient Rb / Rd are set.

The voltage of the difference between the second voltage and the third voltage is
When Vb = VE, (Rb / Rc) * VE- (Rb / R
d) * VE, and when Vb = 0,-(Rb / Rd)
* VE. Here, (Rb / Rc) = 2 (Rb / R
When the resistance value is set to be d), the voltage of the difference between the second voltage and the third voltage is Vb = VE and Vb =
When 0, + (Rb / Rd) * VE and-
(Rb / Rd) * VE, and the absolute value of the difference between the second voltage and the third voltage is a value corresponding to half the amplitude of the dither current. Here, the dither component is expressed as VD / 2 = (Rb / R
d) * VE, the arithmetic output signal Vo is calculated as an average value (Rb / Ra) * Vs corresponding to the current detection signal.
The signal changes up and down by ± VD / 2.

FIG. 2A shows that the exciting current Is is equal to the target value Ii.
(Given by the instruction signal Vin), the operation output signal Vo is shown with respect to time t, and FIG. 7B shows the change in the output voltage Vc of the comparator CP1. FIGS. 2C and 2D show changes in the dither component generation signal Vb and the excitation current Is, respectively.

As is apparent from these figures, the exciting current Is increases from the target value Ii by Id / 2 (a value corresponding to VD / 2), and the operation output signal Vo exceeds the level of the instruction signal Vin. The output voltage Vc of the comparator CP1 becomes 0
And the dither component generation signal Vb rises to VE. When the dither component generation signal Vb rises to VE, the arithmetic output signal Vo rises by + VD / 2.
At this time, since the switch element 5a of the switch circuit 5 is turned off, the solenoid 1 is disconnected from the power supply.
Therefore, the exciting current Is of the solenoid flows through the flywheel diode D1, and attenuates at a constant rate. As the exciting current Is decreases, the arithmetic output signal Vo
Also decrease. When the exciting current Is further decreases by Id / 2 from the target value Ii (given by the instruction signal Vin), the output voltage Vc of the comparator CP1 rises to VE, so that the transistor TR1 is turned off and the FET TR1 is turned off.
F1 is turned on, and an exciting current is supplied from the battery 2 to the solenoid 1. At this time, since the dither component generation signal Vb becomes 0, the operation output signal Vo changes by -VD / 2 with respect to the operation output signal Vo. By these operations, the excitation current Is changes up and down by the dither component Id / 2 around the target value Ii, and the dither current having the amplitude Id is superimposed on the excitation current.

In the control device shown in FIG.
When the comparator CP1 generates the OFF command signal by V1, the operation output signal Vo is increased by an amount corresponding to 1/2 of the amplitude of the dither current superimposed on the exciting current in order to eliminate the hysteresis of the solenoid 1. , When the comparator CP1 generates the ON command signal, the amplitude of the dither current becomes 1 /
In order to lower the arithmetic output signal by an amount corresponding to 2, a dither component generation signal whose voltage level changes in accordance with the output of the comparator CP1 is generated, and the dither component generation signal is input to the arithmetic unit 7. A dither component generation signal generation circuit is configured.

The exciting current detected by the current detecting means (resistor Rs) and the exciting current given by the instruction signal Vin by the arithmetic unit 7, the comparator CP1, and the dither component generation signal generating circuit (INV1). A switch control circuit for controlling the solenoid drive switch circuit so as to make the deviation from the target value of zero zero.

According to the control device shown in FIG. 1, since a change in the output of the comparator is detected and a dither current is generated, as shown in FIG. By passing a dither current Id equal to the value Id1, the hysteresis of the solenoid can be eliminated. The characteristic shown by the broken line in FIG. 3 indicates the characteristic of the conventional control device shown in FIG.

According to the present invention, when the target value of the exciting current is equal to or smaller than 1/2 of the amplitude of the dither current, the comparator CP1 does not generate the ON command signal.
The current cutoff circuit 12 required by the conventional control device becomes unnecessary.

As described above, in the control device shown in FIG. 1, the exciting current cannot be flowed in a range where the target value of the exciting current is equal to or less than の of the amplitude of the dither signal. If the dither current amplitude is small, this is no problem,
If the exciting current cannot be supplied when the target value of the exciting current becomes equal to or less than の of the amplitude of the dither signal, the lower limit value of the exciting current that can be controlled when the target value of the dither current is large becomes large. The range of the exciting current that can be controlled may be too narrow. An embodiment of the present invention that can solve this problem is shown in FIG.

In the control device shown in FIG. 4, the comparator CP1
Is connected to the cathode of a diode D2, one end of a capacitor C3 is connected to the anode of the diode D2,
The other end of the resistor R5 having one end connected to the output terminal on the positive polarity side of the constant voltage power supply circuit 3 is connected. Capacitor C
A resistor R6 and a diode D3 having an anode directed toward the capacitor C3 are connected in parallel between the other end of C3 and the output terminal on the positive polarity side of the constant voltage power supply circuit 3. The voltage between the other end of the capacitor C3 and the ground is used as a control voltage Vt as an inverting circuit IN constituting a dither component generation signal generating circuit.
V1 and the output of the inverting circuit is input to the second addition input terminal 7b of the arithmetic unit 7. Other configurations are the same as those of the control device shown in FIG.

In the solenoid drive control device shown in FIG. 4, the level of the operation output signal Vo exceeds the level of the instruction signal Vin, and the potential of the output terminal of the comparator CP1 becomes the ground potential (an off command signal is generated). ), A resistor R6, a capacitor C3 and a diode D at the output of the constant voltage power supply circuit 3.
Current flows through 2 and the output stage of comparator CP1, and capacitor C3 is charged with a constant time constant. At this time, part of the electric charge of the capacitor C3 is converted to the diode D3 and the resistor R5.
And discharge through. When the level of the operation output signal Vo becomes lower than the level of the instruction signal Vin and the output of the comparator CP1 becomes high (an ON command signal is generated), the charging of the capacitor C3 is stopped, and the electric charge of the capacitor C3 is reduced. , And discharges through the diode D3 and the resistor R5. Therefore, the control voltage Vt obtained between the other end of the capacitor C3 and the ground indicates a level corresponding to the voltage across the capacitor C3 when the comparator CP1 is outputting the OFF command signal. When the ON command signal is being output, the voltage indicates a level substantially equal to the output voltage of the constant voltage power supply circuit 3.

The inverting circuit INV1 receives the control voltage Vt.
Indicates a high level when the control voltage Vt is less than a threshold value Vth set to a value lower than the output voltage of the constant voltage power supply circuit, and indicates zero when the control voltage reaches the threshold value. A dither component generation signal that falls to the level is output.

The charging time constant of the capacitor C3 is the time required for the control voltage Vt to reach the threshold value Vth when the capacitor C3 is charged with the time constant, and the target value of the exciting current Is is determined by the amplitude of the dither current. When the value is equal to 1/2, the time required for the exciting current to attenuate to the target value Ii after the switching circuit 5 is turned on and the exciting current Is starts to flow (time Ti in FIG. 5) is slightly shorter than the time. Set to be longer.

In the control device shown in FIG.
It is assumed that the level of the instruction signal Vi is reduced as time elapses as shown in FIG. At this time, the waveforms of the operation output signal Vo, the output Vc of the comparator CP1, the control voltage Vt, the dither component generation signal Vb, and the excitation current Is are as shown in FIGS. 5B to 5F, respectively.

In the example shown in FIG. 5, at the time t2, the level of the instruction signal Vin is 1 / (the amplitude Id of the dither current of the exciting current).
It is equal to or less than the value Vi1 corresponding to 2. When the target value of the exciting current becomes smaller than 1/2 of the amplitude of the dither current, the output Vc of the comparator CP1 remains at zero level (while the off command signal is generated). Since the control voltage Vt reaches the threshold value Vth of the inverting circuit INV1 at time t3 due to the rise in the voltage at both ends,
The inverting circuit INV1 performs an inverting operation to bring its output to a zero level and the dither component generation signal Vb to a zero level.
As a result, the output Vc of the comparator CP1 becomes high level, so that the main switch element 5a of the switch circuit is turned on, and the exciting current is supplied from the battery 2 to the solenoid 1.

As described above, according to the configuration shown in FIG.
Even when the target value of the exciting current becomes equal to or less than の of the amplitude of the dither current, the dither component generation signal Vb is set to the zero level when the control voltage Vt reaches the threshold value, and the arithmetic output signal Vo Can be reduced to a level lower than the instruction signal Vin, an ON command signal can be generated from the comparator, and the excitation current Is can flow, and the small current of less than half the amplitude of the dither current can be obtained. Excitation current can be controlled up to the basin.

In the example shown in FIG. 4, the constant voltage power supply circuit 3-
Resistance R5-Capacitor C3-Diode D2-Comparator C
By the circuit of the output stage of P1, the ground circuit, and the constant voltage power supply circuit 3, when the comparator CP1 is outputting the OFF command signal (when the potential of the output terminal of the comparator is at the ground potential), A charging circuit is configured to charge the capacitor C3 with a constant time constant at the output voltage of C3. Capacitor C3-diode D3-resistor R5-capacitor C
The circuit of No. 3 constitutes a discharge circuit for discharging the charge of the capacitor when the comparator is generating the ON command signal. The comparator CP1 is turned off by the capacitor C3 and the charging circuit and the discharging circuit. When a command signal is being output, a level corresponding to the voltage between both ends of the capacitor C3 is shown, and when the comparator CP1 is outputting an ON command signal, a level substantially equal to the output voltage of the constant voltage power supply circuit 3 is shown. A control voltage generation circuit that outputs the control voltage Vt is configured.

In the example shown in FIG. 1, the control switch 5b
Is constituted by the PNP transistor TR1, but as shown in FIG. 6, the control switch 5b may be constituted by the NPN transistor TR1 '. In this case,
The instruction signal Vin is input to the inverting input terminal of the comparator CP1,
The operation output signal Vo is input to the non-inverting input terminal of the comparator CP1. The current detection signal Vs is input to the first addition input terminal 7a of the arithmetic unit 7, and the output voltage V of the constant voltage power supply circuit is applied to the second addition input terminal 7b and the subtraction input terminal 7c.
E and the dither component generation signal Vb are input.

Similarly, also in the control device shown in FIG. 4, the control switch 5b can be constituted by an NPN transistor. In the control device shown in FIG.
An NPN transistor TR1 'as the control switch 5b
FIG. 7 shows the configuration in the case of using.

In each of the above embodiments, a p-channel MOSFET is used as the main switch element 5a of the solenoid drive switch circuit 5, but the main switch element 5a
Can be constituted by another switch element capable of on / off control.

In the solenoid drive control device shown in FIG. 1, a PNP transistor T is used as the main switch element 5a.
FIG. 15 shows the configuration of the control device using Ro, and FIG. 16 shows the configuration of the solenoid drive control device shown in FIG. 4 when a PNP transistor is used as the main switch element 5a. The operation of the solenoid drive control device shown in FIGS. 15 and 16 is the same as the operation of the control device shown in FIGS. 1 and 4, respectively.

Further, in the control device shown in FIGS. 15 and 16, the transistor TR1 can be replaced with an NPN transistor.

Here, the configurations of the control devices shown in FIGS. 1 and 6, the control devices shown in FIGS. 4 and 7, and the control devices shown in FIGS. 15 and 16 are summarized as follows.

(1) The control device shown in FIG. 1 has a constant voltage power supply circuit 3 for outputting a constant voltage with the output of the DC power supply 2 as an input, and a source connected to the positive output terminal of the DC power supply 2. A p-channel MOSFET F1 having a drain connected to one end of a solenoid coil; a PNP transistor having an emitter and a collector connected to the source and gate of the FET; a second end of the solenoid 1 coil and a negative polarity side of the DC power supply; , A flywheel diode D1 connected in parallel with the coil of the solenoid 1, and an instruction to input an instruction signal having a voltage value that gives a target value. It has a signal input terminal 9, a first addition input terminal 7a, a second addition input terminal 7b, and a subtraction input terminal 7c. A first voltage having a value obtained by multiplying the value of the input voltage by a first coefficient and a second voltage having a value obtained by multiplying the value of the voltage input to the second addition input terminal by a second coefficient Arithmetic unit 7 that outputs a voltage having a value obtained by subtracting a third voltage having a value obtained by multiplying the value of the voltage input to the subtraction input terminal by a third coefficient from a voltage of the sum of the voltage and a third coefficient as a calculation output signal And a voltage comparator CP1 having the non-inverting input terminal and the inverting input terminal receiving the instruction signal and the operation output signal, respectively, and an output terminal connected to the base of the PNP transistor; And an inverting circuit INV1 for inverting the voltage between them. The current detection signal Vs obtained at both ends of the current detection resistor Rs and the output signal Vb of the inverting circuit are input to the first addition input terminal 7a and the second addition input terminal 7b of the arithmetic unit 7, respectively. The output voltage VE of the constant voltage power supply circuit 3 is input to the subtraction input terminal 7c, and the dither current in which the voltage of the difference between the second voltage and the third voltage is superimposed on the exciting current Is in order to remove the hysteresis of the solenoid 1 1 of the amplitude of
/ 2 so as to have a size corresponding to / 2.
Is set.

(2) The solenoid drive control device shown in FIG. 6 includes a constant voltage power supply circuit 3 for outputting a constant voltage with an output of a DC power supply (battery) 2 as an input, and a positive output of the DC power supply. P-channel MOSFE with its drain connected to one terminal and one end of a solenoid coil
T F1, an NPN transistor TR 1 ′ having a collector and an emitter connected to the source and the gate of the FET F 1, respectively, and a current detection connected between the other end of the coil of the solenoid 1 and the negative output terminal of the DC power supply. Resistance Rs, a flywheel diode D1 connected in parallel to the solenoid coil, an instruction signal input terminal to which an instruction signal having a voltage value giving a target value is input, and a first addition input terminal 7a. Second addition input terminal 7b
And a subtraction input terminal 7c.
a first voltage having a value obtained by multiplying the value of the voltage input to a by the first coefficient and a value obtained by multiplying the value of the voltage input to the second addition input terminal 7b by the second coefficient A voltage having a magnitude obtained by subtracting a third voltage having a magnitude obtained by multiplying the value of the voltage input to the subtraction input terminal 7c by a third coefficient from the sum of the voltage having the second voltage and the operation output signal Vo , A voltage comparator having an inverting input terminal and a non-inverting input terminal respectively receiving an instruction signal Vin and an operation output signal Vo, and having an output terminal connected to the base of the NPN transistor TR1; It has an inverting circuit INV1 for inverting the voltage between the output terminal of CP1 and ground. Then, the current detection signal Vs obtained at both ends of the current detection resistor Rs and the output voltage VE of the constant voltage power supply circuit are input to the first addition input terminal 7a and the second addition input terminal 7b of the arithmetic unit 7, respectively. At the same time, the output signal of the inverting circuit INV1 is input to the subtraction input terminal 7c, and the second voltage and the third
The second coefficient and the third coefficient are set so that the voltage of the difference between the second coefficient and the third coefficient becomes a magnitude corresponding to one half of the amplitude of the dither current superimposed on the exciting current in order to remove the hysteresis of the solenoid. Is set.

(3) The control device shown in FIG. 4 is a constant voltage power supply circuit 3 for outputting a constant voltage with an output of a DC power supply as an input.
A p-channel MOSFET F1 having a source connected to the positive output terminal of the DC power supply and a drain connected to one end of a solenoid coil, and a PNP having an emitter and a collector connected to the source and gate of the FET, respectively. A transistor TR1, a current detection resistor Rs connected between the other end of the solenoid coil and the negative output terminal of the DC power supply, and a flywheel diode connected in parallel to the solenoid 1 coil D1
And an instruction signal input terminal 9 to which an instruction signal having a voltage value giving a target value is input, a first addition input terminal 7a, a second addition input terminal 7b, and a subtraction input terminal 7c,
The first voltage having a magnitude obtained by multiplying the value of the voltage input to the first addition input terminal 7a by the first coefficient and the value of the voltage input to the second addition input terminal 7b have the second coefficient From the sum of the voltage and the second voltage having a magnitude obtained by multiplying the third voltage having the magnitude obtained by multiplying the value of the voltage input to the subtraction input terminal 7c by the third coefficient. A computing unit 7 that outputs a voltage as a computation output signal Vo; an instruction signal Vin and a computation output signal Vo are input to a non-inverting input terminal and an inverting input terminal;
One end is connected to a voltage comparator CP1 connected to the base of R1 and the output terminal on the positive polarity side of the constant voltage power supply circuit 3 through a charging resistor R6, and the other end is connected to the output terminal of the comparator through a diode D2. Connected, comparator CP1
The capacitor C3 charged with a constant time constant by the output voltage of the constant voltage power supply circuit 3 when the potential of the output terminal is at the ground potential, and the voltage between one end of the capacitor C3 and the ground are input. And an inverting circuit for performing an inverting operation when a predetermined threshold value is exceeded. Then, the first addition input terminal 7a and the second addition input terminal 7
b, the current detection signal Vs obtained at both ends of the current detection resistor and the output voltage Vb of the inverting circuit INV1 are input, and the output voltage VE of the constant voltage power supply circuit 3 is input to the subtraction input terminal 7c. The second coefficient and the second coefficient are set so that the voltage corresponding to the difference between the second voltage and the third voltage has a magnitude corresponding to の of the amplitude of the dither current superimposed on the exciting current in order to eliminate the hysteresis of the solenoid. A coefficient of 3 is set. The charging time constant of the capacitor C3 is the time required for the voltage between one end of the capacitor and the ground to reach the threshold value of the inverting circuit INV1 when the capacitor C3 is charged with the time constant. When the amplitude is equal to one half of the amplitude of the current, the excitation current is set to be slightly longer than the time required for the excitation current to decay to the target value.

(4) The control device shown in FIG. 7 is a constant voltage power supply circuit 3 which outputs a constant voltage with an output of a DC power supply as an input.
A p-channel MOSFET F1 having a source connected to the output terminal on the positive polarity side of the DC power supply and a drain connected to one end of a solenoid coil; and an NPN having an emitter and a collector connected to the source and gate of the FET, respectively. A transistor TR1 ', a current detecting resistor Rs connected between the other end of the coil of the solenoid 1 and an output terminal on the negative polarity side of the DC power supply, and a flywheel connected in parallel to the coil of the solenoid 1 Diode D1
And an instruction signal input terminal 9 to which an instruction signal having a voltage value giving a target value is input, a first addition input terminal 7a, a second addition input terminal 7b, and a subtraction input terminal 7c,
Multiplying a first voltage having a magnitude obtained by multiplying a value of the voltage input to the first addition input terminal by a first coefficient and a value of the voltage input to the second addition input terminal by a second coefficient; A voltage obtained by subtracting a third voltage having a value obtained by multiplying a value of the voltage input to the subtraction input terminal by a third coefficient from a voltage of the sum of the second voltage having the second voltage and the third voltage. A computing unit 7 for outputting as a computation output signal, a voltage comparator CP1 having the inverting input terminal and the non-inversion input terminal receiving the instruction signal and the computation output signal, and having an output terminal connected to the base of the NPN transistor; One end is connected to the positive output terminal of the constant voltage power supply circuit through a charging resistor R6, and the other end is connected to the output terminal of the comparator CP1 via a diode D2. Potential is almost at the ground potential. A capacitor C3 charged with a constant time constant by the output voltage of the constant voltage power supply circuit when
An inverting circuit INV1 is provided which receives a voltage between one end of the capacitor C3 and ground and performs an inverting operation when the input voltage exceeds a predetermined threshold. Then, the current detection signal Vs obtained at both ends of the current detection resistor Rs and the output voltage VE of the constant voltage power supply circuit are input to the first addition input terminal 7a and the second addition input terminal 7b of the arithmetic unit 7, respectively. At the same time, the output voltage of the inverting circuit INV1 is input to the subtraction input terminal 7c, and the voltage of the difference between the second voltage and the third voltage is the amplitude of the dither current superimposed on the exciting current to remove the hysteresis of the solenoid. The second coefficient and the third coefficient are set so as to have a size corresponding to 1/2. The charging time constant of the capacitor C3 is the time required for the voltage between one end of the capacitor C3 and the ground to reach a threshold value when the capacitor is charged with the time constant, and the target value of the exciting current is the amplitude of the dither current. When it is equal to 1/2, the excitation current is set to be slightly longer than the time required for the exciting current to decay to the target value after the switch circuit is turned on.

(5) The control device shown in FIG. 15 has a constant voltage power supply circuit 3 for outputting a constant voltage with the output of the DC power supply 2 as an input, and an emitter connected to the positive output terminal of the DC power supply 2. A PNP transistor TRo having a collector connected to one end of a solenoid coil; a PNP transistor TR1 having an emitter and a collector connected to the emitter and base of the PNP transistor TRo; A current detection resistor Rs connected to the output terminal on the positive side, a flywheel diode D1 connected in parallel to the coil of the solenoid 1, and an instruction signal having a voltage value giving a target value are input. Having an instruction signal input terminal 9, a first addition input terminal 7a, a second addition input terminal 7b, and a subtraction input terminal 7c. A first voltage having a magnitude obtained by multiplying the value of the voltage input to the addition input terminal by the first coefficient and a magnitude obtained by multiplying the value of the voltage input to the second addition input terminal by the second coefficient A voltage having a magnitude obtained by subtracting a third voltage having a magnitude obtained by multiplying a value of the voltage inputted to the subtraction input terminal by a third coefficient from a voltage of the sum of the second voltage having the second voltage and the operation output signal A voltage comparator CP1 having the non-inverting input terminal and the inverting input terminal receiving the instruction signal and the arithmetic output signal, respectively, and having an output terminal connected to the base of the PNP transistor; CP
1 Inverting circuit INV for inverting the voltage between the output terminal and ground
1 and The current detection signal Vs obtained at both ends of the current detection resistor Rs and the output signal Vb of the inverting circuit are input to the first addition input terminal 7a and the second addition input terminal 7b of the arithmetic unit 7, respectively. The output voltage VE of the constant voltage power supply circuit 3 is input to the subtraction input terminal 7c, and the dither current in which the voltage of the difference between the second voltage and the third voltage is superimposed on the exciting current Is in order to remove the hysteresis of the solenoid 1 The second coefficient and the third coefficient are set so as to have a magnitude corresponding to 振幅 of the amplitude of.

(6) The control device shown in FIG. 16 has a constant voltage power supply circuit 3 for outputting a constant voltage with an output of a DC power supply as an input, an emitter connected to the positive output terminal of the DC power supply, and a collector connected thereto. A PNP transistor TRo connected to one end of a solenoid coil, a PNP transistor TR1 having an emitter and a collector connected to the emitter and base of the transistor TRo, and the other end of the solenoid coil and a negative output of the DC power supply. And a flywheel diode D1 connected in parallel to the coil of the solenoid 1, and an instruction signal input for receiving an instruction signal having a voltage value for providing a target value. Terminal 9 and first summing input terminal 7
a, a second addition input terminal 7b, and a subtraction input terminal 7c, and a first voltage having a magnitude obtained by multiplying a value of a voltage input to the first addition input terminal 7a by a first coefficient. And a second voltage having a magnitude obtained by multiplying the value of the voltage input to the second addition input terminal 7b by the second coefficient to the value of the voltage input to the subtraction input terminal 7c. A computing unit 7 for outputting a voltage having a magnitude obtained by subtracting a third voltage multiplied by a coefficient of 3 as a computation output signal Vo, an instruction signal Vin and a computation output signal to a non-inverting input terminal and an inverting input terminal. A voltage comparator CP1 having Vo input and an output terminal connected to the base of the PNP transistor TR1;
A charging resistor R is connected to the output terminal on the positive polarity side of the constant voltage power supply circuit 3.
6, one end is connected to the output terminal of the comparator through a diode D2, and the other end is fixed by the output voltage of the constant voltage power supply circuit 3 when the output terminal of the comparator CP1 is at the ground potential. And a reversing circuit that receives a voltage between one end of the capacitor C3 and the ground and performs a reversing operation when the input voltage exceeds a predetermined threshold value. And
The current detection signal Vs obtained at both ends of the current detection resistor and the output voltage Vb of the inverting circuit INV1 are input to the first addition input terminal 7a and the second addition input terminal 7b of the arithmetic unit 7, respectively. The output voltage VE of the constant voltage power supply circuit 3 is input to the terminal 7c, and the voltage of the difference between the second voltage and the third voltage is equal to one of the amplitude of the dither current superimposed on the exciting current to remove the hysteresis of the solenoid. The second coefficient and the third coefficient are set so as to have a size corresponding to / 2.

The charging time constant of the capacitor C3 is the time required for the voltage between one end of the capacitor and the ground to reach the threshold value of the inverting circuit INV1 when the capacitor C3 is charged with the time constant. When the value is equal to 振幅 of the amplitude of the dither current, it is set to be slightly longer than the time required for the exciting current to decay to the target value.

[0086]

As described above, according to the present invention, instead of changing the exciting current following the externally applied dither signal, the instruction signal for providing the target value of the exciting current and the detected value of the exciting current are used. The dither component is changed by inputting a dither component generation signal whose voltage level changes in accordance with a change in the output of the comparator to the arithmetic unit, thereby changing the arithmetic output signal input to the comparator. Is generated, so that a dither current of a predetermined amplitude always flows in all regions of the range where the exciting current can be controlled, regardless of the target value of the exciting current and the case where the inductance of the solenoid coil is large. There are advantages that can be.

In the present invention, a dither component generation signal whose voltage level changes in accordance with a change in the output of the comparator is input to the arithmetic unit, so that the arithmetic output signal input to the comparator is changed and the dither component is changed. Is generated, the target value of the exciting current is １ ／ of the amplitude of the dither current.
Below, the comparator remains in the state of generating the OFF command signal and the exciting current is cut off.Therefore, it is necessary to prevent the exciting current from remaining when the exciting current target value is set to zero. The configuration of the control device can be simplified by omitting the current cutoff circuit.

In the present invention, when the comparator is outputting the off command signal, the comparator shows a level corresponding to the voltage across the capacitor charged by a constant time constant, and the comparator outputs the on command signal. A dither component generation signal, which generates a control voltage indicating a level substantially equal to the output voltage of the constant voltage power supply circuit and falls from a high level to a zero level when the control voltage reaches a threshold value When the control voltage reaches the threshold value, the dither component generation signal is set to zero even when the target value of the excitation current becomes equal to or less than half the amplitude of the dither current. Level to lower the level of the operation output signal to a level lower than the instruction signal,
The excitation current can be caused to flow by generating an ON command signal from the comparator, and the excitation current can be controlled to a small current range.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration example of a control device according to the present invention.

FIG. 2 is a diagram showing signal waveforms of various parts of the control device of FIG. 1;

FIG. 3 is a diagram showing an example of a dither current-excitation current characteristic of the control device of FIG. 1;

FIG. 4 is a circuit diagram showing another configuration example of the control device according to the present invention.

FIG. 5 is a diagram showing signal waveforms of various parts of the control device of FIG. 4;

FIG. 6 is a circuit diagram showing still another example of the configuration of the control device according to the present invention.

FIG. 7 is a circuit diagram showing still another configuration example of the control device according to the present invention.

FIG. 8 is a circuit diagram showing a configuration example of a conventional control device.

9 is a diagram showing an output voltage-exciting current characteristic of an arithmetic unit of the control device of FIG. 8;

FIG. 10 is a diagram showing a relationship between an output voltage of a filter circuit of the control device of FIG. 8 and a duty ratio of a PWM signal.

FIG. 11 is a diagram showing an excitation current versus duty ratio characteristic of the control device of FIG. 8;

FIG. 12 is a waveform diagram showing a waveform of a dither signal and a waveform of an exciting current used in the control device of FIG. 8;

FIG. 13 is a waveform diagram showing a waveform of a dither signal used in the control device of FIG. 8, an exciting current waveform when the exciting current is low, and an exciting current waveform when the exciting current is large.

FIG. 14 is a diagram showing a dither current vs. exciting current characteristic of the control device of FIG. 8;

FIG. 15 is a circuit diagram showing still another configuration example of the solenoid drive control device according to the present invention.

FIG. 16 is a circuit diagram showing still another configuration example of the solenoid drive control device according to the present invention.

[Explanation of symbols]

1 ... solenoid, 2 ... battery, 3 ... constant voltage power supply circuit,
5: Solenoid drive switch circuit, 7: arithmetic unit, 7a
... First addition input terminal, 7b ... Second addition input terminal, 7
c: subtraction input terminal, 9: instruction signal input terminal, CP1: voltage comparator, INV1: inverting circuit, C3: capacitor, R
6… Charging resistor, D1… Flywheel diode, D
2 ... diode, R5 ... discharge resistor.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H03K 17/64 H03K 17/64 17/695 17/687 B (72) Inventor Yasukazu Hatano Numazu, Shizuoka 3744 Ooka F-term in Kokusan Denki Co., Ltd. (reference) EY13 EY17 EZ07 EZ09 EZ10 EZ14 EZ23 EZ43 EZ51 EZ57 FX04 FX32 GX01 GX04 GX06

Claims (8)

[Claims] 1. A switching element which is turned on and off when an ON command signal is supplied and when an OFF command signal is supplied, and an exciting current is supplied from a DC power supply to the solenoid through the switching element. A switch circuit for flowing a solenoid, an instruction signal input terminal to which an instruction signal having a voltage value that gives a target value of the excitation current of the solenoid is input, and an excitation current detected by detecting an excitation current flowing through the solenoid. Current detection means for outputting a proportional voltage as a current detection signal; and the solenoid drive so as to make a deviation between an excitation current detected by the current detection means and a target value of the excitation current given by the instruction signal zero. And a switch control circuit for controlling a switch circuit for the solenoid. A switch that receives the current detection signal as an input, outputs a voltage signal having an average value corresponding to the current detection signal as a calculation output signal, and compares the instruction signal with the calculation output signal. When the level of the operation output signal is equal to or lower than the level of the instruction signal, the ON command signal is supplied to the switch circuit, and when the level of the operation output signal exceeds the level of the instruction signal, the switch circuit is turned on. A comparator for providing the off-command signal; and when the comparator generates the off-command signal, the comparator corresponds to half the amplitude of a dither current superimposed on the exciting current to remove hysteresis of the solenoid. The operation output signal is increased by an amount corresponding to one-half of the amplitude of the dither current when the comparator generates an ON command signal.
In order to lower the calculation output signal by an amount corresponding to
A dither component generation signal generation circuit that generates a dither component generation signal whose voltage level changes according to the output of the comparator, and inputs the dither component generation signal to the arithmetic unit. Characteristic solenoid drive control device. 2. A switching element which is turned on and off when an ON command signal is supplied and when an OFF command signal is supplied, and an exciting current is supplied from a DC power supply to the solenoid through the switching element. A switch circuit for flowing a solenoid, an instruction signal input terminal to which an instruction signal having a voltage value that gives a target value of the excitation current of the solenoid is input, and an excitation current detected by detecting an excitation current flowing through the solenoid. Current detection means for outputting a proportional voltage as a current detection signal; and the solenoid drive so as to make a deviation between an excitation current detected by the current detection means and a target value of the excitation current given by the instruction signal zero. And a switch control circuit for controlling a switch circuit for the solenoid. The switch control circuit has a first addition input terminal, a second addition input terminal, and a subtraction input terminal, and multiplies a voltage value input to the first addition input terminal by a first coefficient. An input to the subtraction input terminal is a sum of a first voltage having a magnitude and a second voltage having a magnitude obtained by multiplying a value of the voltage input to the second addition input terminal by a second coefficient. A computing unit that outputs a voltage of a magnitude obtained by subtracting a third voltage having a magnitude obtained by multiplying the obtained voltage value by a third coefficient as a computation output signal, and compares the instruction signal and the computation output signal. Then, when the level of the operation output signal is equal to or less than the level of the instruction signal, the ON command signal is supplied to the solenoid drive switch circuit, and when the level of the operation output signal exceeds the level of the instruction signal, An off command signal is sent to the solenoid drive switch circuit. A dither component generation signal composed of a constant level DC voltage when the comparator is outputting an off command signal, and when the comparator is outputting an on command signal. A dither component generation signal generation circuit for stopping generation of the dither component generation signal, wherein the current detection signal and the dither are respectively provided to a first addition input terminal and a second addition input terminal of the arithmetic unit. A component generation signal is input, a constant DC voltage is input to the subtraction input terminal, and a voltage of a difference between the second voltage and the third voltage is used to eliminate the hysteresis of the solenoid. A solenoid drive control device, wherein the second coefficient and the third coefficient are set so as to have a magnitude corresponding to a half of the amplitude of the dither current superimposed on the current. 3. A switching element which is turned on and off when an ON command signal is supplied and when an OFF command signal is supplied, and an exciting current is supplied from a DC power supply to the solenoid through the switching element. A switch circuit for flowing a solenoid, an instruction signal input terminal to which an instruction signal having a voltage value that gives a target value of the excitation current of the solenoid is input, and an excitation current detected by detecting an excitation current flowing through the solenoid. Current detection means for outputting a proportional voltage as a current detection signal; and the solenoid drive so as to make a deviation between an excitation current detected by the current detection means and a target value of the excitation current given by the instruction signal zero. And a switch control circuit for controlling a switch circuit for the solenoid. The switch control circuit has a first addition input terminal, a second addition input terminal, and a subtraction input terminal, and multiplies a voltage value input to the first addition input terminal by a first coefficient. An input to the subtraction input terminal is a sum of a first voltage having a magnitude and a second voltage having a magnitude obtained by multiplying a value of the voltage input to the second addition input terminal by a second coefficient. A computing unit that outputs a voltage of a magnitude obtained by subtracting a third voltage having a magnitude obtained by multiplying the obtained voltage value by a third coefficient as a computation output signal, and compares the instruction signal and the computation output signal. When the level of the operation output signal is equal to or lower than the level of the instruction signal, the potential of the output terminal is set to a high level, and when the level of the operation output signal exceeds the level of the instruction signal, the potential of the output terminal is raised. A comparator for setting the potential to zero level; An inverting circuit that generates an output voltage of a constant level when the voltage is at the level and makes the output voltage zero when the potential of the output terminal of the comparator is at a high level. The current detection signal and the output voltage of the inverting circuit are respectively input to the first addition input terminal and the second addition input terminal, and a constant DC voltage is input to the subtraction input terminal; The second coefficient so that the voltage of the difference between the voltage and the third voltage has a magnitude corresponding to one half of the amplitude of the dither current superimposed on the exciting current in order to eliminate the hysteresis of the solenoid. And a third coefficient are set. 4. A solenoid drive control device for controlling an excitation current flowing from a DC power supply to a solenoid so as to maintain a target value, comprising: a constant voltage power supply circuit that outputs a constant voltage with an output of the DC power supply as an input; A p-channel MOSFET whose drain is connected to a positive output terminal of the DC power supply and whose drain is connected to one end of a solenoid coil; and a PNP transistor whose emitter and collector are connected to the source and gate of the FET, respectively. A current detection resistor connected between the other end of the solenoid coil and the negative output terminal of the DC power supply; a flywheel diode connected in parallel to the solenoid coil; An instruction signal input terminal to which an instruction signal having a voltage value that gives a target value is input; a first addition input terminal; A first voltage having a value obtained by multiplying a value of a voltage input to the first addition input terminal by a first coefficient, and a second addition input terminal having an addition input terminal and a subtraction input terminal; A value obtained by multiplying the value of the voltage input to the subtraction input terminal by a third coefficient from a voltage of the sum of the input voltage value and a second voltage having a magnitude obtained by multiplying the second coefficient by a second coefficient A computing unit that outputs a voltage having a magnitude obtained by subtracting the third voltage as a computation output signal; a non-inverting input terminal and an inverting input terminal receiving the instruction signal and the computation output signal, respectively;
A voltage comparator connected to a base of the transistor; and an inverting circuit for inverting a voltage between an output terminal of the voltage comparator and ground, a first addition input terminal and a second addition of the arithmetic unit. A current detection signal obtained at both ends of the current detection resistor and an output signal of the inverting circuit are input to input terminals, and an output voltage of the constant voltage power supply circuit is input to the subtraction input terminal. And a voltage corresponding to a half of the amplitude of a dither current superimposed on the exciting current in order to eliminate the hysteresis of the solenoid. A solenoid drive control device, wherein a coefficient and a third coefficient are set. 5. A solenoid drive control device for controlling an excitation current flowing from a DC power supply to a solenoid to a target value, comprising: a constant voltage power supply circuit for outputting a constant voltage with an output of the DC power supply as an input; A p-channel MOSFET whose drain is connected to a positive output terminal of the DC power supply and whose drain is connected to one end of a solenoid coil; and an NPN transistor whose collector and emitter are connected to the source and gate of the FET, respectively. A current detection resistor connected between the other end of the solenoid coil and the negative output terminal of the DC power supply; a flywheel diode connected in parallel to the solenoid coil; An instruction signal input terminal to which an instruction signal having a voltage value giving a value is input; a first addition input terminal; A first voltage having a value obtained by multiplying a value of the voltage input to the first addition input terminal by a first coefficient, and a second addition input terminal. A value obtained by multiplying the value of the voltage input to the subtraction input terminal by a third coefficient from a voltage of the sum of the input voltage value and a second voltage having a magnitude obtained by multiplying the second coefficient by a second coefficient A computing unit that outputs a voltage having a magnitude obtained by subtracting the third voltage as a computation output signal, the instruction signal and the computation output signal being input to an inverting input terminal and a non-inverting input terminal, respectively, and the output terminal is the NPN.
A voltage comparator connected to a base of the transistor; and an inverting circuit for inverting a voltage between an output terminal of the voltage comparator and ground, a first addition input terminal and a second addition of the arithmetic unit. A current detection signal obtained at both ends of the current detection resistor and an output voltage of the constant voltage power supply circuit are input to input terminals, and an output signal of the inversion circuit is input to the subtraction input terminal. And a voltage corresponding to a half of the amplitude of a dither current superimposed on the exciting current in order to eliminate the hysteresis of the solenoid. A solenoid drive control device, wherein a coefficient and a third coefficient are set. 6. A switching element which is turned on and off when an ON command signal is supplied and an OFF command signal is supplied, respectively, and an exciting current is supplied from a DC power supply to the solenoid through the switching element. A switch circuit for flowing a solenoid, an instruction signal input terminal to which an instruction signal having a voltage value that gives a target value of the excitation current of the solenoid is input, and an excitation current detected by detecting an excitation current flowing through the solenoid. Current detection means for outputting a proportional voltage as a current detection signal; and the solenoid drive so as to make a deviation between an excitation current detected by the current detection means and a target value of the excitation current given by the instruction signal zero. And a switch control circuit for controlling a switch circuit for the solenoid. A switch control circuit, comprising: a constant voltage power supply circuit that outputs a constant voltage with an output of the DC power supply as an input; a first addition input terminal, a second addition input terminal, and a subtraction input terminal; The first voltage having a magnitude obtained by multiplying the value of the voltage input to the 1 addition input terminal by the first coefficient and the value of the voltage input to the second addition input terminal are multiplied by the second coefficient. A voltage having a magnitude obtained by subtracting a third voltage having a magnitude obtained by multiplying a value of the voltage input to the subtraction input terminal by a third coefficient is calculated from the sum of the voltage and the second voltage having the magnitude. A computing unit that outputs as an output signal, comparing the instruction signal and the computation output signal, and when the level of the computation output signal is equal to or less than the level of the designation signal, gives the ON command signal to the switch circuit; The level of the operation output signal exceeds the level of the instruction signal. A comparator that gives an off command signal to the switch circuit when the capacitor is turned off, and a capacitor having a constant time constant with an output voltage of the constant voltage power supply circuit when the comparator is outputting an off command signal. A charging circuit for charging, and a discharging circuit for discharging the charge of the capacitor when the comparator is generating the ON command signal, wherein the capacitor is output when the comparator outputs an OFF command signal. A control voltage generating circuit that outputs a control voltage indicating a level substantially equal to the output voltage of the constant voltage power supply circuit when the comparator outputs an ON command signal. Receiving the control voltage as an input, indicating a high level when the control voltage is less than a threshold value set to a value lower than the output voltage of the constant voltage power supply circuit, A dither component generation signal generation circuit that outputs a dither component generation signal that falls to a zero level when the control voltage reaches the threshold value, and a first addition input terminal of the arithmetic unit and a 2, the current detection signal and the dither component generation signal are input to the addition input terminals, and the output voltage of the constant voltage power supply circuit is input to the subtraction input terminal. The second voltage and the third voltage The second coefficient and the third coefficient are set so that the voltage of the difference between the second coefficient and the third coefficient becomes a magnitude corresponding to one half of the amplitude of the dither current superimposed on the exciting current in order to remove the hysteresis of the solenoid. The charging time constant of the capacitor is the time required for the control voltage to reach the threshold value when the capacitor is charged with the time constant, and the target value of the exciting current is the delay time. Solenoid drive control unit, wherein the excitation current is set to slightly longer than the time required to decay to the target value, it when equal to one-half of the amplitude of the current. 7. A solenoid drive control device for controlling an excitation current flowing from a DC power supply to a solenoid to a target value, comprising: a constant voltage power supply circuit for outputting a constant voltage with an output of the DC power supply as an input; A p-channel MOSFET whose drain is connected to one end of a solenoid coil, and a PNP transistor whose emitter and collector are connected to the source and gate of the FET, respectively. A current detection resistor connected between the other end of the solenoid coil and the negative output terminal of the DC power supply; a flywheel diode connected in parallel to the solenoid coil; An instruction signal input terminal to which an instruction signal having a voltage value that gives a target value is input; a first addition input terminal; A first voltage having a value obtained by multiplying a value of a voltage input to the first addition input terminal by a first coefficient, and a second addition input terminal having an addition input terminal and a subtraction input terminal; A value obtained by multiplying the value of the voltage input to the subtraction input terminal by a third coefficient from a voltage of the sum of the input voltage value and a second voltage having a magnitude obtained by multiplying the second coefficient by a second coefficient A computing unit that outputs a voltage having a magnitude obtained by subtracting the third voltage as a computation output signal, the instruction signal and the computation output signal being input to a non-inverting input terminal and an inverting input terminal, and the output terminal being the PN
A voltage comparator connected to the base of the P-transistor, one end of which is connected to the output terminal on the positive polarity side of the constant voltage power supply circuit through a charging resistor, and the other end of which is connected to the output terminal of the comparator through a diode; A capacitor that is charged with a constant time constant by an output voltage of the constant voltage power supply circuit when a potential of an output terminal of the comparator is substantially at a ground potential; and a voltage between one end of the capacitor and ground is input. And an inverting circuit that performs an inverting operation when the input voltage exceeds a predetermined threshold value, wherein the current detection is performed at a first addition input terminal and a second addition input terminal of the arithmetic unit, respectively. A current detection signal obtained at both ends of a first resistor and an output voltage of the inverting circuit, and an output voltage of the constant voltage power supply circuit is input to the subtraction input terminal; And the second coefficient so that the voltage of the difference between the second voltage and the third voltage has a magnitude corresponding to の of the amplitude of the dither current superimposed on the exciting current in order to eliminate hysteresis of the solenoid. A third coefficient is set; and a charging time constant of the capacitor is a time required for a voltage between one end of the capacitor and ground to reach a threshold value of the inverting circuit when the capacitor is charged with the time constant. To
The target value of the exciting current is の of the amplitude of the dither current.
The solenoid drive control device is set to be slightly longer than the time required for the exciting current to decay to the target value when 8. A solenoid drive control device for controlling an excitation current flowing from a DC power supply to a solenoid so as to maintain a target value, comprising: a constant voltage power supply circuit for outputting a constant voltage with an output of the DC power supply as an input; A p-channel MOSFET having a drain connected to a positive output terminal of the DC power supply and a drain connected to one end of a solenoid coil; an NPN transistor having an emitter and a collector connected to a source and a gate of the FET, respectively. A current detection resistor connected between the other end of the solenoid coil and the negative output terminal of the DC power supply; a flywheel diode connected in parallel to the solenoid coil; An instruction signal input terminal to which an instruction signal having a voltage value that gives a target value is input; a first addition input terminal; A first voltage having a value obtained by multiplying a value of a voltage input to the first addition input terminal by a first coefficient, and a second addition input terminal having an addition input terminal and a subtraction input terminal; A value obtained by multiplying the value of the voltage input to the subtraction input terminal by a third coefficient from a voltage of the sum of the input voltage value and a second voltage having a magnitude obtained by multiplying the second coefficient by a second coefficient A computing unit that outputs a voltage having a magnitude obtained by subtracting the third voltage as a computation output signal, an instructing signal and a computation output signal are input to an inverting input terminal and a non-inverting input terminal, and the output terminal is the NP.
A voltage comparator connected to the base of an N-transistor, one end of which is connected to a positive output terminal of the constant-voltage power supply circuit through a charging resistor, and the other end of which is connected to the output terminal of the comparator through a diode; A capacitor that is charged with a constant time constant by an output voltage of the constant voltage power supply circuit when a potential of an output terminal of the comparator is substantially at a ground potential; and a voltage between one end of the capacitor and ground is input. And an inverting circuit that performs an inverting operation when the input voltage exceeds a predetermined threshold value, wherein the current detection is performed at a first addition input terminal and a second addition input terminal of the arithmetic unit, respectively. A current detection signal obtained at both ends of a first resistor and an output voltage of the constant voltage power supply circuit, and an output voltage of the inversion circuit is input to the subtraction input terminal; And the second coefficient so that the voltage of the difference between the second voltage and the third voltage has a magnitude corresponding to の of the amplitude of the dither current superimposed on the exciting current in order to eliminate hysteresis of the solenoid. A third coefficient is set, and the charging time constant of the capacitor is a time required for a voltage between one end of the capacitor and ground to reach the threshold value when the capacitor is charged with the time constant. When the target value of the excitation current is equal to one half of the amplitude of the dither current, the excitation current is set to be slightly longer than the time required for the excitation current to decay to the target value. Solenoid drive control device.