JP2002018059A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine capable of executing suitable payoff control responding to the shortage of game balls. SOLUTION: This game machine is provided with a prize ball payoff device for paying off game balls, plural payoff ball passages for supplying the game balls to a prize ball payoff device, and a ball out switch capable of detecting the shortage of game balls in each of plural payoff ball passages. A payoff control CPU for controlling the prize ball payoff device starts the prize ball payoff control for 25 balls if the number of prize balls stored in a total number storage is 25 or larger when the shortage of game balls is detected in some payoff ball passage at the start of paying off the game balls, and starts the prize ball payoff control for the number corresponding to the total number if the number of prize balls stored in the total number storage is under the present number.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a game machine such as a pachinko game machine, a coin game machine, a slot machine, etc., in which a game is played in accordance with a player's operation. A gaming machine in which a game is played in accordance with a game machine.

[0002]

2. Description of the Related Art As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a winning area such as a winning opening provided in the game area, a predetermined number of prize balls are obtained. Some values are paid out to players. The payout of the game medium is performed by a payout mechanism.

The payout mechanism is generally controlled by prize ball control means mounted on a payout control board. Since the progress of the game is controlled by the game control means mounted on the main board, the number of winning balls based on the winning is determined by the game control means and transmitted to the payout control board.

[0004] Further, a player borrows a game medium and plays a game using the borrowed game medium and the game medium paid out according to a prize. At that time, a request for lending a game medium from a player is once received by a lending request processing device such as a card unit, and the lending control means of the gaming machine receives a lending request from the player by communicating with the lending request processing device. A gaming machine lends a game medium in response to a lending request from a player. In many cases, the prize ball control means and the lending control means are constituted by an integrated payout control means. Generally, the payout control means includes a payout control microcomputer.

[0005]

However, when it is detected that the game medium is in shortage, the payout processing by the payout control means is not executed even if the game medium wins in the winning area. Therefore, even if other payable game media are stored, the payout process is not performed, and there is a problem that appropriate payout control of the game media may not be performed.

Accordingly, an object of the present invention is to provide a gaming machine capable of executing appropriate payout control in accordance with a state of lack of gaming media.

[0007]

A gaming machine according to the present invention comprises:
A game machine in which a player can play a predetermined game, and a payout means (for example, a prize ball payout device 97A, a loan ball payout device 97C) for paying out game media, and a game medium is supplied to the payout means. A plurality of supply paths (for example, payout ball passages 186a, 186b, 186c) and game medium deficiency detection means (for example, a ball-out switch 187a) capable of detecting a lack of game medium in each of the plurality of supply paths. , 187b, 187c), and at the stage before the start of the payout operation (for example, at the stage before the driving of the prize ball motor 289A is started), the payout means includes a part of the plurality of supply paths. Even when a shortage of the game medium is detected in the supply path, the payout operation can be performed when the game medium exists in another supply path. .

[0008] The payout means may not perform the payout operation when the shortage of the game media is detected in all of the plurality of supply paths before the start of the payout operation. Good.

A scheduled operation period (for example, a driving period of the prize ball motor 289A for paying out a predetermined number (for example, 25) of game balls) as one payout operation of the payout means;
Scheduled payout number (for example, 25
, 6, 10, 15 or the like) can be set in advance, and the payout unit pays out the game medium after the shortage of the game medium is detected in some supply paths. In this case, if the number of game media paid out during the scheduled operation period is less than the planned number of payouts, after the scheduled operation period elapses (for example, after driving of the motor of the prize ball payout device 97A ends). A payout operation of paying out the unpaid amount of the planned payout number (for example, paying out by a correction operation) may be performed.

[0010] The plurality of supply paths include a plurality of prize game medium supply paths (for example, a payout ball path 186a and a payout ball path 186b) for supplying game media to be paid out in accordance with the progress of the game to the payout means. May be characterized.

A prize detecting means for detecting a prize based on a predetermined game result of the player (for example, a starting port switch 17)
And game control means for controlling the progress of the game (for example, CP
U56) and payout control means (for example, a payout control CPU for controlling the payout means to perform control relating to the payout of the game medium).
371), and the game control means controls the control signal (for example, a payout control command for specifying the number of prize balls) for specifying the number of payouts in accordance with the winning detection from the prize detecting means even when the payout is stopped. May be output to the payout control means.

[0012] The dispensing control means, even when dispensing is stopped,
The control signal output by the game control means may be acquired.

As payout means, a prize game medium payout mechanism (for example, a prize ball payout device 97A) for paying out game media in accordance with the progress of the game, and a lending game medium for paying out game media in accordance with a lending request. A payout mechanism (for example, a rental ball payout device 97C), and as a supply path, a prize supply path (for example, a payout ball passage) for supplying game media to be paid out in accordance with the progress of the game to the prize game medium payout mechanism. 186a, payout ball passage 186b), and a lending supply path (for example, a payout ball passage 186c) for supplying a game medium to be paid out in response to a lending request to a lending game medium payout mechanism section, It may be provided that it is provided corresponding to each of the prize supply path and the lending supply path.

[0014] The prize game medium payout mechanism is capable of paying out the game medium paid out in accordance with the progress of the game even when the shortage of the game medium is detected in the lending supply path. You may make it.

[0015]

An embodiment of the present invention will be described below with reference to the drawings. First, the overall configuration of a pachinko gaming machine, which is an example of a gaming machine, will be described. FIG. 1 is a front view of the pachinko gaming machine 1 as viewed from the front. Here, a pachinko gaming machine is shown as an example of a gaming machine, but the present invention is not limited to a pachinko gaming machine, and may be, for example, a coin gaming machine or a slot machine.

As shown in FIG. 1, the pachinko gaming machine 1 comprises:
It has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2, there is a hit ball supply tray 3. Below the hitting ball supply tray 3, a surplus ball receiving tray 4 for storing storage balls overflowing from the hitting ball supply tray 3 and a hitting operation handle (operation knob) 5 for firing a hitting ball are provided. Behind the glass door frame 2,
The game board 6 is detachably attached. A game area 7 is provided on the front of the game board 6. Although not shown in FIG. 1, a frequency display LED for lending a ball via the card unit 50 is provided on the upper surface side of the hit ball supply tray 3.
A ball lending switch and a return switch are provided.

In the vicinity of the center of the game area 7, a variable display section 9 for variably displaying a plurality of types of symbols and a 7-segment L
A variable display device 8 including a variable display 10 using an ED is provided. In addition, a pass storage display (ordinary symbol storage display) 41 including four LEDs is provided below the variable display 10. In this embodiment, the variable display section 9 has three symbol display areas of “left”, “middle”, and “right”. On the side of the variable display device 8, a passing gate 11 for guiding a hit ball is provided. The hit ball that has passed through the passing gate 11 is guided to the starting winning opening 14 via the ball exit 13. In the passage between the passage gate 11 and the ball exit 13, there is a gate switch 12 for detecting a hit ball passing through the passage gate 11. The winning ball that has entered the starting winning port 14 is guided to the back of the game board 6 and is turned on by the starting port switch 17.
Is detected by In addition, a variable winning ball device 15 that performs opening and closing operations is provided below the starting winning port 14.
The variable winning ball device 15 is opened by the solenoid 16.

Below the variable winning ball device 15, there is provided an opening / closing plate 20 which is opened by a solenoid 21 in a specific game state (big hit state). In this embodiment, the opening and closing plate 20 serves as a means for opening and closing the special winning opening. The winning ball that enters one (V zone) of the winning balls guided from the opening / closing plate 20 to the back of the game board 6 is detected by the V count switch 22. The winning ball from the opening / closing plate 20 is detected by the count switch 23. Variable display device 8
A start winning prize storage display 18 having four display sections for displaying the number of winning balls entering the starting winning prize port 14 is provided below. In this example, the start winning prize storage display 18 increases the number of lit display units by one each time there is a starting prize, with the upper limit being four. Then, each time the variable display of the variable display unit 9 is started, the number of the lit display units is reduced by one.

The gaming board 6 is provided with a plurality of winning ports 19 and 24, and the winning of the game balls to the respective winning ports 19 and 24 is determined by correspondingly provided winning port switches 19a and 19a.
24a. At the left and right sides of the game area 7, there are provided decorative lamps 25 which are displayed blinking during the game, and at the lower part there is an out port 26 for absorbing hit balls which have not won. Also, on the upper left and right sides outside the game area 7,
Two speakers 27 that emit sound effects are provided.
A game effect LED 28a and game effect lamps 28b and 28c are provided on the outer periphery of the game area 7.

In this example, one of the speakers 27
Is provided with a prize ball lamp 51 which is lit when a premium ball is paid out, and a ball out lamp 52 which is lit up when the supply ball is out is provided near the other speaker 27. Further, FIG. 1 also shows a card unit 50 which is installed adjacent to the pachinko gaming table 1 and enables lending of a ball by inserting a prepaid card.

The card unit 50 has a usable indicator lamp 151 for indicating whether or not the card is usable. If there is a fraction (a number less than 100 yen) in the balance information recorded in the card, the fraction is displayed. Fraction display switch 1 for displaying on a frequency display LED provided near hit ball supply tray 3
52, a connecting stand direction indicator 15 indicating which side of the pachinko gaming machine 1 the card unit 50 corresponds to
3. Card insertion indicator 154 indicating that a card has been inserted into card unit 50, card insertion slot 155 into which a card as a recording medium is inserted, and a card reader provided on the back of card insertion slot 155 A card unit lock 156 is provided to release the card unit 50 when checking the mechanism of the writer.

The hit ball fired from the hitting ball launching device enters the game area 7 through the hitting rail, and thereafter, the game area 7
Come down. When a hit ball is detected by the gate switch 12 through the passage gate 11, the display number of the variable display 10 is changed continuously. Further, when a hit ball enters the starting winning opening 14 and is detected by the starting opening switch 17, the symbol in the variable display section 9 starts rotating if the symbol can be changed. If it is not possible to start changing the symbol, the start winning memory is increased by one.

The rotation of the image in the variable display section 9 stops when a certain time has elapsed. If the combination of images at the time of stop is a combination of big hit symbols, the game shifts to a big hit game state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or until a predetermined number (for example, 10) of hit balls is won. Then, when a hit ball wins in the specific winning area while the opening and closing plate 20 is opened and is detected by the V count switch 22, a continuation right is generated and the opening and closing plate 20 is opened again. Generation of the continuation right is permitted a predetermined number of times (for example, 15 rounds).

If the combination of images in the variable display section 9 at the time of stoppage is a combination of big hit symbols accompanied by a probability change, the probability of the next big hit increases. That is, a high probability state, which is more advantageous for the player, is obtained. Also, when the stop symbol on the variable display 10 is a predetermined symbol (hit symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the high probability state, the probability that the stop symbol on the variable display 10 hits the symbol is increased, and the opening time and the number of times the variable winning ball device 15 is opened are increased.

Next, each board disposed on the back of the pachinko gaming machine 1 will be described. As shown in FIG. 2, on the back surface of the pachinko gaming machine 1, a ball storage tank 38 is provided above the mechanism plate in the frame 2A, and above the pachinko gaming machine 1 installed on the gaming machine installation island. The game ball is supplied to the ball storage tank 38 from. The game balls in the ball storage tank 38 pass through a guiding gutter 39 to reach a ball payout mechanism (not shown).

On the back side of the gaming machine, a variable display control unit 29 for controlling the variable display section 9 and a game control board (main board) 31 on which a game control microcomputer and the like are mounted are installed. A payout control board 37 on which a payout control microcomputer or the like for performing ball payout control is mounted;
And a hit ball launching device that launches a hit ball into the game area 7 using the rotational force of a motor. Furthermore, the decoration lamp 25, the game effect LED 28a, the game effect lamp 28
b, 28c, a lamp control board 35 for sending signals to the prize ball lamp 51 and the ball out lamp 52, a voice control board 70 for controlling the generation of voice from the speaker 27, and a launch control for controlling the hit ball launching device. A substrate 91 is also provided. Note that an error display LED 374 is also mounted on the payout control board 37.

Further, DC30V, DC21V, DC1
A power supply board 910 on which a power supply circuit for generating 2V and 5V DC is mounted is provided, and a terminal board 1 provided with terminals for outputting various information to the outside of the gaming machine is provided above.
60 are installed. The terminal board 160 has at least a ball-cutting terminal for introducing and outputting the output of a ball-out detection switch 167 described later, a prize-ball terminal for externally outputting a prize-ball number signal, and a ball lending number signal. Ball lending terminals for external output. In the vicinity of the center, an information terminal board (external information output device) 34 having terminals for outputting various information from the main board 31 to the outside of the gaming machine is installed. In FIG. 2, signals from the lamp control board 35 and the sound control board 70 are transmitted to the game effect LEDs 28 provided on the frame side.
a, an illuminated relay board A for supplying to the game effect lamps 28b and 28c, the prize ball lamp 51 and the ball cut lamp 52
77 and balance display board 7 equipped with frequency display LED and the like
Although 4 is shown, other relay boards may be provided as needed for signal relay.

FIG. 3 is a rear view of the mechanical plate of the pachinko gaming machine 1 as viewed from the rear. The balls stored in the ball storage tank 38 pass through the guiding gutter 39 and reach the ball payout mechanism 97. The game balls paid out from the ball payout mechanism 97 are supplied to the hit ball supply tray 3 provided on the front surface of the pachinko gaming machine 1 through the communication port 45. On the side of the communication port 45, an excess ball passage 46 communicating with the excess ball tray 4 provided on the front of the pachinko gaming machine 1 is formed. When a large number of prize balls are paid out based on the winning and the hitting ball supply tray 3 becomes full, and finally, after the game balls reach the contact port 45, further game balls are paid out, the game balls surplus through the surplus ball passage 46. It is led to the ball tray 4. When the game balls are further paid out, the sensing lever 47 presses the full tank switch 48 and the full tank switch 48 is turned on. In that state, the ball payout mechanism 97
The rotation of the stepping motor of the prize ball dispensing device (not shown) stops, the operation of the prize ball dispensing device stops, and the driving of the hit ball firing device 34 also stops.

Next, the structure of the intermediate base unit installed on the mechanism plate 36 will be described. The intermediate base unit is provided with a ball payout mechanism 97 and a ball passing path above it. In this embodiment, in the ball payout mechanism 97, the prize ball payout device and the ball rental payout device are provided independently. FIG. 4 is a configuration diagram showing a configuration of a prize ball payout device and a ball passing path above the device.

At the upper part of the intermediate base unit, a passage body 184A serving as a prize ball path is provided. A winning ball payout device 97A is fixed to a lower portion of the passage body 184A. The passage body 184A has payout ball passages 186a and 186b through which two rows of game balls whose flow direction has been changed left and right by the curve gutter 174 (see FIG. 3) flow down. That is, in this example, the two prize ball payout routes (payout ball passage 1)
86a, 186b) are provided. In addition, it is good also as a structure provided with three or more prize ball payout paths.

On the upstream side of the dispensing ball passages 186a and 186b, ball disconnection switches 187a and 187b are provided. The out-of-ball switches 187a and 187b detect the presence or absence of a game ball in the payout ball passages 186a and 186b. For example, when both the out-of-ball switch 187a and the out-of-ball switch 187b no longer detect a game ball, a prize ball. The rotation of the prize ball motor (not shown in FIG. 4) in the payout device 97A is stopped, and the prize ball payout is immobilized. Note that the ball out switch 187a or the ball out switch 18
The rotation of the prize ball motor may be stopped on condition that any one of 7b does not detect the game ball.

The ball out switches 187a, 187b
Are locked by locking pieces 188A and 188B at positions where about 27 to 28 game balls can be detected in the payout ball paths 186a and 186b. That is, the ball out switches 187a and 187b are installed at positions where it can be confirmed that the maximum payout amount of one unit of the prize ball (15 in this embodiment) is secured.

The central portion of the passage body 184A is formed in a shape curved right and left so as to reduce the ball pressure of the game ball flowing down inside. Although the passage body 184A is fixed to the intermediate base unit, the positioning of the passage body 184A can be performed by a locking projection 185A provided on the intermediate base unit.

Below the passage body 184A, the ball stopping device 1 that supplies game balls to the prize ball dispensing device 97A and stops the supply of game balls to the prize ball dispensing device 97A in the event of a failure or the like.
90A is provided. The prize ball dispensing device 97A installed below the ball stopping device 190A has a rectangular parallelepiped case 1.
98A. Protrusions are provided at four places on the left and right of the case 198A. The lower end of the case 198A is fitted into an elastic engagement piece provided at a lower portion of the intermediate base unit with each projection being related to a positioning projection provided on the intermediate base unit.

FIG. 5 is an exploded perspective view of the prize ball payout device 97A. The configuration and operation of the winning ball payout device 97A will be described with reference to FIG. The prize ball payout device 97A in this embodiment includes a stepping motor (prize ball motor) 28.
9A rotates the screw 288 to pay out pachinko balls one by one.

As shown in FIG. 5, the prize ball payout device 97A
Has two cases 198a and 198b. Engagement protrusions 280 are provided at two positions on the left and right of each of the cases 198a and 198b, which are in contact with positioning protrusions provided above the installation position of the winning ball payout device 97A. Also,
In each case 198a, 198b, the ball supply path 2
81a and 281b are formed. Ball supply path 281
a, 281b have curved surfaces 282a, 282b, and ball feed horizontal paths 284a, 284b are formed below the ends of the curved surfaces 282a, 282b. Further, the ball discharge horizontal path 284a, 284b at the end of the ball discharge path 283a,
283b are formed.

The ball supply paths 281a and 281b, the ball feed horizontal paths 284a and 284b, and the ball discharge paths 283a and 283b.
Are formed in front of partition walls 295a and 295b that partition the cases 198a and 198b forward and backward, respectively.
Further, in front of the partition walls 295a and 295b, the ball pressure buffering member 285 is sandwiched between the cases 198a and 198b. The ball pressure buffering member 285 distributes the game balls supplied to the prize ball payout device 97A to the left and right sides, and
1a and 281b.

Further, below the ball pressure buffering member 285, a winning ball motor position sensor including a light emitting element (LED) 286 and a light receiving element (not shown) is provided. Light emitting element 2
86 and the light receiving element are provided at a predetermined interval. The distal end of the screw 288 is inserted into the space. The ball pressure buffer member 28
When the cases 198a and 198b are attached to each other, the case 5 is completely stored and fixed therein.

The ball feed horizontal paths 284a and 284b have a screw 2 rotated by a prize ball motor 289A.
88 are arranged. The prize ball motor 289A is fixed to a motor fixing plate 290, and the motor fixing plate 290 is fixed to a fixing groove 291 formed behind the partition walls 295a and 295b.
a, 291b. Payout motor 2 in that state
Since the motor shaft 89 protrudes forward of the partition walls 295a and 295b, the screw 288 is fixed in front of the protruding walls. On the outer periphery of the screw 288, a prize ball motor 28
The spiral projection 2 for moving the game balls placed on the ball feed horizontal paths 284a and 284b forward by the rotation of 9A.
88a are provided.

A recess is formed at the tip of the screw 288 so as to house the light emitting element 286, and two notches 292 are formed 180 degrees apart from each other on the outer periphery of the recess. Therefore, while the screw 288 makes one rotation, the light from the light emitting element 286 is
Is detected twice by the light receiving element via the.

That is, the prize ball motor position sensor including the light emitting element 286 and the light receiving element is for stopping the screw 288 at a fixed position and detecting that the prize ball payout operation has been performed. is there. The light emitting element 28
6. The wiring from the light receiving element and the prize ball motor 289A
They are put together and pulled out to the outside through drawer holes formed below the rear part of the case 198a, 198b and connected to the connector.

When the game ball is a ball feeding horizontal path 284a, 284b
When the prize ball motor 289A rotates in the state of being placed on the game ball, the game ball moves forward on the ball feed horizontal paths 284a and 284b by the spiral projection 288a of the screw 288. And finally, the ball discharge horizontal paths 284a, 284b from the end of the ball discharge path 283a, 28
3b. At this time, left and right ball feed horizontal paths 284
a, 284b fall alternately. That is,
Each time the screw 288 makes a half turn, one game ball falls from one side. Therefore, every time one game ball falls,
Light from the light emitting element 286 is detected by the light receiving element.

As shown in FIG. 4, below the prize ball payout device 97A, a prize ball count switch 3 by a proximity switch is provided.
01A is provided. The payout control means can determine the number of paid out prize balls from the detection output of the prize ball count switch 301A.

In this embodiment, a prize ball payout device 97A in which game balls are paid out by rotation of a stepping motor is used as a ball payout device for paying out game balls by driving an electric drive source. A ball payout device having a structure in which game balls are sent out by another drive source may be used, or a payout device having a structure in which a stopper is removed by driving an electric drive source and payout is performed by the weight of the game balls may be used.

FIG. 6 is a configuration diagram showing the configuration of a ball lending and dispensing device and a ball passing path above the device. A rental ball dispensing device 97B is fixed to a lower portion of a passage body 184C serving as a rental ball route. The passage body 184B has a payout ball passage 186c for letting one row of game balls flow down. Dispensing ball passage 186c
A switch 187c for breaking a ball is installed upstream of the switch. The ball out switch 187c detects the presence or absence of a game ball in the payout ball passage 186c, and when the ball out switch 187c no longer detects the game ball, the lending ball payout device 9
The driving of the ball lending solenoid (not shown in FIG. 6) in 7B is stopped, and the payout of the lending ball is immobilized.

The ball cutout switch 187c is locked by a locking piece 188C at a position where it can be detected that about 27 to 28 game balls exist in the payout ball passage 186c. That is, the ball out switch 187c is
Maximum payout amount of one unit of ball lending (25 in this embodiment)
) Is installed at a position where it can be confirmed that the above is secured.

The central portion of the passage body 184C is formed in a shape curved right and left so as to reduce the ball pressure of the game ball flowing down inside. Although the passage body 184C is fixed to the intermediate base unit, the positioning of the passage body 184C can be performed by a locking projection 185C provided on the intermediate base unit. The rental ball dispensing device 97C
May be installed beside the prize ball dispensing device 97A, or may be installed below or above the prize ball dispensing device 97A. If the installation space is insufficient, the prize ball dispensing device 9 may be installed.
It may be installed so as to be overlaid on 7A.

Below the passage body 184C, there is provided a ball stopping device 190C for supplying game balls to the rental ball dispensing device 97C and stopping the supply of game balls to the rental ball dispensing device 97C in the event of a failure or the like. I have. The rental ball dispensing device 97C installed below the ball stopping device 190C is housed inside a rectangular parallelepiped case 198C.

FIGS. 7 and 8 are cross-sectional views showing the configuration of a rental ball dispensing device 97C installed in the lower base unit of the mechanism plate 36. FIG. 7 shows a state where the lending ball is stationary, and FIG. 8 shows a state where the lending ball which has been stationary is released. The rental ball dispensing device 97C includes a mounting base 116.
Are formed collectively. Therefore, the rental ball dispensing device 97C
Is easily attached to the lower base unit of the mechanism plate 36. The reinforcing rib 1 is provided around the mounting base 116.
17 are formed to enhance the overall rigidity. A lending ball flow path 120 is formed that bends from the lower side of the mounting base 116 to the upper side via the center and to the upper side. Further, the lending ball passage portion 122 is fixed slightly below the bent portion of the lending ball flow path 120 by a locking claw 123. The lending ball passing portion 122 has a through hole formed in a front portion thereof through which a game ball passes.

Further, the first ball locking member 124 and the second ball locking member 130 are supported so as to be swingable about the support shafts 125 and 131 so as to sandwich the passage hole of the lending ball passing portion 122 therebetween. Have been. The rear end of the first ball locking member 124 is connected to a plunger 128 of a ball lending solenoid 127 via a link rod 126. Ball rental solenoid 127
Is detachably mounted by a locking claw projecting from the mounting base 116. A spring 129 is provided around the plunger 128, and constantly biases the plunger 128 downward.

A ball retaining portion 124a is formed on the upper end of the first ball locking member 124 on the distal end side, and an engagement piece 124b for engaging with the second ball locking member 130 is formed on the lower portion. A ball stopper 130a is formed in the upper front part of the second ball locking member 130, and an engagement recess 130b that engages with the engagement piece 124b is formed in the middle thereof.

Next, the operation of the rental ball payout apparatus 97C will be described with reference to FIGS. Ball rental solenoid 12
In the normal state in which the ball 7 is off, as shown in FIG. 7, the ball stopping portion 124a of the first ball locking portion 124 is
0, the ball catching portion 130a of the second ball locking portion 130
Are projected below the rental ball passage portion 122 in the rental ball flow path 120. When a lending request is made in such a state and the lending ball flows into the downflow path 120,
The head lending ball P1 is stopped by the ball stopping portion 130a in a state of entering a through hole formed in the lending ball passing portion 122.

The top winning ball P1 is the ball stopping portion 130a.
When a subsequent game ball flows in while the ball is stopped, the ball pressure of all the game balls is applied to the ball stopper 130a, but the load is received by the support shaft 131 located almost directly below the ball stopper 130a. . Therefore, the engagement recess 130b and the engagement piece 1
The load on first ball locking member 124 due to engagement with 24b is reduced. This prevents the plunger 128 from rising against the urging force of the spring 129. That is, the first ball locking member 124 is formed by the load of a large number of winning balls.
In addition, the second ball locking portion 130 does not move outside the specified range, and the rental balls are surely processed one by one.

When the game ball enters the passage hole formed in the lending ball passage portion 122 and is stopped by the ball stopping portion 130a, a drive signal is sent from the payout control CPU 371 to the ball lending solenoid 127, so that the ball lending solenoid 127 is driven. Lending solenoid 127
Is turned on for a predetermined time. When the ball lending solenoid 127 is turned on, as shown in FIG. 8, the ball stopping portion 124a enters the lending ball downflow path 120. Therefore, the next winning ball P2 is prevented from entering the passage hole of the lending ball passage portion 122, and the ball stopping portion 130a retreats from the lending ball flow path 120. Therefore, the leading lending ball P1 is released and flows down.
Then, when the ball lending solenoid 127 is turned off after a lapse of a predetermined time, the state returns to the state shown in FIG. 7, and the next lending ball payout operation is performed. Note that a ball lending count switch 301B provided below the lending ball dispensing device 97C.
(Not shown in FIGS. 7 and 8), when the released ball is detected, the ball rental count switch 30
In order to notify that 1B has paid out one rental ball,
A detection signal is sent to the input port 372b of the payout control board 37.

As described above, the rental ball dispensing device 97C
The rental balls are temporarily stopped and paid out one by one, but if the stop period is set short, it becomes possible to discharge the balls quickly. Note that the rental ball dispensing device 97C may be configured to perform dispensing by rotation of a dispensing motor similarly to the prize ball dispensing device 97A, and conversely, the prize ball dispensing device 97A may be replaced by the rental ball dispensing device 97C.
In the same manner as described above, the payout may be performed by driving the payout solenoid.

The payout mechanism may be configured as shown in FIG. In the configuration example shown in FIG.
The distance between 7c and the lending ball payout device 97C is longer than the distance between the ball out switches 187a and 187b and the prize ball payout device 97A. And, for example, the ball out switch 1
87c is locked at a position where it is possible to detect the presence of about 27 to 28 game balls in the payout ball passage 186c, and the ball out switches 187a and 187b are used to switch 17 to 18 game balls in the payout ball passages 186a and 186b. It is locked at a position where it can be detected that there are some game balls. In other words, the remaining number when the running out of balls for the prize ball is detected is different from the remaining number when the running out of balls for the ball lending is detected. Since the number of game balls in each unit is different,
It is reasonable to configure the payout mechanism to make the remaining numbers different. Further, a rental ball dispensing device 97C
Is installed below the prize ball payout device 97A.

The other structure is the same as the structure shown in FIGS. In addition, the rental ball dispensing device 97
C may be installed beside or above the prize ball dispensing device 97A, or may be installed so as to overlap the prize ball dispensing device 97A when the installation space is insufficient.

FIG. 10 is a block diagram showing an example of the circuit configuration of the main board 31. In FIG. 10, the payout control board 37, the lamp control board 35, the sound control board 70,
A launch control board 91 and a display control board 80 are also shown. On the main board 31, a basic circuit 53 for controlling the pachinko gaming machine 1 according to a program, a gate switch 12,
A switch circuit 58 that supplies signals from the starting port switch 17, the V count switch 22, the count switch 23, the winning port switches 19a and 24a, and the prize ball count switch 301A to the basic circuit 53;
And a solenoid circuit 59 that drives a solenoid 21 that opens and closes the opening and closing plate 20 according to a command from the basic circuit 53.

Further, according to the data supplied from the basic circuit 53, jackpot information indicating occurrence of a jackpot, effective start information indicating the number of start winning balls used to start image display on the variable display section 9, and probability fluctuation have occurred. And an information output circuit 64 that outputs probability change information or the like indicating the fact to a host computer such as a hall management computer.

The basic circuit 53 includes a ROM 54 for storing a game control program and the like, a RAM 55 as an example of a storage means used as a work memory, a CPU 56 for performing a control operation according to the program, and an I / O port unit 5.
7 inclusive. In this embodiment, the ROM 54 and the RAM 5
5 is built in the CPU 56. That is, the CPU 5
Reference numeral 6 denotes a one-chip microcomputer. In addition, 1
The chip microcomputer has at least the RAM 55
And the ROM 54 and the I / O port unit 57 may be external or internal. The I / O port unit 57 is a terminal capable of inputting and outputting information in the microcomputer.

The main board 31 has a system reset circuit 65 for resetting the basic circuit 53 when the power is turned on, and an I / O port unit 57 which decodes an address signal supplied from the basic circuit 53 and decodes the address signal. I /
An address decode circuit 67 for outputting a signal for selecting the O port is provided. Note that the ball payout device 9
There is also switch information input to the main board 31 from 7,
In FIG. 10, they are omitted.

A hit ball launching device that hits and launches a game ball is driven by a drive motor 94 controlled by a circuit on a launch control board 91. Then, the driving force of the driving motor 94 is adjusted according to the operation amount of the operation knob 5. That is, the circuit on the firing control board 91 is controlled so that the hit ball is fired at a speed corresponding to the operation amount of the operation knob 5.

In this embodiment, the lamp control means mounted on the lamp control board 35 is used to display the start memory display 18, the gate passage memory display 41 and the decoration lamp 25 provided on the game board. Controls the game and the game effect lamp / LED 28 provided on the frame side.
a, 28b, and 28c, display control of the award ball lamp 51, and the ball out lamp 52 are performed. The display control of the variable display unit 9 for variably displaying special symbols and the variable display 10 for variably displaying ordinary symbols is performed by display control means mounted on the display control board 80.

FIG. 11 is a block diagram showing a signal transmitting / receiving portion of the main board 31 and the lamp control board 35. In this embodiment, a game effect LED 28a, a game effect lamp 28b,
A lamp control command indicating turning on / off of the decorative lamp 25 provided on the game board and the turning on / off of the prize ball lamp 51 and the ball out lamp 52 is output from the main board 31 to the lamp control board 35. . Further, a lamp control command indicating the number of lighting of the start storage display 18 and the gate passage storage display 41 is also output from the main board 31 to the lamp control board 35.

As shown in FIG. 11, the lamp control command related to the lamp control is output from the output ports (output ports 0 and 3) 570 of the I / O port unit 57 in the basic circuit 53.
573. Output port (output port 3) 5
73 outputs 8-bit data, and output port 570 outputs a 1-bit INT signal. Lamp control board 35
, The control command from the main board 31 is transmitted through the input buffer circuits 355A and 355B to the lamp control CP.
Input to U351. The lamp control CPU 351
Does not have an I / O port, the input buffer circuits 355A and 355B and the lamp control CPU 351
And an I / O port is provided.

In the lamp control board 35, the CPU 351 for lamp control includes a game effect LED 28a, a game effect lamp 28b, and a game effect lamp 28b, which are defined according to each control command.
8c, according to the lighting / extinguishing pattern of the decorative lamp 25,
Game effect LED 28a, game effect lamps 28b, 28
c, output a light-on / light-off signal to the decorative lamp 25; The ON / OFF signal is output to the game effect LED 28a, the game effect lamps 28b and 28c, and the decoration lamp 25. It should be noted that the lighting / extinguishing pattern is determined by the lamp control CPU
351 is stored in an internal ROM or an external ROM.

On the main board 31, the CPU 56
When there is an unpaid prize ball remaining number in the memory contents of M55, the control command for instructing lighting of the prize ball lamp 51 is output, and the control command is provided upstream of the payout ball passages 186a, 186b on the back of the game board. Ball switch 187a, 187b
When the game ball is no longer detected (see FIG. 4), a control command for instructing lighting or blinking of the ball out lamp 52 is output. That is, in this example, when the ball out switch 187a and the ball out switch 187b no longer detect a game ball,
A control command for instructing lighting of the out-of-ball lamp 52 is output. When one of the ball-out switches 187a no longer detects a game ball, the control command is output to instruct the ball-out lamp 52 to blink continuously twice every predetermined period. When one of the other ball out switches 187b no longer detects a game ball, a control command for instructing the ball out lamp 52 to blink is output.

In the lamp control board 35, each control command is input to the lamp control CPU 351 via the input buffer circuits 355A and 355B. Lamp control C
The PU 351 turns on / off the award ball lamp 51 according to the control commands. Similarly, lamp control CP
In response to the control commands, the U 351 turns on, blinks (including various blinking modes such as blinking twice in succession every predetermined period), or turns off the lamp. The lighting, blinking, or light-off pattern is stored in a built-in ROM or an external ROM of the lamp control CPU 351. Further, the lamp control C
The PU 351 starts the start storage display 1 in response to the control command.
8 and an on / off signal to the gate passage storage display 41.

As the input buffer circuits 355A and 355B, for example, a 74HC54 which is a general-purpose CMOS-IC
0,74HC14 is used. Input buffer circuit 35
5A and 355B are connected to the lamp control board 35 from the main board 31.
The signal can be passed only in the direction toward. Therefore, there is no room for a signal to be transmitted from the lamp control board 35 side to the main board 31 side. For example, even if a circuit in the lamp control board 35 is tampered with, a signal output by the tampering is not transmitted to the main board 31 side. Note that a noise filter may be provided on the input side of the input buffer circuits 355A and 355B.

In the main board 31, the output port 5
Buffer circuits 620 and 63A are provided outside 70 and 573. As the buffer circuits 620 and 63A, for example, 74HC250 and 7HC which are general-purpose CMOS-ICs
4HC14 is used. According to such a configuration, since a signal input from the outside to the inside of the main board 31 is blocked, a signal line to which a signal may be supplied from the lamp control board 70 to the main board 31 is more reliably eliminated. be able to. Note that a noise filter may be provided on the output side of the buffer circuits 620 and 63A.

In the present example, the out-of-ball lamp 52 has a display mode in which it flashes in various modes.
For example, an error indicator lamp (the error indicator lamp
Depending on the display cause, for example, each electronic component control means such as the payout control board 37 is provided on the front or back surface of the game board, and other display means blink in various modes (errors caused by the 7-segment LED). In the case of a display lamp, a configuration may be adopted in which a display mode in which a displayed number or the like is turned on or blinks). In this case, for example, the display may be as follows. For example, a predetermined lamp is turned on when an error occurs, and the lamp flashes when the dispensing is stopped. Further, a predetermined lamp is turned on when one error occurs, and the lamp blinks when a plurality of errors occur.
Further, when a ball biting error occurs in the prize ball payout mechanism, a predetermined lamp flashes, and when a ball biting error occurs in the ball lending mechanism, the lamp flashes twice in a predetermined period. When a ball biting error occurs in both the prize ball payout mechanism and the ball lending mechanism, the corresponding lamp is turned on. Also, both payout ball paths 18
A predetermined lamp (for example, when the ball-out switch 187a and the ball-out switch 187b no longer detect the game ball) when the ball has run out at 6a and 186b.
The ball out lamp 52) lights up, and one of the payout ball paths 186 is turned on.
If the ball has run out at a or 186b, the lamp blinks, and if the ball for game lending has run out at the payout ball passage 186c, the lamp is flashed twice in succession every predetermined period. Things that flash. Further, when there is no detection output of the prize ball count switch 301A even though the prize ball motor 289A is operating (for example, a prize ball path error), a predetermined lamp blinks and the prize ball motor 28
If there is a detection output of the prize ball count switch 301A even though the 9A is not operating (in the case of illegal payout detection), the lamp blinks twice in succession every predetermined period and the prize ball count switch When the line for detecting and outputting the signal 301A is short-circuited and short-circuited, the lamp is turned on (the same configuration can be applied to the rental ball payout). In addition, a predetermined lamp is turned on when detecting an insufficient payout of the game ball, and the lamp flashes when detecting an excessive payout of the game ball (for example, an excessive prize ball error). Further, a predetermined lamp is turned on when a prepaid card unit unconnection error described later occurs, and the lamp blinks when a prepaid card unit communication error described later occurs. Note that the causes and modes such as the lighting and blinking described above are examples.

FIG. 12 is a block diagram showing components related to payout, such as components of the payout control board 37 and the ball payout device 97. As shown in FIG. 12, the detection signal from the full tank switch 48 is input to the I / O port 57 of the main board 31 via the relay board 71. The full tank switch 48 is a switch that detects whether the excess ball tray 4 is full. The detection signals from the ball cut switches 187a and 187b and the ball cut switch 187c are also transmitted to the relay board 7
2 and to the I / O port 57 of the main board 31 via the relay board 71. Here, the payout mechanism has a configuration in which a prize ball payout mechanism as shown in FIG. 4 and a ball lending mechanism as shown in FIG. 6 are provided independently. It is assumed that the winning ball payout mechanism as shown in FIG. 4 has two payout paths.

The CPU 56 of the main board 31 determines that the detection signal from one of the ball-out switches 187a and 187b indicates that the ball is out, and that the detection signal from the ball-out switch 187a or 187b indicates that the ball is out. In order to instruct payout prohibition, etc., in each of the cases where the detection signal from the out-of-ball switch 187c indicates the out-of-ball state, and the detection signal from the full switch 48 indicates the full state. Send out the payout control command. When such a payout control command is received,
The payout control CPU 371 of the payout control board 37 performs processing according to the received payout control command such as stopping the ball payout processing. In addition, when the instruction according to the state of each switch is the same instruction (for example, when the ball is run out in both the payout ball passages 186a and 186b or when the full state is detected, the stoppage of the both is instructed) ), The same payout control command may be sent.

In this embodiment, the ball out switch 18
Although the detection signals of 7a and 187b are input only to the main board 31 and the necessary payout control commands are transmitted to the payout control board 37, they may be input only to the payout control board 37. The information may be input to both the main board 31 and the payout control board 37. Further, in this embodiment, the detection signal of the ball out switch 187c is also input to only the main board 31, and the payout control board 3
7, the payout control command required is transmitted. However, the payout control command may be input only to the payout control board 37, or may be input to both the main board 31 and the payout control board 37. .

Further, the detection signal from the award ball count switch 301A is also input to the I / O port 57 of the main board 31 via the relay board 72 and the relay board 71. The prize ball count switch 301A is provided below the prize ball payout device 97A, and detects a prize ball payout ball actually paid out.

When there is a prize, the payout control board 37 has output ports (ports 0, 1) 570, 571 of the main board 31.
, A payout control command indicating the number of winning balls is input. The output port (output port 1) 571 outputs 8-bit data, and the output port 570 outputs a 1-bit strobe signal (INT signal). The payout control command indicating the number of winning balls is input to the I / O port 372a via the input buffer circuit 373A. The INT signal is input to the interrupt terminal of the payout control CPU 371 via the input buffer circuit 373B. The payout control CPU 371
A payout control command is input via the / O port 372a, and the ball payout device 97 is driven in accordance with the payout control command to perform award ball payout. In this embodiment, the payout control CPU 371 is a one-chip microcomputer and has at least a RAM.

In the main board 31, the output port 5
Buffer circuits 620 and 68A are provided outside 70 and 571. As the buffer circuits 620 and 68A, for example, 74HC250 and 7HC which are general-purpose CMOS-ICs
4HC14 is used. According to such a configuration, since a signal inputted from the outside to the inside of the main board 31 is blocked, a signal line to which a signal may be given from the payout control board 37 to the main board 31 is further reliably eliminated. be able to. Note that a noise filter may be provided on the output side of the buffer circuits 620 and 68A.

The payout control CPU 371 is connected to the output port 3
A ball lending number signal indicating the lending ball number is output to the terminal board 160 via the 72g and the information output circuit 377,
The buzzer drive signal is output to the buzzer board 75. A buzzer is mounted on the buzzer board 75. Further, an error signal is output to the error display LED 374 via the output port 372e.

Further, the input port 3 of the payout control board 37
Detection signals from the winning ball count switch 301A and the ball lending count switch 301B are input to the relay board 72b via the relay board 72. Ball rental count switch 3
01B is provided at the lower part of the loaned ball payout device 97C, and detects the actually paid out loaned ball. Dispensing control board 37
The drive signal to the prize ball motor 289A is output from the prize ball motor 289A via the output port 372c and the relay board 72.
A is told. The drive signal from the payout control board 37 to the ball rental solenoid 127 is output from the output port 372c.
The signal is transmitted to the ball lending solenoid 127 via the relay board 72.

The card unit 50 has a microcomputer for controlling the card unit. Also,
The card unit 50 is provided with a fraction display switch 152, a connection board direction indicator 153, a card insertion indicator lamp 154, and a card insertion slot 155 (see FIG. 1). The balance display board 74 is connected to a frequency display LED, a ball lending switch, and a return switch provided near the hit ball supply tray 3.

From the balance display board 74 to the card unit 50
In response to the operation of the player, a ball lending switch signal and a return switch signal are given via the payout control board 37. In addition, the balance display board 74 is provided from the card unit 50.
, A card balance display signal indicating the balance of the prepaid card and a ball lending possible display signal are given via the payout control board 37. Between the card unit 50 and the payout control board 37, a connection signal (VL signal) and a unit operation signal (B
RDY signal), ball lending request signal (BRQ signal), ball lending completion signal (EXS signal) and pachinko machine operation signal (P
RDY signal) is exchanged via the I / O port 372f.

When the power of the pachinko gaming machine 1 is turned on,
The payout control CPU 371 of the payout control board 37 outputs a PRDY signal to the card unit 50. The card unit control microcomputer outputs a VL signal. The payout control CPU 371 determines the connection state / non-connection state based on the input state of the VL signal. When the card is accepted in the card unit 50 and the ball lending switch is operated to input a ball lending switch signal, the microcomputer for controlling the card unit outputs a BRDY signal to the payout control board 37. When a predetermined delay time has elapsed from this point, the microcomputer for controlling the card unit outputs a BRQ signal to the payout control board 37. The payout control CPU 3 of the payout control board 37
When the EXS signal to the card unit 50 rises and the fall of the BRQ signal from the card unit 50 is detected, the payout motor 289 drives the payout motor 289 to pay out a predetermined number of loaned balls to the player. At this time, the distribution solenoid 310 is in a driving state. That is, the ball distribution member 311 is directed to the ball lending side. When the payout is completed, the payout control CPU 371 causes the EXS signal to the card unit 50 to fall. Thereafter, if the BRDY signal from the card unit 50 is not in the ON state, the winning ball payout control is executed.

As described above, the signal from the card unit 50 is input to the payout control board 37 directly connected to the card unit 50. Therefore,
Regarding ball lending control, the card unit 50 sends the main board 3
No signal is input to 1, and there is no room for a signal to be incorrectly input from the card unit 50 side to the basic circuit 53 of the main board 31.

The card balance display signal indicating the balance of the prepaid card and the ball lending permission display signal are transmitted to the balance display board 74 without passing through the payout control CPU 371. The ball lending switch signal and the return switch signal sent from the balance display board 74 are also transmitted to the payout control CPU 371.
Is transmitted to the card unit 50 without going through.

In this embodiment, the case where the card unit 50 is provided is described as an example. However, the present invention can be applied to a case where a game ball is lent according to the amount of money when a coin is inserted. Further, in this embodiment, a case where a game ball is lent is taken as an example, but the present invention can be applied to a case where points are added.

In this embodiment, at least the main substrate 3
1 and the RAM in the payout control board 37 are backed up by a backup power supply. That is, even if the power supply to the gaming machine is stopped, the contents of the RAM are stored for a predetermined period. When detecting a drop in the power supply voltage, each CPU performs a predetermined process, and then enters a power recovery wait state. When the power is turned on, each CPU
If the data is stored in the memory, the state before the power is turned off is restored based on the stored data.

As described above, the payout control board 3
7. The main board 31 for sending commands to the display control board 80, the lamp control board 35, and the voice control board 70
An INT signal is output from each output port (output port 0) 570 to each electric component control board. In this case, for example,
The output port 570 has an 8-bit configuration, where bit 0 is an INT signal to the payout control board 37, bit 1 is an INT signal to the display control board 80, and bit 2 is a lamp control board 3
The INT signal to bit 5, bit 3 is the I signal to voice control board 70
Used for outputting the NT signal.

FIG. 13 is a block diagram showing an example of a configuration around the CPU 56. As shown in FIG. As shown in FIG. 13, the voltage drop signal from the first power supply monitoring circuit (first power supply monitoring means) is output to the non-maskable interrupt terminal (XNMI terminal) of the CPU 56.
It is connected to the. The first power supply monitoring circuit is a circuit that monitors a voltage of any one of various DC power supplies used by the gaming machine and detects a power supply voltage drop. In this embodiment, the power supply voltage of VSL is monitored, and when the voltage value becomes equal to or less than a predetermined value, a low-level voltage drop signal is generated. VSL
Is the largest DC voltage used in gaming machines, and is +30 V in this example. Therefore, the CPU 56
Can confirm the occurrence of power interruption by interrupt processing. In this embodiment, the first power supply monitoring circuit is mounted on a power supply board described later.

FIG. 13 also shows the system reset circuit 65. In this embodiment, the system reset circuit 65 also serves as a second power supply monitoring circuit (second power supply monitoring means). That is, the reset IC 651
When the power is turned on, the output is set to the low level for a predetermined time determined by the capacity of the external capacitor, and the output is set to the high level after the predetermined time has elapsed. That is, the reset signal is raised to a high level to make the CPU 56 operable. The reset IC 651 monitors the power supply voltage of VSL, which is the same power supply voltage as the power supply voltage monitored by the first power supply monitoring circuit, and sets the voltage value to a predetermined value (the first power supply monitoring circuit outputs a voltage drop signal). When the voltage falls below the power supply voltage value), a low-level voltage drop signal is generated. Accordingly, the CPU 56 performs a predetermined power supply stop processing in response to the voltage drop signal from the first power supply monitoring circuit, and then performs a system reset. In this embodiment, the reset signal and the voltage drop signal from the second power supply monitoring circuit are the same signal.

As shown in FIG. 13, the reset IC 651
Is input to the NAND circuit 947 and also to the clear terminal of the counter IC 941 via the inverting circuit (NOT circuit) 944. When the input to the clear terminal goes low, the counter IC 941 counts the clock signal from the oscillator 943.
The Q5 output of the counter IC 941 is output to the NOT circuit 9
45, 946 and input to the NAND circuit 947. The Q6 output of the counter IC 941 is input to a clock terminal of a flip-flop (FF) 942.
The D input of the flip-flop 942 is fixed at a high level, and the Q output is input to an OR circuit (OR circuit) 949. The other input of the OR circuit 949 is connected to the NAND circuit 9.
The output of 47 is introduced via NOT circuit 948. The output of the OR circuit 949 is connected to the reset terminal of the CPU 56. According to such a configuration, two reset signals (low-level signals) are supplied to the reset terminal of the CPU 56 when the power is turned on.
Starts operation reliably.

Then, for example, the detection voltage of the first power supply monitoring circuit (the voltage at which the voltage drop signal is output) is set to +
22 V, and the detection voltage of the second power supply monitoring circuit is +9 V. In such a configuration, since the first power supply monitoring circuit and the second power supply monitoring circuit monitor the voltage of the same power supply VSL, the timing at which the first voltage monitoring circuit outputs the voltage drop signal The difference between the timings at which the second voltage monitoring circuit and the second voltage monitoring circuit output the voltage drop signal can be reliably set to a desired predetermined period. The desired predetermined period is a period from the start of the power supply stop processing in response to the voltage drop signal from the first power supply monitoring circuit until the power supply stop processing is completely completed.

In this example, the first detection condition that the first power supply monitoring means outputs a detection signal is that the +30 V power supply voltage has dropped to +22 V, and the second power supply monitoring means outputs the detection signal. The second detection condition to be output is that the +30 V power supply voltage has dropped to +9 V.
However, the voltage value used here is an example,
Other values may be used.

However, although the monitoring range is narrowed, the monitoring voltage of the first voltage monitoring circuit and the second voltage monitoring circuit is +
It is also possible to use a 5V power supply voltage. Also in that case, the detection voltage of the first voltage monitoring circuit is set higher than the detection voltage of the second voltage monitoring circuit.

While power is not supplied from the + 5V power supply which is the driving power supply of the CPU 56 and the like, at least a part of the RAM is backed up by the backup power supply supplied from the power supply board, and the contents are maintained even if the power supply to the gaming machine is cut off. Is saved. Then, when the + 5V power supply is restored, a reset signal is issued from the system reset circuit 65, so that the CPU 56 returns to the normal operation state. At that time, since the necessary data is stored in the backup RAM, it is possible to return to the gaming state at the time of the occurrence of the power failure when recovering from a power failure or the like.

In FIG. 13, when the power is turned on, the CPU 5
6 shows a configuration in which a reset signal (low-level signal) is applied twice to the reset terminal. However, in the case of using a CPU in which reset is surely released even if the reset signal rises only once, , Reference numerals 941 to 9
The circuit element indicated by 49 is unnecessary. In that case, the output of the reset IC 651 is directly connected to the reset terminal of the CPU 56.

CPU 56 used in this embodiment
Incorporates an I / O port (PIO) and a timer / counter circuit (CTC). PIO is PB0-PB
It has a port of 3 4 bits and 1 byte of PA0 to PA7. The ports PB0 to PB3 and PA0 to PA7 can be set for both input and output. However, in this embodiment, no built-in PIO is used. In that case, for example, all ports are set to the input mode, and all ports are connected to the ground level. When power is turned on, P
IO is automatically set to input mode.

FIG. 14 is a block diagram showing a configuration example of a power supply board 910 of a gaming machine. The power supply board 910 is installed independently of the electric component control boards such as the main board 31, the display control board 80, the audio control board 70, the lamp control board 35, and the payout control board 37, and each of the electric component control boards in the gaming machine and Generates voltages used by mechanical components. In this example, AC24V, VSL (DC + 30V), DC + 21
V, + 12V DC and + 5V DC. Also,
The capacitor 916 serving as a backup power supply is DC + 5
V, that is, charged from a power supply line for driving an IC or the like on each substrate.

Transformer 911 converts an AC voltage from an AC power supply to 24V. AC 24V voltage is applied to connector 9
15 is output. Further, the rectifier circuit 912 includes an AC24
A DC voltage of +30 V is generated from V and output to the DC-DC converter 913 and the connector 915. DC-D
The C converter 913 has + 22V, + 12V and + 5V.
V is generated and output to the connector 915. Connector 91
5 is connected to, for example, a relay board, from which electric power of a voltage required for each electric component control board and mechanism components is supplied. A power switch 918 for stopping and starting power supply to the gaming machine is provided on the input side of the transformer 911.

+5 V from DC-DC converter 913
The line branches to form a backup + 5V line. A large-capacity capacitor 916 is connected between the backup + 5V line and the ground level. The capacitor 916 is provided with an electric power so as to be able to hold a storage state in a backup RAM (power-backed-up RAM, that is, storage means that can be in a storage state) when the power supply to the gaming machine is cut off. Backup power supply. Also,
A diode 917 for preventing backflow is inserted between the + 5V line and the backup + 5V line.

Note that a battery that can be charged from a +5 V power supply may be used as a backup power supply. In the case of using a battery, a rechargeable battery is used which runs out of capacity when power is not supplied from a + 5V power supply for a predetermined time.

The power supply board 910 has the first
The power supply monitoring IC 902 constituting the power supply monitoring circuit of FIG. The power supply monitoring IC 902 detects the occurrence of power interruption by introducing the VSL power supply voltage and monitoring the VSL power supply voltage. Specifically, when the VSL power supply voltage becomes equal to or lower than a predetermined value (+22 V in this example), a voltage drop signal is output assuming that power supply is cut off. The power supply voltage to be monitored is preferably higher than the power supply voltage (+5 V in this example) of the circuit element mounted on each electric component control board. In this example, VSL, which is a voltage immediately after conversion from AC to DC, is used. The voltage drop signal from the power supply monitoring IC 902 is supplied to the main board 31, the payout control board 37, and the like.

The predetermined value for the power-supply monitoring IC 902 to detect the power-off is lower than the normal voltage, but is a voltage at which the CPU on each electric component control board can operate for a while. Further, the power supply monitoring IC 902 is configured to monitor a voltage higher than a voltage for driving a circuit element such as a CPU (+5 V in this example) and a voltage immediately after conversion from AC to DC. Therefore, the monitoring range can be extended for the voltage required by the CPU. Therefore,
More precise monitoring can be performed. Furthermore, when VSL (+30 V) is used as the monitoring voltage, since the voltage supplied to the various switches of the gaming machine is +12 V, prevention of erroneous switch-on detection upon momentary power interruption can be expected. That is, when monitoring the voltage of the + 30V power supply,
The drop can be detected at a stage before + 12V generated after the generation of 0V starts to fall. Therefore, when the voltage of the + 12V power supply decreases, the switch output comes to the on state. However, if the + 30V power supply voltage that drops faster than + 12V is monitored and the power cutoff is recognized, the power supply is turned on before the switch output turns on. It is possible to enter a state of waiting for restoration and to enter a state where the switch output is not detected.

Since the power supply monitoring IC 902 is mounted on the power supply board 910 separate from the electric component control board, the first power supply monitoring circuit supplies a voltage drop signal to the plurality of electric component control boards. Can be. Regardless of how many electrical component control boards require a voltage drop signal, it is sufficient that only one first power supply monitoring unit is provided. Doing so does not add much to the cost of the gaming machine.

In the configuration shown in FIG. 14, the detection output (voltage drop signal) of the power supply monitoring IC 902 is supplied to the respective electric component control boards (for example, the main board 31 and the payout control) via the buffer circuits 918 and 919. Transmitted to the board 37). For example, one detection output is transmitted to the relay board,
The same signal may be distributed from the relay board to each electric component control board. Further, a buffer circuit may be provided according to the number of substrates requiring a voltage drop signal.

Next, the operation of the gaming machine will be described. Figure 1
5 is a flowchart showing the main processing executed by the CPU 56 on the main board 31. When the power to the gaming machine is turned on, in the main process, the CPU 56
First, necessary initial settings are performed (step S1).

Then, it is confirmed whether or not the data protection processing of the backup RAM area (for example, the power failure occurrence NMI processing such as the addition of parity data) has been performed when the power is turned off (step S2). In this embodiment, when an unexpected power failure occurs, a process for protecting data in the backup RAM area is performed. The case where such protection processing has been performed is regarded as backup. After confirming that there is no backup, the CPU 56 executes an initialization process (steps S2 and S3). In this embodiment, whether or not there is backup data in the backup RAM area is confirmed by the state of the backup flag set in the backup RAM area when the power is turned off.
For example, if "55H" is set in the backup flag area, it means that there is a backup (on state),
If a value other than “55H” is set, it means that there is no backup (off state). “55H” set in the backup flag area is data set when the data protection processing of the backup RAM area is completed in the power failure occurrence NMI processing.
This is a parity code based on the data of the area.

If the backup data exists in the backup RAM area, the CPU 56
A data check (for example, a parity check) of the M area is performed (step S4). If the power is restored after an unexpected power failure, the data in the backup RAM area should have been saved, and the check result becomes normal. If the check result is not normal, since the internal state cannot be returned to the state at the time of power-off, the initialization processing executed at the time of power-on, not at the time of restoration from power failure, is executed (steps S5 and S3).

If the check result is normal, the CPU 56
Performs a game state restoring process for returning the internal state to the state when the power is turned off (step S6). As shown in FIG.
When the value of the backup flag is set to “55H” and the check result is normal, the game state restoring process of step S6 is executed. Then, the saved value of the PC (program counter) stored in the backup RAM area is set in the PC, and the program returns to the address (step S7).

Execution of normal initialization processing (step S3)
Is completed, the process shifts to a loop process in which the monitoring of the timer interrupt flag (step S9) is confirmed in the main process. In the loop, a display random number update process (step S8) is also performed.

In this embodiment, step S2
The backup area is checked in step S4 after the backup data is checked in step S4 if the backup data exists. However, after the backup area check result is confirmed to be normal in step S4. ,
The presence or absence of backup data may be confirmed. Alternatively, whether to execute the power failure recovery process may be determined by confirming whether there is backup data or checking the backup area.

Further, for example, at the time of the parity check (step S4) when determining whether or not to execute the power failure recovery processing, that is, when determining whether or not to recover the gaming state, the RAM data stored at the time of the parity check is determined. According to the special process flag etc. and the start winning prize storage data, the gaming machine is in the game standby state (the symbol is not fluctuating,
If it is confirmed that the game is not being changed reliably and that there is no start winning memory, the initialization process may be executed without performing the game state restoration process.

FIG. 17 is a flowchart showing the initial setting process in step S1. In the initial setting process, C
The PU 56 first sets interrupt prohibition (step S1).
a). When the interrupt is set to be prohibited, the CPU 56 sets the interrupt mode to the interrupt mode 2 (step S1b), and sets the stack pointer designated address to the stack pointer (step S1c). Then, the CPU 56 initializes the built-in device register (step S1d). In addition, CTC (counter / timer) and PIO (parallel input / output port) which are built-in devices (built-in peripheral circuits)
Is initialized (step S1e), and the RAM is set in an accessible state (step S1f).

CPU 5 used in this embodiment
6 has the following three types of modes as maskable interrupt (INT) modes. When an interrupt that can be masked occurs, the CPU 56 automatically sets the interrupt disabled state and saves the contents of the program counter on the stack.

Interrupt mode 0: The built-in device which has issued the interrupt request receives an RST instruction (1 byte) or a CALL instruction (3 bytes).
Byte) on the internal data bus of the CPU. Therefore, the CPU 56 executes the instruction at the address corresponding to the RST instruction or the address specified by the CALL instruction. Upon reset, CPU 56 automatically switches to interrupt mode 0
become. Therefore, when it is desired to set the mode to the interrupt mode 1 or the interrupt mode 2, it is necessary to perform a process for setting the mode to the interrupt mode 1 or the interrupt mode 2 in the initial setting process.

Interrupt mode 1: When an interrupt is accepted,
In this mode, the camera always jumps to the address 0038 (h).

Interrupt mode 2: The address synthesized from the value (1 byte) of the specific register (I register) of the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is the interrupt address. Mode. That is, the interrupt address is an address indicated by 2 bytes in which the upper address is the value of the specific register and the lower address is the interrupt vector. Therefore, an interrupt process can be set at an arbitrary (albeit skipped) even address. Each built-in device has a function of sending an interrupt vector when making an interrupt request.

Therefore, when the interrupt mode 2 is set, it is possible to easily process an interrupt request from each built-in device, and it is possible to set an interrupt process at an arbitrary position in a program. Will be possible. Further, unlike the interrupt mode 1, it is easy to prepare an interrupt process for each interrupt occurrence factor. As described above, in this embodiment, the CPU 56 is set to the interrupt mode 2 in step S1b of the initial setting process.

FIG. 18 shows a normal initialization process (step S
It is a flowchart which shows the process of 3). As shown in FIG. 18, in the initialization processing, the RAM is cleared (step S3a). Then, based on the address value of the work area initial setting table, a predetermined work area (for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol left middle right symbol buffer, a payout command storage pointer, etc.) is initialized. An initial value setting process for setting a value (step S3b) is performed. Then, the register of the CTC provided in the CPU 56 is set so that the timer is interrupted periodically every 2 ms (step S3).
c). That is, a value corresponding to 2 ms is set in a predetermined register (time constant register) as an initial value. Since the interrupt is prohibited (see FIG. 17) in the initial setting process (step S1), the interrupt is permitted before the initialization process is completed (step S3d).

Therefore, in this embodiment, the CPU 56
Is set to repeatedly generate a timer interrupt. In this embodiment, the repetition period is 2 ms
Is set to Then, as shown in FIG. 19, when a timer interrupt occurs, the CPU 56 sets a timer interrupt flag (step S12).

When detecting that the timer interrupt flag has been set in step S9, the CPU 56 resets the timer interrupt flag (step S1).
0), a game control process is executed (step S11). According to the above control, in this embodiment, the game control process is started every 2 ms. In this embodiment, only the flag is set in the timer interrupt process, and the game control process is executed in the main process.
The game control process may be executed by a timer interrupt process.

As described above, in this embodiment, the interrupt mode 2 is set in the CPU 56 having a built-in CTC or PIO in the initial setting process. Accordingly, a periodic timer interrupt process using the built-in CTC can be easily realized. Further, the timer interrupt processing can be set at an arbitrary position on the program. Further, switch detection processing using the built-in PIO can be easily realized by interruption processing. As a result, effects such as simplification of the program configuration and reduction in the number of program development steps can be obtained.

Further, in this embodiment, it is determined whether or not the power supply is restored to the state at the time of power failure based on the presence or absence of backup data. Therefore, when the power is turned on, for example, when the power is restored after a power failure, it is possible to determine whether or not to restore the state at the time of the power failure according to the contents of the backup data storage area.

Further, it is determined whether or not the power is restored to the power-off state according to the state of the backup data. Therefore, when the power is turned on when the power is restored after a power failure, the contents of the backup data storage area are restored. It is possible to determine whether to restore the power-off state according to the state.

FIG. 20 is a flowchart showing the game control processing in step S11. In the game control process,
The CPU 56 firstly receives the gate sensor 12, the starting port sensor 17, and the count sensor 23 through the switch circuit 58.
And the state of the winning opening switches 19a and 24a,
It is determined whether or not there is a prize for each winning port or prize device (switch processing: step S21).

Next, various abnormality diagnosis processes are performed by the self-diagnosis function provided inside the pachinko gaming machine 1, and an alarm is issued if necessary according to the result (error process: step S22).

Next, a process of updating each counter indicating a random number for determination such as a random number for big hit determination used in game control is performed (step S23). The CPU 56 further includes:
A process for updating a display random number such as a random number for determining the type of stop symbol is performed (step S24).

Further, the CPU 56 performs a special symbol process (step S25). In the special symbol process control, a corresponding process is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to a gaming state. Then, the value of the special symbol process flag is updated during each processing according to the gaming state. Also, a normal symbol process is performed (step S26). In the normal symbol process process, a corresponding process is selected and executed according to a normal symbol process flag for controlling the variable display 10 using the 7-segment LED in a predetermined order. Then, the value of the normal symbol process flag is updated during each process according to the gaming state.

The CPU 56 sets a control command sent to the payout control board 37 or the like in a predetermined area of the RAM 55 and sends the control command (command control processing: step S27).

Next, the CPU 56 performs a data output process of outputting data such as jackpot information, start information, and probability variation information supplied to the hall management computer (step S29).

The CPU 56 issues a drive command to the solenoid circuit 59 when a predetermined condition is satisfied (step S30). The solenoid circuit 59 drives the solenoids 16 and 21 in response to the drive command, and brings the variable winning ball device 15 or the open / close plate 20 into an open state or a closed state.

Further, the CPU 56 sets the number of prize balls based on the detection output of the switches 17, 23, 19a, 24a for detecting a winning in each winning opening (step S31). Specifically, a payout control command is output to the payout control board 37 in response to the winning detection. Dispensing control board 37
The payout control CPU 371 mounted on the CPU drives the prize ball payout device 97A according to the payout control command.

As described above, the main process includes the process of determining whether or not to shift to the game control process.
Since a flag is set to determine whether or not to shift to the game control process in the timer interrupt process based on the timer interrupt that is periodically generated by the 56 internal timers, all the game control processes are reliably executed. Is done. In other words, until all of the game control processes have been executed, it is not determined whether or not to shift to the next game control process, so it is guaranteed that all processes in the game control process will be completed. ing.

Here, the CPU 56 of the main board 31
Is executed in response to a flag set in a timer interrupt process based on a timer interrupt that is periodically generated by an internal timer of the CPU 56, but the signal is periodically (for example, every 2 ms). A hardware circuit which generates the signal may be provided, a signal from the circuit may be introduced to an external interrupt terminal of the CPU 56, and a flag for determining whether or not to shift to the game control process based on the interrupt signal may be set. Good.

Even in such a configuration, the flag is not determined until all the game control processes have been executed, so that execution of all the processes in the game control process is guaranteed to be completed. You.

FIG. 21 shows the main board 31 and the payout control board 3.
FIG. 9 is an explanatory diagram showing an example of a command form of a payout control command sent to the control unit 7; In this embodiment, the payout control command has a 2-byte configuration, and the first byte is MODE.
(Command classification), and the second byte indicates EXT (command type). The command form shown in FIG. 21 is an example, and another command form may be used.
The first bit (bit 7) of MODE data is always "1"
And the first bit (bit 7) of the EXT data is always "0".

FIG. 22 shows the relationship between an 8-bit control signal (in this case, a payout control signal) and an INT signal (in this case, a payout control signal INT) which constitute a control command for each electric component control means. It is a timing chart. FIG.
As shown in FIG. 2, when the period indicated by A elapses after the MODE or EXT data is output to the output port (port 1 in the case of the payout control signal), the CPU 56
Turns on an INT signal which is a signal indicating data output. When the period indicated by B has elapsed therefrom, the INT signal is turned off. Further, when there is data to be transmitted next, that is, after the MODE data is transmitted, the data of the second byte is transmitted to the output port after a period indicated by C. Regarding the data of the second byte, the periods of A and B are the same as the case of the first byte.

The period A is a period for the CPU 56 to prepare for sending a command, that is, a period required for processing for setting a send command in the buffer, and also to a control signal line (a payout control signal line in the case of a payout control signal). This is the period for data stabilization. The period of B is INT
This is a period for signal stabilization. And the period of C is
This is a period in which the electric component control means (the payout control means in the case of the payout control signal) is set so as to be able to reliably take in data. In the period C, the data on the signal line does not change. That is, the data output is maintained until the period C elapses.

In this embodiment, a payout control command to the payout control board 37, a display control command to the display control board 80, a lamp control command to the lamp control board 35, and a voice control command to the voice control board 70 are: It is sent using the same routine (common module). Therefore, the period of C, that is, the period from when the INT signal relating to the first byte is turned off to when the transmission of the second byte data is started, is the reception processing time in the electric component control means which takes the longest time for the command reception processing It is set to be longer than

Each electric component control means changes the state of the INT signal from the on state (high level) to the off state (low level).
Is detected, the process of capturing 1-byte data is started by, for example, an interrupt process.

Since the period of C is longer than the reception processing time of the electric component control means which takes the longest time for the command reception processing, the game control means controls the command transmission processing for each electric component control means by the common module. Also, any of the electric component control means can reliably receive the control command from the game control means.

FIG. 23 is an explanatory diagram showing an example of the contents of the payout control command. In the example shown in FIG.
Command F of ODE = FF (H) and EXT = 00 (H)
F00 (H) is a payout control command indicating that one of the payout ball passages 186a and 186b has become out of ball. MODE = FF (H), EXT = 01
The command FF01 (H) of (H) is a payout ball passage 186.
This is a payout control command for designating a state of stopping payout of award balls based on the fact that both a and 186b have become out of ball. MODE = FF (H), EXT = 02 (H)
The command FF02 (H) is a payout control command for designating a payable state of award balls (including designation of non-confirmation of payout completion). MODE = FF (H), EXT = 03
The command FF03 (H) of (H) is a payout control command for designating the stoppage state of payout of prize balls and loaned balls based on detecting that the lower plate is full. MODE = FF
(H), command FF04 (H) with EXT = 04 (H)
Is a payout control command for designating a rental ball payout stop state based on the ball-out state of the payout ball passage 186c. MODE = FF (H), EXT = 05
The command FF05 (H) of (H) is a payout control command for specifying a payable state of a lent ball. Also, MOD
The command F0XX (H) of E = F0 (H) is a payout control command for specifying the number of winning balls. EXT "X
“X” indicates the number of payouts.

When the payout control means receives the payout control command of FF00 (H) from the game control means of the main board 31, it recognizes that one of the payout ball path 186a and the payout ball path 186b is out of ball. Payout control according to such a situation (for example, in response to the unstable payout process due to a decrease in ball pressure due to a lack of one game ball, the prize ball motor 289A It is controlled to make the payout slow by slowing down the rotation speed, or it is checked whether or not all the prize balls of the planned payout number have been paid out after the rotation of the prize ball motor 289A in the scheduled operation period. Control such as paying out). Also, the game control means of the main board 31
When the payout control command of (H) is received, the winning ball is stopped, and when the payout control command of FF02 (H) is received, the winning ball can be paid out. In addition, the main substrate 31
When the payout control command of FF03 (H) is received from the game control means, the award ball and the ball lending are stopped,
When the payout control command of FF04 (H) is received, ball lending is stopped, and when the payout control command of FF05 (H) is received, ball lending is enabled. further,
Upon receiving the payout control command for specifying the number of winning balls, the control unit performs payout ball payout control in accordance with the number specified by the received command.

In this embodiment, the ball out switch 18
When the game ball is no longer detected by one of the ball out switch 7a and the ball out switch 187b, a payout control command designating confirmation of payout completion is output. A payout control command for notifying that the machine has run out is output, and the corresponding response (for example, confirmation of payout completion, reduction of the payout speed, stoppage of payout, etc.) is determined on the payout control board 37 side. You may. Further, for example, the prize ball payout device is connected to the payout ball passage 186.
When it is possible to perform control according to the path in which the ball has run out, for example, in the case of a configuration provided for each of the a and 186b, which of the payout ball passages 186a and 186b has run out of the ball (ball run out) Which of the switch 187a or the ball out switch 187b no longer detects the game ball) is determined by using the payout control command.
The notification may be sent to the side.

Note that the payout control command is sent only once so that the payout control means can recognize it. Recognizable means that the INT signal is in the ON state in this example, and is transmitted only once so that it can be recognized. In this example, the INT signal is sent to the first and second bytes of the payout control signal. Accordingly, the INT signal is turned on only once.

FIG. 24 is an explanatory diagram showing an example of the contents of the lamp control command. Lamp control command is also MODE
And EXT. In the example shown in FIG. 24, commands 8000 (H) to 8022 (H), 810
0 (H) to 8122 (H) are lamp control commands for designating a lamp / LED display control pattern corresponding to a special symbol variation pattern on the variable display unit 9. The command A0XX (X = any value of 4 bits) is
This is a lamp control command for instructing a lamp / LED display control pattern when stopping the variable display of a special symbol. The command BXXX is a lamp control command for instructing a lamp / LED display control pattern from the start of the big hit game to the end of the big hit game or a lamp / LED display control pattern from the end of the big hit game to the start of the big hit game. Command BXXX and command C000 are lamp control commands for instructing a lamp / LED display control pattern during a customer waiting demonstration.

The commands 8XXX, AXXX, BX
XX and CXXX are ramp control commands sent from the game control means according to the progress of the game. Upon receiving the above-described lamp control command from the game control means on the main board 31, the lamp control means changes the display state of the lamp / LED according to the contents shown in FIG.

The command E0XX is the start storage display 18
Is a lamp control command indicating the number of lights. For example,
The lamp control means operates the "X
The number of indicators specified by "X" is turned on. The command E1XX is a lamp control command indicating the number of lighting of the gate passage storage display 41. For example, the lamp control means turns on the number of indicators designated by “XX” in the gate passage storage indicator 41.
That is, these commands are commands for instructing control of the light emitter provided for notifying the information of the number of held units. In addition, the command regarding the lighting number of the start storage display 18 and the gate passage storage display 41 may be configured to indicate the increase or decrease of the lighting number.

Commands E200 and E201 are lamp control commands related to the display state of the award ball lamp 51. Upon receiving the lamp control command “E201” from the game control means on the main board 31, the lamp control means sets the display state of the prize ball lamp 51 to a predetermined display state in which there is a prize ball remaining, and sets the display state of “E200”. When the lamp control command is received, the display state of the prize ball lamp 51 is set to a predetermined display state where there is no prize ball remaining. That is, the commands E200 and E201 are commands indicating that a light emitting body provided for notifying a player or the like that there is a game ball of a non-winning ball is controlled.

Commands E300, E301, E302,
And E303 are lamp control commands relating to the display state of the ball out lamp 52. Upon receiving the lamp control command of “E300” from the game control means of the main board 31, the lamp control means changes the display state of the out-of-ball lamp 52 to a display state in which there is a ball (for example, a light-off state), and “E30
When the lamp control command of "1" is received,
The display state 2 is the payout ball path 186a and the payout ball path 1
A display state (for example, a lighting state) indicating that both the stored balls 86b are out of the ball indicates that the ball is out of the ball. Further, when a lamp control command of “E302” is received from the game control means of the main board 31, the display state of the ball out lamp 52 is changed to a display state (for example, blinking) indicating that the stored ball in the payout ball path 186b is out of ball. State) and “E30
When the lamp control command of "3" is received,
The display state of 2 indicates that the stored ball of the payout ball path 186a is running out of balls (for example, 2 at regular intervals).
Flashes twice). That is, the command E300
E303 to E303 are commands indicating that a light emitter provided for notifying a player or a game clerk that the supply ball has run out is controlled. As described above, the display state of the out-of-ball lamp 52 can be distinguished using various display states such as turning off, lighting, blinking, and blinking twice at regular intervals, as described above.

The command E400 is issued when the power of the gaming machine is turned on, or from a specific game state (high-probability state or time-saving state, in this example, high-probability state) to a normal state (low-probability state or non-time-saving state, in this example, low-probability state). This is a lamp control command for instructing a lamp / LED display control pattern at the time of transition to (state). The command E401 is a lamp / LED display at the time of transition from a normal state (low-probability state or non-time-saving state, in this example, low-probability state) to a specific game state (high-probability state or time-saving state, in this example, high-probability state). This is a lamp control command for instructing a control pattern. Command E402 is
This is a lamp control command for instructing a lamp / LED display control pattern when an error generated during the big hit game is released. The command E403 is a lamp control command for instructing a lamp / LED display control pattern when an error occurs in the count switch 23.
That is, those commands are commands instructing that the gaming state is notified by the light emitting body. In this embodiment, when the lamp control means receives a command instructing to notify the gaming state, the decoration lamp 25,
Game effect LED 28a and game effect lamp 28b, 2
Lighting / extinguishing control for notifying the gaming state is performed using a part or all of 8c. Decorative lamp 2
5. Game effect LED 28a and game effect lamp 28
Each of b and 28c may be constituted by a group of a plurality of light emitters. In this case, the gaming state is notified by using a part of the decorative lamp 25, the game effect LED 28a, and the game effect lamps 28b and 28c. To do is to
For example, it also means that a part of the plurality of light emitters constituting the decorative lamp 25 may be used.

FIG. 25 is a flowchart showing a portion related to the winning ball control of the switch process (step S21) in the game control process shown in FIG. In the switch processing, when the CPU 56 detects a ball cut for a prize ball by the ball cut switch 187a, the CPU 56 switches the ball cut switch 1
If the ball cut for the prize ball is not detected by 87b, the one-side ball cut state flag is set (step S121,
S122, S124), when the ball cut for the prize ball is also detected by the ball cut switch 187b, the both-side ball cut state flag is set (steps S121, S122, S122).
S125). On the other hand, the CPU 56
If the ball cut for prize ball is not detected by 7a, if the ball cut for prize ball is detected by the ball cut switch 187b, the one-side ball cut state flag is set (steps S121, S123, S124), and the ball is cut. Switch 18
If the ball for a prize ball is not detected even by 7b, the one-side ball-cut state flag and the both-side ball-cut state flag are reset (steps S121, S123, S12).
6). That is, in this example, the left and right two payout ball paths 18
When the game balls stored in any one of 6a and 186b are insufficient, the one-side ball out state flag is set. Further, if the number of the game balls stored in both of the two payout ball passages 186a and 186b is insufficient, the both-side ball out state flag is set. Further, when it is detected that a predetermined number or more of game balls are stored in both of the two payout ball passages 186a and 186b, the one-side ball out state flag and the both-side ball out state flag are reset.

It is to be noted that, for example, the prize ball payout device is connected to the payout ball passage 1
In a configuration in which control can be performed according to the path in which the ball has run out, such as a configuration provided for each of the 86a and 186b, any of the payout ball paths 186a and 186b
A flag may be used so that it is possible to identify whether the ball has run out (whether the ball-break switch 187a or the ball-break switch 187b no longer detects the game ball). That is, the payout ball route 186a
If only the ball is out of ball (step S122)
N) The left-side out-of-ball flag is set, and if only the payout ball path 186b is out-of-sphere (Y in step S123), the right-side out-of-ball flag may be set.

Next, when the out-of-ball switch for use of the ball is detected by the out-of-ball switch 187c, the out-of-lending-ball state flag is set (steps S127 and S128). When it is detected that the ball is not out of ball for lending by the ball out switch 187c, the out-of-lending-ball state flag is reset (steps S127 and S129).

Next, when the lower tray full is detected by the full tank switch 48, a full flag is set (steps S130, S131). When it is detected by the full switch 48 that the lower tray is not full, the full flag is reset (steps S130 and S132).

Further, when it is detected that the count switch 23 is turned on, the 15 counter is incremented by 1 (steps S133, S134), and the winning opening switches 19a, 24a are set.
Is detected, the ten counters are incremented by one (steps S135 and S136), and when the start port switch 17 is detected to be on, the six counters are incremented by one (steps S137 and S138).

In this embodiment, fifteen prize balls are paid out for a prize that has passed through the grand prize port, and the starting prize port 1 is set.
It is assumed that six prize balls are paid out for the prize after 4 and 10 prize balls are paid out for the prize through the other prize ports 19 and 24 and the prize ball device. The 15 counter is a counter for counting the number of winnings to the special winning opening.
The zero counter is a counter for counting the number of winnings to the normal winning opening, and the six counter is a counter for counting the number of winnings to the starting winning opening.

FIGS. 26 to 30 are flowcharts showing an example of the winning ball signal processing (step S31) in the game control processing shown in FIG. In this example, in the winning ball signal processing, the CPU 56 checks whether or not the winning ball payout is stopped (step S201). The prize ball payout stop state is a state after a command to specify the prize ball payout stop state designation or the payout stop state designation is sent to the payout control board 37. The CPU 56 checks whether or not the ball lending is stopped (step S202 or step S202).
207). The ball lending stop state is a state after the ball lending stop state designation command or the payout stop state designation command is sent to the payout control board 37.

If the winning ball payout suspension state and the ball lending suspension state are present (steps S201, S202), the CPU 5
No. 6 confirms whether the above-mentioned both-side out-of-ball state flag, the one-side out-of-ball state flag, the out-of-lending state flag, and the full tank flag are off (step S203). If all of them are off, the CPU 56 sets a command transmission table relating to award ball payout possible state designation and ball lending possible state designation (step S204). If not off,
The process moves to the process shown in FIG. The command transmission table will be described later in detail. Note that some command transmission tables may be set based on the elimination of some failures. For example, in step S203,
When it is confirmed that the full ball flag, both-side ball out flag, and one-side ball out flag are off, the command transmission table regarding the prize ball dispensable state designation is set, and when the off-lending ball state flag and the full tank flag are confirmed off, You may make it set the command transmission table regarding the ball lending possible state designation.

If the prize ball payout is stopped but the ball lending is not stopped, the CPU 56 checks whether or not the above-mentioned both-ball-out state flag is off (step S2).
01, S202, S205). If the both-side ball out state flag is off, the CPU 56 sets a command transmission table relating to the award ball payout possible state designation (step S206). In addition, it is preferable to confirm whether the one-sided ball out state flag is turned off in step S205.

If neither the prize ball payout stop state nor the ball lending stop state is present, the CPU 56 checks whether or not the payout completion check is possible. If the payout completion check is possible, the one-side ball out state flag is turned off. It is confirmed whether or not it is set (steps S201, S207, S208, S209). The payout completion confirmable state is a state after the above-described payout completion confirmable state designation command is transmitted to the payout control board 37. If the one-side ball shortage state flag is off, the CPU 56 sets the command transmission table relating to the award ball payout possible state designation (in this example, the designation that the payout completion confirmation is unnecessary) (step S1). S2
06). If the one-side ball-out state flag is not turned off, or if the payout completion confirmation is not possible in step S208, the processing shifts to the processing shown in FIG.

If it is not in the award ball payout stop state but in the ball lending stop state, the CPU 56 checks whether the lending ball out-of-ball state flag is off (steps S201 and S201).
207, S210). If the out-of-lending-ball state flag is turned off, the CPU 56 sets a command transmission table related to the specification of the lending-sphere available state (step S21).
1). If the out-of-lending-ball state flag is not turned off, the process proceeds to the above-described step S208.

In the processing shown in FIG.
Confirms that the full tank flag is turned on, sets the command transmission table related to the payout stop state designation (steps S212a and S212b). CPU5
6 confirms that the both-side out-of-ball state flag has been turned on, sets a command transmission table relating to designation of a winning ball payout stop state (steps S213a and S213b), and confirms that the one-side out-of-ball state flag has been turned on. The command transmission table relating to the specification of the checkable state is set (steps S214a and S214b), and if it is confirmed that the out-of-lending ball state flag has been turned on, the command transmission table relating to the specification of the ball lending stop state is set (steps S215a and S215b). . If none of the flags are turned on and the command transmission table is not set, the processing shifts to the processing shown in FIG.

In FIG. 27, all the flags are checked. However, the flags related to the already set state may not be checked.
For example, when the processing of FIG. 27 is performed via the above-described step S205, since the winning ball payout stop state has already been set, the state of the both-side ball out state flag is not checked.

In the process shown in FIG. 28, it is determined whether or not the timer T1 has timed out (step S21).
6). The timer T1 is a timer for determining whether or not an unrecoverable error has occurred. If the accumulated number of errors exceeds a predetermined number at the time of timeout, an error that cannot be recovered is obtained. If the cumulative error count is equal to or less than the predetermined count, the operation is continued. If the timer T1 has not been set, or if the timer has not timed out, the process proceeds to step S221.

If the timer T1 has timed out, the value of the winning ball error counter is checked (step S217). If the value of the winning ball error counter exceeds a predetermined value, an error state is entered (step S22).
0). In the error state, the CPU 56 is stopped.
For example, a loop state (jump to the same address) is set.

If the value of the winning ball error counter does not exceed the predetermined number when the timer T1 times out, the winning ball error counter is initialized (step S218), and the timer T1 is started again (step S219).

The value of the winning ball error counter is counted up when an error such as an excessive number of winning balls is detected. Therefore, if a prize ball excess error exceeding a predetermined number occurs within a predetermined time (within the count-up time of the timer T1), 2
Even if it is restarted by the ms interrupt, it will not be released. In this way, if the system is configured not to be in the halt state immediately when the excess prize ball error occurs but to be in the stop state when the prize ball excess error occurs frequently, an error that occurs temporarily and naturally recovers may occur. Then, the gaming machine does not become inoperable. In addition, when the prize ball excess error frequently occurs, an inspection or the like is often required. In such a case, the gaming machine can be made inoperable.

Next, the CPU 56 controls to set a payout control command relating to the number of winning balls according to the winning in the command transmission table. First, the values of the 15 counters are checked (step S221). As mentioned above, 1
The five counters are counted up when the game ball wins the big winning opening and the count switch 23 is turned on. Fifteen
If the value of the number counter is not 0, a command transmission table relating to the fifteen winning ball number instructions is set (step S222). Further, the value of the 15 counters is decremented by one (step S223). Further, 15 is added to the payout command number cumulative value (step S224).

If the value of the 15 counter is 0, the value of the 10 counter is checked (step S225). As described above, the ten counters are counted up when a game ball wins a winning opening and the winning opening switches 19a and 24a are turned on. If the value of the ten counter is not 0, the command transmission table for the ten winning ball number instructions is set (step S226). Further, the value of the ten counters is decremented by one (step S227). Further, 10 is added to the cumulative number of payout commands (step S).
228).

If the value of the ten counter is 0, the value of the six counter is checked (step S231). As described above, the six counters are counted up when the game ball wins the starting winning port and the starting port switch 17 is turned on. If the value of the six counter is not 0, the command transmission table for the six winning ball number instructions is set (step S232). Also, the value of the six counters is-
1 (step S233). Further, 6 is added to the payout command number cumulative value (step S234).

As described above, when the payout control command is to be output from the game control means to the payout control board 37, the command transmission table is set. When the command transmission table is set,
The award ball paying flag is turned on (step S235). If the award ball paying flag is on, the process shifts to step S241 (step S236).

Next, the CPU 56 checks whether or not the error display flag is turned on (step S241).
If it is on, the process moves to step S257. In addition,
The error display flag will be described later. If the error display flag is not turned on, the prize ball count switch 3
Wait for 01A to turn on (step S242). When detecting that the prize ball count switch 301A is turned on, it waits for the prize ball count switch 301A to be turned off (step S24).
2) When turned off, the payout command cumulative number is decremented by one (step S244). Also, the award ball number signal output processing subroutine is started (step S245). And the timer T
2 is started (step S246).

The paid prize balls pass through the prize ball count switch 301A one by one. As described above, by detecting the on / off state of the prize ball count switch 301A, the passage of the game ball is reliably detected. Is done. And
When the passage of the game ball is detected, it is determined that there is one prize ball, and the payout command cumulative number is decremented by one.

If the cumulative value of the number of payout commands, which is added when the payout control command is transmitted and is decremented by one when the prize ball count switch 301A is turned on, does not become 0 when the timer T2 times out, the prize ball is too large or the prize ball is insufficient. Is determined to have occurred. Therefore, the timer T2 is started or restarted every time the output of the prize ball count switch 301A is turned off after being turned on.

If the award ball count switch 301A is not turned on in step S242, it is checked whether or not the timer T2 is operating (step S247). Timer T2
Is operating, the CPU 56 checks whether or not the timer T2 has timed out (step S250). If the timeout has not occurred, the process ends.

The value of the timer T2 (the time from the start to the time-out) is a payout cycle (a period from when the prize ball count switch 301A is turned on to when it is turned on next time) when payout is normally performed. ) Is set longer. Therefore, when the payout is normally performed, the next winning ball count switch 301A is turned on (step S242) before the timer T2 times out, except for the last payout. That is, when the payout is normally performed, the timer T2 times out only after the last payout is performed.

In some cases, an interval time is provided between the prize ball payouts in continuous payout (the prize ball payout for a certain prize and the prize ball payout for the next prize are performed consecutively). Is that the value of the timer T2 is set longer than the interval time. That is, when the continuous payout is performed, the time-out occurs only after the last payout is performed.

When the timer T2 times out in step S250, the CPU 56 checks whether or not the cumulative number of payout commands is 0 (step S25).
1). When a corrected payout, which will be described later, is performed, it is checked whether or not the stored value of the corrected number is 0. The payout command number cumulative value is added by the number of prize balls when a prize is won, and the prize ball count switch 301 for detecting that there is a prize ball.
Since the value is decremented by 1 when A is turned on, the value is 0 when the payout is completed normally. Therefore, if the value is 0, the prize ball payout flag is turned off and the process ends (step S252).

If the cumulative number of payout commands or the stored value of the number of corrections is not 0 when the timer T2 times out, there is an excess of prize balls or a shortage of prize balls. Therefore, when the payout command number accumulation value or the corrected number storage value is not 0, the CPU 56 checks whether the value is positive or negative (step S253). When the value is positive, that is, when it is determined that the payout is insufficient, the number to be corrected is set to the stored value of the corrected number (step S
255), a command transmission table relating to the number of corrections is set (step S256).

In the present embodiment, the payout ball route 1
If the payout process is executed while either the ball 86a or the payout ball path 186b is out of the ball, the payout control board 37 determines whether or not the payout is insufficient, and performs a correction operation. Therefore, the process of setting the command transmission table relating to the number of corrections in step S256 is unnecessary. Even when either the payout ball path 186a or the payout ball path 186b is out of ball, the determination is made on the main board 31 side as described above without performing the determination on the payout control board 37 side. A command transmission table for the number of corrections may be set.

FIG. 31 is a flowchart showing an example of the error display process. In the error display process, the CPU
56 first checks whether the timer T3 is operating (step S261). The timer T3 is a timer that is set when an error is detected, and displays an error until a timeout occurs. If timer T3 is not running,
The error display flag is turned on (step S262), and an error display request is set (step S263). Then, the timer T3 is started (step S264). Further, the value of the winning ball error counter is incremented by 1 (step S2).
65).

The value of the winning ball error counter is determined in step S2.
A check is made at step 12, and if the value exceeds a predetermined value within a predetermined time, a complete error state is set in which automatic recovery is not performed. In addition,
When the error display request is set, for example, control is performed so that an error is displayed on the variable display unit 9, or control is performed so that an error notification sound is generated from the speaker 27.

Then, if the game state is the normal state (step S266), a loop state is set. The normal state is a state other than the big hit gaming state and the state where the variable display is performed on the variable display unit 9.

If the timer T3 is operating in step S261, the CPU 56 checks whether or not the timer T3 has timed out (step S27).
0). If a timeout has occurred, the error display request is reset (step S271), and the error display flag is turned off (step S272). Further, the award ball payout flag is turned off (step S273). Therefore,
The gaming machine returns to a state where the winning ball detection and the winning ball payout control can be performed again. When the error display flag is on, the game progress is interrupted.

In the error state of step S213 (the value of the winning ball error counter has exceeded a predetermined value within a predetermined period), for example, error display and error notification are performed, and control is performed so as to enter a loop state. .

FIG. 32 shows a prize ball count switch 301A.
Is a flowchart showing a prize ball number signal output processing subroutine (step S245) activated when it is confirmed that one game ball has been paid out (steps S242 to S243). .

In the prize ball number output processing subroutine, the CP
U56 increments the value of the winning ball number counter by +1 (step S281). If the value of the prize ball number counter is a multiple of 10 (step S282), the request for prize ball number output is turned on (step S283). Note that the prize ball number counter is simply incremented, and if the prize ball number counter is a 16-bit counter,
After the value becomes FFFF (H), it returns to 0.

FIG. 33A is an explanatory diagram showing an example of the configuration of the command transmission table described above. One command transmission table is composed of 3 bytes.
NT data is set. The command data 1 in the second byte includes the MOD in the first byte of the payout control command.
E data is set. The command data 2 of the third byte includes EXT of the second byte of the payout control command.
The data is set.

Although the EXT data itself may be set in the command data 2 area, the command data 2
May be set to data for specifying an address of a table in which EXT data is stored. In this embodiment, bit 7 of command data 2
If (work area reference bit) is 0, it indicates that the EXT data itself is set in the command data 2. Such EXT data is data in which bit 7 is 0. If the work area reference bit is 1, the other 7 bits indicate an offset for specifying an address of a table in which EXT data is stored.

In this embodiment, a plurality of command transmission tables are prepared, and the command transmission table to be used is designated by a pointer. Also, a plurality of command transmission tables are used as a ring buffer. Therefore, CP
U56 sets the INT data, the command data 1 and the command data 2 in the command transmission table pointed to by the write pointer in the winning ball signal processing. Then, the value of the write pointer is updated. Since one command transmission table has a 3-byte configuration, specifically, the write pointer value is +3.

Since a plurality of command transmission tables are provided, it is possible to perform a command transmission table setting process for one payout control command or a plurality of command transmission table setting processes for one process. it can. For example, a plurality of winning prize counters,
When stored in the zero counter and the six counter, a plurality of command transmission table setting processes may be performed in one winning ball signal process.

Although the payout control command will be described here, the display control command, the lamp control command, and the voice control command are also transmitted when the display control command, the lamp control command, and the voice control command are transmitted.
INT data, command data 1 and command data 2 are set in a command transmission table as shown in FIG. At that time, the INT data, the command data 1 and the command data 2 are set in the command transmission table pointed to by the write pointer.

FIG. 33B is an explanatory diagram showing an example of the configuration of INT data. Bit 0 in the INT data indicates whether or not a payout control command should be sent to the payout control board 37. If bit 0 is "1", it indicates that a payout control command should be sent. Therefore, the CPU 56
In the winning ball signal processing, "01" is added to the INT data.
(H) ”is set.

The bits 1, 2, 3 of the INT data
Are bits indicating whether or not to transmit a display control command, a lamp control command, and a voice control command, respectively. When it is time to transmit those commands, the CPU 56 performs special symbol process processing or the like. The INT data, command data 1 and command data 2 are set in the command transmission table indicated by the pointer. When these commands are transmitted, the corresponding bit of the INT data is set to "1", and MODE data and EX data are added to command data 1 and command data 2.
T data is set.

FIG. 34 is a flowchart showing an example of the command control process (step S27) in the game control process shown in FIG. The command control process is a process including a command output process and an INT signal output process. In the command control process, the CPU 56 first
The address (contents of the read pointer) of the command transmission table is saved in a stack or the like (step S401). Then, the INT data of the command transmission table pointed to by the read pointer is loaded into the argument 1 (step S40).
2). Argument 1 is input information for a command transmission process described later. Further, the address indicating the command transmission table is incremented by 1 (step S403). Therefore, the address indicating the command transmission table matches the address of the command data 1.

Therefore, the CPU 56 sets the command data 1
Is read and set as argument 2 (step S404).
The argument 2 also becomes input information for a command transmission process described later. Then, a command transmission processing routine is called (step S405).

FIG. 35 is a flowchart showing a command transmission routine. In the command transmission routine,
First, the CPU 56 sets the data set in the argument 1, that is, the INT data, in the work area determined as the comparison value (step S421). Then
The number of transmissions = 4 is set in the work area determined as the number of processes (step S422). Then, port 1 for outputting the payout control signal (output port 571)
Is set to the IO address (step S4).
23).

Next, the CPU 56 shifts the comparison value one bit to the right (step S424). It is determined whether the carry bit has become 1 as a result of the shift processing (step S425). The fact that the carry bit has become 1 means that the rightmost bit in the INT data is “1”.
It means that it was. In this embodiment, four shift processes are performed. For example, when it is specified that a payout control command should be sent, the carry bit becomes 1 in the first shift process.

When the carry bit becomes 1, the data set in the argument 2, in this case, the command data 1 (ie, MODE data) is output to the address set as the IO address (step S4
26). When the first shift processing is performed, since the address of port 1 (output port 571) is set in the IO address, MODE data of the payout control command is output to port 1 after all.

Next, the CPU 56 sets the IO address to 1
While adding (step S427), the number of processes is decremented by 1 (step S428). If port 1 is indicated before the addition, the address of port 2 (output port 572) is set as the IO address by the addition processing for the IO address. Port 2 (output port 572)
Is a port for outputting a display control command.
Then, the CPU 56 checks the value of the number of processes (step S429), and if the value is not 0, the process proceeds to step S4.
Return to 24. In step S424, the shift process is performed again.

In the second shift processing, the value of bit 1 in the INT data is pushed out, and the carry flag becomes "1" or "0" according to the value of bit 1. Therefore,
A check is made as to whether it is specified that a display control command should be sent. Similarly, in the third and fourth shift processes, it is checked whether or not it is specified that the ramp control command and the voice control command should be transmitted. As described above, when each shift process is performed, the IO address corresponding to the command (payout control command, display control command, lamp control command, voice control command) set by the shift process is set in the IO address. Have been.
Therefore, when the carry flag becomes "1", a control command is sent to the corresponding output port (port 1 to port 4). That is, with one common module,
Transmission processing of a control command to each electric component control means can be performed.

As described above, since it is determined which control means to output a control command to by only the shift processing, it is determined which control means to output a control command to. Processing has been simplified.

Next, the CPU 56 reads the contents of the argument 1 storing the INT data before the start of the shift processing (step S430), and transfers the read data to the port 0.
(Output port 570) (step S43).
1). For the INT data, steps S421 to S429
Control commands (payout control commands,
The bit corresponding to the output bit of the INT signal according to the display control command, the lamp control command, and the voice control command is “1”. Therefore, port 1 to port 4
The INT signal corresponding to the control command (payout control command, display control command, lamp control command, voice control command) output to any of the above is turned on.

Next, the CPU 56 sets a predetermined value in the weight counter (step S432), and decrements by one until the value becomes 0 (steps S433 and S43).
4). This process is a process for setting the period B shown in FIG. When the value of the wait counter becomes 0, clear data (00) is set (step S43).
5), and outputs the data to port 0 (step S4)
36). Therefore, the INT signal is turned off. Then, a predetermined value is set in the weight counter (step S4).
32), and decrement by 1 until the value becomes 0 (steps S438 and S439). This process is a process for setting the period C shown in FIG.

Therefore, the value set in the wait counter in step S437 is such that the period of C is a period sufficient for all the electric component control means to receive the control command to reliably execute the command receiving process. Value. The value set in the wait counter is such that the period of C is
This value is longer than the time required for the processing in steps S421 to S429.

As described above, the MODE data of the first byte of the control command is transmitted. Therefore, CPU5
No. 6 adds 1 to the value indicating the command transmission table in step S406 shown in FIG. Therefore, the area of the command data 2 in the third byte is specified. The CPU 56
The contents of the indicated command data 2 are loaded into the argument 2 (step S407). Also, it is checked whether the value of bit 7 (work area reference bit) of the command data 2 is “0” (step S409). If it is not 0, the start address of the command extension data address table is set in the pointer (step S409), and the address is calculated by adding the value of bit 6 to bit 0 of the command data 2 to the pointer (step S410). Then, the data of the area indicated by the address is loaded into the argument 2 (step S411).

In the command extension data address table, EXT data that can be transmitted to the electric component control means is sequentially set. Therefore, if the value of the work area reference bit is “1” by the above processing, the EXT data in the command extension data address table corresponding to the content of the command data 2 is loaded into the argument 2 and the work area reference bit is set. If the value is “0”, the content of the command data 2 is loaded as it is into the argument 2. Even when EXT data is read from the command extension data address table, bit 7 of that data is “0”.

Next, the CPU 56 calls a command transmission routine (step S412). Therefore, MOD
The EXT data is transmitted at the same timing as the transmission of the E data. Thereafter, the CPU 56 restores the address of the command transmission table (step S413), and updates the value of the read pointer pointing to the command transmission table (step S414). Since one command transmission table has a 3-byte configuration, specifically, the value of the read pointer is +3.

As described above, the payout control command having the 2-byte structure is transmitted to the payout control board 37. The command control process shown in FIG. 34 is also used when transmitting other control commands (display control command, lamp control command, voice control command). When each electric component control means detects the falling of the INT signal, the control command fetch process is started. However, before any of the electric component control means completes the fetch process, a new signal from the game control means is received. Is not output to the signal line. That is, in each electric component control means,
Reliable command reception processing is performed. Note that each electric component control unit may start the process of capturing a control command at the rising edge of the INT signal. Also, the polarity of the INT signal may be reversed from that shown in FIG.

Also, in this embodiment, a plurality of command transmission tables are used as ring buffers,
In the command control process shown in FIG. 4, command output control is performed for the command transmission table pointed to by the read pointer, and in the process of setting data in the command transmission table, for example, in the winning sphere signal process shown in FIG.
The command setting process is performed on the command transmission table indicated by the write pointer. Therefore, even if a plurality of command transmission requests occur at the same time, the command output process based on those requests is executed without any problem.

Further, in this embodiment, regardless of whether or not the payout of prize balls or ball lending is stopped, data relating to the designation of the number of prize balls in the command transmission table by the prize ball signal processing (see FIG. 29). Is set, and the command output control is performed for the command transmission table by the command control process shown in FIG. Therefore, even when the payout of prize balls or ball lending is stopped, the payout control command relating to the designation of the number of prize balls is reliably output.

Next, the operation of the payout control means will be described. FIG. 36 is a block diagram illustrating a configuration example around the payout control CPU 371. As shown in FIG. 36, the voltage drop signal from the first power supply monitoring circuit (first power supply monitoring means) is sent to the payout control CPU 3 via the buffer circuit 960.
It is connected to a non-maskable interrupt terminal 71 (XNMI terminal). The first power supply monitoring circuit is a circuit that monitors a voltage of any one of various DC power supplies used by the gaming machine and detects a power supply voltage drop. In this embodiment,
The power supply voltage of VSL is monitored, and when the voltage value falls below a predetermined value, a low-level voltage drop signal is generated. VSL is the largest DC voltage used in gaming machines, and is +30 V in this example. Therefore, the payout control CPU 37
1 can confirm the occurrence of power interruption by interrupt processing.

Payout control C used in this embodiment
The PU 371 also has a PI like the CPU 56 of the main board 31.
O and CTC are built in. However, in this embodiment, no built-in PIO is used. In that case, for example, all ports are set to the input mode, and all ports are connected to the ground level.

Further, similarly to the CPU 56 of the main board 31,
The payout control CPU 371 can also be set to any of the interrupt modes 0 to 2, and the CTC can operate in a timer mode or a counter mode as described below.
Also, CTC has four channels. Specifically, four timer counter registers CLK / TRG0 to
3 (counters for channels 0 to 3). The operation mode can be set for each channel.

Each timer counter register CLK / TRG
The values of 0 to 3 are counted down according to the clock signal input to the corresponding CLK / TRG terminal, and when the count value becomes 0, an interrupt can be generated. Therefore,
Each of the channels 0 to 3 of the CTC can be an interrupt generation unit. The priority of the channel 0 is the highest, and then the priority sequentially decreases. That is, the count values of the plurality of timer counter registers CLK / TRG are simultaneously set to 0.
, The channel with the lower number has priority,
If those channels are set to generate an interrupt, an interrupt from a channel with a lower number is accepted first.

In this embodiment, channel 3 of the built-in CTC is used in the timer mode, and channel 2 is used in the counter mode. Channel 3 is used as a timer interrupt source, and channel 2 is used for receiving a payout control command.

Counter mode: payout control CPU 371
When the rising or falling edge of the clock signal is input to the CLK / TRG terminal, the count value is decremented by one. If interrupt generation permission is set for the channel, an interrupt is generated when the count value reaches 0,
Reload the initial value into the counter. If the interrupt vector has been set, the interrupt vector is sent out on the internal data bus when the count value becomes zero.

Timer mode: The count value is decremented by one based on a clock signal obtained by dividing the system clock (internal clock) by 1/16 or 1/256. If interrupt generation permission is set for that channel,
When the count value becomes 0, an interrupt is generated, and the initial value is reloaded into the counter. If the interrupt vector has been set, the interrupt vector is sent out on the internal data bus when the count value becomes zero.

CLK / TRG of payout control CPU 371
An INT signal (payout control signal INT) from the main board 31 is connected to the two terminals. When a clock signal is input to the CLK / TRG2 terminal, the payout control CPU 371
Timer / counter register CLK / TR built in
The value of G2 (CTC channel 2 counter) is down-counted. When the register value becomes 0, an interrupt occurs. Therefore, as shown in FIG. 33, if the initial value of the timer counter register CLK / TRG2 is set to “1”, the register value becomes 0 in response to the input of the INT signal and an interrupt occurs. Become.

The payout control board 37 is also equipped with a system reset circuit 975. In this embodiment,
The system reset circuit 975 also functions as a second power supply monitoring circuit (second power supply monitoring unit). That is, when the power is turned on, the reset IC 976 sets the output to a low level for a predetermined time determined by the capacity of an external capacitor, and sets the output to a high level after the predetermined time has elapsed. The reset IC 976 monitors the power supply voltage of VSL, which is the same as the power supply voltage monitored by the first power supply monitoring circuit mounted on the power supply board 910, and the voltage value becomes equal to or less than a predetermined value (for example, +9 V). Then, a low level voltage drop signal is generated. Therefore, when the power is turned off, the reset IC 976
When the voltage drop signal from the CPU goes low, the payout control CPU 371 is reset. Note that, as shown in FIG. 36, the voltage drop signal is the same output signal as the reset signal.

The predetermined value for the reset IC 976 to detect the power-off is lower than the normal voltage, but the payout control C
This is a voltage at which the PU 371 can operate for a while. Further, since the reset IC 976 is configured to monitor a voltage higher than the voltage (+5 V in this example) required by the payout control CPU 371, the payout control CPU 371
The monitoring range can be extended for the voltage required by the 371. Therefore, more precise monitoring can be performed.

While power is not supplied from the + 5V power supply, at least a part of the built-in RAM of the payout control CPU 371 is backed up by connecting the backup power supply supplied from the power supply board to the backup terminal. The contents are saved even if the power is turned off. Then, when the + 5V power supply is restored, a reset signal is issued from the system reset circuit 975, so that the payout control CPU 371 returns to the normal operation state. At that time, since the necessary data has been backed up,
Upon recovery from a power failure or the like, it is possible to return to the gaming state at the time of the power failure.

As described above, in this embodiment, the first power supply monitoring circuit mounted on the power supply board 910 monitors the highest voltage of the power supply VSL among the DC voltages used in the gaming machine. Then, when the voltage of the power supply falls below a predetermined value, a voltage drop signal (power-off detection signal) is generated. At the timing when the power-off detection signal is output, the IC drive voltage is
The voltage value is still enough to drive various circuit elements. Therefore, the payout control board 37 operated by the IC drive voltage
The operation time for the payout control CPU 371 to perform the predetermined power supply stop processing is secured.

Note that, also in this case, the first power supply monitoring circuit
Highest power supply VSL among DC voltages used in gaming machines
The power supply cutoff detection signal is generated at a timing such that the operation time for the electric component control means operating at the IC drive voltage to perform a predetermined power supply stop processing is secured. If it is timing, the monitoring target voltage need not be the highest voltage of the power supply VSL. That is, if at least the voltage higher than the IC drive voltage is monitored, the power-off detection signal can be generated at a timing such that the operation time for the electric component control means to perform the predetermined power supply stop processing is secured. it can.

In this case, as described above, since the voltage supplied to the various switches of the gaming machine such as the prize ball count switch 301A is +12 V, the monitoring target voltage is prevented from being erroneously detected when the power is turned off. Is also a voltage that can be expected. That is, it is preferable that the voltage drop can be detected before the + 12V power supply voltage, which is the voltage (switch voltage) supplied to the switch, starts to drop. Therefore, it is preferable to monitor at least a voltage higher than the switch voltage.

In the configuration shown in FIG. 36, when power is turned on, system reset circuit 975 outputs a low level for a period determined by the capacitance of a capacitor, and then outputs a high level. That is, the reset release timing is only once. However, the main substrate 31 shown in FIG.
As in the case of the above, a circuit configuration that generates a plurality of reset release timings may be used.

FIG. 37 is a flowchart showing the main processing of the payout control CPU 371. In the main processing,
The payout control CPU 371 first performs necessary initial settings (step S701).

FIG. 38 is a flowchart showing the initial setting process in step S701. In the initial setting process, the payout control CPU 371 first sets interrupt prohibition (step S701a). Next, the payout control CPU
The control unit 371 sets the interrupt mode to the interrupt mode 2 (step S701b), and sets a stack pointer designation address in the stack pointer (step S701c). Further, the payout control CPU 371 initializes the built-in device register (step S701d), and after initializing CTC and PIO (step S701e),
The RAM is set in an accessible state (step S70)
1f).

In this embodiment, one channel of the built-in CTC is used in the timer mode. Therefore,
In the internal device register setting process of step S701d and the process of step S701e, register setting for setting the channel to be used to the timer mode;
Register setting for permitting interrupt generation and register setting for setting an interrupt vector are performed. And
The interrupt by the channel is used as the timer interrupt described above. If a timer interrupt is to be generated every 2 ms, for example, a value corresponding to 2 ms is set in a predetermined register (time constant register) as an initial value.

The interrupt vector set for the channel set in the timer mode (channel 3 in this embodiment) corresponds to the start address of the timer interrupt processing. Specifically, the start address of the timer interrupt processing is specified by the value set in the I register and the interrupt vector. In the timer interrupt process, the timer interrupt flag is set, and when it is detected in the main process that the timer interrupt flag is set, the payout control process is executed. That is, in the timer interrupt process, a setting for executing the payout control process, which is an example of the electrical component control process, is performed.

Another channel of the built-in CTC (channel 2 in this embodiment) is used as a channel for generating an interrupt for receiving a payout control command from the game control means. Is used in the counter mode. Therefore, in the internal device register setting process of step S701d and the process of step S701e, the register setting for setting the channel to be used to the counter mode, the register setting for permitting the occurrence of interrupt, and the interrupt vector are set. Is set.

The interrupt vector set for the channel (channel 2) set to the counter mode corresponds to the start address of the command reception interrupt process described later. Specifically, the start address of the command reception interrupt processing is specified by the value set in the I register and the interrupt vector.

In the present embodiment, the payout control CPU 3
At 71, the interrupt mode 2 is set. Therefore, the built-in CT
An interrupt process based on the count-up of C can be used. Further, it is possible to set an interrupt processing start address according to the interrupt vector transmitted by the CTC.

The interrupt based on the count up of the channel 2 (CH2) of the CTC is an interrupt generated when the value of the timer counter register CLK / TRG2 becomes "0". Therefore, for example, in step S701e, the initial value “1” is set in the timer counter register CLK / TRG2 as the specific register. Also,
The interrupt based on the count up of the channel 3 (CH3) of the CTC is an interrupt generated when the register value becomes “0” after counting down the internal clock (system clock) of the CPU, and a 2 ms timer interrupt described later. Used as Specifically, the register value of CH3 is subtracted in 1/256 cycle of the system clock. In step S701e, a value corresponding to 2 ms is set as an initial value in the register of CH3. In this embodiment, the interrupt address for CH2 is 0074H, and the interrupt address for CH3 is 0076H.

As described above, the interrupt based on the count-up of CH2 of CTC has a higher priority than the interrupt based on the count-up of CH3. Therefore, when the count-up occurs at the same time, an interrupt based on the count-up of CH2, that is, an interrupt that triggers execution of a command reception interrupt process described later has priority.

The payout control CPU 371 checks whether backup data exists in the payout control backup RAM area (step S70).
2). That is, for example, similarly to the processing of the CPU 56 of the main board 31, it is determined whether or not backup data exists by determining whether or not a backup flag that is set when the power is turned off is in a set state. If the backup flag is set, it is determined that there is backup data. If it is determined that there is no backup data, it means that there was no unpaid game ball when the power was last turned off, and there is no need to return the internal state to the state when the power was turned off. Accordingly, the payout control CPU 371
An initialization process that is performed when the power is turned on, not when the power is restored, is executed (steps S702 and S703).

If the backup data exists in the backup RAM area, the payout control CPU 371
Performs a data check (parity check in this example) of the backup RAM area (step S704).
If the power is restored after an unexpected power failure, the data in the backup RAM area should have been saved, and the check result becomes normal. If the check result is not normal, since the internal state cannot be returned to the state at the time of power failure, the initialization processing executed at the time of power-on without power recovery is executed (steps S705 and S70).
3).

If the check result is normal, the payout control CPU 371 performs a payout state restoring process for returning the internal state to the state at the time of power-off (step S706). Then, the process returns to the address indicated by the PC (program counter) stored in the backup RAM area (step S707).

Execution of normal initialization processing (step S70)
After 3), the main process executed by the payout control CPU 371 shifts to a loop process in which the timer interrupt flag is monitored (step S708).

Note that in this embodiment, step S7
02, the presence or absence of backup data is checked, and if backup data exists, the backup area is checked in step S704. Conversely, it is confirmed that the backup area check result is normal. The confirmation of the presence or absence of the backup data may be performed later. Further, it may be configured to determine whether or not to execute the power failure recovery process by confirming whether or not there is backup data or checking the backup area.

Also, for example, a parity check for determining whether or not to execute the power failure recovery processing (step S70)
In the case of 4) or the like, that is, when it is determined whether or not the gaming state is to be restored, the gaming machine is in the standby state for payout (not in the middle of payout) due to the number of payout game balls in the stored RAM data. If it is confirmed that there is, the initialization processing may be executed without performing the payout state restoration processing.

In the normal initialization process, as shown in FIG. 39, the register and RAM are cleared (step S9).
01) is performed, and a predetermined initial value is set (step S902). Then, the initial setting process (step S7)
01a), the interrupt is prohibited, so the interrupt is permitted before the initialization process is completed (step S90).
3).

In this embodiment, the payout control CPU 3
CH3 71 is set to repeatedly generate a timer interrupt. The repetition period is set to 2 ms. Then, as shown in FIG. 40, when a timer interrupt occurs, the payout control CPU 371 sets a timer interrupt flag (step S712). Although FIG. 40 clearly indicates that the interrupt is permitted (step S
711) In the 2 ms timer interrupt processing, first, the interrupt permission state is set. That is, the interrupt is permitted during the 2 ms timer interrupt process.

The payout control CPU 371 determines in step S7
If it is detected at 08 that the timer interrupt flag has been set, the timer interrupt flag is reset (step S709), and a payout control process is executed (step S710). According to the above control, in this embodiment, the payout control process is started every 2 ms. In this embodiment, only the flag is set in the timer interrupt processing, and the payout control processing is executed in the main processing. However, the payout control processing may be executed in the timer interrupt processing.

At the time of power-on, the payout control CPU 371 can determine whether to execute the normal initialization processing or to restore the payout state only by checking the data in the backup RAM area. That is, with a simple judgment,
The payout process can be restarted for unpaid game balls. Further, in this embodiment, as in the case of the game control on the main board 31, the storage contents are reliably stored by the parity check code.

FIG. 41 is an explanatory diagram showing an example of use of the RAM incorporated in the payout control CPU 371. In this example,
In the backup RAM area, a total number storage (for example, 2 bytes) and a rental ball number storage are respectively formed.
The total number storage stores the total number of awarded ball payouts instructed from the main board 31 side. The rental ball number storage stores the number of unpaid ball rentals. In addition,
Instead of the total number of awarded ball payouts, a predetermined number of awarded ball payouts instructed from the main board 31 (for example, 6, 10
, And 15).

As shown in FIG. 41, in this example,
In the backup RAM area of the RAM incorporated in the payout control CPU 371, the remaining payout number storage is formed. The remaining payout number storage stores the number of game media that have not been paid out among the number of game media to be paid out in one payout operation (planned payout number).

FIG. 42 is an explanatory diagram showing an example of the configuration of a receiving buffer for storing the payout control command received from the main board 31. In this example, a ring buffer type receiving buffer capable of storing six payout control commands having a 2-byte configuration is used. Therefore, the reception buffer is constituted by a 12-byte area of the fixed command buffers 1 to 12. Then, a command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11.

FIG. 43 is a flowchart showing a payout control command receiving process by the interrupt process. An INT signal for payout control from the main board 31 is supplied to a payout control CPU 371.
Are input to the CLK / TRG2 terminal. Therefore, when the INT signal from the main board 31 is turned on, the value of the timer counter register CLK / TRG2, which has been set to “1” as the initial value, becomes 0, and the payout control CPU 3
At 71, an interrupt occurs. Then, the receiving process of the payout control command shown in FIG. 43 is started. The start address of the payout control command receiving process is an address determined by the interrupt vector output from the built-in CTC and the value set in the I register. Also, the timer counter register CLK
When the value of / TRG2 becomes 0, that value is automatically returned to the initial value ("1" in this example).

In the processing of receiving the payout control command, the payout control CPU 371 first saves each register in the stack (step S850). Note that when an interrupt occurs, the CPU 371 automatically sets the interrupt prohibition state. However, when a CPU that does not automatically enter the interrupt prohibition state is used, the interrupt prohibition is performed before the execution of the process of step S850. It is preferable to issue an instruction (DI instruction). Next, data is read from the input port 372a assigned to the input of the payout control command data (step S851). Then, it is confirmed whether or not this is the first byte of the payout control command having the 2-byte structure (step S).
852). Whether it is the first byte or not is confirmed by whether or not the first bit of the received command is “1”. The first bit should be “1” in the MODE byte (first byte) of the payout control command having a 2-byte configuration (see FIG. 21). Therefore, if the first bit is “1”, the payout control CPU 371 determines that the valid first byte has been received, and stores the received command in the confirmed command buffer indicated by the command reception number counter in the reception buffer area (step S85
3).

If it is not the first byte of the payout control command, it is confirmed whether or not the first byte has already been received (step S854). Whether or not the data has already been received is confirmed based on whether or not valid data is set in the reception buffer (fixed command buffer).

If the first byte has already been received,
It is checked whether the first bit of the received 1 byte is “0”. And if the first bit is “0”,
Assuming that the valid second byte has been received, the received command is stored in the fixed command buffer indicated by the command reception number counter +1 in the reception buffer area (step S855). The first bit should be “0” in the EXT byte (second byte) of the payout control command having the two-byte structure (see FIG. 21). If it is determined in step S854 that the first byte has already been received, the process ends if the first bit of the data received as the second byte is not “0”.

In step S855, when the command data of the second byte is stored, 2 is added to the command reception number counter (step S856). Then, it is checked whether or not the command reception counter is 12 or more (step S857), and if it is 12, the command reception number counter is cleared (step S858). After that, the saved register is restored (step S859),
Interrupt permission is set (step S859).

During the command reception interruption processing, the interruption is prohibited. As described above, the interrupt is permitted during the 2 ms timer interrupt process. Therefore, if a command reception interrupt occurs during the 2 ms timer interrupt, the command reception interrupt process is executed with priority. You. Further, even if a 2 ms timer interrupt occurs during the command reception interrupt process, the interrupt process is kept waiting. As described above, in this embodiment, the processing priority of the command reception processing from the main board 31 is high. Further, since no other interrupt processing is executed during the command reception processing, the maximum time required for the command reception processing is determined. It is difficult to estimate the longest time required for the command receiving process if the configuration is such that another interrupt process can be executed during the command receiving process. Since the maximum time required for the command receiving process is determined, a period C in the command sending process of the game control means (see FIG. 22).
Can be accurately determined.

Further, since the command reception interrupt processing is executed without confirming whether or not the prize ball or the loaned ball is in the state of stopping the payout, the main board 3 may be stopped even in the state of the stoppage of the payout or the like.
The payout control command input from 1 is reliably received and securely stored in a predetermined fixed command buffer based on the command reception number counter in the reception buffer area. Therefore, the payout control CPU 371 can control to reliably store the payout control command relating to the designation of the number of winning balls, for example, even in the state of stoppage of payout. The number of payouts indicated in the payout control command is stored in the backup RAM.
Processing to add to the area (total number storage) can be executed reliably.

The payout control command has a 2-byte structure, and includes a first byte (MODE) and a second byte (EX).
T) is configured to be immediately distinguishable on the receiving side.
In other words, the receiving side can immediately detect whether the data as MODE or the data as EXT has been received by the first bit. Therefore, as described above, it can be easily determined whether or not appropriate data has been received.

FIG. 44 is a flowchart showing the payout control processing in step S710. In the payout control processing, the payout control CPU 371 first determines whether or not the prize ball count switch 301A and the ball lending count switch 301B input to the input port 372b via the relay board 72 are turned on (switch processing: Step S7
51).

Next, the payout control CPU 371 performs processing such as checking a signal input state from a sensor (for example, a motor position sensor for detecting the number of revolutions of the prize ball motor 289A) to determine the state of the sensor. (Input determination processing: Step S752). The payout control CPU 371 further analyzes the received payout control command and executes processing according to the analysis result (command analysis execution processing: step S75).
3).

Next, the payout control CPU 371 sets the payout stop state if the payout stop command is received from the main board 31, and releases the payout stop state if the payout start instruction command is received (step S754). ).
Further, a prepaid card unit control process is performed (step S755).

Next, the payout control CPU 371 performs control to pay out the lent ball in response to the ball lending request (step S756). Further, a drive signal is output to the ball lending solenoid 127 in the payout mechanism portion of the ball lending device 97C via the output port 372c and the relay board 72, and the ball lending solenoid 127 is driven by a predetermined number (on / off). A ball lending solenoid control process is performed (step S757).

Furthermore, the payout control CPU 371 performs a prize ball control process of paying out the prize balls of the number stored in the total number storage (step S758). And output port 3
Prize ball payout device 97A via the relay board 72c and the relay board 72
A drive signal is output to the prize ball motor 289A in the payout mechanism portion of the prize ball motor 289A, and the prize ball motor control processing for rotating the prize ball motor 289A by the number of revolutions set in the prize ball control processing in step S758 is performed (step S759) .

In this embodiment, the prize ball motor 2
A stepping motor is used as 89A, and a 1-2 phase excitation method is used to control the prize ball motor 289A. Therefore, specifically, in the prize ball motor control processing, eight types of excitation pattern data are repeatedly output to the prize ball motor 289A. In this embodiment, each excitation pattern data is output for 4 ms.

Next, error detection processing is performed, and a predetermined display is made on the error display LED 374 according to the result (error processing: step S760). For example, the following ten types of errors are detected.

Prize ball path error: When the prize ball payout operation is completed, or when the prize ball motor 289A makes one rotation, the prize ball count switch 301A does not detect any passage of the game ball. “0” is displayed on the error display LED 374.

Ball lending path error: When the ball lending payout operation is completed, or when the ball lending solenoid 127 is turned on a predetermined number of times, no ball lending count switch 301B detects passage of a game ball. Error display LED
“1” is displayed at 374.

Prize ball count switch ball clogging error: when the prize ball count switch 301A detects ON for 0.5 seconds or more. “2” is displayed on the error display LED 374.

Ball lending count switch Ball clogging error:
When the ball lending count switch 301B detects ON for 0.5 seconds or more. “3” is displayed on the error display LED 374.

Prize ball motor ball biting error: Prize ball motor 28
When 9A does not rotate normally. Specifically, when the award ball motor position sensor has been on for a predetermined period or more, or has been off for a predetermined period or more. “4” is displayed on the error display LED 374. When a prize ball motor ball biting error occurs, the payout control CPU 371 sets the time to 50 ms.
After the reference excitation phase is output, four types of excitation pattern data of the excitation pattern data of the 1-2 phase excitation are
The reverse rotation and the forward rotation of the prize ball motor 289A by outputting every ms are repeated.

Prepaid card unit not connected error:
When the off of the VL signal is detected. Error display LED3
“5” is displayed at 74.

Prepaid card unit communication error: When it is detected that a signal is output from the prepaid card unit 50 at a timing other than the prescribed timing. Error display LE
“6” is displayed in D374.

Prize ball stop state: When a payout control command indicating stop of payout of award balls is received from the main board 31. “7” is displayed on the error display LED 374. The main substrate 3
When the payout control command indicating the start of payout of the prize ball is received from 1, the state returns from the payout stop state to the payable state after 2002 ms from that time.

Ball lending stop state: Ball out switch 187c
Is detected when the ball has run out. “8” is displayed on the error display LED 374.

Further, the payout control CPU 371 performs processing for controlling an information signal output from an external connection terminal (not shown) (output processing: step S761). In addition, the information signal is one unit of the payout of the rental ball (for example, for 100 yen: 2
5) for a predetermined period of time, and subsequently output a predetermined time off.

FIG. 45 is a flowchart showing an example of the command analysis execution processing in step S753. In the command analysis execution processing, the payout control CPU 371
It is checked whether there is a received command in the confirmed command buffer area (step S753a). If there is a received command, it is checked whether the received payout control command is a payout number instruction command (step S753).
b). If there are a plurality of received commands in the confirmed command buffer area, whether or not the received payout control command is the payout number instruction command is checked for the earliest received received command. Will be

If the received payout control command is the payout number instruction command, the number specified by the payout number instruction command is added to the total number storage (step S753).
c). That is, the payout control CPU 371 is connected to the main board 3
The number of prize balls included in the number-of-payouts instruction command sent from the first CPU 56 is stored in the backup RAM area (total number storage).

[0276] The payout control CPU 371 performs a command decrement of the command reception number counter and a reception command shift process in the confirmed command buffer area, if necessary.

FIG. 46 is a flowchart showing an example of the payout stop state setting process in step S754. In the payout stop state setting process, the payout control CPU 371
It is checked whether there is a received command in the confirmed command buffer area (step S754a). If there is a received command in the confirmed command buffer area, it is checked whether or not the received payout control command is a payout stop instruction command (step S754b). If the command is the payout stop instruction command, the payout control CPU 371 sets the payout stop state for the prize ball and the loaned ball (step S75).
4c).

If it is determined in step S754b that the received command is not a payout stop instruction command, the payout control CPU 371 checks whether the received payout control command is a prize ball payout stop instruction command (step S754d). . If it is a prize ball payout stop instruction command, it is set to a prize ball payout stop state (step S754e). If it is not the award ball payout stop instruction command, it is checked whether the received payout control command is a payout completion confirmation instruction command (step S754f). If it is a payout completion confirmation instruction command, a setting is made so that it is possible to check whether or not the payout of the number of prize balls paid out by one payout operation has been completed (step S754g). If it is not a payout completion confirmation command, it is checked whether the received payout control command is a ball lending stop command (step S754h). If the command is a ball lending stop instruction command, a ball lending stop state is set (step S7).
54i).

When confirming that the received payout control command is not a ball lending stop designation command in step S754h, the payout control CPU 371 checks whether the received payout control command is a prize ball payout possible designation command. (Step S754j). If the command is a prize ball payout designation command, the prize ball payout stop state (or the payout completion confirmation possible state) is released (step S754k). If the command is not a prize ball payout designation command, it is checked whether or not the received payout control command is a ball lending possible designation command (step S754l). If the command is a ball lending possible designation command, the ball lending suspension state is released (step S7).
54m).

FIG. 47 is a flowchart showing an example of the switch processing in step S751. In the switch processing, the payout control CPU 371 checks whether or not the award ball count switch 301A indicates the ON state (step S751a). If it indicates the ON state, the payout control CPU 371 increments the winning ball count switch ON counter by one (step S751b). The prize ball count switch on counter includes the prize ball count switch 30.
This is a counter for counting the number of times the 1A ON state is detected.

Then, the value of the winning ball count switch on counter is checked, and if the value is 250 (step S751c), a winning ball clogging flag is set (step S751d). That is, when the ON state of the prize ball count switch 301A continues for a long time, the prize ball clogging flag is set.

When the value of the prize ball count switch on counter has reached 2 (step S751e), it is determined that the prize ball count switch 301A has been turned on without fail.
The award ball count switch on flag is set (step S751f).

If it is determined in step S751a that the prize ball count switch 301A is not on, the payout control CPU 371 resets the prize ball count switch on flag (step S751).
h), the award ball count switch on counter is cleared (step S751i). Then, it is determined whether or not the ball lending count switch 301B indicates the ON state (step S751j). If the ON state is indicated, the payout control CPU 371 increments the ball lending count switch ON counter by one (step S751k). The ball lending count switch on counter is a counter for counting the number of times that the ball lending count switch 301B has been turned on.

Then, the value of the ball lending count switch on counter is checked, and if the value is 250 (step S7511), a lending ball clogging flag is set (step S751m). That is, when the ball lending count switch 301B has been on for a long period of time, the lending ball clogging flag is set.

When the value of the ball lending count switch-on counter has become 2 (step S751n),
It is determined that the ball lending count switch 301B has been turned on, and the ball lending count switch on flag is set (step S751o).

If it is determined in step S751j that the ball lending count switch 301B is not on, the payout control CPU 371 resets the ball lending count switch on flag (step S75).
1p) The ball lending count switch on counter is cleared (step S751q).

FIG. 48 is a flowchart showing an example of the prepaid card unit control processing in step S755. In the prepaid card unit control process, the payout control CPU 371 checks whether or not the VL signal input from the card unit control microcomputer has been detected (step S755a). If the VL signal has not been detected, the VL signal non-detection counter is incremented by 1 (step S755b). The payout control CPU 37
1 checks whether or not the value of the VL signal non-detection counter is 125 (step S755c). If the value of the VL signal non-detection counter is 125, the payout control CPU 371
Stops the emission control signal output to the emission control board 91 and stops the drive motor 94 (step S755)
d). Further, the VL-off detection flag is set (step S755e).

By the above processing, 125 times (2 ms ×
(125 = 250 ms) If the OFF of the VL signal is detected continuously, the state is set to the ball firing prohibited state.

If the VL signal has been detected in step S755a, the payout control CPU 371 resets the VL off detection flag (step S755).
f), the VL signal non-detection counter is cleared (step S755g). Then, the payout control CPU 371 stops outputting the firing control signal (step S755).
h), output of a firing control signal to the firing control board 91 is started, and the drive motor 94 is made operable (step S7).
55i).

FIG. 49 is a flowchart showing an example of the ball lending control process in step S756. In this embodiment, the maximum value of the number of consecutive payouts is one unit of the lending ball (for example, 25), but the maximum value of the number of consecutive payouts may be another number.

In the ball lending control process, the payout control CP
U371 confirms whether or not the ball lending is suspended (step S501). Whether or not the ball lending is stopped is confirmed by the ball lending prohibition flag set in step S754c or step S754i.

If the ball lending is not stopped, the payout control CP
The U371 checks whether or not the loaned ball is being paid out (step S511). If the ball is being paid out, the process shifts to step S518. Whether or not the ball is being paid out is determined based on the state of a ball lending process flag described later. If the ball is not being paid out, the payout control C
The PU 371 confirms whether or not there has been a ball lending request from the card unit 50 (Step S512). If there is a request, the ball lending process flag is turned on (step S513), and 25 (the number of ball lending units: 100 in this case)
Is set as the number of lent balls in the backup RAM area (step S514). And the payout control CP
The U371 turns on the EXS signal (step S51).
5). Further, driving of the ball rental solenoid 127 is started (step S516).

Strictly speaking, the driving of the ball rental solenoid 127 is started after the BRQ signal is turned off to indicate that the card unit 50 has recognized the reception. The ball lending prohibition flag and the ball lending processing flag are set in the backup RAM area.

At step S518, the payout control C
The PU 371 confirms whether or not it is during the rental ball passage waiting time (step S518). If it is not during the lending ball passage waiting time, a ball lending count switch check process described later is performed (step S520).

Next, the payout control CPU 371 checks whether or not the driving of the ball lending solenoid 127 should be ended (whether one unit of the payout operation has ended) (step S5).
21). Specifically, on / off corresponding to a predetermined number of payouts
Check whether the OFF operation has been completed. When the on / off operation corresponding to the predetermined number of payouts is completed, the payout control CPU 371 stops driving the ball lending solenoid 127 (step S522) and sets a lending ball passage waiting time (step S523). ).

If it is during the waiting time for passing a ball in step S518, the payout control CPU 371 performs a ball lending count switch check process to be described later (step S524), and determines whether the waiting time for passing a ball has been completed. Confirmation is performed (step S525). The lending ball passage waiting time is the time from when the last payout ball is paid out by the ball lending solenoid 127 to when it passes through the ball lending count switch 301B.

When confirming the end of the waiting time for passing the rental ball,
Since all the lending balls have been paid out, the EXS signal is turned off to indicate to the card unit 50 that the next ball lending request can be accepted (step S526). The ball lending processing flag is turned off (step S527). If the last payout ball has not passed through the ball lending count switch 301B before the passage of the ball lending wait time, a ball lending path error is determined.

After the EXS signal indicating the acceptance of the ball lending request is turned off and the BRQ signal which is the ball lending request signal is turned on again within a predetermined period, the ball lending process is performed without turning off the ball lending solenoid 127. You may make it continue. That is, instead of performing the ball lending process for each predetermined unit (in this example, 100 yen unit), the ball lending process may be performed continuously.

[0299] The contents of the stored number of lent balls are retained by the backup power supply of the power supply board 910 for a predetermined period even if the power of the gaming machine is turned off. Therefore, when the power is restored during the predetermined period, the payout control CPU 371 can continue the ball lending process based on the contents of the lending ball number storage.

FIG. 50 shows steps S520 and S52.
9 is a flowchart showing a ball lending count switch check process executed in Step 4. The ball lending count switch check process is a process of monitoring the state of the ball lending count switch 301B and subtracting the lending ball number storage.

In the ball lending count switch check processing, the payout control CPU 371 first checks whether or not the ball lending count switch ON waiting flag is set (step S811). If the ball lending count switch ON waiting flag is set, the system waits until the ball lending count switch ON flag is turned on (step S812). The ball lending count switch-on flag is set in step S751o in the switch processing shown in FIG. If the timer T11 times out before the ball lending count switch on flag is turned on, the ball lending path error flag is set (steps S817 and S818). Ball rental count switch 3
When 01B is turned on, the timer T11 is stopped (step S813), and the ball lending count switch ON waiting flag is reset (step S814). Note that the timer T
Reference numeral 11 denotes a timer for checking whether or not the ball lending count switch 301B is turned on within a predetermined period.

When the ball lending count switch 301B is turned on, a ball lending count switch OFF wait flag indicating that the ball lending count switch 301B is in the off state is set to confirm that the ball lending count switch 301B is turned off ( Step S815).

Therefore, if the ball lending count switch OFF waiting flag is on (step S821), the payout control CPU 371 waits for the ball lending count switch on flag to turn off (step S824). When the ball lending count switch on flag is turned off, the ball lending count switch OFF waiting flag is reset (step S825). Then, it is determined that one game ball has been paid out, and the temporary counting counter is incremented by 1 (step S826). Next, the rental ball number memory is reduced by -1.
(Step S828).

If it is confirmed in step S821 that the ball lending count switch OFF wait flag is not on, the timer T11 is started (step S821).
822), a ball lending count switch ON waiting flag is set (step S823).

FIGS. 51 and 52 show steps S758 and S758.
It is a flowchart which shows an example of the award ball control processing. In this example, the maximum value of the number of continuous payouts is the same as one unit of the lending ball (for example, 25), but the maximum value of the number of continuous payouts may be another number.

In the prize ball control processing, the payout control CPU
The 371 checks whether or not the rental ball is being paid out (step S531). Whether or not the ball is being paid out is determined based on the state of the ball lending process flag. If the ball is not being paid out, it is confirmed whether or not the prize ball is being paid out (step S).
532) If the prize ball is being paid out, the processing shifts to the processing during the prize ball shown in FIG. Whether or not a prize ball is being paid out is determined by a state of a prize ball processing flag described later.

[0307] If neither the loaned ball is being paid out nor the prize ball is being paid out, the payout control CPU 371 checks whether or not the payout is stopped (step S532a). If the payout is stopped, the subsequent processing is not performed. In other words, when both the payout ball paths 186a and 186b are out of the ball or the lower plate is full before the start of the award ball payout process, the award ball payout process is not started. . On the other hand, at the stage before the prize ball payout process is started, even if either the payout ball path 186a or 186b is out of the ball, if other conditions are satisfied, the prize ball will be deleted. The payout process is started. Whether or not the payout is stopped is confirmed by the winning ball payout prohibition flag set in step S754c or step S754e.

If the dispensing is not stopped, the dispensing control C
The PU 371 checks whether there is a ball lending preparation request from the card unit 50 (Step S533). Whether or not there is a ball lending preparation request is performed by confirming whether the BRDY signal input from the card unit 50 is on (requested) or off (no request).

If there is no ball lending preparation request from the card unit 50, the payout control CPU 371 checks whether or not the number of awarded balls (the number of unpaid awarded balls) stored in the total number memory is not zero (see FIG. 13). Step S534). If the number of award balls stored in the total number memory is not 0, the award ball control CP
U371 turns on the award ball processing flag (step S5).
35) It is checked whether or not the value of the total number storage is 25 or more (step S536). The prize ball payout prohibition flag and the prize ball processing flag are set in the backup RAM area.

The number of award balls stored in the total number storage is 2
If the number is 5 or more, the payout control CPU 371 performs the 25 payout operation to output a drive signal to the prize ball motor 289A so as to rotate the prize ball motor 289A until 25 game balls are paid out. Make settings (step S53)
7). If the number of prize balls stored in the total number storage is not 25 or more, the payout control CPU 371 drives the prize ball motor 289A to rotate until all game balls stored in the total number storage are paid out. In order to output a signal, the setting of the total number payout operation is performed (step S53).
8).

That is, in this embodiment, the payout control CPU 371 executes the processing in step S537 or step S537.
At 538, the number of game balls to be paid out (for example, 25)
In order to rotate the prize ball motor 289A until the prize ball is paid out, a scheduled operation period which is a period during which the prize ball motor 289A operates is set. For example, when either the payout ball path 186a or 186b is out of the ball, drive control is performed so that the rotation speed of the prize ball motor 289A becomes lower than the normal speed, and the prize ball motor 2
The scheduled operation period of 89A may be set longer than usual. Specifically, for example, if a predetermined flag (for example, a payout confirmation flag set in step S754g) is set in the prize ball motor control processing in step S759, for example, 8 ms (a value slower than 4 ms in normal time) By controlling each excitation pattern data to be repeatedly output to the prize ball motor 289A at a time, an appropriate prize ball motor 28
What is necessary is just to determine the scheduled operation period of 9A.

In this embodiment, the payout is performed with the upper limit of the number of payouts set to 25. However, the payout may be performed for each prize ball number indicated in the payout control command. In this case, for example, the main board 31 on the payout control board 37 side
The payout number is stored for each payout number indicated in the payout control command notified from the side, and the payout control CP
The payout operation may be set with the upper limit value of the payout number stored in U371 as the upper limit value. For example, the prize ball number 10 on the payout control board 37 side.
And 15 are stored one by one, and when paying out 10 of the payouts, the payout control CPU 371 controls the prize ball motor until paying out 10 game balls. 289A to rotate the prize ball motor 28
In order to output a drive signal to 9A, the setting of the ten payout operation is performed.

Next, the payout control CPU 371 checks whether or not one of the payout ball paths 186a and 186b is out of the ball (step S539).
In this embodiment, whether or not one of the payout ball paths 186a and 186b is out of ball is confirmed by a payout confirmation flag set in step S754g. If either one of the payout ball paths 186a and 186b is in the ball out condition, the payout control CPU 371
Turns on the payout confirmation execution flag (step S54).
0), the expected payout number of prize balls is stored in the remaining payout number storage in the backup RAM area (step S541). That is, if the number of prize balls stored in the total number storage is 25 or more in the determination in step S536, 25 is stored in the remaining payout number storage in the backup RAM area. On the other hand, if it is determined in step S536 that the number of award balls stored in the total number storage is not 25 or more, a value corresponding to the total number is stored in the remaining payout number storage in the backup RAM area.

If it is determined in step S539 that one of the payout ball paths 186a and 186b is not out of the ball, or in step S541, the expected payout number of prize balls is stored in the remaining payout number storage in the backup RAM area. Then, the payout control CPU 371 turns on the prize ball motor 289A (step S542). And
The processing shifts to the processing for paying out prize balls in the prize ball control processing shown in FIG. 52.

FIG. 52 is a flowchart showing an example of processing during a winning ball in the payout control processing by the payout control CPU 371. In the processing during the prize ball, the payout control C
The PU 371 checks whether or not the payout is stopped based on the winning ball payout prohibition flag (step S543). If the payout is stopped, the award ball motor 289A is turned off, and the award ball processing flag is turned off (steps S544 and S54).
5). That is, when both the payout ball paths 186a and 186b are out of the ball or when the lower plate is full, the payout is immediately stopped. If the payout is not stopped, the payout control CPU 371 checks whether or not the award ball passing waiting time is in progress (step S546).

If it is not during the waiting time for passing the prize ball, the payout control CPU 371 checks the prize ball sensor (prize ball motor position sensor) (step S549), and executes a prize ball count switch check process described later. Perform (Step S550).

Then, the payout control CPU 371 determines whether driving of the prize ball motor 289A should be terminated (25 or 2).
It is confirmed whether or not a predetermined number of payout operations of less than 5 have been completed (step S551). Specifically, it is confirmed whether or not the rotation corresponding to the predetermined number of payouts has been completed.
The rotation corresponding to the predetermined number of payouts is monitored by the output of the prize ball motor position sensor. When the rotation corresponding to the predetermined number of payouts is completed (end of the scheduled operation period), the payout control CPU 371 stops driving the prize ball motor 289A (step S552), and sets the prize ball passage waiting time. Performed (step S553). The prize ball passage waiting time is the time from when the last payout ball is paid out by the prize ball motor 289A to when it passes through the prize ball count switch 301A.

If it is determined in step S543 that the award ball passage waiting time is in progress, the payout control CPU 371 performs an award ball count switch check process described later (step S543).
554), it is determined whether or not the waiting time for passing the prize ball has ended (step S555). When the prize ball passage waiting time ends, all the prize balls set in step S537 or step S538 have been paid out. In addition,
If the last payout ball has not passed through the prize ball count switch 301A before the prize ball passage waiting time has elapsed,
Prize ball path error.

When the waiting time for passing the prize ball ends, it is checked in this example whether or not the payout check execution flag is set (step S557). If the payout check execution flag is set, the payout control CPU 371 checks whether or not the stored value of the remaining payout number storage in the backup RAM area is 0 (step S558). If the stored value of the remaining payout number storage is not 0, there remains unpaid prize balls, and a correction operation for paying out the remaining prize balls is executed. Since the supply of the game balls may be unstable, the correction operation may be executed by driving the prize ball motor 289A at a rotation speed lower than usual. In the correction operation, the payout control CPU 371 controls the prize ball motor 289
By outputting a drive signal to A, the remaining payout number is paid out so that the prize ball motor 289A is rotated until the number of game balls corresponding to the stored value of the remaining payout number storage (payout number) is paid out. The operation is set (step S560). The payout control CPU 371 is connected to the payout control CPU 37.
1 turns on the prize ball motor 289A (step S56).
1). Therefore, the payout process described above is performed again for the unpaid prize balls.

The payout ball route 186a or 186b
Even if either one of them is out of the ball, if the payout control command is not sent from the main board 31, the determination in step S557 is unnecessary. In this case, the payout control board 37 determines whether or not all the expected payouts have been paid out after the elapse of the scheduled operation period, regardless of whether the ball is out of ball or not, and executes a correction operation when there is a remaining payout number. do it.

If the payout confirmation execution flag has not been set in step S557, the payout control CPU 371 sets
Since it is not necessary to execute the correction operation, the award ball processing flag is turned off (step S562). Step S55
If the stored value of the remaining payout number storage is not 0 at 8, the payout control CPU 371 turns off the payout confirmation execution flag because all the prize balls of the expected payout number have been paid out (Step S).
559), and turns off the prize ball processing flag (step S5).
62).

As described above, in the present embodiment, when one of the payout ball paths 186a and 186b is out of the ball before the start of the prize ball payout operation (payout confirmation execution flag). Is set), the correction operation is repeatedly executed until all of the expected payout balls are paid out. Therefore, the payout ball path 186a or 186b before the start of the prize ball payout operation.
Even if any one of them is out of the ball, the prize ball is always paid out sharply.

Note that, in this embodiment, step S5
According to the judgment of 31, the ball lending is given priority over the prize ball processing, but the prize ball processing may be given priority over the ball lending. Also, while the ball is lent, the prize ball processing is awaited,
Since the loaned ball payout device and the prize ball payout device are provided independently of each other, control may be performed so that the ball lending process and the prize ball process can be executed simultaneously.

As described above, the payout ball path 186a or 186b before the start of the prize ball payout process.
In the case where any one of the balls has run out of balls, it is checked whether or not the payout is completed after the payout operation of the expected number of payouts is completed, and if not completed, the correction operation is performed. Prize ball motor 28 due to the path being out of ball
Even when a shortage of payouts due to a decrease in ball pressure for 9A or the like (insufficient payout due to the number of game balls not being paid out according to the drive period of the prize ball motor 289A) occurs, all the corrections are reliably performed by the correction operation. A predetermined number of game balls can be paid out. Therefore, even if one of the routes is out of ball, an appropriate payout process can be executed, and an appropriate payout control can be executed in accordance with a lack state of the game medium.

Further, as described above, even when a prize ball is being paid out, it is configured to check whether or not the payout is stopped, so that when both the payout ball paths 186a and 186b are out of the ball, the payout is immediately performed. Processing can be stopped. Therefore, it is possible to perform appropriate control according to the game situation.

Further, as described above, information is transmitted by using different payout control commands depending on whether a prize ball is out of ball or not and a loaned ball is detected, and the payout ball path 186c is changed. Since the payout of prize balls is performed irrespective of whether or not the ball has run out, it is possible to prevent the payout of prize balls from being stopped due to a shortage of lending balls. Therefore, it is possible to perform appropriate control according to the game situation.

In the above-described embodiment, if one of the payout ball paths 186a and 186b is out of the ball at a stage before the payout ball payout process is started, the expected payout number is reduced. It has been configured to check whether or not the payout is completed after the payout operation is completed, and to perform the correction operation when the payout is not completed.However, for example, it may be configured not to perform the payout of the prize ball, or the normal payout may be performed. May be performed continuously. When the payout ball payout is not executed, when any of the payout ball paths 186a and 186b is in a ball-out state before the prize-ball payout process is started (a ball-out switch). 187a or the ball out switch 187b detects the lack of the prize ball), for example, the payout ball paths 186a and 186 described above.
6b may be performed in the same manner as when the ball is out of ball (in this case, the payout ball route 18).
No processing is performed when both 6a and 186b are out of ball.) In the case where the normal payout is continuously performed, the payout ball path 186a or 18
Even when any one of the balls 6b is out of ball, no processing may be performed (that is, processing such as output of the payout control command is not performed).

In the above-described embodiment, when it is determined that there are unpaid game balls after the expected number of payouts is completed, the correction operation is repeated until all the expected number of game balls are paid out. Although the configuration has been described, the upper limit of the number of repetitions of the correction operation may be determined, for example. In this case, if there is a game ball that has not been paid out even after the correction operation of the predetermined number of repetitions has been completed, processing such as displaying an error may be performed.

In the above-described embodiment, the payout process is immediately stopped when both the payout ball paths 186a and 186b are out of the ball. However, the stop is performed after the payout of the expected payout number is performed. You may make it do. In this case, the configuration may be such that the confirmation in step S543 is not performed.

FIG. 53 shows steps S550 and S55.
13 is a flowchart illustrating an example of a prize ball count switch check process executed in Step 4. The prize ball count switch check process is a process of monitoring the state of the prize ball count switch 301A and subtracting the total number storage.

In the award ball count switch check processing, the payout control CPU 371 first checks whether or not the award ball count switch ON waiting flag is set (step S831). If the award ball count switch ON waiting flag is set, it waits until the award ball count switch ON flag is turned on (step S83).
2). Note that the prize ball count switch-on flag is
Step S751f in the switch processing shown in FIG.
Set by If the timer T12 times out before the winning ball count switch on flag is turned on, the winning ball path error flag is set (step S837,
S838). When the award ball count switch 301A is turned on, the timer T12 is stopped (step S833), and the award ball count switch ON waiting flag is reset (step S834). The timer T12 is a timer for confirming whether or not the award ball count switch 301A is turned on within a predetermined period.

When the prize ball count switch 301A is turned on, a prize ball count switch OFF wait flag is set to indicate that the prize ball count switch 301A is turned off in order to confirm that the prize ball count switch 301A is turned off. Step S835).

Therefore, if the prize ball count switch OFF waiting flag is on (step S841), the payout control CPU 371 waits for the prize ball count switch on flag to turn off (step S844). When the award ball count switch on flag is turned off, the award ball count switch OFF waiting flag is reset (step S8).
45). Then, while the remaining payout number storage is decremented by one (step S846), the total number storage is decremented by one (step S848).

If it is confirmed in step S841 that the award ball count switch OFF wait flag is not on, the timer T12 is started (step S841).
842), the award ball count switch ON waiting flag is set (step S843).

[0335] The contents of the remaining payout number storage, the total number storage, and the number of lent balls storage are each stored by the backup power supply of the power supply board 910 for a predetermined period even if the power supply of the gaming machine is turned off. Therefore, when the power supply is restored during the predetermined period, the payout control CPU 371 can continue the payout process based on the contents of the remaining payout number storage, the total number storage, and the loaned ball number storage.

The payout control CPU 371 manages the number of prize balls instructed from the main board 31 as a total number in the prize ball number storage, but for each prize ball number (for example, 15, 10 or 6).
). For example, a number counter corresponding to each prize ball number is provided, and when a payout number designation command is received, the number counter corresponding to the number designated by the command is incremented by one. When the prize ball payout corresponding to the number counter is performed, the number counter is decremented by one (in this case, the subtraction processing is performed in the payout control processing).
Also in this case, each number counter is formed in the backup RAM area. Therefore, even if the power of the gaming machine is turned off, if the power is restored during the predetermined period, the payout control CPU 371
Can continue the award ball payout process based on the content of each number counter.

Next, error processing will be described. FIG.
4 indicates an error type and an error display LED 374 (FIG. 1).
FIG. 2 is an explanatory diagram showing a relationship with the display of FIG. FIGS. 55 and 56 are flowcharts showing an example of the error processing in step S760.

In this example, in the error processing, the payout control CPU 371 turns on the error display LED 37 when the winning ball path error flag is turned on (step S601).
4 is displayed as "0" (step S602). When the prize ball path error flag is turned off, the error display LE is displayed.
The display “0” of D374 is deleted (step S60).
3). The winning ball path error flag is set in step S838 shown in FIG. That is, it is set when the award ball count switch 301A is not turned on.

When the ball lending route error flag is turned on (step S604), "1" is displayed on the error display LED 374 (step S605). Also, when the ball lending path error flag is turned off, an error display LED
The display “1” of 374 is deleted (step S606).
The ball lending path error flag is set in step S818 shown in FIG. That is, it is set when the ball lending count switch 301B is not turned on.

If the award ball clogging flag is turned on (step S607), “2” is displayed on the error display LED 374.
Is displayed (step S608). Further, when the award ball clogging flag is turned off, the display “2” of the error display LED 374 is erased (step S609). The prize ball jam flag is set in step S751d shown in FIG. That is, the prize ball count switch 301
Set when A did not turn off.

When the lending ball clogging flag is turned on (step S610), "3" is displayed on the error display LED 374 (step S611). Further, when the lending ball jam flag is turned off, an error display LED 37 is displayed.
The display “3” of 4 is deleted (step S612). The award ball clogging flag is determined in step S shown in FIG.
It is set at 751 m. That is, it is set when the ball lending count switch 301B has not been turned off.

[0342] When an award ball motor sensor output abnormality is detected (step S613), the error display LED 37
“4” is displayed in 4 (step S614). When the output abnormality of the prize ball motor sensor is released, the display “4” of the error display LED 374 is deleted (step S6).
15). Note that an abnormal output of the prize ball motor sensor is detected when the prize ball motor position sensor has been on for a predetermined period or more or has been off for a predetermined period or more.

If the VL off detection flag is set (step S621), “5” is displayed on the error display LED 374 (step S622). When the VL off detection flag is reset, an error display L is displayed.
The display “5” of the ED 374 is deleted (step S62).
3). The VL off detection flag is set in step S755e shown in FIG.

When the communication with the card unit 50 is executed at an irregular timing (step S6).
24) Assuming that a prepaid card unit communication error has occurred, "6" is displayed on the error display LED 374 (step S625). Further, when such an error is resolved, the display “6” of the error display LED 374 is deleted (step S626).

When the winning ball is stopped (step S627), "7" is displayed on the error display LED 374.
Is displayed (step S628). When the winning ball stop state is released, the display “7” of the error display LED 374 is erased (step S629). The winning ball stop state is a state where the winning ball payout stop state is set in step S754c or step S754e in FIG. That is, when the game control unit is notified of stopping the payout of the prize ball. However, in the case of step S754c, since a notification when the lower plate is full is included, in step S627, the ball out switches 187a and 187 are set.
It is preferable to confirm the state of b.

When the ball lending is stopped (step S630), “8” is displayed on the error display LED 374 (step S631). When the ball lending suspension state is released, the display “8” of the error display LED 374 is erased (step S632). The ball lending suspension state is a state after the ball lending prohibition flag is set in step S754c or step S754i in FIG.

As described above, in this embodiment, the error related to the prize ball and the error related to lending the ball are displayed on the error display LED 374 so that they can be identified.
Therefore, even if the rental ball payout device and the prize ball payout device are provided independently, it is possible to easily recognize the abnormality that has occurred in each of them.

FIG. 57 is a flowchart showing an example of the power failure occurrence NMI process executed in response to the NMI based on the voltage change signal from the power supply monitoring circuit of the power supply board 910. In this embodiment, the NMI interrupt address is 00
66H. In the power failure occurrence NMI process, the payout control CPU 371 first stores the contents of the interrupt prohibition flag in the parity flag (step S801). Then
The interrupt is prohibited (step S802). Power failure occurred N
In the MI process, in this example, as in the process executed on the main board 31, a process of generating a checksum for ensuring the storage of the RAM content is performed. If another interrupt process is performed during that process, the voltage may drop to a level at which the payout control CPU 371 cannot operate before the checksum generation process is completed. Are set so that other interrupts do not occur. In addition,
Steps S804 to S81 in the power failure occurrence NMI process
0 is an example of the power supply stop processing.

If a CPU having a specification that does not cause another interrupt during the interrupt processing is used, the processing in step S802 is unnecessary.

Next, the payout control CPU 371 checks whether or not the backup flag has already been set (step S803). If the backup flag has already been set, no further processing is performed. If the backup flag is not set, the following power supply stop processing is executed. That is, the processing from step S804 to step S810 is executed.

First, the contents of each register are backed up by R
It is stored in the AM area (step S804). After that, a backup flag is set (step S805).
Then, an appropriate initial value is set in the backup check data area of the backup RAM area (step S80).
6) The exclusive OR is sequentially calculated for the initial value and the data in the backup RAM area and then inverted (step S807), and the final operation value is set in the backup parity data area (step S808). Also, RA
The M access is prohibited (step S809). When the power supply voltage decreases, the levels of various signal lines may become unstable and the contents of the RAM may be corrupted. However, if the RAM access is prohibited in this manner, the data in the backup RAM may be corrupted. There is no.

Further, the payout control CPU 371 has all output ports (in this embodiment, output ports 372
c, 372g, 372e, and I / O port 372f
Output port). Therefore, all output ports are turned off by the clear signal (step S810).

Next, the payout control CPU 371 enters a loop process. That is, no processing is performed. Therefore, before the operation is disabled from the outside by the system reset signal from the reset IC 976 shown in FIG. 36, the operation is internally stopped. Therefore, the operation of the payout control CPU 371 is reliably stopped when the power is turned off. As a result, due to the above-described RAM access prohibition control and the operation stop control, the value of R due to the abnormal operation that may occur as the power supply voltage decreases.
Destruction of the contents of the AM can be reliably prevented.

In this embodiment, the power failure occurrence NM
In I processing, the program was looped in the last part,
It may be configured to issue a HALT instruction.

The backup flag set after the contents of the register are stored in the RAM area is, as described above, whether or not there is backup data to be restored when the power is turned on (whether or not to recover from a power failure). Used to judge. Also, steps S801 to S810
Is completed before the payout control CPU 371 receives the system reset signal from the system reset circuit 975. In other words, to complete before receiving the system reset signal from the system reset circuit 975,
The detection voltage of the voltage monitoring circuit is set.

In this embodiment, the backup flag is checked at the start of the power supply stop processing. If the backup flag has already been set, the power supply stop processing is not executed. As mentioned above,
The backup flag is a flag indicating that the backup of necessary data has been completed and then the power supply stop processing has been completed. Therefore, for example, even if the NMI occurs again for some reason in the reset waiting loop state, the power supply stop processing will not be executed repeatedly.

However, in the case where a CPU having a specification that does not cause another interrupt during the interrupt processing is used, the determination in step S803 is unnecessary.

Also, in this embodiment, the payout control C
PU 371 is a non-maskable external interrupt terminal (NMI terminal)
, The NMI interrupt signal from the power supply board (NMI interrupt signal from the power supply monitoring means) is detected, but the NMI interrupt signal may be introduced to a maskable interrupt interrupt terminal (INT terminal). In that case, the power failure occurrence NMI process shown in FIG. 57 is executed by the INT process. Further, an NMI interrupt signal may be detected through an input port. In that case, the input port is monitored in the main process executed by the payout control CPU 371.

FIG. 58 is an explanatory diagram for describing an example of a backup parity data creating method. However,
In the example shown in FIG. 58, the size of the data in the backup data RAM area is 3 bytes for simplicity. In the power failure generation process based on the power supply voltage drop, as shown in FIG. 58, initial data (00H in this example) is set in the backup check data area. Next, "00
The exclusive OR of “H” and “F0H” is calculated, and the result is exclusive ORed with “16H”. Further, an exclusive OR of the result and “DFH” is obtained. Then, a value (“C6H” in this example) obtained by inverting the result (“39H” in this example) is set in the backup parity data area.

When the power is turned on again, parity diagnosis is performed in the power failure recovery processing. If all data in the backup area is stored as it is, the data as shown in FIG. 58 is set in the backup area when the power is turned on again.

In the processing of step S704, the payout control CPU 371 performs the same processing as the processing executed in steps S806 and S807 in FIG. That is, initial data (00H in this example) is set in the backup check data area, and "00H"
And "F0H" are exclusive ORed, and the result is "1"
6H "is exclusive-ORed. Further, an exclusive OR of the result and “DFH” is obtained. Then, a final operation result obtained by inverting the result (“39H” in this example) is obtained. If all data in the backup area is stored as it is, the final calculation result matches "C6H", that is, the data set in the backup check data area. If a bit error has occurred in the data in the backup RAM area, the final operation result does not become “C6H”.

Therefore, the payout control CPU 371 compares the final calculation result with the data set in the backup check data area, and if they match, determines that the parity diagnosis is normal. If they do not match, it is determined that the parity diagnosis is abnormal.

As described above, in this embodiment, the payout control means is provided with the storage means (backup RAM in this example) which is backed up for a predetermined period even if the power of the gaming machine is turned off. At the time of insertion, payout control CPU
371 (specifically, a program executed by the payout control CPU 371) is configured to perform a payout state restoration process (step S706) for restoring the payout state based on the backup data if the storage unit is in the backup state. .

Hereinafter, the payout state restoration processing will be described. FIG. 59 is a flowchart showing an example of the payout state restoration processing shown in step S706 of FIG. In this example, the payout control CPU 371 sets the backup R
The value stored in the AM is restored to the register (step S861). Then, based on the data stored in the backup RAM, a process for recovering the payout state at the time of the power failure is performed. For example, a flag during processing of a prize ball is set.

For example, when the power is restored, the backup RA
If the number of unpaid prize balls or the number of unpaid lending balls or both of them are stored in the M area, the payout process is restarted based on the stored numbers.

When the payout state is restored, in this embodiment, the payout control CPU 371 returns to the backup R in order to restore the interrupt permission / prohibition state at the time of the previous power-off.
The value of the parity flag stored in the AM is checked (step S862). If the parity flag is clear, interrupt permission setting is performed (step S863). on the other hand,
If the parity flag is on, the process proceeds to step S
The payout state restoring process is terminated (with the interrupt prohibited state set in 701a).

Here, the payout state restoring processing program is configured to return to the payout control main processing when the payout state restoring processing is completed, but the stack pointer stored in the power supply stop processing points out. It is also possible to return to the address stored in the stack area (in the backup RAM area) (the address that was being executed when the NMI interrupt occurred when the power was turned off).

As described above, in the above-described embodiment, in the gaming machine in which the loaned ball payout device and the prize ball payout device are provided independently, the remaining prize balls (the number of unpaid prize balls) and the loaned balls are provided. An area for storing the remaining number (the number of unpaid lending balls) is backed up by a capacitor or the like. Therefore, even if a shortage of power supply or the like occurs, the stored contents are preserved for a predetermined period. Then, when the power is restored, if the number of unpaid prize balls or the number of unpaid lending balls or both of them are stored in the backup RAM area, the payout process is restarted based on the stored numbers. Therefore, it is possible to prevent the player from being disadvantaged.

As described above, the payout ball route 186a or 186b before the start of the prize ball payout process.
In the case where any one of the balls has run out of balls, it is checked whether or not the payout is completed after the payout operation of the expected number of payouts is completed, and if not completed, the correction operation is performed. Prize ball motor 28 due to the path being out of ball
Even when a shortage of payouts due to a decrease in ball pressure for 9A or the like (insufficient payout due to the number of game balls not being paid out according to the drive period of the prize ball motor 289A) occurs, all the corrections are reliably performed by the correction operation. A predetermined number of game balls can be paid out. Therefore, even if one of the routes is out of ball, an appropriate payout process can be executed, and an appropriate payout control can be executed in accordance with a lack state of the game medium.

Also, as described above, even if a prize ball is being paid out, it is configured to check whether or not the payout is stopped, so that when both the payout ball paths 186a and 186b are out of the ball, the payout processing is immediately performed. Can be stopped. Therefore, it is possible to perform appropriate control according to the game situation.

Also, as described above, the payout ball route 186
Since the payout of prize balls is performed irrespective of whether or not c has run out of balls, it is possible to prevent the payout of prize balls from being stopped due to a shortage of lending balls. Therefore, it is possible to perform appropriate control according to the game situation.

In the above embodiment, the processing in paying out prize balls has been mainly described. However, a configuration in which a plurality of payout paths of loaned balls are provided, and the same processing is performed in the payout processing of loaned balls. May be.

In the above-described embodiment, the payout control CPU 371 in the payout control means uses the prize ball payout device 97.
A and the rental ball dispensing device 97C are configured to be controlled. However, a unit that controls the prize ball dispensing device 97A and a unit that controls the rental ball dispensing device 97C may be different control units. In this case, for example, the payout control CPU 371 controls the prize ball payout device 97A, and a ball lending control unit that controls the lending ball payout device 97C may be provided.
If the configuration relating to the prize ball and the configuration relating to the ball lending are separated as described above, for example, even if the gaming machine is not equipped with a ball lending mechanism called a cash machine and a ball lending control means, it is separately required. It can be applied simply by removing the part related to ball lending that has been configured.

Although the power supply monitoring circuit is provided on the power supply board 910 in the above embodiment, the power supply monitoring circuit may be provided on the electric component control boards such as the main board 31 and the dispensing control board 37. . When an electric component control board on which a power supply circuit is mounted is configured, the power supply board includes
No power monitoring circuit is installed.

The pachinko gaming machine 1 of each of the above embodiments
Is a first-class pachinko gaming machine in which a predetermined game value can be given to a player when a stop symbol of a special symbol variably displayed on the variable display portion 9 based on a start winning prize is a predetermined symbol combination. However, if there is a prize in a predetermined area of the electric accessory that is opened based on a winning start, a second-type pachinko gaming machine that can give a predetermined game value to a player, or is variably displayed based on a starting prize. The present invention can be applied to a third-type pachinko gaming machine in which a predetermined right is generated or continued when there is a prize for a predetermined electric accessory which is opened when a symbol combination of a predetermined symbol is released.

The present invention is not limited to the pachinko gaming machine, but can be applied to a slot machine or the like in a case where the payout control of the game medium is performed.

[0377]

As described above, according to the present invention, the gaming machine is a gaming machine in which a player can play a predetermined game, and the payout means for paying out game media, and the payout means A plurality of supply paths for supplying the game medium to the game medium, and a game medium deficiency detection means capable of detecting a deficiency of the game medium in each of the plurality of supply paths, and the payout means is provided before starting the payout operation. In the step, even if the shortage of the game medium is detected in some of the plurality of supply paths, the payout operation is performed when the game medium is present in the other supply paths. It is possible to execute the payout process using the game media existing in other supply paths even if the supply medium is in a shortage state in some supply paths. . Therefore, it is possible to perform an appropriate payout process even when the game medium is in a shortage state in a part of the supply path, and to execute appropriate payout control according to the game medium insufficiency state.

In the case where the payout means does not perform the payout operation when the shortage of the game medium is detected in all of the plurality of supply paths before the start of the payout operation, Since it is possible to prevent the payout process from being executed despite the shortage of payable game media, it is possible to execute appropriate payout control according to the state of lack of game media. .

[0379] The scheduled operation period as one payout operation of the payout means and the planned number of payouts to be paid out by one payout operation can be set in advance, and when the payout means runs out of game media in some supply paths. When the payout of the game medium is performed after the detection, and the number of game media paid out during the scheduled operation period is less than the planned number of payouts, the planned number of payouts after the scheduled operation period elapses In the case where the payout operation of paying out the unpaid portion of the game can be performed, the unpaid game media can be paid out by, for example, a correction operation. It becomes possible.

In the case where the plurality of supply paths include a plurality of prize game medium supply paths for supplying game medium to be paid out in accordance with the progress of the game to the payout means,
For example, to supply a game medium to be paid out in accordance with the progress of the game even if a part of the supply path for supplying the game medium to be paid out according to the progress of the game such as a prize ball is in a shortage state of the game medium. Payout processing such as award balls can be executed using game media existing in other supply paths. Accordingly, payout control such as an award ball can be efficiently performed, and appropriate payout control according to a lack state of the game medium can be executed.

[0381] A prize detecting means for detecting a prize based on a predetermined game result of the player, a game control means for controlling the progress of the game, and a payout control means for controlling the payout means so as to control the payout of the game medium. The game control means can output a control signal for specifying the number of payouts to the payout control means in accordance with the winning detection from the prize detection means even when the payout is stopped. In this case, since the control signal for specifying the number of payouts corresponding to the winning while the payout is stopped can be reliably output, the profit of the player can be protected.

[0382] Even if the payout control means is in the stoppage of payout,
In the case where the control signal output by the game control means can be obtained, the control signal input during the stoppage of the payout can be reliably obtained. To protect the interests of the player.

The payout means includes a prize game medium payout mechanism for paying out game media in accordance with the progress of the game, and a rental game medium payout mechanism for paying out game media in response to a loan request. As a route, a prize supply path for supplying game media paid out in accordance with the progress of the game to the prize game medium payout mechanism, and a lending supply path for supplying game media paid out in response to a lending request to the lending game medium payout mechanism. With
When the game medium deficiency detecting means is provided corresponding to each of the prize supply path and the lending supply path, the lack of the game medium paid out in accordance with the progress of the game and the lending request Since it is possible to distinguish and recognize the lack of the game medium to be paid out, it is possible to execute appropriate payout control according to the state of the lack of the game medium.

[0384] The prize game medium payout mechanism is capable of paying out the game medium paid out in accordance with the progress of the game, even when the shortage of the game medium is detected in the lending supply path. If the game media paid out in response to the lending request is insufficient, but the game media paid out in accordance with the progress of the game is secured, the game paid out in accordance with the progress of the game Since the payout of the medium can be executed, it is possible to execute appropriate payout control according to the shortage state of the game medium.

[Brief description of the drawings]

FIG. 1 is a front view of a pachinko gaming machine viewed from the front.

FIG. 2 is an explanatory view showing each substrate provided on the back surface of the pachinko gaming machine.

FIG. 3 is a rear view of the mechanical plate of the pachinko gaming machine as viewed from the rear.

FIG. 4 is a configuration diagram showing a configuration of a prize ball payout device and a ball passing path above the device.

FIG. 5 is an exploded perspective view of the prize ball payout device.

FIG. 6 is a configuration diagram showing a configuration of a rental ball dispensing device and a ball passage path above the device.

FIG. 7 is a cross-sectional view illustrating a state in which a rental ball of the rental ball payout device is stationary.

FIG. 8 is a cross-sectional view showing a state in which the lent ball that has been stopped in the lent ball dispensing device is released.

FIG. 9 is a configuration diagram showing another configuration example of a prize ball payout device and a rental ball payout device.

FIG. 10 is a block diagram showing a circuit configuration of a game control board (main board).

FIG. 11 is a block diagram showing a circuit configuration in a lamp control board.

FIG. 12 is a block diagram showing components related to a prize ball, such as components of a payout control board and a ball payout device.

FIG. 13 is a block diagram illustrating a configuration example around a CPU for power supply monitoring and power supply backup.

FIG. 14 is a block diagram illustrating a configuration example of a power supply board.

FIG. 15 is a flowchart illustrating an example of a main process executed by a CPU on a main board.

FIG. 16 is an explanatory diagram showing an example of a method for determining whether or not to execute a game state restoration process.

FIG. 17 is a flowchart illustrating an example of an initial setting process.

FIG. 18 is a flowchart illustrating an example of an initialization process.

FIG. 19 is a flowchart illustrating an example of a 2 ms timer interrupt process.

FIG. 20 is a flowchart illustrating an example of a game control process.

FIG. 21 is an explanatory diagram showing a configuration example of a payout control command.

FIG. 22 is a timing chart showing a relationship between a control signal and an INT signal.

FIG. 23 is an explanatory diagram showing an example of the content of a payout control command.

FIG. 24 is an explanatory diagram showing an example of the contents of a lamp control command.

FIG. 25 is a flowchart showing a switch process.

FIG. 26 is a flowchart showing winning ball signal processing.

FIG. 27 is a flowchart showing winning ball signal processing.

FIG. 28 is a flowchart showing winning ball signal processing.

FIG. 29 is a flowchart showing winning ball signal processing.

FIG. 30 is a flowchart showing winning ball signal processing.

FIG. 31 is a flowchart showing an error display process.

FIG. 32 is a flowchart showing a prize ball number signal output process.

FIG. 33 is an explanatory diagram showing a configuration of a command transmission table.

FIG. 34 is a flowchart showing a command control process.

FIG. 35 is a flowchart showing a command transmission process.

FIG. 36 is a block diagram illustrating a configuration example around a payout control CPU for power supply monitoring and power supply backup.

FIG. 37 is a flowchart illustrating an example of main processing executed by a payout control CPU.

FIG. 38 is a flowchart illustrating an example of an initial setting process of a payout control CPU.

FIG. 39 is a flowchart illustrating an example of initialization processing of a payout control CPU.

FIG. 40 is a flowchart illustrating an example of a timer interrupt process of a payout control CPU.

FIG. 41 is an explanatory diagram showing one configuration example of a RAM in the payout control means.

FIG. 42 is an explanatory diagram illustrating a configuration example of a reception buffer.

FIG. 43 is a flowchart illustrating an example of a command receiving process of the payout control CPU.

FIG. 44 is a flowchart illustrating an example of payout control processing executed by a payout control CPU.

FIG. 45 is a flowchart illustrating an example of a command analysis execution process.

FIG. 46 is a flowchart illustrating an example of a payout stop state setting process.

FIG. 47 is a flowchart illustrating an example of a switch process.

FIG. 48 is a flowchart showing an example of a prepaid card unit control process.

FIG. 49 is a flowchart illustrating an example of a ball lending control process.

FIG. 50 is a flowchart showing an example of a ball lending count switch check process.

FIG. 51 is a flowchart illustrating an example of a winning ball control process.

FIG. 52 is a flowchart illustrating an example of a winning ball control process.

FIG. 53 is a flowchart illustrating an example of a winning ball count switch check process.

FIG. 54 is an explanatory diagram showing the relationship between the type of error and the display of an error display LED.

FIG. 55 is a flowchart illustrating an example of an error process.

FIG. 56 is a flowchart illustrating an example of error processing.

FIG. 57 is a power outage occurrence NM executed by a payout control CPU.
It is a flowchart which shows the example of I processing.

FIG. 58 is an explanatory diagram for describing an example of a backup parity data creating method.

FIG. 59 is a flowchart illustrating an example of a payout state restoration process executed by a payout control CPU.

[Explanation of symbols]

 1 Pachinko gaming machine 31 Main board 37 Payout control board 53 Basic circuit 56 CPU 97A Prize ball payout apparatus 97C Lending ball payout apparatus 186a, 186b Payout ball path (for prize ball) 186c Payout ball path (for rental ball) 187a, 187b Ball Out switch (for prize ball) 187c Out of ball switch (for rental ball) 371 Dispensing control CPU 902 Power monitoring IC 910 Power board

Claims (8)

[Claims] 1. A gaming machine in which a player can play a predetermined game, comprising: a payout unit for paying out a game medium; a plurality of supply paths for supplying a game medium to the payout unit; Game medium deficiency detection means capable of detecting a deficiency of game media in each of the plurality of supply paths, wherein the payout means is a stage before starting a payout operation, of the plurality of supply paths, A gaming machine characterized in that a payout operation can be performed even when a shortage of a game medium is detected in a part of a supply path and a game medium exists in another supply path. 2. The payout means does not perform the payout operation when the shortage of the game medium is detected in all of the plurality of supply paths at a stage before the start of the payout operation. 1. The gaming machine according to 1. 3. A scheduled operation period as one payout operation of the payout means and a scheduled payout number to be paid out by one payout operation can be set in advance. In the case where the payout of the game medium is performed after the deficiency is detected, and the number of payouts of the game medium paid out within the scheduled operation period is less than the planned payout number, the scheduled operation period 3. The gaming machine according to claim 1, wherein a payout operation of paying out an unpaid amount of the expected payout number after the lapse of time has been performed. 4. The plurality of supply paths include a plurality of prize game medium supply paths for supplying game medium to be paid out in accordance with the progress of the game to payout means.
A gaming machine according to claim 3. 5. A prize detecting means for detecting a prize based on a predetermined game result of the player, a game control means for controlling a progress of the game, and a payout for controlling a payout means to control a payout of a game medium. The game control means may output a control signal to the payout control means for specifying the number of payouts in accordance with the winning detection from the prize detection means, even when the payout is stopped. The gaming machine according to claim 1, wherein the gaming machine is enabled. 6. The gaming machine according to claim 5, wherein the payout control means can acquire the control signal output by the game control means even when the payout is stopped. 7. A payout means comprising: a prize game medium payout mechanism for paying out game media in accordance with the progress of the game; and a lending game medium payout mechanism for paying out game media in accordance with a lending request. As a supply path, a prize supply path for supplying game media to be paid out in accordance with the progress of the game to the prize game medium payout mechanism, and a game medium to be paid out in response to a lending request to the rent game medium payout mechanism. 7. The gaming machine according to claim 1, further comprising: a lending supply path, wherein the game medium shortage detection unit is provided corresponding to each of the prize supply path and the lending supply path. 8. The prize game medium payout mechanism, even if a shortage of game media is detected in the lending supply path,
The gaming machine according to claim 7, wherein a payout of a game medium paid out according to a progress of the game can be performed.