JP2002012988A - Method for patterning metal foil, electric wiring substrate and its manufacturing method, semiconductor device and its manufacturing method, and circuit board and electronic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for patterning a metal foil, which can form a pattern to have different thickness depending on parts with a simple process, and to provide an electric wiring substrate and a manufacturing method therefor, a semiconductor device and a manufacturing method therefor, and a circuit board and an electronic device. SOLUTION: The method for forming the metal pattern which forms a resist layer 30 on the metal foil 20, etches a first and second parts 21 and 23 on the metal foil 20, which are exposed without the resist layer 30, and patterns the metal foil 20, is characterized by forming the first exposed part 21 to a size through which the above etching proceeds to a rear face of the metal foil, and by forming the second exposed part 23 to a size which prevents the above etching from proceeding to the rear face of the metal foil 20.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of patterning a metal foil, a wiring board and a method of manufacturing the same, a semiconductor device and a method of manufacturing the same, a circuit board, and an electronic apparatus.

[0002]

BACKGROUND OF THE INVENTION It is known to use a resist layer when patterning a metal foil. For more information,
A resist layer is selectively formed on a metal foil provided on a substrate, and an exposed portion from the resist layer is etched to pattern the metal foil. Conventionally, the metal foil pattern thus formed has been formed to have a uniform thickness.

However, when it is desired to freely form the thickness of each part, the process is complicated since the resist layer is formed again.

An object of the present invention is to solve this problem, and an object of the present invention is to provide a method of patterning a metal foil and a wiring which can be formed to have a partially different thickness by a simple process. It is an object of the present invention to provide a substrate and a method for manufacturing the same, a semiconductor device and a method for manufacturing the same, a circuit board, and an electronic device.

[0005]

(1) In a method for patterning a metal foil according to the present invention, a resist layer is formed on a metal foil, and first and second exposed portions of the metal foil from the resist layer are formed. Etching is a method of patterning the metal foil, wherein the first exposed portion is formed in such a size that the etching proceeds to the back surface of the metal foil, and the second exposed portion is formed by: The metal foil is formed in such a size as to prevent the etching from progressing to the back surface of the metal foil.

According to the present invention, the form of etching is partially changed by forming the first and second exposed portions having different sizes of the exposed portion from the resist layer. Thereby, without repeatedly forming the resist layer,
By performing the existing etching once, the metal foil can be patterned to have a partially different thickness.

(2) In the metal foil patterning method, an opening having a size that prevents the etching from proceeding to the back surface of the metal foil is formed in the resist layer, so that the inside of the opening is formed. The second exposed portion may be formed at the same time.

According to this, the second exposed portion can be formed by forming an opening having a predetermined size in the resist layer.

(3) In this metal foil patterning method, the resist layer is formed to have an elongated portion, and the opening is formed in a shape that partially separates the elongated portion of the resist layer in the length direction. It may be formed.

Thus, the metal foil can be formed so as to have an elongated portion, and at the same time, the etching can be performed without proceeding to the rear surface of the metal foil at a position where the resist layer is separated.

(4) In this metal foil patterning method, the resist layer is formed so as to have an elongated portion, and the opening is formed at a central portion of the resist layer except for both ends in the width direction of the elongated portion. Formed through holes,
The side surface of the metal foil may be further etched under both widthwise ends of the elongated portion of the resist layer by side etching.

Thus, the metal foil can be formed so as to have an elongated portion, and at the same time, the etching can be performed without proceeding to the back surface of the metal foil at the position where the through hole is formed in the resist layer. The surface portion of the second exposed portion from the through hole of the metal foil is etched, and the surface portion is etched by side etching below both ends in the width direction of the resist layer of the metal foil. Therefore, even when a through hole is formed in the resist layer, the surface portion of the metal foil can be etched down to below the both ends in the width direction of the elongated portion of the resist layer.

(5) In the metal foil patterning method, a plurality of openings are formed in the resist layer so as to prevent the etching from progressing to the back surface of the metal foil, thereby forming the plurality of openings. A plurality of the second exposed portions may be formed in the opening, and the surface of the metal foil may be further etched between the adjacent openings by side etching.

According to this, a plurality of openings having a predetermined size are formed in the resist layer to form a second exposed portion.
The second exposed portion in each opening is etched to such an extent that the second exposed portion is prevented from proceeding to the back surface of the metal foil. On the other hand, between adjacent openings, the surface of the metal foil is etched by side etching. Therefore, for example, a part of the metal foil can be formed thin as a whole.

(6) A method of manufacturing a wiring board according to the present invention is a method of manufacturing a wiring board including a step of forming wiring from the metal foil by the above-described method of patterning a metal foil. It is provided on the base substrate,
The elongated portion of the resist layer is formed so as to correspond to the shape of the wiring so as to extend from the inside to the outside of the mounting region of the semiconductor chip, and the opening is formed at an end of the mounting region of the semiconductor chip. Form.

According to the present invention, the opening of the resist layer is formed at the end of the mounting region of the semiconductor chip. This allows the front surface portion to be etched at the end of the semiconductor chip mounting region without advancing to the back surface of the metal foil. Therefore, for example, when the semiconductor chip is mounted on the wiring board, contact between the end of the semiconductor chip and the wiring can be prevented.

(7) A method of manufacturing a wiring board according to the present invention is a method of manufacturing a wiring board including a step of forming a wiring from the metal foil by the method of patterning a metal foil. It is provided on the base substrate,
The resist layer has a first portion extending from the inside to the outside of the mounting region of the semiconductor chip corresponding to the shape of the wiring, and a second portion located inside the mounting region of the semiconductor chip. And forming the plurality of openings,
It is formed on the second portion of the resist layer.

According to the present invention, the exposed portion from the first portion is etched to form a wiring, and the exposed portion from the second portion in which a plurality of openings are formed is etched to form a metal foil. A thin film formed by etching the surface can be formed. The second portion is formed inside the mounting area of the semiconductor chip. Thus, for example, when the semiconductor chip is mounted on the wiring board, the thin film overlaps the active surface of the semiconductor chip, so that the light shielding property of the semiconductor chip can be improved.

(8) In the method of manufacturing a semiconductor device according to the present invention, the semiconductor device is formed on the base substrate so as to extend from the inside to the outside of the mounting region of the semiconductor chip on the base substrate. And disposing an end of the semiconductor chip above the recess formed in the wiring and mounting the semiconductor chip on a wiring substrate including the wiring having the recess formed therein.

According to the present invention, the semiconductor chip is mounted on the wiring board with its end located above the recess formed in the wiring. Thus, the semiconductor chip can be separated from a part of the wiring below the end. Therefore, for example, when the end of the semiconductor chip projects, contact with the wiring can be prevented.

(9) In the method of manufacturing a semiconductor device according to the present invention, at least one of the base substrate, the wiring formed on the base substrate, and a semiconductor chip mounting area of the base substrate is formed. A step of mounting the semiconductor chip on a wiring substrate including a film formed of the same material as the rear surface and having a thickness smaller than the wiring, with a part of the surface on which the electrodes are formed facing the thin film.

According to the present invention, the semiconductor chip is mounted such that a part of the surface on which the electrodes are formed faces a thin film. As a result, the thin film overlaps the surface of the semiconductor chip, and the light-shielding properties of the semiconductor chip can be improved.

(10) A wiring board according to the present invention includes a base substrate, and wiring formed on the base substrate.
The wiring is formed so as to extend from the inside to the outside of the mounting region of the semiconductor chip, and a concave portion is formed at an end of the mounting region of the semiconductor chip.

According to the present invention, for example, by mounting the semiconductor chip on the wiring board with the end of the semiconductor chip disposed in the recess of the wiring, the wiring can be connected to the wiring when the end of the semiconductor chip protrudes. Contact can be prevented.

(11) A wiring board according to the present invention is formed inside a base substrate, a wiring formed on the base substrate, and a semiconductor chip mounting area of the base substrate, and is at least the same as at least a back surface of the wiring. A film formed of a material and thinner than the wiring.

According to the present invention, for example, when a semiconductor chip is mounted on a wiring board, a light-shielding property of the semiconductor chip can be enhanced by overlapping a thin film with an active surface of the semiconductor chip.

(12) A semiconductor device according to the present invention includes the wiring substrate and a semiconductor chip having electrodes, and the semiconductor chip has an end located above the concave portion formed in the wiring. And mounted on the wiring board.

According to the present invention, the semiconductor chip can be separated from a part of the wiring below the end. Therefore, for example, even when the end of the semiconductor chip projects, contact with the wiring can be prevented.

(13) A semiconductor device according to the present invention includes the wiring substrate and a semiconductor chip having electrodes, and the semiconductor chip faces a part of the surface on which the electrodes are formed to the thin film. Then, it is mounted on the wiring board.

According to the present invention, the light shielding property of the semiconductor chip can be enhanced by the thin film overlapping the active surface of the semiconductor chip. Further, since the film formed in the mounting region of the semiconductor chip is thin, the space between the semiconductor chip and the wiring board can be kept wide and the resin can be reliably filled.

(14) The semiconductor device is mounted on a circuit board according to the present invention.

(15) An electronic apparatus according to the present invention includes the above semiconductor device.

[0033]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. However, the present invention
The present invention is not limited to the following embodiment. The method for manufacturing a wiring board described below is an example of a method for patterning a metal foil to which the present invention is applied, and the method for patterning a metal foil according to the present invention is not limited thereto.

(First Embodiment) FIGS. 1 to 4 show a method of manufacturing a wiring board according to a first embodiment of the present invention. FIG. 4 is a diagram illustrating the wiring board according to the present embodiment.

As shown in FIG. 1, a metal foil 20 is provided on a base substrate 10. Here, the base substrate 10 may be formed of either an organic or inorganic material, or may be formed of a composite structure thereof. As the base substrate 10 formed of an organic material, for example, a flexible substrate made of a polyimide resin is exemplified. As the flexible substrate, a tape used in TAB technology may be used. Further, as the base substrate 10 formed of an inorganic material, for example, a ceramic substrate or a glass substrate can be used. As a composite structure of an organic material and an inorganic material, for example, a glass epoxy substrate can be given.

The overall shape of the base substrate 10 is not particularly limited, and may be a rectangle, a polygon, or a combination of a plurality of rectangles. Further, the size of the base substrate 10 in plan view is not limited. For example, base substrate 1
0 may be a substrate (not shown) in which a plurality of semiconductor chip mounting areas are arranged two-dimensionally (for example, in a matrix).

The metal foil 20 may be a single layer as shown in FIG. 1, or may be formed from a plurality of layers.
The metal foil 20 is made of, for example, copper (Cu), chromium (Cr),
Even if it is formed of any one or more of titanium (Ti), nickel (Ni), titanium tungsten (TiW), gold (Au), aluminum (Al), nickel vanadium (NiV), and tungsten (W) Good.

In the example shown in FIG. 1, a metal foil 20 is provided on one side of a base substrate 10. The metal foil 20 may be provided on one entire surface of the base substrate 10. The metal foil 20 may be attached to the base substrate 10 with an adhesive or the like. Alternatively, the metal foil 20 may be formed by depositing a metal film on the base substrate 10 by sputtering or the like. Or
The metal foil 20 may be provided on the base substrate 10 by electroless plating or the like. In addition, separately from the example shown in FIG.
May be provided with metal foils 20 on both sides. In this case, a process described below may be performed on both surfaces of the base substrate 10.

As shown in FIGS. 2 and 3, a resist layer 30 is formed on the metal foil 20 and the resist layer 3 of the metal foil 20 is formed.
A first exposed portion 21 and a second exposed portion 23 from 0 are formed. In the present embodiment, as shown in FIG. 3, the resist layer 30 is formed to have the elongated portion 32, and the opening 34 is formed in the elongated portion 32, so that the second exposed portion 2 is formed.
Form 3

The elongated portion 32 of the resist layer 30 is formed corresponding to the wiring 22 formed on the base substrate 10. The elongated portion 32 may be formed with a constant width. Alternatively, the elongated portion 32 may partially have a different width in order to form, for example, a land portion of the wiring 22. Further, the elongated portion 32 may be formed to be bent.

As a method for patterning the resist layer 30, for example, as shown in FIG. 2, a resist layer 30 is provided on the entire metal foil 20, and thereafter, a photolithography technique or the like is applied to the resist layer 30 as shown in FIG. An elongated portion 32 may be formed. That is, the photosensitive resist layer 30 may be formed by irradiating energy and developing through a mask (not shown). At this time, the resist layer 30 may be a positive type or a negative type. Alternatively, the non-photosensitive resist layer 30 may be formed by etching.

Alternatively, the resist layer 30 may be formed to have the elongated portion 32 by using an ink jet system or a printing system. For example, according to the ink jet system, it is possible to fill the ink at high speed and economically without waste by applying the technology practically used for the ink jet printer. The ink jet head (not shown) has been put into practical use for an ink jet printer, for example, and includes a piezo jet type using a piezoelectric element, a bubble jet (registered trademark) type using an electrothermal converter as an energy generating element, and the like. It can be used, and the discharge area and the discharge pattern can be set arbitrarily.

By these methods, the elongated portion 32 can be formed from the resist layer 30 and the opening 34 can be formed in the elongated portion 32 at the same time.

The first exposed portion 21 is exposed from the resist layer 30 in such a size that the etchant proceeds from the front surface to the rear surface of the metal foil 20 during etching. More specifically, when the metal foil 20 is etched, the first exposed portion 21 is formed in such a size that an etching means such as an etching solution or gas advances to the back surface of the metal foil 20 and is etched. . Here, the surface portion of the metal foil 20 refers to the surface on the resist layer 30 side and a portion close to the surface, and the back surface of the metal foil 20 refers to the base substrate 1 of the metal foil 20.
Indicates a surface that is in contact with 0. In the present embodiment, the first exposed portion 21 is a portion exposed from the resist layer 30 outside the elongated portion 32.

On the other hand, the second exposed portion 23 of the opening 34
The etchant is formed in a size that prevents the etchant from proceeding to the back surface of the metal foil 20 during etching. To be specific,
When the metal foil 20 is etched, the opening 34 is formed in such a size that the etching means such as an etching solution or gas does not proceed to the back surface of the metal foil 20 and the surface portion is etched. In the present embodiment, the second exposed part 23 refers to an exposed part in the opening 34 formed in the elongated part 32.

In the present embodiment, as shown in the enlarged view of FIG. 3, the opening 34 is formed by partially separating the elongated portion 32 of the resist layer 30 in the length direction. In the length direction of the resist layer 30, by separating the elongated portion 32 having a size that prevents the etchant from advancing to the back surface of the metal foil 20, the opening 3 is formed.
In the second exposed portion 23 of No. 4, only the front surface portion can be etched without proceeding to the back surface. The opening 34
Refers to the size and area of the exposed portion 23 of the metal foil 20, and is determined by the shape of the exposed portion 23, the thickness of the metal foil 20, and the like.

By forming the exposed portion as described above, when the metal foil 20 is etched, the first exposed portion 21 of the metal foil 20 is advanced to the back surface and etched as a whole. In the second exposed portion 23, the surface portion can be etched without proceeding to the back surface. That is, the etching mode can be partially changed with respect to the metal foil 20. Therefore, the metal foil 20 can be patterned so as to have a partially different thickness by performing the existing etching once without having to repeatedly form the resist layer 30.

In this way, as shown in FIG. 4, a plurality of wirings 22 are formed on the base substrate 10 and the wirings 22 are formed.
A concave portion 24 is formed in the substrate. More specifically, the wiring 22 is formed from the elongated portion 32 of the resist layer 30 by etching the first exposed portion 21, and the concave portion 2 is formed in the wiring 22 by etching the second exposed portion 23 of the opening 34.
4 is formed.

Here, the means for etching may be any one utilizing chemical or physical properties. Further, the characteristics of the etching may be either isotropic or anisotropic. In any case, the concave portion 24 can be formed by etching the second exposed portion 23 of the opening 34 having a size that prevents the metal foil 20 from proceeding to the rear surface.

The wiring 22 may be formed in a shape in which the upper end is narrower than the lower end, as shown in an enlarged view surrounded by a chain line in FIG. 4, for example. Such a shape
It can be formed by performing isotropic etching. Wet etching may be used as an etching method having isotropic characteristics.

The surface of the recess 24 is etched at a part of the wiring 22 without proceeding to the back surface. That is,
In the recess 24, the wiring 22 is formed so thin that it does not cut. For example, when wet etching is used, the etchant as an etchant reaches the second exposed portion 23 of the opening 34, and the metal foil 20 is not advanced to the back surface at the second exposed portion 23, but the front surface portion is formed. Is etched. Also, in the isotropic etching, the etchant reaches below the resist layer 30 from the opening 34, and
Only the surface of the metal foil 20 is further etched. In this manner, the concave portion 24 of the wiring 22 may be formed to be larger than the opening 34 of the resist layer 30 in plan view. Further, the shape of the inner surface of the concave portion 24 may be formed to have a curved surface or a corner, and is not particularly limited.

As shown in FIG. 5, the wiring board 12 having the wiring 22 formed on the base substrate 10 is
0 may be mounted. In this case, the elongated portion 32 of the resist layer 30 is formed so as to extend from the inside to the outside of the mounting region of the semiconductor chip 40 according to the shape of the wiring 22. By doing so, the wiring 22 extending from the inside to the outside of the mounting area of the semiconductor chip 40 can be formed. That is, the wiring 22 can be drawn out of the electrode 42 of the semiconductor chip 40 to form an electrical connection outside the mounting area of the semiconductor chip 40. The opening 34 formed in the elongated portion 32 of the resist layer 30 is formed at the end of the mounting area of the semiconductor chip 40. Thus, when the semiconductor chip 40 is mounted on the wiring board 12, the concave portion 24 of the wiring 22 can be formed so as to be located at the end of the semiconductor chip 40. In this embodiment, the wiring 22 is formed so as to extend from the inside to the outside of the mounting region of the semiconductor chip 40. In addition to this, the wiring 22 is further formed on the base substrate 10, for example, in the mounting region of the semiconductor chip 40. A wiring may be formed inside.

According to the present embodiment, the opening 34 of the elongated portion 32 of the resist layer 30 is formed at the end of the mounting area of the semiconductor chip 40. Thereby, the semiconductor chip 4
At the end of the 0 mounting region, the surface can be etched without proceeding to the back of the metal foil 20. Therefore, for example, when the semiconductor wafer is diced to form individual semiconductor chips 40, even if the Al wiring or the like is turned up at the end of the semiconductor chip 40 by dicing, the end of the semiconductor chip 40 And wiring 2
2 can be prevented from contacting.

Next, the wiring board 12 according to the present embodiment
Will be described. As shown in FIG. 4 and FIG.
Includes a base substrate 10 and a wiring 22 formed on the base substrate 10.

The wiring 22 is formed so as to extend from the inside to the outside of the mounting area of the semiconductor chip 40.
A concave portion 24 is formed at an end of the mounting region of No. 0. The wiring 22 has a joint with the electrode 42 (bump 44) and a joint with the external terminal 50 (not shown). The bonding portion may be a land portion having a larger area than the portion connecting to the bonding portion, or may be formed to have the same width as the portion connecting to the bonding portion. The wiring board 1
2 may further have another wiring formed inside the mounting area of the semiconductor chip 40, for example.

Hereinafter, a method for manufacturing a semiconductor device will be described. The method of manufacturing a semiconductor device according to the present embodiment may use the wiring board 12 manufactured according to the above-described example. Alternatively, the wiring board 12 manufactured by another method
May be used.

As shown in FIG. 5, the semiconductor chip 40 is mounted on the wiring board 12. Here, the semiconductor chip 40 has a plurality of electrodes 42. The electrode 42 is connected to the semiconductor chip 4
0 is the terminal of the integrated circuit formed inside. Each surface of the semiconductor chip 40 on which the electrode 42 is formed is
A passivation film (not shown) made of SiO ₂ , SiN, polyimide resin or the like is formed so as to avoid at least a part of ₂ . Also, a bump 44 is formed on the electrode 42.
May be formed.

The semiconductor chip 40 is mounted on the wiring board 12 with the surface on which the electrodes 42 are formed facing each other. In this case, the end of the semiconductor chip 40 is arranged above the concave portion 24 formed in the wiring 22, and the semiconductor chip 40 is mounted. The recess 24 is, as described above, formed with the opening 34 of the wiring 22.
Is formed on the surface of the wiring 22 from the center to the side of the wiring 22. Therefore, the semiconductor chip 40 is mounted on the wiring board 12 with its end positioned above the concave portion 24 formed in the wiring 22 so that the semiconductor chip 40 is mounted on the wiring 2 below the end.
2 can be separated.

Hereinafter, a semiconductor device according to this embodiment will be described.

As shown in FIG. 5, the semiconductor device includes a wiring substrate 12 and a semiconductor chip 40. The wiring board 12 is as described above. The semiconductor chip 40 may have bumps 44 formed on the respective electrodes 42. Semiconductor chip 40
Are mounted on the wiring board 12 with the surfaces formed on the electrodes 42 facing each other. That is, the semiconductor chip 40
Are face-down bonded to the wiring board 12. In this case, the wiring 22 formed on the wiring board 12
And the bump 44 are electrically connected. For electrical connection, an anisotropic conductive material such as an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP) is used, and conductive particles are interposed between the bump 40 and the wiring 22. Is also good. Alternatively, the bump 40 and the wiring 22 may be electrically connected by metal bonding using Au-Au, Au-Sn, solder, or the like, or by the contraction force of the insulating resin.

In the semiconductor device according to the present embodiment, the semiconductor chip 40 is mounted on the wiring board 12 with the end arranged above the concave portion 24 formed in the wiring 22. Thereby, the semiconductor chip 40 can be separated from a part of the wiring 22 below the end.

In the example shown in FIG. 5, the semiconductor device further includes a plurality of external terminals 50. The plurality of external terminals 50 are provided on the base substrate 10, specifically, on the wiring 22.
The external terminal 50 is electrically connected to the wiring 22 via a through hole (not shown). Each external terminal 50
May be a solder ball. The external terminals 50 may be formed by printing solder or the like and passing through a reflow process.
The external terminal 50 may be formed of copper or the like in addition to solder. Note that the semiconductor device described in the present embodiment may be a FAN-OUT type in which the external terminal 50 is formed outside the mounting area of the semiconductor chip 40, or may be a FAN-IN / OUT formed inside and outside. It may be a type.

Alternatively, instead of actively forming the external terminals 50, a solder cream applied to the motherboard at the time of mounting the motherboard may be used, and the external terminals may be eventually formed by the surface tension at the time of melting. This semiconductor device is a so-called land grid array type semiconductor device.

The resin 46 may be filled between the semiconductor chip 40 and the wiring board 12. The resin 46 may be an underfill material. The underfill material may be one that fulfills the function of relaxing the stress of the semiconductor device. As a result, the electrical connection between the electrode 42 (the bump 44) and the wiring 22 can be protected.

Next, as shown in FIGS. 6 to 10, a modified example of the method of manufacturing a semiconductor device according to the present embodiment will be described. In this modification, the form of the opening formed in the elongated portion 72 of the resist layer 70 is different from the above-described example. Hereinafter, points different from the above-described example will be described.

FIG. 6 is a plan view showing the resist layer 70 formed on the metal foil 60. As shown in FIG. 6, the opening in the present modification is a through hole 74 formed in the elongated portion 72 of the resist layer 70. In the present modification, the first exposed portion 71 refers to a portion exposed from the resist layer 70 outside the elongated portion 72, and the second exposed portion 73
The exposed portion in the through hole 74 is referred to.

The through hole 74 is formed at the center of the resist layer 70 except for both ends in the width direction of the elongated portion 72.
The shape of the through hole 74 may be rectangular or circular in plan view, and is not particularly limited. The through hole 74 may be formed by vertically penetrating the elongated portion 72 of the resist layer 70 with a constant opening width.

As shown in FIG. 7, the metal foil 20 is etched from the through hole 74 to form the wiring 62 having the concave portion 64. FIG. 7 is a plan view showing the shape of the wiring 62. 8 to 10 are VIII-VIII line in FIG. 7, respectively.
It is a figure which shows the shape of the wiring 62 in IX-IX line and XX line cross section.

In this embodiment, isotropic etching is used. By using isotropic etching, the first
When the etchant arrives from the exposed portion 71, the wiring 22 is etched down to below the both ends in the width direction of the elongated portion 72, and as shown in FIGS. It is formed so as to have a smaller area in plan view than the portion 68.

On the other hand, the metal foil 60 is etched at the second exposed portion 73 in the through hole 74 by etching from the through hole 74 formed at the center of the elongated portion 72 in the width direction.
The surface portion is etched without proceeding to the back surface. Further, by the isotropic etching, side etching is performed from the second exposed portion 73 of the elongated portion 72, and the surface portion of the metal foil 60 is etched under both ends of the elongated portion 72 in the width direction.

Thus, in the recess 64 of the wiring 62,
As shown in FIG. 10, the surface of the wiring 62 is also etched at the end in the width direction. That is, even when the through hole 74 is formed in the resist layer 70, the resist layer 7
The surface portion of the metal foil 60 can be etched down to below both ends of the elongated portion 72 in the width direction. Note that, for example, wet etching may be used as the isotropic etching.

In this modified example, the same effect as in the above-described example can be obtained.

(Second Embodiment) FIG. 11 to FIG.
It is a figure showing the manufacturing method of the wiring board concerning a 2nd embodiment to which the present invention is applied. FIG. 14 is a diagram showing a semiconductor device according to the present embodiment. In this embodiment,
The contents described in the first embodiment can be applied as much as possible.

First, a metal foil 80 is provided on the base substrate 10 described above. The metal foil 80 may be formed from the same material as the metal foil 20 described above. The metal foil 80 may be provided on the entire surface of the base substrate 10. The method of providing the metal foil 80 may be the same as in the above-described example.

As shown in FIGS. 11 and 12, the metal foil 8
A first exposed portion 91 and a second exposed portion 93 of the metal foil 20 from the resist layer 90 are formed on the resist layer 90. In the present embodiment, as shown in FIG.
And a second position located inside the mounting area of the semiconductor chip 40.
And a portion 94. First part 9
2 is a resist layer 90 as described in the above embodiment.
Is formed to have an elongated portion. Further, a plurality of openings 96 are formed in the second portion 94 so that the openings 96 are formed.
A second exposed portion 93 is formed therein. The opening 96 is formed to have a size that prevents the etchant from proceeding to the back surface of the metal foil 80 during etching, as shown in the above-described example. The shape of the opening 96 is not particularly limited.

As shown in FIG. 12, the second portion 94
It is formed in a planar shape inside the mounting area of the semiconductor chip 40. Alternatively, the second portion 94 may be formed so as to protrude outside the mounting area of the semiconductor chip 40.

FIG. 13 is a sectional view taken along line XIII-XIII in FIG. As shown in FIG. 13, the metal foil 80 is formed thin under the second portion 94 of the resist layer 90 by etching from the plurality of openings 96 of the second portion 94 of the resist layer 90. Note that in this embodiment, isotropic etching may be used. Wet etching may be used as isotropic etching.

Hereinafter, a method of manufacturing a wiring board using wet etching will be described as an example. The etchant, which is an etchant, is applied to the second exposed portion 9 in the opening 96.
3 and at the second exposed portion 93 of the metal foil 80,
The surface is etched without proceeding to the back. In the isotropic etching, the surface of the metal foil 80 is further etched between the adjacent openings 96 below the resist layer 90. In this case, the openings 96 are densely formed so that the middle of the adjacent openings 96 is etched by an etchant reaching from both the openings 96. In other words, the plurality of openings are formed in the second portion 94 so that only the surface portion of the metal foil 80 is etched by the side etching from each opening 96 even in the region covered by the second portion 94. 96 are formed densely. Thus, the metal foil 80 is etched under the second portion 94 without entirely proceeding to the back surface, and a thin film 84 formed by etching the surface portion of the metal foil 80 can be formed.

As shown in FIG. 13, the thin film 84 formed by the above-described method is formed in an uneven shape. Specifically, the surface of the metal foil 80 is deeply etched at the center of the opening 96 in plan view without proceeding to the back surface, and the surface of the metal foil 80 is etched shallowly at the peripheral end of the opening 96. Further, the surface of metal foil 80 is etched shallower even in the region between openings 96 in plan view. Thus, the thin film 84 is formed to be thin as a whole and in an uneven shape.

The thin film 84 thus formed is formed inside the semiconductor chip mounting region of the base substrate 10. Thus, when the semiconductor chip 40 is mounted on the wiring board 14 (see FIG. 14), the thin film 84 of the metal foil 80 overlaps with the active surface of the semiconductor chip 40, so that the light shielding property of the semiconductor chip 40 can be improved. it can. Therefore,
For example, even when the base substrate 10 is a substrate having a low light-shielding property, it is possible to manufacture the wiring substrate 14 that can keep the light-shielding property of the semiconductor chip 40 high. Further, since the thin film 84 can be formed simultaneously with the wiring 82 formed on the base substrate 10, the thin film 84 can be formed without increasing the number of steps.

As shown in FIGS. 12 and 13, the thin film 8
4 may be formed so as not to be in contact with the wiring 82.
Alternatively, a thin film 84 may be separately formed in contact with any of the plurality of wirings 82. In the latter case, for example, the thin film 84 may be connected to the ground.

The wiring substrate 14 according to the present embodiment includes a base substrate 10 and a wiring 82 formed on the base substrate 10.
And a film 84 formed inside the mounting region of the semiconductor chip 40 of the base substrate 10 and formed of the same material as at least the back surface of the wiring 82 and thinner than the wiring 82. The thin film 84 may be formed inside the mounting area of the semiconductor chip 40. Alternatively, it may be formed so as to protrude from the mounting area of the semiconductor chip 40 to the outside. Other configurations are
It is as described in the above manufacturing method.

In the method of manufacturing a semiconductor device according to the present embodiment, a semiconductor chip 40 is mounted on a wiring board 14 as shown in FIG. The wiring board 14 used in the present embodiment may be manufactured by the above-described example, or may be manufactured by another manufacturing method.

The semiconductor chip 40 is mounted on the wiring board 14 with a part of the surface on which the electrodes 42 are formed facing the thin film 84. For example, when the electrode 42 is formed at a position closer to the end of the semiconductor chip 40, the semiconductor chip 40
Is mounted such that the central portion (active surface) on the surface side of the electrode 42 faces the thin film 84. Thus, the thin film 84 overlaps with the surface of the semiconductor chip 40, and the light shielding property of the semiconductor chip 40 can be improved.

Further, the semiconductor chip 40 and the base substrate 1
Since the film formed at 0 is thin, the space between the semiconductor chip 40 and the wiring board 14 can be widened while improving the light shielding property. Therefore, for example, a large space between the semiconductor chip 40 and the wiring board 14 can be reliably filled with the resin 46. Also, the thin film 84
May have an uneven shape on the side facing the semiconductor chip 40, thereby increasing the surface area of the thin film 84,
The adhesion between the resin 46 and the wiring board 14 can be improved.

The semiconductor device according to the present embodiment includes a wiring board 14 and a semiconductor chip 40 having electrodes 42. The semiconductor chip 40 is mounted on the wiring board 14 with a part of the surface on which the electrodes 42 are formed facing the thin film 84. Other configurations are as described in the above-described manufacturing method.

FIG. 15 shows a circuit board 100 on which the semiconductor device 1 according to the embodiment of the present invention is mounted. Generally, an organic substrate such as a glass epoxy substrate is used for the circuit board 100. Wiring patterns made of, for example, copper or the like are formed on the circuit board 100 so as to form a desired circuit, and the electrical connection between the wiring patterns and the external terminals 50 of the semiconductor device 1 is made by mechanical connection. Conduct continuity.

FIG. 16 shows a notebook personal computer 200 and FIG. 17 shows a mobile phone 300 as an electronic apparatus having the semiconductor device 1 to which the present invention is applied.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a method for manufacturing a wiring board according to a first embodiment of the present invention;

FIG. 2 is a diagram illustrating a method of manufacturing a wiring board according to a first embodiment of the present invention;

FIG. 3 is a diagram illustrating a method of manufacturing a wiring board according to a first embodiment of the present invention;

FIG. 4 is a diagram showing a wiring board and a method of manufacturing the same according to a first embodiment of the present invention;

FIG. 5 is a diagram showing a semiconductor device according to a first embodiment to which the present invention is applied and a method for manufacturing the same.

FIG. 6 is a diagram showing a modification of the method of manufacturing the wiring board according to the first embodiment to which the present invention is applied.

FIG. 7 is a view showing a modification of the method of manufacturing the semiconductor device according to the first embodiment to which the present invention is applied;

FIG. 8 is a diagram showing a modification of the method of manufacturing the wiring board according to the first embodiment to which the present invention is applied.

FIG. 9 is a view showing a modification of the method of manufacturing the wiring board according to the first embodiment to which the present invention is applied;

FIG. 10 is a diagram showing a modification of the method of manufacturing the wiring board according to the first embodiment to which the present invention is applied;

FIG. 11 is a diagram illustrating a method of manufacturing a wiring board according to a second embodiment of the present invention;

FIG. 12 is a diagram illustrating a method of manufacturing a wiring board according to a second embodiment of the present invention;

FIG. 13 is a diagram illustrating a method of manufacturing a wiring board according to a second embodiment of the present invention;

FIG. 14 is a diagram illustrating a semiconductor device according to a second embodiment of the present invention and a method of manufacturing the same.

FIG. 15 is a diagram illustrating a circuit board on which a semiconductor device according to an embodiment to which the present invention is applied is mounted;

FIG. 16 is a diagram illustrating an electronic apparatus including a semiconductor device according to an embodiment to which the present invention is applied;

FIG. 17 is a diagram illustrating an electronic apparatus including a semiconductor device according to an embodiment to which the present invention is applied;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Base board 12 Wiring board 14 Wiring board 20 Metal foil 21 First exposed part 22 Wiring 23 Second exposed part 24 Concave part 30 Resist layer 32 Slender part 34 Opening 40 Semiconductor chip 42 Electrode 44 Bump 46 Resin 50 External terminal 60 Metal foil 62 Wiring 64 Depression 70 Resist layer 71 First exposed part 72 Slender part 73 Second exposed part 74 Through hole 80 Metal foil 82 Wiring 84 Thin film 90 Resist layer 91 First exposed part 92 First part 93 Second exposed portion 94 Second portion 96 Opening

Claims (15)

[Claims] 1. A method of forming a resist layer on a metal foil and patterning the metal foil by etching first and second exposed portions of the metal foil from the resist layer, the method comprising: Is formed in such a size that the etching proceeds to the back surface of the metal foil, and the second exposed portion is formed in a size that prevents the etching from proceeding to the back surface of the metal foil. A method of patterning a metal foil formed by the method. 2. The metal foil patterning method according to claim 1, wherein an opening having a size that prevents the etching from proceeding to the back surface of the metal foil is formed in the resist layer. A method of patterning a metal foil for forming the second exposed portion in the opening. 3. The metal foil patterning method according to claim 2, wherein the resist layer is formed to have an elongated portion, and the opening is partially separated from the elongated portion of the resist layer in a length direction. A method for patterning a metal foil formed in a desired shape. 4. The method for patterning a metal foil according to claim 2, wherein the resist layer is formed to have an elongated portion, and the opening leaves both ends in the width direction of the elongated portion of the resist layer. A method of patterning a metal foil, further comprising: a through hole formed in a center portion; and further etching a surface portion of the metal foil below both ends in a width direction of an elongated portion of the resist layer by side etching. 5. The method for patterning a metal foil according to claim 1, wherein a plurality of openings are formed in the resist layer so as to prevent the etching from proceeding to the back surface of the metal foil. Forming a plurality of the second exposed portions in the opening, and further etching the surface of the metal foil between the adjacent openings by side etching. 6. A method for manufacturing a wiring board, comprising a step of forming a wiring from the metal foil by the method for patterning a metal foil according to claim 3 or 4, wherein the metal foil is provided on a base substrate. Forming the elongated portion of the resist layer from the inside to the outside of the mounting area of the semiconductor chip in accordance with the shape of the wiring; and forming the opening in the mounting area of the semiconductor chip. Of manufacturing a wiring board formed at an end of the wiring board 7. A method for manufacturing a wiring board, comprising: forming a wiring from the metal foil by the method for patterning a metal foil according to claim 5, wherein the metal foil is provided on a base substrate, The resist layer has a first portion extending from the inside to the outside of the mounting region of the semiconductor chip corresponding to the shape of the wiring, and a second portion located inside the mounting region of the semiconductor chip. And forming the plurality of openings in the second portion of the resist layer. 8. A wiring comprising: a base substrate; and wiring formed on the base substrate so as to extend from the inside to the outside of the mounting region of the semiconductor chip, and having a recess formed in the mounting region of the semiconductor chip. A method for manufacturing a semiconductor device, comprising: arranging an end of the semiconductor chip on the substrate above the recess formed in the wiring, and mounting the semiconductor chip. 9. A base substrate, wiring formed on the base substrate, and thinner than the wiring formed on the inside of the semiconductor chip mounting area of the base substrate and formed of the same material as at least the back surface of the wiring. A method for manufacturing a semiconductor device, comprising: mounting a semiconductor chip on a wiring substrate including a film, with a part of a surface on which the electrode is formed facing the thin film. 10. A semiconductor device comprising: a base substrate; and wiring formed on the base substrate, wherein the wiring is formed so as to extend from the inside to the outside of the mounting region of the semiconductor chip, and the wiring of the mounting region of the semiconductor chip is formed. A wiring substrate having a concave portion formed at an end. 11. A base substrate, a wiring formed on the base substrate, and a thinner than the wiring formed on the inside of the semiconductor chip mounting region of the base substrate and formed of the same material as at least the back surface of the wiring. A wiring board, comprising: a film; 12. The wiring board, comprising: the wiring board according to claim 10; and a semiconductor chip having an electrode, wherein the semiconductor chip has an end arranged above the recess formed in the wiring, and A semiconductor device mounted on a device. 13. The wiring board according to claim 11, further comprising: a semiconductor chip having an electrode, wherein the semiconductor chip has a part of a surface on which the electrode is formed facing the thin film. A semiconductor device mounted on a device. 14. A circuit board on which the semiconductor device according to claim 12 is mounted. 15. An electronic apparatus comprising the semiconductor device according to claim 12.