JP2001525098A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2001525098A5 JP2001525098A5 JP1998530079A JP53007998A JP2001525098A5 JP 2001525098 A5 JP2001525098 A5 JP 2001525098A5 JP 1998530079 A JP1998530079 A JP 1998530079A JP 53007998 A JP53007998 A JP 53007998A JP 2001525098 A5 JP2001525098 A5 JP 2001525098A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Description
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/775,796 US5898610A (en) | 1996-12-31 | 1996-12-31 | Method and apparatus for bit cell ground choking for improved memory write margin |
| US08/775,796 | 1996-12-31 | ||
| PCT/US1997/023214 WO1998029875A1 (en) | 1996-12-31 | 1997-12-11 | A method and apparatus for bit cell ground choking for improved memory write margin |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001525098A JP2001525098A (ja) | 2001-12-04 |
| JP2001525098A5 true JP2001525098A5 (ja) | 2005-06-16 |
Family
ID=25105532
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53007998A Ceased JP2001525098A (ja) | 1996-12-31 | 1997-12-11 | メモリ書込みマージンを改良するためにビットセル接地チョーキングを行う方法および装置 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US5898610A (ja) |
| JP (1) | JP2001525098A (ja) |
| KR (1) | KR100343029B1 (ja) |
| AU (1) | AU5528998A (ja) |
| IL (1) | IL130563A (ja) |
| TW (1) | TW353180B (ja) |
| WO (1) | WO1998029875A1 (ja) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6529400B1 (en) * | 2000-12-15 | 2003-03-04 | Lsi Logic Corporation | Source pulsed, dynamic threshold complementary metal oxide semiconductor static RAM cells |
| JP2002298586A (ja) * | 2001-04-02 | 2002-10-11 | Nec Corp | 半導体記憶装置のデータ書き込み方法及び半導体記憶装置 |
| US6862207B2 (en) * | 2002-10-15 | 2005-03-01 | Intel Corporation | Static random access memory |
| US6891745B2 (en) * | 2002-11-08 | 2005-05-10 | Taiwan Semiconductor Manufacturing Company | Design concept for SRAM read margin |
| JP2004199829A (ja) * | 2002-12-20 | 2004-07-15 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| JP2006196124A (ja) | 2005-01-14 | 2006-07-27 | Nec Electronics Corp | メモリセル及び半導体集積回路装置 |
| US7403426B2 (en) * | 2005-05-25 | 2008-07-22 | Intel Corporation | Memory with dynamically adjustable supply |
| US7596012B1 (en) | 2006-12-04 | 2009-09-29 | Marvell International Ltd. | Write-assist and power-down circuit for low power SRAM applications |
| US8264896B2 (en) * | 2008-07-31 | 2012-09-11 | Freescale Semiconductor, Inc. | Integrated circuit having an array supply voltage control circuit |
| JP5305103B2 (ja) * | 2009-09-02 | 2013-10-02 | 日本電信電話株式会社 | メモリ回路 |
| US9230637B1 (en) | 2014-09-09 | 2016-01-05 | Globalfoundries Inc. | SRAM circuit with increased write margin |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US33694A (en) * | 1861-11-12 | Improved fan-blower | ||
| USRE33694E (en) * | 1984-07-26 | 1991-09-17 | Texas Instruments Incorporated | Dynamic memory array with segmented bit lines |
| JPH0799630B2 (ja) * | 1990-09-11 | 1995-10-25 | 株式会社東芝 | スタティック型半導体記憶装置 |
-
1996
- 1996-12-31 US US08/775,796 patent/US5898610A/en not_active Expired - Lifetime
-
1997
- 1997-12-11 KR KR1019997005947A patent/KR100343029B1/ko not_active IP Right Cessation
- 1997-12-11 AU AU55289/98A patent/AU5528998A/en not_active Abandoned
- 1997-12-11 IL IL13056397A patent/IL130563A/xx not_active IP Right Cessation
- 1997-12-11 JP JP53007998A patent/JP2001525098A/ja not_active Ceased
- 1997-12-11 WO PCT/US1997/023214 patent/WO1998029875A1/en active IP Right Grant
- 1997-12-26 TW TW086119800A patent/TW353180B/zh not_active IP Right Cessation