JP2001351971A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device that forms a layer of air between wiring for reducing parasitic capacitance between the wiring, and to provide its manufacturing method. SOLUTION: This manufacturing method of the semiconductor device includes a first process that forms an Al alloy film 3 on an insulating film 1, a second process that subjects the Al alloy film 3 to patterning for formation of lower- layer wirings 3a to 3c that are arranged opposite one another and is formed in an reverse tapered shape, a third process that forms an interlayer insulating film 5 on the lower-layer wirings 3a to 3c and the insulating film 1. In the third process, an air layer 6 is formed between the lower-layer wiring.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a wiring and a method for manufacturing the same. In particular, the present invention relates to a semiconductor device in which a parasitic capacitance between wirings is reduced by forming an air layer between wirings, and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 2 is a sectional view showing a conventional semiconductor device. First, an insulating film 101 is formed above a silicon substrate (not shown), and an Al alloy film is deposited on the insulating film 101 by a sputtering method. Next, by patterning the Al alloy film, lower wirings 103a to 103c are formed on the insulating film 101.

After that, an interlayer insulating film 105 made of a silicon oxide film is deposited on the lower wirings 103a to 103c and the insulating film 101 by a CVD (Chemical Vapor Deposition) method.
(Echanical Polishing) Flatten by polishing. next,
By depositing an Al alloy film on the interlayer insulating film 105 by a sputtering method and patterning the Al alloy film,
On the interlayer insulating film 105, upper wirings 107a and 107b are formed.

[0004]

In recent years, the parasitic capacitance between wirings has tended to increase due to the miniaturization of semiconductor elements and wirings. Specifically, due to the miniaturization of the wiring, the parasitic capacitance between the lower wiring 103a and the lower wiring 103b, the parasitic capacitance between the lower wiring 103a and the upper wiring 107a, and the parasitic capacitance between the lower wiring 103b and the upper wiring 107a shown in FIG. Have increased parasitic capacitance. Therefore, the parasitic capacitance between the wirings affects the operation speed of the element, and the parasitic capacitance between the wirings cannot be ignored for the improvement of the element speed.

In the conventional semiconductor device described above, the interlayer insulating film 105 made of a silicon oxide film is used. However, if an interlayer insulating film having a lower dielectric constant than the silicon oxide film is used, the parasitic capacitance between wirings can be reduced. is there. As a method of reducing such parasitic capacitance, it is generally considered to develop an oxide film material having a low dielectric constant to reduce the capacitance between wirings. It is difficult to reduce.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device in which an air layer is formed between wirings to reduce parasitic capacitance between wirings and a method of manufacturing the same. To provide.

[0007]

A semiconductor device according to the present invention comprises a first wiring formed on an insulating film, and a second wiring formed on the insulating film and opposed to the first wiring. Wiring, an interlayer insulating film formed on the first wiring, the second wiring and the insulating film, and an air layer formed between the first wiring and the second wiring. , Each of the first and second wirings has an inverted tapered shape.

In the method of manufacturing a semiconductor device according to the present invention, a first step of forming a wiring material film on an insulating film and, by patterning the wiring material film, are arranged to face each other and have an inverted tapered shape. A second step of forming first and second wirings; and a third step of forming an interlayer insulating film on the first and second wirings and the insulating film.
The process is characterized in that an air layer is formed between the first wiring and the second wiring.

According to the method of manufacturing a semiconductor device, since the first and second wirings arranged opposite to each other are formed so as to have an inversely tapered shape, the first and second wirings are formed at the same time when the interlayer insulating film is formed. An air layer can be formed between the first and second wirings. Since the air layer has a very low relative dielectric constant as compared with the interlayer insulating film, the parasitic capacitance between the wirings can be reduced.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIGS. 1 (a) to 1 (d)
FIG. 4 is a cross-sectional view showing the method for manufacturing the semiconductor device according to the embodiment of the present invention.

First, as shown in FIG. 1A, an insulating film 1 made of a silicon oxide film or the like is formed above a silicon substrate (not shown), and an Al alloy film 3 is formed on the insulating film 1 by sputtering. It is deposited by the method. Next, a resist pattern is formed on the Al alloy film 3 by applying a resist film on the Al alloy film 3 and exposing and developing the resist film.

Thereafter, as shown in FIG. 1B, by etching the Al alloy film 3 using the resist pattern 4 as a mask, lower tapered lower wirings 3a to 3c are formed on the insulating film 1. Is done. The inverted tapered shape is a shape in which the distance between the upper parts of the lower wiring is smaller than the distance between the lower parts of the lower wiring.

Next, after removing the resist pattern 4,
As shown in FIG. 1C, an interlayer insulating film 5 made of a silicon oxide film is deposited on the lower wirings 3a to 3c and the insulating film 1 by a plasma CVD method. At this time, the lower wirings 3a to 3a
Since 3c has an inversely tapered shape, an air layer (void) 6 is formed between the lower-layer wirings in the interlayer insulating film 5 to form a hollow wiring. Note that the interlayer insulating film 5 is preferably formed of an oxide film having poor coverage, and the deposition conditions at this time are preferably conditions under which the film forming speed is relatively high (conditions under which the throwing power is poor). Thereby, the air layer 6 is more easily formed in the interlayer insulating film 5.

Here, the condition of relatively high deposition rate is as follows.
Although it differs depending on the CVD apparatus to be used, generally, the flow rate of the gas used is increased, and the RF power at the time of film formation is increased.
Changing the temperature (raising or lowering the temperature depends on the device). After that, the interlayer insulating film 5 is
Flatten by P polishing.

Next, as shown in FIG. 1D, an Al alloy film is deposited on the interlayer insulating film 5 by a sputtering method.
The interlayer insulating film 5 is formed by patterning the
Upper wirings 7a and 7b are formed thereon.

According to the above embodiment, the lower wirings 3a to 3a
Since 3c is formed to have an inverted tapered shape,
When the interlayer insulating film 5 is deposited, the air layer 6 can be formed between the lower wirings. Since the air layer 6 has a very low relative permittivity as compared with the interlayer insulating film 5, the parasitic capacitance between the wirings can be drastically reduced. Thereby, a decrease in the operation speed of the element can be suppressed.

That is, assuming that the dielectric constant in a vacuum is ε0, the relative dielectric constant of the interlayer insulating film between the wirings is ε, the facing area between the wirings is S, and the distance between the wirings is d, The parasitic capacitance C between them is obtained by the following equation (1). C = (ε0 × ε × S) / d (1) From this equation (1), it can be seen that the parasitic capacitance between wirings can be reduced by lowering the dielectric constant of the interlayer insulating film. By forming the air layer 6 between the wirings, the relative dielectric constant of the interlayer insulating film can be reduced as compared with that of the related art (the relative dielectric constant of the interlayer insulating film made of a silicon oxide film). Specifically, the relative dielectric constant of the conventional silicon oxide film used as the interlayer insulating film is 4.0 or more, while the relative dielectric constant of the interlayer insulating film 5 including the air layer 6 according to the present embodiment. Is 1.5 or less. Therefore, the relative dielectric constant of the interlayer insulating film according to the present embodiment can be made half or less of that of the conventional interlayer insulating film. Therefore, parasitic capacitance between wirings can be reduced.

The present invention is not limited to the above embodiment, but can be implemented with various modifications.

[0019]

As described above, according to the present invention, the first and second wirings arranged opposite to each other are formed to have an inversely tapered shape. Therefore, an air layer can be formed between the wirings, whereby a semiconductor device with reduced parasitic capacitance between the wirings and a method for manufacturing the same can be provided.

[Brief description of the drawings]

FIGS. 1A to 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Insulating film 3 Al alloy film 3a-3c Lower wiring 4 Resist pattern 5 Interlayer insulating film 6 Air layer 7a, 7b Upper wiring 101 Insulating films 103a-103c Lower wiring 105 Interlayer insulating films 107a, 107b Upper wiring

Claims (2)

[Claims] A first wiring formed on the insulating film; a second wiring formed on the insulating film so as to face the first wiring; a first wiring, a second wiring; An interlayer insulating film formed on the wiring and the insulating film; and an air layer formed between the first wiring and the second wiring, wherein each of the first and second wirings has a reverse taper. A semiconductor device comprising a shape. 2. A first step of forming a wiring material film on an insulating film, and patterning the wiring material film to form first and second tapered oppositely disposed first and second layers.
A second step of forming an interconnect, and a third step of forming an interlayer insulating film on the first and second interconnects and the insulating film. In the third step, the first interconnect and the second interconnect are formed. A method of manufacturing a semiconductor device, wherein an air layer is formed between the wirings.