JP2001326267A - Semiconductor processing apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent defective chips from occurring due to the position deviation of through-holes for lift-up pins provided on an electrode plate or a semiconductor substrate. SOLUTION: Four lift-up pins 170 for supporting a semiconductor substrate 110 and through-holes 124 of an electrode plate 120 are provided in a range of approximately 2 mm from the peripheral edge of the semiconductor substrate 110. Hence, if a uniformity occurs in the processing condition of the semiconductor substrate 110 due to the influence of the through-holes 124, this influence can be brought about on a portion not used as a final semiconductor chip. The top end (support member 172) of the lift-up pin 170 in the embodiment has a sloped guide surface 172B having an aligning function of the semiconductor substrate 110 and hence the electrode plate 120 can be set at a correct position, if there is a fine position deviation of the semiconductor substrate 110 carried by a robot arm unit 130.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor processing apparatus for performing processing such as etching on a semiconductor substrate.

[0002]

2. Description of the Related Art Conventionally, as an apparatus for performing dry etching on a semiconductor substrate, one having a configuration as shown in FIG. 5 is known. This configuration is arranged in a vacuum chamber for performing dry etching, and includes a lift-up pin 20 for receiving a semiconductor substrate 10 put into the vacuum chamber by a robot arm or the like, and a semiconductor mounted by the lift-up pin 20. It has an electrode plate 30 for applying a voltage for etching to the substrate 10 and a lifting mechanism 40 for controlling lifting and lowering of the lift-up pins 20 with respect to the electrode plate 30. As shown in FIG. 6, the lift-up pins 20 are arranged at equal intervals (90 °) in the circumferential direction of the semiconductor substrate 10.
), And each of the semiconductor substrates 10
Are arranged on the inner peripheral side of about 20 mm from the outer peripheral edge portion.

The lift-up pins 20 protrude from the upper surface of the electrode plate 30 through through holes 32 provided in the electrode plate 30 and receive the semiconductor substrate 10 placed in a vacuum chamber by a robot arm or the like. As shown in FIG. 7A, the etching operation is performed in a state where the semiconductor substrate 10 is placed on the upper surface of the electrode plate 30. After the etching operation is completed, the lift-up pins 20 are raised by the lifting mechanism 40, receive the semiconductor substrate 10 again, and are taken out by a robot arm or the like. In addition, on the upper surface of the electrode plate 30,
A cover 34 is provided for surrounding a portion of the electrode plate 30 other than the semiconductor substrate 10.

[0004]

However, in the above-described conventional semiconductor processing apparatus, when etching is performed on the semiconductor substrate 10, a lift-up pin is provided on the lower surface of the semiconductor substrate 10 as shown in FIG. Since the etching operation is performed in a state where the through hole 32 of the electrode plate 30 through which the electrode 20 is inserted faces, the applied voltage is applied to a portion of the semiconductor substrate 10 directly contacting the electrode plate 30 and a portion corresponding to the through hole 32. As shown in FIG. 7B, there is a disadvantage that the thickness of the etched insulating film 12 becomes uneven, resulting in a defective chip. Further, in the above-described conventional semiconductor processing apparatus,
Semiconductor substrate 10 held by lift-up pins 20
In this case, the semiconductor substrate 10 rides on the cover 34, for example, as shown by a broken line 10A in FIG. 5, so that proper etching cannot be performed. There is a disadvantage that it causes.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor processing apparatus capable of preventing a defective chip from being generated due to a displacement of a through hole for a lift-up pin provided on an electrode plate or a semiconductor substrate.

[0006]

In order to achieve the above object, the present invention provides an electrode plate which is disposed in a semiconductor processing chamber and has a mounting surface on which a semiconductor substrate is mounted, and which is formed vertically on the electrode plate. A plurality of lift-up pins that are inserted into the through-holes and support the semiconductor substrate on the mounting surface, and the semiconductor substrate supported by the lift-up pins is mounted on the mounting surface by controlling the lift-up pins to move up and down. And a lift mechanism for placing the lift-up pin and the through-hole at positions corresponding to the outer peripheral edge of the semiconductor substrate, and at the upper end of the lift-up pin, in the center direction of the semiconductor substrate. The semiconductor device according to the present invention is characterized in that an inclined guide surface is provided which is gradually inclined downward to align the outer peripheral edge of the semiconductor substrate with the mounting surface.

In the semiconductor processing apparatus according to the present invention, the lift-up pin supports the outer peripheral edge of the semiconductor substrate from below, thereby mounting the semiconductor substrate on the mounting surface of the electrode plate.
Work on semiconductor substrates. Therefore, the through-hole of the electrode plate for inserting the lift-up pin is arranged at the outer peripheral edge of the semiconductor substrate, and even when the processing state of the semiconductor substrate is uneven due to the through-hole,
The effect occurs on the outer peripheral edge of the semiconductor substrate.
However, since the outer peripheral edge of the semiconductor substrate is an unstable part originally in a processed state, it is a part that is not used as a final semiconductor chip, and is often discarded.
The unevenness in the processing state generated in this portion does not affect the quality or yield of the final product at all. As a result, in the semiconductor processing apparatus of the present invention, a defective chip is not included in the final semiconductor chip due to the effect of the through-hole for the lift-up pin provided in the electrode plate, and the quality is more stable than the conventional semiconductor chip. And yield can be improved.

The upper end of the lift-up pin is provided with an inclined guide surface which is gradually inclined downward toward the center of the semiconductor substrate and aligns the outer peripheral edge of the semiconductor substrate with the mounting surface. When the semiconductor substrate is mounted on the mounting surface of the electrode plate by the lift-up pins, the semiconductor substrate can be mounted without positional deviation by the centering function of the inclined guide surface. Therefore, the occurrence of defective chips due to the displacement of the semiconductor substrate can be prevented, and the quality can be stabilized and the yield can be improved as compared with the related art.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor processing apparatus according to the present invention will be described below. FIG. 1 is a sectional view of an essential part showing an example in which a semiconductor processing apparatus according to the present invention is applied to a dry etching apparatus. FIG. 2 is a plan view showing an arrangement of a semiconductor substrate and lift-up pins in the dry etching apparatus shown in FIG. is there. FIG. 3 is a perspective view showing the shape of the tip of a lift-up pin in the dry etching apparatus shown in FIG. 1, and FIG. 4 is a schematic plan view showing the entire configuration of the dry etching apparatus shown in FIG.

First, the overall configuration of the dry etching apparatus in this embodiment will be described with reference to FIG. The dry etching apparatus includes an etching chamber 100A for performing dry etching, a robot chamber 100B for loading and unloading a wafer-like semiconductor substrate 110 into and from the etching chamber 100A, and a semiconductor substrate for each cassette in the dry etching apparatus. It has a cassette chamber 100C for storing and removing 110. Etching room 10
0A has a configuration as shown in FIG. 1 and performs a dry etching operation by setting a plurality of semiconductor substrates 110 on the electrode plate 120. The etching chamber 100
Details of A will be described later.

The robot room 100B has a robot arm device 130 and a centering device 140.
The robot arm device 130 takes out the semiconductor substrate 110 from the cassette chamber 100C and sets it on the lift-up pins 140 on the electrode plate 120 in the etching chamber 100A.
Further, the semiconductor substrate 110 supported by the lift-up pins 140 on the electrode plate 120 is taken out, and the cassette chamber 10 is taken out.
It returns to 0C. The centering device 140 is a robot arm device 130 holding the semiconductor substrate 110.
Is for centering the held semiconductor substrate 110. The cassette chamber 100C has a loader device 150 and an unloader device 160. The loader device 150 is used to load the semiconductor substrate 1 stored in a cassette.
10 to the robot arm device 130 in order, and the unloader device 160
The semiconductor substrates 110 conveyed by 0 are sequentially stored in a cassette.

Next, the configuration of the inside of the etching chamber of the dry etching apparatus in this embodiment will be described with reference to FIGS. The etching chamber 100A is constituted by a vacuum chamber for injecting an etching gas. Inside the chamber, an electrode plate 120 for applying an etching voltage to the semiconductor substrate 10 and a semiconductor It has a lift-up pin 170 for setting the substrate 110 and an elevating mechanism 180. As shown in FIG. 4, the electrode plate 120 is formed in a disk shape as a whole, and has a size on which a plurality of (eight in the illustrated example) semiconductor substrates 110 are placed at equal intervals in the circumferential direction. Have. The semiconductor substrate 1 mounted on the upper surface (mounting surface) of the electrode plate 120
A predetermined voltage is applied to 10. In this electrode plate 120, the position where each semiconductor substrate 110 is set is determined, and the area other than the set position is the cover 12.
2 is covered. In addition, as shown in FIG. 1, through-holes 124 for inserting the lift-up pins 170 are formed in the electrode plate 120 at positions corresponding to the positions where the lift-up pins 170 are provided.

Next, the lift-up pins 170 are inserted into the through holes 124 of the electrode plate 120, support the semiconductor substrate 110 on the upper surface of the electrode plate 120, and receive the semiconductor substrate 110 transferred from the robot arm device 130. Is placed on the mounting surface of the electrode plate 120, and the electrode plate 120
The semiconductor substrate 110 on the mounting surface is lifted up and down to be transferred to the robot arm device 130. The lift-up pin 170 of this example has a slightly thicker receiving member 172 attached to the upper end, and the semiconductor substrate 110 is supported by the receiving member 172. The elevating mechanism 180 performs an elevating operation of the lift-up pins 170. When the semiconductor substrate 110 is transferred to and from the robot arm device 130, the upper end of the lift-up pins 170 is connected to the electrode plate 1.
When the semiconductor substrate 110 is etched up and down to a predetermined position above the upper surface 20, the upper end of the lift-up pin 170 is moved down below the through-hole 124 of the electrode plate 120.

In the dry etching apparatus of the present embodiment, the arrangement of the lift-up pins 170
Is provided at a position corresponding to the outer peripheral edge portion. FIG. 2 shows an arrangement of the lift-up pins 170 with respect to the semiconductor substrate 110. As shown, in this example, the semiconductor substrate 110
Are supported by four lift-up pins 170, and the lift-up pins 170 are arranged at equal intervals of 90 ° in the circumferential direction of the semiconductor substrate 110. Each of the lift-up pins 170 is provided in a range of about 2 mm (the area shown by oblique lines in the figure) on the outer peripheral edge of the semiconductor substrate 110, and supports this portion from below. Therefore, the through-hole 124 of the electrode plate 120 through which the lift-up pin 170 is inserted is also arranged within a range of about 2 mm of the outer peripheral edge of the semiconductor substrate 110. Even if unevenness occurs in the processing state, the effect occurs in a range of about 2 mm on the outer peripheral edge of the semiconductor substrate 110.

However, in this embodiment, the semiconductor substrate 110
Since the outer peripheral portion is originally an unstable portion in a processed state, it is a portion that is not used as a final semiconductor chip and is discarded. That is, the inside of the dashed circle α in FIG. 2 is the semiconductor pattern forming portion.
Therefore, due to the influence of the through-hole 124, the unevenness of the processing state generated on the outer peripheral edge of the semiconductor substrate 110 has no effect on the quality or yield of the final product. Therefore, in this example, a defective chip is not included in the final semiconductor chip due to the influence of the through-hole 124 for the lift-up pin provided in the electrode plate 120, and the quality is stabilized and the step is improved. Can be improved.

Further, as shown in FIG. 3, the upper end (receiving member 172) of the lift-up pin 170 of this embodiment has a horizontal surface 17 for receiving the outer peripheral edge of the semiconductor substrate 110 from below.
2A and an inclined guide surface 172B continuously provided outside the horizontal plane 172A. The inclined guide surface 172 </ b> B gradually inclines downward toward the center of the semiconductor substrate 110, and aligns the outer peripheral edge of the semiconductor substrate 110 with the mounting surface of the electrode plate 120. Note that the horizontal plane 172A is formed with a diameter of 2 mm in the radial direction of the semiconductor substrate 110.
72B is larger than that and is formed with a diameter of about 5 mm in the radial direction of the semiconductor substrate 110.
It is possible to effectively cope with a displacement of 0. The semiconductor substrate 1 transferred by the robot arm device 130 by such an inclined guide surface 172B.
When the semiconductor substrate 11 is slightly misaligned,
Alignment can be performed on the inclined guide surface 172B by its own weight of 0, and the semiconductor substrate 110 can be set at an appropriate position. Therefore, the occurrence of defective chips due to the displacement of the semiconductor substrate 110 can be prevented, and the quality can be stabilized and the yield can be improved as compared with the related art.

Although the present invention has been described with reference to the case where the present invention is applied to a dry etching apparatus, the present invention can be applied to other semiconductor processing apparatuses. In addition, the processing target is not limited to the semiconductor substrate for the IC chip,
An FT substrate, a substrate for a CCD, or the like may be used.

[0018]

As described above, in the semiconductor processing apparatus according to the present invention, the lift-up pins for setting the semiconductor substrate on the electrode plate are arranged on the outer peripheral edge of the semiconductor substrate, and the lift-up pins are inserted. Hole for the electrode plate is arranged on the outer peripheral edge of the semiconductor substrate. Therefore, even if the processing state of the semiconductor substrate becomes uneven due to the through holes, the influence is limited to the outer peripheral edge of the semiconductor substrate which is not commercialized, and the final semiconductor chip is affected. Will not be. For this reason, the generation of defective chips due to the through holes in the electrode plate can be prevented, and the quality can be stabilized and the yield can be improved as compared with the related art.

Further, in the semiconductor processing apparatus according to the present invention, the upper end of the lift-up pin is gradually inclined downward toward the center of the semiconductor substrate so that the outer peripheral edge of the semiconductor substrate is aligned with the mounting surface. An inclined guide surface is provided, and when the semiconductor substrate is mounted on the mounting surface of the electrode plate by the lift-up pins, the semiconductor substrate can be mounted without displacement by the centering function of the inclined guide surface. For this reason, it is possible to prevent the occurrence of defective chips due to misalignment of the semiconductor substrate,
It is possible to stabilize the quality and improve the yield as compared with the related art.

[Brief description of the drawings]

FIG. 1 is a sectional view of a main part showing an example in which a semiconductor processing apparatus according to the present invention is applied to a dry etching apparatus.

FIG. 2 is a plan view showing an arrangement of a semiconductor substrate and lift-up pins in the dry etching apparatus shown in FIG.

FIG. 3 is a perspective view showing a shape of a tip of a lift-up pin in the dry etching apparatus shown in FIG. 1;

FIG. 4 is a schematic plan view showing the entire configuration of the dry etching apparatus shown in FIG.

FIG. 5 is a sectional view of a main part showing an example of a conventional dry etching apparatus.

6 is a plan view showing an arrangement of a semiconductor substrate and lift-up pins in the dry etching apparatus shown in FIG.

FIG. 7 is a cross-sectional view showing a state during etching by the dry etching apparatus shown in FIG. 5;

[Explanation of symbols]

100A: Etching room, 100B: Robot room,
100C: cassette chamber, 110: semiconductor substrate, 12
0: electrode plate, 122: cover, 124: through hole,
130 robot arm device, 140 centering device, 150 loader device, 160 unloader device, 170 lift-up pin, 172 receiving member, 172A horizontal surface, 172B inclined guide surface
180 ... Elevating mechanism.

Claims (5)

[Claims] An electrode plate disposed in a semiconductor processing chamber and having a mounting surface on which a semiconductor substrate is mounted, being inserted through a through hole formed in the electrode plate in a vertical direction;
A plurality of lift-up pins for supporting the semiconductor substrate on the mounting surface, and an elevating mechanism for mounting the semiconductor substrate supported by the lift-up pins on the mounting surface by controlling the lift-up pins to move up and down. The lift-up pins and the positions of the through holes are provided at positions corresponding to the outer peripheral edge of the semiconductor substrate, and the upper ends of the lift-up pins are gradually inclined downward toward the center of the semiconductor substrate. And a slant guide surface for aligning an outer peripheral portion of the semiconductor substrate with the mounting surface. 2. The semiconductor processing apparatus according to claim 1, wherein the apparatus is an apparatus for etching the semiconductor substrate. 3. The semiconductor processing apparatus according to claim 1, wherein said electrode plate applies a predetermined voltage to said semiconductor substrate. 4. An upper end of the lift-up pin has a horizontal surface for receiving an outer peripheral edge of the semiconductor substrate from below, and the inclined guide surface is formed outside the horizontal surface. Item 2. A semiconductor processing apparatus according to item 1. 5. The plurality of lift-up pins are arranged at equal intervals in a circumferential direction of the semiconductor substrate, and the inclined guide surfaces of the plurality of lift-up pins have a common inclination angle in a radial direction of the semiconductor substrate. The semiconductor processing apparatus according to claim 1, wherein the semiconductor processing apparatus is formed by forming.