JP2001309561A - Linking apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid an overcurrent which is applied to an inverter by the control failure of the inverter which is caused by aging change of a capacitance of a capacitor for smoothing an output of a solar battery in a linking apparatus. SOLUTION: When a maximum power following control unit 20a controls an inverter by a climbing method, changes of a current IC and a voltage VDC of a capacitor 6 are also detected, and the capacitance of the capacitor 6 is identified in accordance with an identification algorithm while the values of the current IC and the voltage VDC are used in a capacitance calculation unit 201. A command value i* is calculated by a command value generating unit 202 in accordance with power characteristics while referring to the change of the identified capacitance of the capacitor 6. A gate signal VG1 is generated by a PWM pulse generating unit 203 in accordance with the command value i*, and a gate signal vG2 obtained by amplifying the signal vG1 by an amplifier 21 controls respective switching devices in the inverter 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interconnection apparatus which always extracts maximum power from a DC power supply whose output power changes every moment and supplies the maximum power to a commercial frequency AC power supply or an AC load.

[0002]

2. Description of the Related Art At present, a power generation system using a solar cell is being developed, and researches for efficiently applying DC power generated from the solar cell to an AC load or an existing AC power system have been widely conducted.

FIG. 7 shows a conventional interconnection device. This interconnection device includes a solar cell 1, a commercial AC power supply 15, which is an existing power system, and a plurality of switching elements such as IGBTs, and an inverter 10 that converts DC power of the solar cell 1 into AC power and causes reverse power flow. And One end of a current transformer 4 is connected to a node 3 which is a negative electrode of the solar cell 1. The current transformer 4 is provided for detecting a current i _DC output from the solar cell 1. Note that the node 3 is supplied with the ground potential GND. In addition, solar cell 1
Node 2 which is the positive electrode of the current transformer and node 5 which is the other end of the current transformer 4
, The capacitor 6 and the voltage detector 9 are connected in parallel with each other. The capacitor 6 is provided for smoothing the voltage _VDC output from the solar cell 1, and the voltage detector 9 is provided for detecting the voltage _VDC .

[0004] Both input terminals of the inverter 10 are connected to a node 2 and a node 5, respectively. Further, one end of an inductor 17 is connected to a node 11 which is one output terminal of the inverter 10. Further, a capacitor 19 is connected between a node 16 which is the other end of the inductor 17 and a node 12 which is another output terminal of the inverter 10. The inductor 17 and the capacitor 19 constitute an LC circuit, and function as a filter for removing harmonics from the output voltage of the inverter 10. In addition, the voltage detector 18
Is connected in parallel with the capacitor 19, and one end of the current transformer 13 is connected to the node 12. And node 16
A commercial AC power supply 15 is connected between the other end of the current transformer 13 and a node 14. The current transformer 13 is used to detect a current i _AC flowing through the commercial AC power
8 for both ends such voltage v _AC detection of the commercial AC power source 15, are provided respectively.

In general, the output power characteristics of a solar cell change every moment depending on environmental conditions such as weather (insolation) and temperature. That is, the values of the output voltage and the output current when the output power is maximized vary depending on the environmental conditions. This is shown in FIG. Figure 8 is a also called characteristic diagram P-V characteristic, which represents the relationship between the output voltage of the solar cell v _DC and the output power _{P DC (= i DC × v} DC). The PV characteristic of the solar cell is a mountain-shaped graph as shown in FIG. Then, the portion at the top of the mountain in the graph is the maximum power point. For example, as shown in FIG. 8, there if P-V characteristic a C1 in environmental conditions the maximum power point at that time is P1, the output power P _DC 1 corresponding to the maximum power point P1 is at that time Maximum power. Further, in order to generate the output power P _DC1 in the solar cell, an external circuit connected to the solar cell is controlled so that the solar cell generates an output voltage v _DC1 corresponding to the maximum power point P1. Good.

Now, as time elapses, the PV characteristic becomes C
If it changes from 1 to C2, the maximum power point is also P1
Output voltage value corresponding to the maximum power point
Also v _DC1 to v_DCChanges to 2. In that case, the solar cell
In order to generate the maximum power, the output voltage of the solar cell must be
v_DCV not 1_DCExternal circuit must be controlled to be 2.
There is.

Therefore, in order to utilize the solar cell most effectively in the interconnection device, a maximum power tracking control function for controlling the output voltage or the output current of the solar cell so as to always output the maximum power is required.

In the case of the interconnection device shown in FIG. 7, it corresponds to an external circuit to be controlled by the inverter 10. Therefore, the switching elements included in the inverter 10 are optimally controlled to provide the commercial AC power supply 15 with an appropriate commercial AC frequency and commercial AC voltage, and the solar cell 1 corresponds to the maximum power point. It must output a voltage. For this purpose, a maximum power tracking control unit 20b is provided.

[0009] The detected voltage v _DC, v _AC, current i _DC, i
The information of each _AC value is stored in the maximum power tracking control unit 20b.
Is input to The maximum power tracking control unit 20b performs PWM (Pulse Width Mo) on the basis of these pieces of information in order to optimally control each switching element included in the inverter 10.
dulation) Generate a gate signal v _G 1 which is a pulse.
The gate signal v _G1 is amplified by the amplifier 21 and supplied to the inverter 10 as a gate signal v _G2 amplified to a pulse power sufficient to drive each switching element.

The maximum power follow-up controller 20b can be functionally divided into two parts as shown in FIG. That is, the maximum power tracking control unit 20b includes a PWM pulse generation unit 203 for generating the gate signal v _G1 in accordance with the phase and the voltage value of the commercial AC power supply 15, and a maximum power point for the PWM pulse generation unit 203. And a command value generation unit 204 for generating a command value i ^* for designating a pulse width and a pulse intensity suitable for the operation. Since the generation of the gate signal v _G 1 is necessary to know the phase and the voltage value of the power of the commercial AC power supply 15, the PWM pulse generating unit 203 information of the voltage v _AC and current i _AC input. Further, since the maximum power point of the solar cell 1 needs to be known to generate the command value i ^* , information on the voltage v _DC and the current i _DC is input to the command value generation unit 204. The command value generation unit 204 is a ROM
And a general CPU connected to a RAM and the like operates by a predetermined software program.

As a method of obtaining the maximum power point of the solar cell 1 in the command value generating section 204, for example,
The technique described in JP-A-160435, the well-known “hill-climbing method”, or the like may be used. The “hill-climbing method” means that the inverter 10 is first set so that the output voltage of the solar cell 1 has a lower value, and the output voltage is gradually increased by controlling the inverter 10 to change the output power of the solar cell 1. To generate a command value i ^* suitable for the maximum power point,
This is a control method that repeats such an operation periodically or when there is a change.

FIG. 10 shows, as an example, a block diagram in the case where the command value generation unit 204 employs the algorithm of the “hill climbing method”. That is, the value of the input voltage v _DC and the value of the current i _DC are multiplied to obtain the power P _DC (k) at a certain time t _k . Here, k is an integer indicating the sampling number of the voltage v _DC and the current i _DC , and P
_The physical quantity to which (k) such as _DC (k) is attached is the time t
_This shows the value of the physical quantity at _k .

[0013] Then, one sampling period before time t _k in the delay buffer 204a power P _DC (k-1)
Is stored, and the power P _DC (k) and the power P _DC (k
-1) is calculated. Then, the command value calculation unit 20
At 4b, it is determined whether the result is positive or negative. If the result is positive, the value of the power is increasing, and if the result is negative, the value of the power is decreasing. If the result is 0, it may be regarded as an increase, for example.

Then, the command value calculating section 204b determines the increase or decrease of the command value i ^* according to the increase or decrease of the electric power. That is, when the difference between the power P _DC (k) and the power P _DC (k-1) is positive or 0, the command value i ^* (k-1) output at the sampling time t _k-1 is increased. increase command value i to output current ^* a (k) i ^* by (k-1) in comparison with a (k) in the case which was, the command value i is output at sampling time ^{_{t k-1 * (k-}} 1 ) Is decreased, the command value i ^* (k) output this time is decreased by a (k) as compared with i ^* (k-1). On the other hand, when the difference between the power P _DC (k) and the power P _DC (k-1) is negative, the command value i ^* (k-1) output at the sampling time t _k-1 has been increased. If the decreases the command value i is output current ^* a (k) i ^* by (k-1) in comparison with a (k), the command value is output at sampling time t _k-1 i ^* a (k-1) If it has been decreased, the command value i ^* (k) output this time
Is increased by a (k) compared to i ^* (k-1). Finally, the command value i ^* is output as a value obtained by integrating these increase / decrease amounts over the entire section of the PV characteristic.

The output from the command value calculation unit 204b is
Is information that indicates either increase or decrease (for example, +1, -1)
The information is controlled by the amplifier 204c.
K _MIs multiplied by a constant. And this control gain K_MBut
Command value i^*Increase (or decrease) to (k) a (k)
Becomes This control gain K_MValue can be controlled optimally.
It is adjusted through trial and error for each interconnection device.

[0016]

In an interconnecting device as a photovoltaic power generation system, when the sunshine conditions and the like suddenly change and the maximum electric power that can be generated by the solar cell changes suddenly, a commercial AC power supply responds to the change. It is necessary to quickly control the power flowing backward.

When the power generated by the solar cell 1 fluctuates, a transient phenomenon occurs unless the reverse power flow power is carefully controlled, and an overcurrent may temporarily flow through the switching element in the inverter 10. Although transient, the temperature of the switching element suddenly rises due to the overcurrent, and the reliability of the element may be reduced, or in the worst case, the element may be damaged. Further, when the switching element turns on and off the overcurrent, a large spike voltage is generated, which may damage other devices connected around the switching element.

Now, since an internal resistance exists in the solar cell 1 and a capacitor 6 for smoothing the solar cell 1 is connected in the interconnection device, a so-called "first-order lag" in control theory. A phenomenon occurs. Therefore, the control program in the maximum power follow-up control unit 20b must be created in consideration of the "first-order lag element" depending on the magnitude of the capacitance value of the capacitor 6, and a countermeasure for this "first-order lag" phenomenon Is insufficient, an overcurrent flows through the switching element in the inverter 10. In conventional interconnection system, "first-order lag" by adjusting the value of the control gain K _M
The adverse effect on the control due to the phenomenon was suppressed.

The "first-order lag" phenomenon in the interconnection device mainly depends on the magnitude of the capacitance value of the capacitor 6, and the smaller the capacitance value, the more the "first-order lag" phenomenon is suppressed. On the other hand, since a large capacitance value is necessary to sufficiently smooth the output voltage of the solar cell 1, an electrolytic capacitor having a relatively large capacitance value is generally selected as the capacitor 6 among various capacitors.

However, as is well known, the capacitance value of an electrolytic capacitor is ± 50% of the nominal value even for the initial value.
There is a degree of error, and the capacitance value decreases to less than half of the initial value due to aging. Further, a phenomenon called “loss of capacity” in which the capacitance value is greatly reduced or “puncture” in which the capacitance value becomes 0 occurs with a very small probability.

[0021] In conventional interconnection device for the variation of the initial value of the capacitor 6, it can be addressed by first be closely regulated value of the control gain K _M, with respect to the aging of the capacitor 6 Te is conscious to keep the value of the control gain K _M optimally was not is made. Therefore, in the conventional interconnection device, when the change in the generated power of the solar cell 1 is generated, the switching element for the value of the control gain K _M is not optimal with respect to the aging of the capacitor 6 easy overcurrent flows Was.

As a countermeasure against this, it has been considered to extremely reduce the reverse power flow power so as not to generate an overcurrent at the time of a transient phenomenon. However, such a method generates a sufficient AC voltage at the time of the transient phenomenon, for example. There is also a possibility that the AC power supply 15 may be adversely affected without being operated.

Therefore, the present invention relates to an interconnecting device capable of preventing an overcurrent from flowing into the inverter due to a malfunction in the control of the inverter due to the aging of the capacitance value of the capacitor for smoothing the output of the solar cell. Is realized.

[0024]

According to a first aspect of the present invention, there is provided a DC power supply and a first DC power supply connected in parallel to the DC power supply.
A DC power output from the DC power supply and an inverter for converting the DC power to AC power, and a maximum power tracking control means for controlling the inverter so that the DC power is maximized, the maximum power tracking control The means is an interconnection device that detects a change in the capacitance value of the first capacitor and reflects the change in the capacitance value on control of the inverter.

According to a second aspect of the present invention, there is provided the interconnection apparatus according to the first aspect, wherein the DC power is converted into a different voltage value and applied to the inverter to supply the DC power. The interconnection device further includes a converter for transmitting, and converter control means for controlling a voltage output from the converter to be a predetermined value.

A third aspect of the present invention is the interconnection apparatus according to the second aspect, further comprising a second capacitor connected in parallel to an output side of the converter.

According to a fourth aspect of the present invention, there is provided the interconnection device according to any one of the first to third aspects, wherein the maximum power follow-up control means is configured to control a current flowing through the first capacitor and The voltage applied to the first capacitor is detected while being changed by the control of the inverter, and the capacitance of the first capacitor is detected based on an identification algorithm using the detected current and voltage values of the first capacitor. An interconnection device for detecting a change in the capacitance value of the first capacitor by identifying a value.

According to a fifth aspect of the present invention, there is provided the interconnection device according to the fourth aspect, wherein the maximum power follow-up control means controls the inverter by a hill-climbing method for electric power.

[0029]

<First Embodiment> FIG. 1 is a diagram showing an interconnection device according to a first embodiment of the present invention. FIG.
As shown in FIG. 7, this interconnection device includes a solar cell 1, a commercial AC power supply 15 which is an existing power system, and a plurality of switching elements such as IGBTs, similarly to the conventional interconnection device shown in FIG. An inverter 10 is provided for converting the DC power of the solar cell 1 into AC power and causing a reverse flow. FIG.
In the figure, the solar cell 1 is shown as a series connection of a variable voltage source 1a and its internal resistance 1b.

The node 3 which is the negative electrode of the solar cell 1
Is connected to one end of a current transformer 4 and is supplied with a ground potential GND. Further, a voltage detection unit 9 is connected between a node 2 which is a positive electrode of the solar cell 1 and a node 5 which is the other end of the current transformer 4.

Both input terminals of the inverter 10 are connected to the nodes 2 and 5, respectively. Further, one end of an inductor 17 is connected to a node 11 which is one output terminal of the inverter 10. Further, a capacitor 19 is connected between a node 16 which is the other end of the inductor 17 and a node 12 which is another output terminal of the inverter 10. The inductor 17 and the capacitor 19 constitute an LC circuit, and function as a filter for removing harmonics from the output voltage of the inverter 10. In addition, the voltage detector 18
Is connected in parallel with the capacitor 19, and one end of the current transformer 13 is connected to the node 12. And node 16
A commercial AC power supply 15 is connected between the other end of the current transformer 13 and a node 14.

On the other hand, in this interconnection device, unlike the conventional interconnection device shown in FIG. 7, one end of a capacitor 6 is connected to a node 5 and a current transformer 8 is connected to a node 7 which is the other end of the capacitor 6. Are connected at one end. The other end of the current transformer 8 is connected to the node 2. The capacitor 6 is provided for smoothing the voltage _VDC output from the solar cell 1 as in the prior art.
_Provided for _C detection. Note that this capacitor 6
And the internal resistance 1b of the solar cell 1 constitute a so-called CR circuit, which causes a "first-order lag" phenomenon in this interconnection device.

Further, a maximum power tracking control unit 2 for optimally controlling each switching element included in the inverter 10
The configuration of Oa is also different from the conventional maximum power tracking control unit 20b.

The detected voltage v_DC, V_AC, Current i_DC, I
_AC, I_CThe information of each value of
20a. In the maximum power tracking control unit 20a,
Based on these information, each switch included in the inverter 10 is
In order to optimally control the switching element, a PWM pulse
Gate signal v_GGenerate 1 Note that the gate signal v _G1
Is amplified by the amplifier 21 and drives each switching element.
Gate signal v amplified to sufficient pulse power to operate
_G2 is given to the inverter 10.

The maximum power follow-up control unit 20a is shown in FIG.
Thus, it can be functionally separated into three parts. Sand
That is, the maximum power tracking control unit 20a outputs the gate signal v_GExchange 1
PW to generate according to the phase and voltage value of the power supply
M pulse generator 203 and PWM pulse generator 203
Command value i specifying the pulse width suitable for the maximum power point
^*Command value generating section 202 for generating
And a capacitance value calculating unit 201 for calculating the capacitance value of the capacitor 6.
You. Gate signal v_GThe power of the commercial AC power supply 15
It is necessary to know the phase and voltage value of
The voltage v_ACAnd current i_ACInformation is entered
It is. Also, the command value i^*To produce a solar cell
Since it is necessary to know the maximum power point 1, the command value generation unit 2
02 has the voltage v_DCAnd current i_DCInformation is input.
In order to calculate the capacitance value of the capacitor 6, the capacitor
The current flowing through the capacitor 6 and the voltage applied to the capacitor 6
Voltage information is needed, so that the
Pressure v_DCAnd current i_CInformation is input. The capacity
The value calculation unit 201 and the command value generation unit 202
And a general CPU connected to RAM, etc.
Operated by a fixed software program.

As a method for obtaining the maximum power point of the solar cell 1 in the command value generation section 202, the "hill climbing method" is employed as an example in the present embodiment. In addition, in the capacitance value calculating unit 201, an identification algorithm for calculating the capacitance value of the capacitor 6 is used. Here, the identification algorithm is an identification method in control theory that uses a model based on an error equation to identify an unknown parameter in the control system. If this identification algorithm is used, an approximate value of the true value of the unknown parameter can be obtained by sequentially calculating the unknown parameter from a model based on the error equation in accordance with the temporal change of the parameter of the control target.

FIG. 2 shows an LMS (Least Mean Square) which is often adopted as an example of an identification algorithm in which the command value generation unit 202 adopts the algorithm of the “hill climbing method”.
The block diagram in the case where the capacity value calculation unit 201 employs the algorithm is shown. (For the LMS algorithm, Shinji Shinnaka, "Adaptive Algorithm: An Approach to Discrete, Continuous, and Essence", 1990, Sangyo Tosho Co., Ltd. Issue, p. 93).

Here, assuming that the capacitance value of the capacitor 6 is C, the current i _C flowing through the capacitor 6 and the applied voltage v
The relationship with _DC is expressed as follows from the circuit equation.

[0039]

(Equation 1)

Equation 1 is expressed as follows by a difference equation.

[0041]

(Equation 2)

In equation (2), k is the voltage v _DC and the current i
_{C is} the sampling number, Δt is the sampling period,
Shown respectively. Note that the physical quantity v _DC (k), etc. (k) is attached, shows the value of the physical quantity at the time t _k.

The capacitance value C can be obtained by applying the data of the voltage v _DC and the current i _C at each sampling time by modifying equation (2). However, in Equation 2, when calculating the value of the capacitance value C, v
_Since a term obtained by dividing the difference between _DC (k) and v _DC (k-1) by the sampling period Δt, that is, a term of the time derivative appears, the model is easily affected by noise.

Therefore, a model of the LMS algorithm is adopted. This model is set as follows.

[0045]

(Equation 3)

[0046]

(Equation 4)

Equation 3 is based on Equation 2 and is 1 from time t _k.
It was calculated using the capacitance value of the capacitor 6 identified at time t _k-1 of the previous sampling period C ^* (k-1), were expressed voltage data v _DC for computational ^* (k) at time t _k Things. Note that the right side of Equation 3 is v _DC of Equation 4
^* Substituted in (k).

Equation 4 shows that the parameters v _DC (k) and i _{C are used} as unknown parameters to identify 1 / C ^* (k).
This is a model in which it is guaranteed that the unknown parameter sequentially converges to the true value when (k) is changed over time. Note that the gain K in Equation 4 is a factor that affects the speed of convergence and the like, and is actually adjusted through trial and error.

Using such a model, v _DC (k)
The unknown parameter 1 / C ^* (k) can be identified without dividing the difference between V _DC and v _DC (k−1) by the sampling period Δt, that is, without performing time differentiation, and the high-level noise is less affected by noise. Accurate detection can be performed.

FIG. 2 is a block diagram of the capacitance value calculation unit 201 that implements the above equations (3) and (4). In FIG. 2, 201 a to 201 c is the delay buffer either, and stores input data and outputs data in one sampling period before time t _k-1 to time t _k.

First, the electric power input to the capacitance
Pressure v_DCAnd current i_CAt time t_kSmell
Voltage data v_DC(K) and current data i_C(K) and
Is processed. Also, the voltage v_DCAnd current i_CInformation
Are input to the delay buffers 201b and 201c, respectively.
From the delay buffers 201b and 201c.
Data v_DC(K-1) and current data i_C(K-1)
Is output. Current data i_C(K-1) is the time t_k-1
1 / C calculated as unknown parameter in ^*(K
-1) and a sampling period Δ in which information is input in advance
multiplied by t. And their product and voltage data v
_DCThe sum with (k-1) is calculated and the time t_kTotal in
Arithmetic voltage data v_DC ^*(K) is required. So far
Is a process that realizes the equation (3).

Next, the difference between the calculated voltage data v _DC ^* (k) and the actually measured voltage data v _DC (k) is calculated, and the result, current data i _C (k) and information are input in advance. Is multiplied by the gain K. Then, the sum of their product and the unknown parameter 1 / C ^* (k-1) is calculated,
Unknown parameters 1 / C ^* (k) is calculated at time t _k. The process up to this point implements Equation 4. The calculated unknown parameter 1 / C ^* (k) is output to the command value generation unit 202 and the delay buffer 20
1c is also input.

The unknown parameter 1 / C ^* (k-1)
Is the reciprocal of the initial value C of the capacitor 6, and is stored in the delay buffer 201c in advance. Further, the voltage data v _DC (k-1) and the current data i _C (k-1)
May be set to 0, for example.

In the capacitance value calculation unit 201 that has realized the LMS algorithm as described above, the unknown parameter 1 / C ^* (k) is sequentially calculated according to the temporal change of the input information of the voltage v _DC and the current i _C. And approach the true value.

In order to perform approximation by such calculation, it is desirable that there is a temporal change in the information of the input voltage v _DC and the current i _C. As described above, the current is liable to change and is suitable for such an identification algorithm.

As in the hill-climbing method, the output voltage and output current of the solar cell 1 are detected while being changed to obtain a power characteristic, a command value is calculated based on the power characteristic, and an inverter is calculated based on the calculated command value. Is also suitable for such an identification algorithm because the output voltage and the output current of the solar cell 1 necessarily change. It is not necessary to change the output voltage and the output current of the solar cell 1 only for identifying the capacitance value of the capacitor 6, but only to detect the output voltage and the output current of the solar cell 1 which necessarily change with the control. Because it is good.

When the hill-climbing method is used, the sampling period Δt can be shortened, or the output voltage of the solar cell 1 can be largely changed to widen the sampling range. Therefore, in the identification algorithm, the number of acquisitions and the acquisition range of data can be increased, the capacitance value of the capacitor 6 is more likely to converge to a true value, and the capacitance value of the capacitor 6 can be identified more accurately.

Now, the command value generator 202 in FIG.
Is a block diagram showing the correction of the hill-climbing method control gain K _M. In FIG. 2, 202a, 202e,
202g Both the delay buffer, stores the input data, the time t _k than one sampling period before time t
Output the data at _k-1 . First, similarly to the command value generator 204 shown in FIG. 10, is multiplied value of the voltage v _DC and the current i _DC input The power P _DC at time t _k
(K) is required. Then, the sampling cycle prior to time t _k in the delay buffer 202a power P
Information on the value of _DC (k-1) is stored, and the difference between the power _PDC (k) and the power _PDC (k-1) is calculated. Then, the command value calculation unit 202b determines whether the result is positive or negative. If the result is positive, the value of the power is increasing, and if the result is negative, the value of the power is decreasing. If the result is 0, it is regarded as, for example, an increase.

Then, the command value calculation unit 202b determines the increase or decrease of the command value i ^* according to the increase or decrease of the electric power. That is, when the difference between the power P _DC (k) and the power P _DC (k-1) is positive or 0, the command value i ^* (k-1) output at the sampling time t _k-1 is increased. increase command value i to output current ^* a (k) i ^* by (k-1) in comparison with a (k) in the case which was, the command value i is output at sampling time ^{_{t k-1 * (k-}} 1 ) Is decreased, the command value i ^* (k) output this time is decreased by a (k) as compared with i ^* (k-1). On the other hand, when the difference between the power P _DC (k) and the power P _DC (k-1) is negative, the command value i ^* (k-1) output at the sampling time t _k-1 has been increased. If the decreases the command value i is output current ^* a (k) i ^* by (k-1) in comparison with a (k), the command value is output at sampling time t _k-1 i ^* a (k-1) If it has been decreased, the command value i ^* (k) output this time
Is increased by a (k) compared to i ^* (k-1). Finally, the command value i ^* is output as a value obtained by integrating these increase / decrease amounts over the entire section of the PV characteristic.

The output from the command value calculation unit 202b is
Is information that indicates either increase or decrease (for example, +1, -1)
The information is controlled by the amplifier 202c.
K _MIs multiplied by a constant. This control gain K_MThe value of
After trial and error for each interconnection device,
It is set.

Further, the command value generating section 202 differs from the command value generating section 204 in the conventional interconnection device in that the identified capacitance value C ^* (k) of the capacitor 6 is a predetermined value b compared to the initial value C. If the control gain K _M is larger than C / C,
^* Weighting is performed only by (k), and the value is calculated as increase (or decrease) a (k). Such weighting is performed in consideration of the fact that, for example, when the capacitance value of the capacitor 6 decreases due to aging, the time constant decreases, and accordingly, the transient response needs to be accelerated.

On the other hand, the capacitance value C of the identified capacitor 6
^* If (k) is not changed as the predetermined value b than the initial value C is similar to conventional without considering the change in the capacitance of the capacitor 6, it increases the value of the control gain K _M Calculate as minute (or decrease) a (k).

In FIG. 2, command value calculating section 202b,
An amplifier 202c, switches 202d and 202f and delay buffers 202e and 202g represent these operations. That is, the command value calculation unit 202b obtains the reciprocal 1 / C ^* (k) of the capacitance value of the capacitor 6 identified in the capacitance value calculation unit 201, calculates the capacitance value C ^* (k), and inputs the value in advance. Initial value C and capacitance value C using the initial value C
^* Calculate the difference from (k). Then, it is determined whether or not the absolute value of the difference is larger than a predetermined value b input in advance. If it is larger, the switch 202d is turned on in FIG. 2 and the switch 202f is turned on in the direction shown in FIG. Give instructions to do. On the other hand, if the absolute value of the difference is smaller than the predetermined value b, the switch 202d in FIG.
Gives a command to turn on the switch 202f in the direction shown in the figure.

When the absolute value of the difference between the initial value C and the capacitance value C ^* (k) is larger than the predetermined value b, the control gain K _M (k) output from the amplifier 202c is weighted as described above. ,

[0065]

(Equation 5)

Is obtained. And the value of this K _M (k) is
The increase (or decrease) a (k) is set. On the other hand, if the absolute value of the difference is smaller than the predetermined value b, the value is directly increment of control gain K _M (or decrease) are a (k).

Then, the increase (or decrease) a (k)
Is a command value i ^* (k) output from the delay buffer 202e.
-1) is added. And P as the command value i ^* (k)
WM pulse generation circuit 203 and delay buffer 202e
Is input to The increase (or decrease) a (k)
Is also input to the delay buffer 202g, and the delay buffer 2
From 02g, the increase (or decrease) a (k-1) one sampling cycle before is output to the command value calculation unit 202b. Then, in the command value calculation unit 202b, the power P
_DC whether (k) is increased compared to the previous power P _DC (k-1), and the last increment (or decrement) a (k
A value of +1 or -1 is output to the amplifier 202c depending on whether -1) is an increase or a decrease.

FIG. 3 is a flowchart summarizing the processes from the sampling of data at a certain time t _k to the storage of the data of the capacitance value in the processes described above. When the hill-climbing algorithm (interrupt processing) starts (step ST0), first, the currents i _DC (k) and i _C (k)
And the voltage v _DC (k) are detected (step ST
1). Then, in order to calculate the capacitance value in the capacitance value calculation unit 201, calculation of the calculated voltage data v _DC ^* (k) is performed (step ST2). Then, the calculated voltage data v _DC ^* (k) and the actually measured voltage data v
_{From DC} (k) and the like, the reciprocal of the capacitance value, which is an unknown parameter, is 1 /
C ^* (k) is calculated (step ST3).

Next, the command value generating section 202, the control gain K whether _M it is necessary to perform correction, i.e., the initial value C and the capacitance value C ^* (k) and the difference is the predetermined value b of the capacitor 6 Is determined (step ST
4), the greater performs weighting of C / C ^* (k) to the control gain K _M (step ST5a), and if smaller outputs the control gain K _M as K _M (k) as it is (step ST5b) .

Then, in the command value generator 202,

[0071]

(Equation 6)

[0072] calculation of the power P _DC at the time t _{k (k)} is performed as (step ST6). The difference between the values of the previous power P _DC power P _DC (k) at the time t _{k (k-1)} is positive or zero (step ST7), the command outputted at the sampling time t _k-1 The value i ^* (k−
If 1) is increased by a (k-1) (step ST8a), the command value i ^* (k) output this time is increased by a (k) compared to i ^* (k-1). (Step ST9a), and the command value i ^* (k-1) output at the sampling time t _k-1 is reduced (step ST9a).
Command value to output this time in the case 8a) i ^* a (k) i ^* (k
-1) is reduced by a (k) (step ST9)
b). On the other hand, when the difference between the power P _DC (k) and the power P _DC (k-1) is negative (step ST7), the command value i ^* (k-1) output at the sampling time t _k-1 is calculated. If it has been increased (step ST8b), the command value i ^* (k) output this time is decreased by a (k) compared to i ^* (k-1) (step ST9d), and the sampling time t _k-1
If the command value i ^* (k-1) output in step (1) is decreased (step ST8b), the command value i output this time
^* (K) is increased by a (k) compared to i ^* (k-1) (step ST9c). That is, the command value i
^* (K)

[0073]

(Equation 7)

Is calculated (step ST10).

Then, the reciprocal of the calculated capacitance value 1 / C ^*
(K) is stored in the delay buffer 201c, and the next time t
_{It is used as k + 1} or an initial value for calculating a capacity value at the next control (step ST11). Thus, a series of interrupt processing ends (step ST12).

When the linking device according to the present embodiment is used, the maximum power follow-up control section 20a detects a change in the capacitance value of the capacitor 6 and reflects the change in the capacitance value in the control of the inverter 10, so that the , The control of the inverter 10 may be out of order due to the change in the capacitance value, and an overcurrent can be prevented from flowing through the inverter 10. Further, the maximum power following control unit 20a detects the current i
_Since the change of the capacitor 6 is detected by identifying the capacitance value C ^* (k) of the capacitor 6 based on the identification algorithm using the values of _C and the voltage v _DC , the circuit equation is solved to determine the capacitance value of the capacitor 6. Compared with the case of obtaining, high-accuracy detection with less influence of noise can be performed.

Further, when the maximum power tracking control unit 20a detects the current i _C flowing through the capacitor 6 and the voltage v _DC applied to the capacitor 6 while changing them, the power characteristics of the DC power of the solar cell 1 are further changed. The command value i ^* is calculated based on the power characteristic while reflecting the change in the capacitance value of the capacitor 6 and the inverter 10 is controlled by the command value i ^* . Control and control can be performed simultaneously. Further, since the hill-climbing method is used, the sampling period Δt can be shortened,
Can be greatly changed to widen the sampling range. Therefore, the capacitance value of the capacitor 6 easily converges to the true value in the identification algorithm, and the capacitance value of the capacitor 6 can be identified with higher accuracy.

<Second Embodiment> FIG. 4 is a diagram showing an interconnection device according to a second embodiment of the present invention. In FIG. 4, elements having the same functions as those in the first embodiment are denoted by the same reference numerals. As shown in FIG. 4, the interconnection device of this embodiment is different from the interconnection device of the first embodiment in that a converter 22 including a step-up / step-down chopper, a capacitor 24 for smoothing the output of the converter 22, Voltage detection unit 2 for detecting the output voltage v _C
6 and a converter control unit 27 for controlling a switching element of the converter 22 is added between the inverter 10 and the capacitor 6. That is, both input terminals of converter 22 are connected to node 2 and node 5 respectively.
It is connected to the. Nodes 23 and 25, which are both output terminals of converter 22, are connected to both input terminals of inverter 10, respectively. Further, between the node 23 and the node 25, the capacitor 24 and the voltage detection unit 26 are connected in parallel with each other. Then, the output voltage v _C detected by the voltage detection unit 26 is input to the converter control unit 27. Further, information on the voltage to be output from the converter 22 is also input to the converter control unit 27 as the reference value v _REF . Then, the converter control unit 27
A gate signal v _G3 for controlling a switching element included in converter 22 is output to converter 22.

The other configuration is the same as that of the interconnecting device according to the first embodiment, and the description is omitted.

In the interconnection device having the above configuration, the converter 22
Is output by the converter control unit 27 so that the output voltage v _C of the converter 22 maintains the voltage value designated by the reference value v _REF , and the output voltage v
_C has a constant value.

As described above, since the converter 22 fixes the fluctuating output voltage of the solar cell 1 to a constant value, the inverter 10 does not need to adjust the output voltage of the solar cell 1 and takes into account the aging of the capacitor 6. It is easy to adjust the AC power.

Therefore, if the linking device according to the present embodiment is used, converter 22 and converter control means 2
7, the voltage generated by the solar cell 1 is converted into a predetermined value and supplied to the inverter 10. Therefore, even when the voltage generated by the solar cell 1 tends to fluctuate, the inverter 10 needs to adjust the voltage. Instead, it is only necessary to adjust the AC power that causes the reverse flow. Therefore, inverter 1
0 performance can be sufficiently exhibited. Further, since the capacitor 24 is connected in parallel to the output side of the converter 22, the voltage output from the converter can be smoothed.

<Third Embodiment> FIG. 5 is a diagram showing an interconnection device according to a third embodiment of the present invention. In FIG. 5, the same reference numerals are given to elements having the same functions as in the first embodiment. As shown in FIG. 5, the interconnection device of this embodiment is obtained by adding an AC load 28 between the node 16 and the node 14 to the interconnection device of the first embodiment. When the AC load 28 is connected in parallel to the commercial AC power supply 15 in this manner, AC power can be applied not only to the reverse flow of the commercial AC power supply 15 but also to the AC load 28.

The other configuration is the same as that of the interconnection device according to the first embodiment, and the description is omitted.

When the linking device according to the present embodiment is used, the AC load 28 is connected in parallel to the commercial AC power supply 15, so that the AC power converted from the DC power output from the solar cell 1 is 15 as well as to the AC load 28.

In the interconnection device according to the second embodiment, the AC load 28 may be connected in parallel to the commercial AC power supply 15 as in the present embodiment.

<Fourth Embodiment> FIG. 6 is a diagram showing an interconnection device according to a fourth embodiment of the present invention. In FIG. 6, elements having the same functions as those in the first embodiment are denoted by the same reference numerals. The interconnection device of this embodiment uses another DC power supply 29 instead of using the solar cell 1. Note that, as shown in FIG.
Has an internal resistance 30.

The other configuration is the same as that of the interconnection device according to the first embodiment, and the description is omitted.

For example, when another DC power supply such as a fuel cell is used, the same maximum power follow-up control function as in the case of a solar cell is required. Even in such a case, a problem of aging of the smoothing capacitor may occur, and the present invention is effective.

[0090]

According to the first aspect of the present invention, the maximum power follow-up control means detects a change in the capacitance value of the first capacitor and reflects the change in the capacitance value on the control of the inverter. It is possible to prevent the control of the inverter from being malfunctioned due to the change in the capacitance value of the capacitor, thereby preventing the overcurrent from flowing through the inverter.

According to the second aspect of the present invention, the voltage generated by the DC power supply is converted into a predetermined value by the converter and the converter control means and supplied to the inverter from the DC power supply. Even if it is easy to fluctuate, the inverter does not need to adjust the voltage, and it becomes easy to adjust the AC power reflecting the change in the capacitance value of the first capacitor.

According to the third aspect of the present invention, since the second capacitor is connected in parallel to the output side of the converter, the voltage output from the converter can be smoothed.
The effect of the invention described in (1) can be enhanced.

According to the fourth aspect of the present invention, the maximum power follow-up control means uses the detected current and voltage values of the first capacitor based on the identification algorithm based on the identification algorithm.
Since the change in the first capacitor is detected by identifying the capacitance value of the first capacitor, high-precision detection with less influence of noise can be performed as compared with the case where the capacitance value of the first capacitor is obtained by solving a circuit equation. .

According to the fifth aspect of the present invention, since the maximum power follow-up control means controls the inverter by the hill-climbing method, it is possible to shorten the sampling period and widen the sampling range. Can be identified with higher accuracy.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an interconnection device according to a first embodiment of the present invention;

FIG. 2 is a diagram illustrating a capacity value calculation unit 201 and a command value generation unit 202 of the interconnection device according to the first embodiment of the present invention;

FIG. 3 is a flowchart showing an operation in the interconnection device according to the first embodiment of the present invention;

FIG. 4 is a diagram illustrating an interconnection device according to a second embodiment of the present invention;

FIG. 5 is a diagram illustrating an interconnection device according to a third embodiment of the present invention;

FIG. 6 is a diagram illustrating an interconnection device according to a fourth embodiment of the present invention;

FIG. 7 is a diagram showing a conventional interconnection device.

FIG. 8 is a diagram showing PV characteristics of a solar cell.

FIG. 9 shows a PWM pulse generator 203 of a conventional interconnection device.
FIG. 3 is a diagram showing a command value generation unit 204;

FIG. 10 is a diagram showing a command value generation unit 204 of a conventional interconnection device.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 solar cell, 6, 19, 24 capacitor, 10 inverter, 15 commercial AC power supply, 20 a, 20 b maximum power tracking control section, 201 capacity value calculation section, 202, 20
4 Command value generator, 203 PWM pulse generator, 22
Converter, 27 Converter control unit, 28 AC load, 29 DC power supply.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Nobuyuki Kasa 3-8 Paltail Mulberry Tree 3-8 Tsushimahonmachi, Okayama City, Okayama Prefecture F-term (Reference) 5G066 HA10 HA13 HB06 5H007 BB07 CA01 CC12 DA04 DA06 DC02 DC03 DC05 EA02 FA03 FA13 5H420 BB03 BB13 BB14 CC03 DD03 EA10 EA47 EB09 EB37 EB39 FF03 FF04 FF05 FF22 FF25 LL05

Claims (5)

[Claims] A DC power supply; a first capacitor connected in parallel to the DC power supply; an inverter for receiving DC power output from the DC power supply and converting the DC power into AC power; Maximum power tracking control means for controlling the inverter, wherein the maximum power tracking control means detects a change in the capacitance value of the first capacitor and reflects the change in the capacitance value in the control of the inverter. System equipment. 2. The interconnection device according to claim 1, wherein the converter converts the voltage generated by the DC power supply into a different voltage value and supplies the converted voltage value to the inverter, thereby transmitting the DC power, and the converter. And a converter control means for controlling the voltage output from the control unit to a predetermined value. 3. The interconnection device according to claim 2, further comprising a second capacitor connected in parallel to an output side of the converter. 4. The interconnection device according to claim 1, wherein the maximum power follow-up control unit is configured to apply a current flowing through the first capacitor and a current applied to the first capacitor. Voltage while changing the voltage by controlling the inverter,
Interconnection for detecting a change in the capacitance value of the first capacitor by identifying the capacitance value of the first capacitor based on an identification algorithm using the detected current and voltage values of the first capacitor apparatus. 5. The interconnection device according to claim 4, wherein the maximum power following control means controls the inverter by a hill-climbing method with respect to power.