JP2001308309A - Solid-state image pickup element and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image pickup element that can extend the area rate of a light reception region in a unit pixel area, and a manufacturing method of the solid-state image pickup element. SOLUTION: A trench 14 is provided at the surface side of a substrate 11, a light reception region 17 is provided at the bottom part of the trench 14, and a charge transfer region 25 is provided on the side wall of the trench 14. The charge transfer region 25 is composed of an N-type diffusion layer 26 that is formed in the side-wall surface layer of the trench, a side-wall-like transfer electrode 27 that is formed along the side wall of the trench, and an insulating film 23 that is provided between the N-type diffusion layer 26 and the transfer electrode 27. A read region 20 using the transfer electrode 27 as a read electrode is provided between the charge transfer and light reception regions 27 and 17.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device and a method of manufacturing the same, and more particularly, to a solid-state imaging device capable of improving the aperture ratio of a light receiving region and a method of manufacturing the same.

[0002]

2. Description of the Related Art FIG. 6 is a sectional structural view showing an example of an interline transfer type solid-state imaging device, and shows a cross section perpendicular to a charge transfer direction in a pixel region of the solid-state imaging device. In the solid-state imaging device shown in FIG. 1, a plurality of pixels 2 are arranged on the surface side of a substrate 1, and an element isolation region 3 is arranged between the pixels 2 arranged in a direction perpendicular to the charge transfer direction. Have been. Each pixel 2 is provided with a photoelectric conversion / charge storage region (hereinafter referred to as a light receiving region) 4 for converting incident light into electrons and storing the electrons, and a reading region of a MOS structure adjacent to each light receiving region 4. 5 are provided. Further, the charge transfer region 6 is adjacent to the readout region 5.
The light shielding film 7 is provided so as to cover the charge transfer region 6 and open the light receiving region 4.

Here, when the charges read from the light receiving region 4 are electrons, the element isolation region 3 is formed of a P-type diffusion layer formed on the surface side of the substrate 1, and the light receiving region 4 is provided on the surface layer of the substrate 1. The photodiode is composed of the P-type diffusion layer 4a and the N-type diffusion layer 4b under the P-type diffusion layer 4a.
Further, the readout region 5 is formed of the N-type diffusion layer 5
a and a readout electrode 9 provided thereon with an insulating film 8 interposed therebetween. Further, the charge transfer region 6
An N-type diffusion layer 6a as a surface layer of the substrate 1, and a transfer electrode 9 provided thereon with an insulating film 7 interposed therebetween;
As shown, the read electrode 9 and the transfer electrode 9 may be formed integrally.

[0004] In the solid-state imaging device configured as described above,
The charge that has been photoelectrically converted and accumulated in the light receiving region 4 is read out to the N-type diffusion layer 6a of the charge transfer region 6 via the N-type diffusion layer 5a of the read-out region 5 by applying a voltage to the transfer electrode 9, Further, by sequentially applying a voltage to the readout electrodes 9 arranged in the charge transfer direction, the data is transferred to the outside of the pixel region.

[0005]

In recent years, the number of pixels in a solid-state imaging device has been increased, and accordingly, the unit pixel area tends to be reduced. However, in the solid-state imaging device having the configuration shown in FIG. 6, the element isolation region 3, the light receiving region 4, the readout region 5, and the charge transfer region 6 are arranged in a plane. Area 4
Is also reduced. Therefore, when further increasing the number of pixels in the same pixel region area, the sensitivity (output with respect to the overall incident light amount) decreases due to the decrease in the incident light amount, and the saturation output (maximum charge accumulation amount) due to the decrease in the storable charge amount. ) Cannot be avoided.

Accordingly, the present invention provides a solid-state image sensor capable of increasing the area ratio of the light receiving region to the unit pixel area, thereby improving the sensitivity and the maximum charge storage amount, and a method of manufacturing the same. The purpose is to provide.

[0007]

According to the present invention, there is provided a solid-state imaging device having a charge transfer region arranged beside a light receiving region provided on a front surface side of a substrate. A light receiving region is provided at the bottom of a trench formed on the front surface side, and a charge transfer region is provided on a side wall of the trench.

In the solid-state imaging device having such a configuration, the charge transfer region on the side wall of the trench is three-dimensionally arranged with respect to the light receiving region at the bottom of the trench. For this reason, the arrangement area of the charge transfer region in plan view is reduced,
The aperture ratio of the light receiving region in the unit pixel is enlarged.

In the case of manufacturing a solid-state image pickup device having such a structure, a trench is formed on the front surface side of a semiconductor substrate, and a sidewall-shaped transfer electrode also serving as a readout electrode is provided with an insulating film on a side wall of the trench. The light receiving region is formed at the bottom of the trench exposed from the transfer electrode.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a solid-state imaging device according to the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view showing one embodiment of a solid-state imaging device according to the present invention, and shows a cross section perpendicular to a charge transfer direction in a pixel region of an interline transfer type solid-state imaging device. Here, the case where the signal charges to be handled are electrons will be described as an example,
When holes are used as signal charges, N-type in the text is changed to P-type,
The P type is replaced with the N type.

The solid-state imaging device shown in FIG. 1 has a plurality of pixels 12 arranged on the front side of a substrate 11. The substrate 11
It is made of N-type silicon, and has a P-well diffusion layer 13 at a predetermined depth. On the surface side of the substrate 11, a plurality of trenches 14 are formed in a portion shallower than the P-well diffusion layer 13, and each functional portion of the solid-state imaging device is provided. These trenches 14 extend along the charge transfer direction.
A convex portion 15 extending in the charge transfer direction is provided therebetween. It is assumed that each convex portion 15 is arranged on one end side of each pixel 12.

An element isolation region 16 is arranged between the pixels 12 arranged perpendicular to the charge transfer direction. This element isolation region 16 is made of a P-type diffusion layer formed on the front surface side of the substrate 11 and is provided, for example, below the convex portion 15, that is, at one end of the bottom of the trench 14.

In each pixel 12, a photoelectric conversion / charge storage region (hereinafter, referred to as a light receiving region) 17 for converting incident light into electrons and storing the electrons is provided adjacent to the element isolation region 16 in the trench 14. It is provided at the bottom. This light receiving area 1
7 is a P layer provided on the surface layer at the bottom of the trench 14.
^The photodiode is constituted by a ⁺ diffusion layer 18 and an N-type diffusion layer 19 below the ⁺ diffusion layer 18.

Then, from the lower part of the convex portion 15, the trench 1 is formed.
4 and the light receiving region 17 and the device isolation region 16
A read region 20 having a MOS structure is provided at a position between the two. This read area 20 is formed of the N ^- diffusion layer 2
1, an N ⁻ diffusion layer 22 provided on the surface layer of the N ⁻ diffusion layer 21, and an insulating film 23 on the N ⁻ diffusion layer 22.
And the readout electrode 24 provided through the gate.

The N ^- diffusion layer 21 is provided adjacent to the light receiving region 17 and the element isolation region 16 and has a lower concentration of N-type impurities than the N-type diffusion layer 19 in the light receiving region 17. And N ^- diffusion layer 22, the trench 14
It is provided on the bottom surface layer portion, and it is assumed that the N-type impurity has a lower concentration than the N ^- diffusion layer 21. The read electrode 24 is provided in a sidewall shape above the N ⁻ diffusion layer 22 and on the side wall of the trench 14 with an insulating film 23 interposed therebetween.
^The readout gate is constituted by the diffusion layer 22.

The charge transfer region 2 is formed on the side wall of the trench 14, that is, on the convex portion 15 above the read region 20.
5 are provided. The charge transfer region 25 includes an N-type diffusion layer 26 provided in a surface layer on the side wall of the trench 14,
It is constituted by a read electrode 24 and a sidewall-shaped transfer electrode 27 formed integrally. This N-type diffusion layer 2
6 has a higher concentration of the N-type impurity than the N ⁻ diffusion layer 21 in the readout region 20, and includes the N ⁻ diffusion layer 21 and the N ⁻ diffusion layer 22.
Are provided adjacent to each other.

The charge transfer region 2 is provided on the substrate 11.
5, a light-shielding film 29 is provided via an insulating film 28 in a state where the light-receiving region 17 is opened.

Next, the operation of the solid-state image pickup device thus constructed will be described with reference to FIG. FIG. 2A is a cross-sectional view of one pixel of the solid-state imaging device, and FIGS. 2B and 2C show the potential on the line ABCD in FIG. ing.

First, when charges are accumulated in the light receiving region 17, as shown in the potential diagram of FIG.
The potential of the transfer electrode 27 (read electrode 24) is maintained such that the barrier of the read gate in the read region 20 is higher than the barrier of the well diffusion layer 13 portion. by this,
The potential of the N-type diffusion layer 19 in the light receiving region 17 is minimized, and signal charges (here, electrons) generated by photoelectric conversion in a region shallower than the P-well diffusion layer 13 are accumulated in the N-type diffusion layer 19. The extra signal charges are discharged to the back side of the substrate 11 over the barrier of the P-well diffusion layer 13.

When the signal charges stored in the N-type diffusion layer 19 are read out to the N-type diffusion layer 26 in the transfer region 25, as shown in the potential diagram of FIG. The potential of the transfer electrode 27 is maintained such that the potential of the N-type diffusion layer 26 in the region 25 becomes deeper than the potential of the N-type diffusion layer 19 in the light receiving region 17.
As a result, the signal charges stored in the N-type diffusion layer 19 are read out to the N-type diffusion layer 26 in the transfer region 25.

Further, the transfer electrodes 27 arranged in the transfer direction are pulse-driven so that the charge transfer regions 2 are formed.
5 to transfer the read signal charges to the N-type diffusion layer 26. At this time, the potential of the transfer electrode 27 is made to oscillate within a range where the barrier of the read gate portion is maintained higher than the barrier of the P well diffusion layer 13.

In the solid-state imaging device having the above-described structure, since the charge transfer region 25 is provided on the side wall of the trench 14 formed in the substrate 11, the light-receiving region 17 formed on the bottom of the trench 14 In contrast, the charge transfer region 2
5 are three-dimensionally arranged. Therefore, the arrangement area of the charge transfer region 25 in plan view can be reduced, and the aperture ratio of the light receiving region 17 in the unit pixel is increased. Therefore, the sensitivity can be improved and the maximum charge storage amount can be increased as compared with the conventional solid-state imaging device described with reference to FIG. 6, and the pixel area can be further reduced and the number of pixels can be increased. become.

Next, an example of a method for manufacturing a solid-state image sensor according to the present invention will be described with reference to cross-sectional process diagrams shown in FIGS. Note that these sectional process diagrams correspond to one pixel of the sectional view shown in FIG.

First, as shown in FIG. 3A, a P-well diffusion layer 13 is formed at a predetermined depth of a substrate 11 made of N-type silicon by ion implantation. The P-well diffusion layer 1
3 and the upper N-type silicon portion may be formed by multilayer epitaxial growth.

Next, as shown in FIG.
Pattern etching of the surface layer of the P-well diffusion layer 13
And a trench 14 is formed on top of
An intervening convex portion 15 is formed. The trench 14 is formed, for example, by etching the surface of the substrate 11 using a resist pattern not shown here as a mask. The trenches 14 are formed corresponding to a plurality of light receiving regions arranged on the front surface side of the substrate 11, and are formed along the charge transfer direction (the depth direction in the drawing).

Next, after removing the resist pattern used as a mask when forming the trench 14, the substrate 11
By performing ion implantation from a direction perpendicular to the surface, an N ⁻ diffusion layer 22 having a reduced concentration of N-type impurities is formed at the bottom of the trench 14. This N ^- diffusion layer 22
Constitutes a read gate in the read region. At this time, an N ⁻ diffusion layer is also formed on the initial surface of the substrate 11 (ie, the surface of the convex portion 15).

Next, as shown in FIG. 4A, oblique ion implantation is performed in a direction perpendicular to the extending direction (charge transfer direction) of the trench 14 and the convex portion 15 to thereby perform trench implantation. 14 is provided with a high concentration P ⁺ diffusion layer 18.
Is formed and the N ⁻ diffusion layer 22 is left beside the convex portion 15.

At this time, the angle of the ion implantation is set so that the horizontal thickness of a polysilicon electrode to be formed later matches the width of the N ⁻ diffusion layer 22 remaining at the bottom of the trench.
It is determined by the depth of the trench 14. In this step, impurities are also implanted into the side walls of the trench 14 in the direction of ion implantation, and a P ⁺ diffusion layer is formed.

Here, when the structure of the charge transfer region is a buried channel structure, N ⁻ ions are obliquely implanted to the opposite side to the oblique ion implantation when the P ⁺ diffusion layer 18 is formed. Trench 1 on diffusion layer 22 side
The N-type concentration on the side wall surface of No. 4 is reduced.

Next, as shown in FIG.
Using the resist pattern 31 formed above as a mask,
Ion implantation for forming a P-type diffusion layer to be the element isolation region 16 is performed. Here, across the convex portion 15 N ^-
A resist pattern 31 is provided so that the element isolation region 16 is formed at the end of the trench 14 opposite to the diffusion layer 22. After the ion implantation, the resist pattern 31 is removed.

Next, as shown in FIG.
The surface of the substrate 11 including the inner wall of the trench 14 is covered with an insulating film 23 by a (chemical vapor deposition) method, an oxidation method, or the like. Thereafter, an electrode material film (for example, a polysilicon film) is formed on the insulating film 23, and the substrate 1 is etched with high anisotropy in a vertical direction to thereby form the trench 1.
A sidewall 24a made of an electrode material film is formed on the side wall of the fourth electrode 4, and this sidewall 24a is used as the readout electrode 24 and the transfer electrode 27 (hereinafter, typically referred to as a transfer electrode 27).
And However, of the side walls 24a formed on both sides of the convex portion 15, only the side wall 24a formed on the N ⁻ diffusion layer 22 becomes the transfer electrode 27, and thereby the transfer electrode 27 (readout electrode 24) A read gate formed by sandwiching an insulating film 23 between the N ⁻ diffusion layer 22 and the N ⁻ diffusion layer 22 is formed.

Next, using the sidewalls 24a as a mask, an N-type impurity is introduced into the bottom of the trench 14 and the P ⁺ diffusion layer 19 in the convex portion 15 below. Thus, an N-type diffusion layer 19 having a relatively high concentration of N-type impurities is formed below the P ⁺ diffusion layer 18 at the bottom of the trench 14, and the N-type diffusion layer 19
An N-type diffusion layer having a relatively high concentration of the type impurity is formed.

As described above, the light receiving region 17 composed of the P ⁺ diffusion layer 18 and the N type diffusion layer 19 thereunder is formed at the bottom of the trench 14. Further, a charge transfer region 25 including the N-type diffusion layer 26, the insulating film 23, and the transfer electrode 17 is formed on the side wall of the trench 14. Then, the readout region 20 is formed in a portion sandwiched between the charge transfer region 25 and the light receiving region 17.

Next, as shown in FIG.
By etching using the resist pattern 32 formed thereon as a mask, the sidewalls 24 a (that is, the transfer electrodes 27) on the N ⁻ diffusion layer 22 are left, and the protrusions 15 are formed.
Then, the side wall 24a on the opposite side across the is removed. After that, the resist pattern 32 is removed.

Thereafter, as shown in FIG.
In addition, a light-shielding film 29 is formed via the insulating film 28 so as to cover the convex portions 15, and the light-shielding film 29 is patterned so as to open above the light receiving region 17. Thus, the solid-state imaging device described with reference to FIG. 1 is obtained.

According to such a manufacturing method, the transfer electrode 2
The readout electrode 24 is formed using the side wall of the light-receiving region 7, and the light-receiving region 1 is formed by ion implantation using the transfer electrode 27 as a mask.
7 are formed. Therefore, the readout region 20 for determining the readout voltage to the charge transfer region 25 is formed in a self-aligned manner with respect to the light receiving region 17 and the charge transfer region 25 without considering the alignment accuracy of the mask material. Become.
Therefore, the readout area 20 can be miniaturized, and the solid-state imaging device can be miniaturized.

[0037]

According to the solid-state imaging device of the present invention described above, the charge transfer region is provided on the side wall of the trench formed on the substrate surface, so that the light receiving region provided on the bottom of the trench can be removed. By arranging the charge transfer regions three-dimensionally, the arrangement area of the charge transfer regions in plan view can be reduced, and the aperture ratio (area ratio) of the light receiving region in the unit pixel can be increased. As a result, the sensitivity and the maximum charge storage amount of the solid-state imaging device can be improved, and further increase in the number of pixels can be promoted.

Further, according to the method of manufacturing a solid-state imaging device of the present invention, a solid-state imaging device having the configuration of the present invention can be obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating an embodiment of a solid-state imaging device of the present invention.

FIG. 2 is a diagram illustrating the operation of the solid-state imaging device according to the embodiment.

FIG. 3 is a sectional process view (1) for explaining the method of manufacturing the solid-state imaging device according to the present invention.

FIG. 4 is a sectional process view (part 2) illustrating the method for manufacturing the solid-state imaging device of the present invention.

FIG. 5 is a sectional process view (part 3) illustrating the method for manufacturing the solid-state imaging device of the present invention.

FIG. 6 is a cross-sectional view of a conventional solid-state imaging device.

[Explanation of symbols]

11 ... substrate, 14 ... trench, 17 ... light receiving area, 18 ...
P ⁺ diffusion layer, 20... Readout area, 22... N ^- diffusion layer, 2
3 ... insulating film, 24 ... readout electrode, 25 ... charge transfer region,
26 ... N-type diffusion layer, 27 ... Transfer electrode

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AA01 AA10 AB01 BA13 CA04 DA01 DA03 DA07 EA01 EA03 EA08 EA16 FA06 FA13 FA26 FA33 FA46 GB08 5C024 CX41 CY47 GX02 GY04 GY11 5F049 MA02 MB03 NB05 RA03 RA08 SS03 SZ10 UA

Claims (5)

[Claims] 1. A solid-state imaging device having a charge transfer region arranged beside a light receiving region provided on a front surface side of a substrate, wherein the light receiving region is provided at a bottom of a trench formed on the front surface side of the substrate. Wherein the charge transfer region is provided on a side wall of the trench. 2. The solid-state imaging device according to claim 1, wherein the charge transfer region includes a diffusion layer formed on a sidewall surface layer of the trench and a sidewall-shaped transfer formed along a sidewall of the trench. A solid-state imaging device comprising: an electrode; and an insulating film provided between the diffusion layer and the transfer electrode. 3. The solid-state imaging device according to claim 2, wherein a readout region using the transfer electrode as a readout electrode is provided between the charge transfer region and the light receiving region. Imaging device. 4. A method for manufacturing a solid-state imaging device, wherein a charge transfer region is formed on a side wall of a trench formed on a front surface side of the substrate, and a light receiving region is formed at a bottom of the trench of the trench. Forming a trench on the surface side of the trench, forming a sidewall-shaped transfer electrode also serving as a readout electrode on the side wall of the trench via an insulating film, and receiving light at the bottom of the trench exposed from the transfer electrode. And forming a region. 5. The method for manufacturing a solid-state imaging device according to claim 4, wherein a diffusion layer forming the light receiving region is formed by introducing an impurity into a surface side of the substrate using the transfer electrode as a mask. A method for manufacturing a solid-state imaging device.