JP2001296330A - Electronic apparatus equipped with disconnection- position detection function and detection method for disconnection position - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a detection method, for a disconnection position, in which the operating efficiency of a disconnection detection is enhanced and in which excessive wastes can be reduced by a method wherein the disconnection position across chips in which interconnections are connected in a one-to-one manner is detected without directly bringing a probe into contact with a wiring pattern. SOLUTION: The electronic apparatus is constituted by electrically connecting at least two semiconductor chips 1, 2. At least one semiconductor chip from among the semiconductor chips 1, 2 is provided with a high-impedance controllable driver 4, a receiver 5 used to receive a signal transmitted from the driver 4 and a pull-up resistance 6 used to pull up the level of the signal transmitted from the driver 4. The signal which is output from the driver 4 is high-impednace-controlled, and the level of the signal which is pulled up and transmitted is detected. The disconnection position of an electric connection across the semiconductor chips 1, 2 is detected. The disconnection position across the semiconductor chips 1, 2 can be detected without directly bringing the probe into contact with the wiring pattern, the operating efficiency of the disconnection inspection can be enhanced, and the excessive wastes can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device having a disconnection position detecting function and a disconnection position detecting method, for example, a multi-chip module (MCM).
This is suitable for an electronic device in which at least two electronic components are electrically connected, such as an electronic device in which wiring of the electronic components is connected one-to-one.

[0002]

2. Description of the Related Art With the recent increase in speed and miniaturization of electronic devices, the use of BGA (ball grid array), MCM, and the like has been expanded, and the build-up of printed circuit boards has also been progressing. Therefore, when inspecting these electronic devices,
It is becoming difficult to perform inspection by directly applying a test probe to a lead or a wiring pattern of a semiconductor chip.

[0003] Disconnection failure after component mounting is often caused in the vicinity of device pins of a chip connected to the wiring pattern, and the wiring pattern itself rarely breaks.
Therefore, almost any disconnection can be detected by checking the disconnection near the device pin.

However, in the case of a chip such as a BGA, if the wiring is short-circuited like a solder bridge, it can be detected by a visual inspection device or the like using X-rays. Could not be detected. In a wiring pattern between devices such as a BGA, a device probe is hidden behind a chip, so that a test probe cannot be directly applied.
Therefore, the disconnection of the lead could not be detected.

For this reason, recently, a method of detecting a disconnection itself without directly applying a test probe by incorporating a test function such as a boundary scan into an LSI has come to be used. This method is used as a method for electrically checking for disconnection.By incorporating a test function such as a boundary scan circuit in a chip, it is possible to prevent a test probe from directly contacting device pins and wiring patterns. In this example, a disconnection between chips is detected.

[0006]

However, even when a test function such as a boundary scan test is used, it is possible to detect the presence / absence of disconnection of the wiring, but not to the position of the disconnection.

In the boundary scan test, disconnection detection is performed only by passing a signal. Therefore, when the wires are connected one to n, data is transmitted in a transmission side: reception side = 1: n relationship. If all data received on the receiving side is different from the original data transmitted, it can be detected as a disconnection on the transmitting side. On the other hand, if the reception results at the several device pins on the receiving side are different from the original data, it can be detected that the device pins on the receiving side where the different results have been detected are disconnected.

However, when the wiring is connected one-to-one, it is not possible to detect which device pin is disconnected unless a test probe is set on the pattern.
Therefore, when BGA chips are connected to each other,
Even if the disconnection itself can be detected, it is not possible to determine on which side the disconnection has occurred. Therefore, there is a possibility that a chip having no problem may be reattached at the time of repair.

[0009] Even in the case of repair, a very advanced technique is required for removing and mounting the chip, and the probability of a mistake in reattachment increases. As a result, the number of defects that occur after the repair increases, and there has been a problem that components and substrates are put into an unusable state. In particular, MCMs and the like used in large-sized computers have a very high price per mounted chip, so that excessive waste products cannot be produced. Moreover, in a device such as a BGA, reattachment of a chip cannot be performed a plurality of times.

The present invention has been made to solve such a problem, and can detect a disconnection position between electronic parts connected one-to-one without directly applying a probe to the wiring. By doing so, it is an object to improve work efficiency and to reduce excess waste.

[0011]

According to the present invention, there is provided an electronic apparatus having a disconnection position detecting function, wherein at least two electronic parts are electrically connected to each other. One is high impedance controllable transmitting means, receiving means for receiving a signal transmitted from the transmitting means, and pull-up means or pull-down means for making a transition by pulling up or pulling down the level of the signal transmitted from the transmitting means. And a high-impedance control of a signal transmitted from the transmitting means, and detecting a disconnection position of an electrical connection between the electronic components according to a level transition of a signal received by the receiving means. .

A disconnection position detecting method according to the present invention is a method for detecting a disconnection position of an electrically connected portion in an electronic device configured by electrically connecting at least two electronic components. A first step of outputting a signal from the controller and controlling the signal to high impedance, a second step of transitioning the level of the signal by pull-up or pull-down, and a transition state of the level of the signal in the specific electronic component And a third step of detecting a disconnection position by detecting

[0013]

Since the present invention comprises the above technical means, when the signal subjected to the high impedance control by the transmitting means is pulled up and detected by the receiving means, the static of the wiring pattern and the wiring lead connected to the transmitting means due to the difference in the disconnection position. Since the capacitances are different, the receiving means detects the transition state of the signal according to the disconnection position. Therefore, the disconnection position can be specified by detecting the transition state.

Further, since the present invention comprises the above technical means, data is transmitted in the update state of the boundary scan, and data is received in the capture state. Therefore, it is possible to detect the disconnection position at a plurality of connection points by a series of operations by the boundary scan, and it is also possible to detect the presence or absence of the disconnection by the boundary scan, and then perform the disconnection position detection only at the location where the disconnection occurs. It becomes possible.

[0015]

(First Embodiment) A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram showing an MCM semiconductor device according to the present embodiment. In this semiconductor device, at least two semiconductor chips 1 and 2 are arranged on a substrate 3. A wiring pattern 3a made of a conductive thin film is formed on the substrate 3, and the semiconductor chips 1 and 2 are electrically connected via the wiring pattern 3a. In FIG. 1, circuits (drivers 4, receivers 5, resistors 6) and the like formed on each of the semiconductor chips 1 and 2 are shown as circuit blocks for convenience.

A plurality of device pins (electrode pads) (not shown) are provided on the outer periphery of the semiconductor chip 1.
It is electrically connected to each element such as the pull-up resistor 6. Similarly, a plurality of device pins are also provided on the outer periphery of the semiconductor chip 2, and although not shown here, the device pins of the semiconductor chip 2 are the receiver 4 formed by the semiconductor chip 1 or the semiconductor chip 1. Are connected to the same element as the above. The driver 4 is a driver capable of high impedance control, and the receiver 5 is configured to detect a signal from the driver 4.

The electrode pads of the semiconductor chip 1 and the wiring patterns 3a of the substrate 3 are electrically connected via leads 7, and the electrode pads of the semiconductor chip 2 and the wiring patterns 3a of the substrate 3 are electrically connected via the leads 8. The semiconductor chips 1 and 2 are thus connected via the wiring pattern 3a as described above. In the case of the BGA, the electrode pads formed on the back surfaces of the semiconductor chips 1 and 2 and the wiring patterns 3a are connected via metal bumps or the like.

FIG. 1 shows a state in which a defect has occurred in the connection between the leads 7, 8 and the wiring pattern 3a. FIG. 1A shows a state in which the connection between the lead 8 and the wiring pattern 3a is defective, and FIG. 1B shows a state in which the connection between the lead 7 and the wiring pattern 3a is defective. I have. As described above, when a failure occurs in the connection state of the semiconductor chips 1 and 2, the normal function of the semiconductor device is impaired, and it is necessary to identify and repair the defective portion.

Hereinafter, a method of detecting the connection state between the wiring pattern 3a and the leads 7 and 8 using the elements of the driver 4, the receiver 5, and the pull-up resistor 6 provided on the semiconductor chip 1 will be described. FIG. 2 is a timing chart showing a signal waveform when a signal transmitted from the driver 4 is received by the receiver 5. The detection of the disconnection position by pull-up will be described with reference to FIG.

Driver 4 formed on semiconductor chip 1
Transmits a low-level signal toward the wiring pattern 3a, and the low-level signal is detected in the receiver 5 as shown in FIG. Then, the high impedance control of the driver 4 from the time t ₀ shown in FIG.

Thus, the transition of the signal waveform due to the pull-up can be measured in the receiver 5. Then, after a lapse of a predetermined time, the signal detected by the receiver 5 reaches the Hi level by pull-up and enters a steady state.

Here, the solid line shown in FIG. 2 indicates a signal transition when the connection between the lead 7 near the semiconductor chip 1 and the wiring pattern 3a is defective, as shown in FIG. 1B. The time constant of the transition waveform at this time is τ ₁ = C ₁ × R. Further, the broken line indicates a signal transition when the connection between the lead 8 far from the semiconductor chip 1 and the wiring pattern 3a is defective as shown in FIG. The time constant of the transition waveform at this time is τ ₂ = (C ₁ + C _P ) × R.

The reason for the difference between the signal transition states is that the capacitance of the wiring is different between the case where the connection of the lead 7 is defective and the case where the connection of the lead 8 is defective. It is. That is, as shown in FIG. 1B, when the connection between the lead 7 and the wiring pattern 3a is defective, the wiring pattern 3a is not included in the wiring from the driver 4 to the semiconductor chip 2, so that the capacitance is small. Is relatively small, but as shown in FIG. 1A, when the connection between the lead 8 and the wiring pattern 3a is defective, the capacitance of the wiring pattern 3a is added as compared with the case of FIG. 1B. That is because

That is, assuming that the resistance value of the pull-up resistor 6 in the semiconductor chip 1 is R, when the lead 7 near the observation point, that is, the lead 7 on the semiconductor chip 1 side is disconnected, the time to reach the threshold level is equal to the semiconductor. the affected only the capacitance C ₁ of the chip 1. The time constant in this case represented by tau _1.

On the other hand, remote disconnection from the observation point, i.e., when the semiconductor chip 2 side of the lead 8 is broken, the time to reach the threshold level the influence of the capacitance C _P of the wiring patterns 3a of the substrate 3 Will also receive. The time constant in this case is represented by τ ₂ .

Accordingly, the time constants τ ₁ and τ ₂ are represented by the following equations. τ ₁ = C ₁ × R τ ₂ = (C ₁ + C _P ) × R

The larger the time constant is, the more the transition time is delayed. Therefore, a disconnection near the observation point makes a faster transition to the threshold level, and a disconnection far from the observation point makes a slower transition. This makes it possible to detect the transition difference as shown by the solid line and the broken line in FIG.
It becomes possible to identify which side of the lead 8 is disconnected.

As a method for detecting the difference between the transition states, the following two methods can be mainly used.

In the first method, as shown in FIG. 2A, a predetermined threshold level (dotted line in FIG. 2A)
Is set, and the time from when the high-impedance control is started to when the threshold level is reached is detected, thereby specifying the disconnection position. In the example of FIG. 2 (a), when the lead 7 is defective conduction, the transition of the signal received by the receiver 5, the state shown by the solid line, the time to reach the threshold voltage becomes t _1. On the other hand, if the lead 8 is defective conduction, the transition of the received signal of the receiver 5, the state shown by the broken line, the time to reach the threshold voltage becomes t _2. Then, by comparing the time from the time t ₀ when the high impedance control is started to the time t ₁ or t ₂ to the predetermined threshold value, the disconnection position can be specified. .

The second method is a method of detecting a signal value a predetermined time after starting the high impedance control. As shown in FIG. 2B, after the time t ₃ has elapsed after the start of the high impedance control, if the lead 7 has poor conduction, the level of the received signal of the receiver 5 becomes v ₁ and the lead 8 but the v ₂ in the case of conduction failure. Therefore, the disconnection position can be specified by comparing the signal values v ₁ and v ₂ at the time t _{3 with} a predetermined threshold value. The time t ₃ can be set by, for example, connecting the flip-flop circuit 10 to a receiver as shown in FIG. 1 and the timing of a clock input to the flip-flop circuit 10.

In the first and second methods described above, the predetermined threshold value for comparison can be obtained by detecting the value of the non-defective product in advance. Also, the capacitances C ₁ and C _P are obtained in advance from design data such as the distance from the driver 4 to the electrode pad, the wiring width, and the wiring material, and the transition time and the transition level at the time of disconnection are calculated in advance from these data. Alternatively, it may be compared with actual observation data.

The detection of the disconnection position based on the transition time can be performed by pull-down. FIG. 3 shows a semiconductor device in which a pull-down resistor 9 is connected instead of the pull-up resistor 6 in the semiconductor device shown in FIG. 1, and the configuration other than the pull-down resistor 9 is the same as that of the semiconductor device of FIG.

FIG. 4 is a timing chart showing signal waveforms received by the receiver 5 when the pull-down resistor 9 is used. When the pull-down resistor 9 is used, a Hi-level signal is initially output from the driver 4. Then, by performing the high impedance control from the time t _0, the signal waveform when the output from the driver 4 is received by the receiver 5 transitions toward the Low level, and after a predetermined time elapses, the signal waveform reaches the Low level. It becomes a steady state. Also in this case, the transition state differs depending on the capacitance between the case where the lead 7 is disconnected and the case where the lead 8 is disconnected, and the case where the lead 7 is disconnected as shown in FIG. Indicates a solid line, and if the lead 8 is disconnected, the signal state changes as indicated by a broken line. Therefore, similarly to the case where the pull-up resistor 6 is used, the time until the predetermined threshold level (the one-dot chain line shown in FIG. 4) is reached is detected, or the level value of the signal after the predetermined time has elapsed is detected. By detecting, it is possible to identify the transition state and specify the disconnection position.

As described above, according to the first embodiment of the present invention, the driver 4 capable of high impedance control as the circuit configuration of each of the semiconductor chips 1 and 2 and the signal generated by the driver 4 can be received. Since the receiver 5 and the pull-up resistor 6 (pull-down resistor 9) are provided, even when the wires are connected one-to-one as in the semiconductor chip 1 and the semiconductor chip 2 in FIG. The transition after the high impedance control is measured by the receiver 5, and the transition time and the level difference can be detected based on the difference in the disconnection position. Therefore, the disconnection can be generated without directly applying the probe to the wiring pattern 3a or the leads 7, 8. It is possible to detect not only the presence / absence but also the position of the disconnection in detail. Since there is no need to apply a probe,
A disconnection position can be detected even for a device such as A that cannot be directly applied to the test probe physically.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to FIGS. FIG. 5 is a schematic diagram showing a semiconductor device according to the second embodiment of the present invention. In the second embodiment, the semiconductor device and the disconnection detection method described in the first embodiment are applied to a semiconductor device having a boundary scan function, and the presence or absence of a disconnection and the position of the disconnection are detected using the boundary scan. It was made.

First, the outline of the boundary scan will be described with reference to FIG. FIG. 5 shows a semiconductor device provided with a boundary scan register, in which at least two semiconductor chips 21 and 22 are arranged on a substrate 23. As in the first embodiment, the semiconductor chip 21 and the semiconductor chip 22 are electrically connected by wiring patterns and leads formed on the substrate 23. FIG. 1 shows the state of connection between the semiconductor chips 21 and 22 and the state of leads and wiring patterns when a disconnection occurs.
Are omitted here because they are the same as those shown in FIG.

Each of the semiconductor chips 21 and 22 includes internal logics 21a and 22a, respectively, and a plurality of device pins 21c and 22c are provided on an outer peripheral portion. Between the internal logics 21a and 22a and the device pins 21c and 22c, a boundary scan register cell group 21b,
22b are arranged respectively. Each of the boundary scan register cell groups 21b and 22b is composed of a plurality of boundary scan register cells connected to individual device pins 21c and 22c. As shown in FIG. 5, the boundary scan register cells are connected in series to form the boundary scan register cells. The cell groups 21b and 22b are configured.
More specifically, each boundary scan register cell includes a shift register for shifting data between adjacent cells, and a latch for holding data.

A cell whose input is connected to the device pin 21c or 22c, whose output is connected to the internal logic 21a or 22a is an input cell, whose input is connected to the internal logic 21a or 22a, and whose output is the device The cell connected to the pin 21c or 22c is the output cell. The boundary scan register cell of the present embodiment has the functions of both the input cell and the output cell. The output cell has the function of the driver 4 described in the first embodiment, and the input cell has the function of the receiver 5. Each boundary scan register cell also includes the pull-up resistor 6 described in the first embodiment.

Each of the semiconductor chips 21 and 22 has T
AP controllers 21d and 22d are provided. TAP
The controllers 21d and 22d are 16-state machines programmed by input of a test mode selector (TMS) signal for controlling the flow of data bits to an instruction register and a data register and a TCK signal which is a test clock.

The outline of the operation of the TAP controllers 21d and 22d is as follows. TAP controller 21
The operations of d and 22d transition according to a plurality of states.
Whether or not to make a transition is determined by the value of the TMS signal at the rising edge of the TCK signal. Among the multiple states, the capture state (Capture-DR),
Shift state (Sift-DR), update state (U
The operation of pdate-DR) is important. Hereinafter, an outline of the main states will be described.

In the capture state, an operation of acquiring data from the input to the shift register is performed. In FIG. 5, when the semiconductor chip 22 is on the receiving side and the semiconductor chip 21 is on the transmitting side, and when a specific boundary scan register cell 22e of the semiconductor chip 22 is selected, when passing through the capture state, the boundary scan register cell 22e becomes By taking in the state of the connected device pin 22c, the state transmitted from the semiconductor chip 21 is changed to the boundary scan register cell 22e.
Is set to

In the shift state, the contents of the boundary scan register cell 22e are shifted and output to the boundary scan register cell adjacent to the TDO signal pin 22f, and new data is shifted and input from the boundary scan register cell on the TDI signal pin 21g side. . That is, once this state is passed, the TDI signal pin 2
The contents of the register connected between 1g and the TDO signal pin 22f are shifted by one bit.

In the update state, the contents of the boundary scan register cell 22e are fixed to the latch of the boundary scan register cell 22e. The fixed content actually appears as the output of the cell.

Next, a method for detecting a disconnection in a boundary scan will be described with reference to FIG. FIG.
5 is a timing chart showing transition waveforms of signals received by input cells having the function of the receiver 5 and states of boundary scan. Here, the device pin 21 corresponding to the boundary scan register cell 21e in FIG.
Assuming that a disconnection has occurred in c, detection of a disconnection position in the boundary scan register cell 21e will be described as an example.

First, the mode is first set to the shift state. In the shift state, the contents of the shift register of the boundary scan register cell 21e are shifted and output to the TDO signal pin 21f side, and new data is input from the TDI signal pin 21g side. In this case, for example, a Low level signal is set in the boundary scan register cell 21e. Next Exit 1 state (Exit1)
Then, an operation for exiting the shift state is performed.

In the next update state, the contents of the boundary scan register cell 21e are fixed to the latch in the boundary scan register cell 21e. The fixed content actually appears as an output from the boundary scan register cell 21e to the semiconductor chip 22 side. Then, as shown in FIG. 6, the high impedance control described in the first embodiment is started from the falling of the TCK signal in the update state. As a result, the Low level signal transits to the Hi level side by the pull-up resistor 6 of the boundary scan register cell 21e.

Thereafter, the mode is shifted to the capture state via the select state. In the capture state, as shown in FIG. 6, the boundary scan register cell 21e is set at the rising edge of the TCK signal.
Perform the operation of acquiring data to Specifically, the data is acquired by the input cells provided in the boundary scan register cell 21e. Then, the level of the received signal is compared with a predetermined threshold level (the one-dot chain line in FIG. 6). If the level of the received signal is higher than the threshold level, disconnection has occurred in the lead on the semiconductor chip 21 side. Can be detected, and if it is smaller than the threshold level, it can be detected that a break has occurred in the lead on the semiconductor chip 22 side. As described above, by increasing the timing of the TCK signal, a signal having a value larger than the threshold level is detected in the case of a disconnection near the observation point, and the transition is slower in a disconnection farther from the observation point. A signal with a small value is detected. Therefore, the disconnection position can be specified from this difference.

Next, the mode is shifted to the shift state, and the next data is input to the boundary scan register cell 21e. The data so far is transferred to the adjacent shift register, and the above-described disconnection detection can be performed in the adjacent cell.

Next, an outline of a method for detecting the presence / absence of a disconnection and the presence / absence of a short circuit using a boundary scan register will be described with reference to FIG. FIG. 7 schematically shows a part of the connection between the semiconductor chip 21 and the semiconductor chip 22. The detection of the presence / absence of a disconnection and the presence / absence of a short-circuit described here are performed on the premise of the detection of the above-described disconnection position.

As described above, the semiconductor chip 21 and the semiconductor chip 22 have a plurality of boundary scan register cells. A pull-up resistor 6 is provided in the boundary scan register cell. FIG.
(A) shows a connection state between a specific boundary scan register cell 21h of the semiconductor chip 21 and a specific boundary scan register cell 22h of the semiconductor chip 22. FIG. 7B shows a connection state between specific boundary scan register cells 21i and 21j of the semiconductor chip 21 and specific boundary scan register cells 22i and 22j of the semiconductor chip 22. FIG. 7B shows a state in which adjacent wiring patterns 3a are short-circuited.

The detection of disconnection and short-circuit in the wiring inspection of the boundary scan is basically performed by exchanging data between cells between devices and comparing the output data with the received data.

For data exchange, a low level signal "0" is first output from the boundary scan register cell 21h side of the semiconductor chip 21, and then a high level signal "1" is sent to the semiconductor chip 22. Output.
Data to be output is serially input from a TDI signal pin in advance and set in a target cell. After the output of the signal, the boundary scan register cell 22h of the semiconductor chip 22 captures data. Thereafter, the acquired data is serially shifted, and the data is confirmed on the TDO signal pin.

First, a case where there is a disconnection (open) between wirings will be described with reference to FIG. FIG.
As shown in FIG. 7A, when no disconnection occurs near any of the leads 7 and 8, the low-level signal “0” output from the semiconductor chip 21 as shown in FIG. The signal is received as a Low level signal “0” in the chip 22.

On the other hand, if the lead 7 or 8 on the side of the semiconductor chip 21 is disconnected, "0" is output from the boundary scan register cell 21h in this case, but the wiring is open. , Does not reach the boundary scan register cell 22h. Therefore, the boundary scan register cell 22h is opened. Here, since the boundary scan register cell 22h is pulled up by the pull-up resistor 6, the boundary scan register cell 22h receives only "1" and does not change even if the output side outputs any signal. .

Therefore, by transmitting a low-level signal "0" from the semiconductor chip 21 and detecting the level of the signal received by the semiconductor chip 22, it is possible to detect whether or not the disconnection itself has occurred. . The specific detection of the disconnection position described above can be performed only at the connection site where the disconnection has occurred.

Next, an outline of a method for detecting the presence or absence of a short circuit will be described with reference to FIG. From the boundary scan register cells 21i and 21j,
First, a low-level signal “0” is output, and then a high-level signal “1” is output. When there is no short circuit, the signal “1” is output from the boundary scan register cell 22i to the boundary scan register. Cell 22j
Receives a signal "0". That is, different data is received by two adjacent boundary scan register cells 22i and 22j.

However, when the wiring patterns 3a are short-circuited, the boundary scan register cell 22i of the semiconductor chip 22 originally outputs the Hi-level signal "1" from the boundary scan register cell 21i.
Is transmitted, the low-level signal "0" of the boundary scan register cell 21j is pulled to output a low-level signal "0".

On the other hand, in the boundary scan register cell 22j of the semiconductor chip 22, the Low level signal "0" output from the boundary scan register cell 21j is output as it is.

Therefore, when different data is output from an adjacent boundary scan register cell on one semiconductor chip side, when the boundary scan register cell on the receiving side fetches the same data,
It can be detected that a short circuit has occurred between the wirings connected to two adjacent boundary scan register cells.

Next, the procedure of a method for detecting a disconnection position will be described with reference to the flowchart of FIG.

First, in step S1, the presence or absence of a disconnection and the presence or absence of a short circuit are detected by the method described with reference to FIG. That is, in this detection, the detection is not performed until the disconnection position is detected. Then, in response to the result, in step S2, it is determined whether or not the product is good. If neither disconnection nor short-circuit has occurred, it is determined to be a non-defective product, and the process proceeds to the next step of step S4.

As a result of the determination in step S2, a short-circuit defect has occurred. If it is determined that the product is defective, the process proceeds to step S3, and a result indicating that there is a short-circuit defect is output.

If it is determined in step S2 that an open defect has occurred, that is, if disconnection has occurred and it is determined that the product is defective, the process proceeds to step S5, and thereafter, detection of the disconnection position according to the present embodiment is performed. I do. First, in step S5, a low-level signal is output from the driver 4.

Next, in step S6, the driver 4 is controlled to high impedance in the update state. In the next step S7, the transition of the output as shown in FIG. 6 is measured by the receiver 5 in the capture state.

Next, in step S8, the disconnection position is detected based on the transition difference. If the transition operation is fast, it is identified as a disconnection near the semiconductor chip 21 on the observation side (Step S).
9). If the operation speed is slow, it is specified that the disconnection is far from the semiconductor chip 21 on the observation side (step S1).
0).

As described above, according to the second embodiment of the present invention, by applying the semiconductor device and the disconnection detection method of the first embodiment to a semiconductor device having a boundary scan register, a boundary scan can be performed. Can be used to detect the presence or absence of a disconnection, and the disconnection position can be detected only at the connection point where the disconnection has occurred.

According to the second embodiment, the transmission of signals from the input side is sequentially performed by the shift register by the boundary scan.
The connection state of each device pin between the semiconductor chip 22 and the semiconductor chip 22 can be sequentially detected. Therefore, it is possible to detect the disconnection positions of a plurality of wirings connecting the semiconductor chip 21 and the semiconductor chip 22 in one inspection.

The features of the present invention are summarized as follows.

(1) An electronic device in which at least two electronic components are electrically connected, wherein at least one of the electronic components is transmitted from a transmission unit capable of high impedance control and transmitted from the transmission unit. Receiving means for receiving the transmitted signal, and pull-up means or pull-down means for making a transition by pulling up or pulling down the level of the signal transmitted from the transmitting means, and high impedance control of the signal transmitted from the transmitting means. An electronic device having a disconnection position detecting function, wherein a disconnection position of an electrical connection between the electronic components is detected in accordance with a level transition of a signal received by the receiving means.

(2) The detection of the disconnection position is performed by detecting the time from the start of the high impedance control until the level of the signal received by the receiving means reaches a predetermined threshold value. An electronic device having the disconnection position detecting function according to (1).

(3) The disconnection position is detected by detecting the level of a signal received by the receiving means after a lapse of a predetermined time from the start of the high impedance control. An electronic device provided with the disconnection position detection function described in the above.

(4) The apparatus according to (3), further comprising a flip-flop circuit connected to the receiving means, wherein the predetermined time is set by a clock input to the flip-flop circuit. Electronic equipment equipped with a function to detect the disconnection position.

(5) The electronic component is a semiconductor chip having a boundary scan function, wherein each of the boundary scan register cells connected to a plurality of device pins of the semiconductor chip includes the transmission unit, the reception unit, and the reception unit. A pull-up means for transmitting an L level signal held in the boundary scan register cell in the first update state by the transmitting means, and starting the high impedance control in the next up state, and changing a TCK clock cycle. An electronic device having a disconnection position detecting function according to (1), wherein the disconnection position is detected by detecting the level of a signal received by the receiving means in the capture state.

(6) A method for detecting a disconnection position of an electrically connected portion in an electronic device configured by electrically connecting at least two electronic components, wherein a signal is output from a specific electronic component and A first step of performing high impedance control on the signal, a second step of transitioning the level of the signal by pull-up or pull-down, and disconnection by detecting a transition state of the level of the signal in the specific electronic component. And a third step of detecting a position.

(7) The detection of the disconnection position in the third step is performed by detecting the level of the signal after a lapse of a predetermined time from the start of the high impedance control (6). 2. The disconnection position detection method described in 1.

(8) The detection of the disconnection position in the third step is performed by detecting a time from the start of the high impedance control until the signal level reaches a predetermined threshold value. (6) The disconnection position detection method according to (6).

(9) The level of the signal after the elapse of the predetermined time is previously detected and stored by using a non-defective electronic device, and the level of the signal detected in the third step and the storage are stored. The disconnection position detection method according to (7), wherein the transition state is detected by comparing the level of the signal with a predetermined level.

(10) The time required to reach the predetermined threshold value is detected in advance by using a non-defective electronic device and stored, and the predetermined threshold value detected in the third step is detected. The method according to (8), wherein the transition state is detected by comparing a time required to reach the predetermined time with the stored time.

(11) A method for detecting a disconnection position when the electronic component has a boundary scan function, wherein the first step is performed in an update state of the boundary scan, and the third step is performed in the boundary scan. (6) The disconnection position detection method according to (6), wherein the method is performed in the capture state.

(12) A fourth step of detecting whether or not a break has occurred in the electrical connection portion by using an open / short detection function such as the boundary scan function before the first step. And the fourth
(11) The disconnection position detecting method according to (11), wherein the first to third steps are performed only on the connection portion that is determined to have a disconnection in the step.

[0081]

According to the present invention, it is possible to detect a disconnection position between chips whose wires are connected one-to-one without directly applying probes to the wiring patterns, device pins, and leads. Therefore, it is possible to provide an electronic device having a disconnection position detection function and a disconnection position detection method capable of improving the work efficiency of the disconnection inspection and reducing excess waste products.

Further, according to the present invention, it is possible to detect a plurality of disconnection positions at once in a simple inspection step between a plurality of wirings connecting between semiconductor chips having a boundary scan function. Become. Therefore, even if there are many connection points, it is possible to detect the disconnection position without going through a complicated inspection process.

[Brief description of the drawings]

FIG. 1 is a schematic diagram illustrating two semiconductor chips constituting a semiconductor device according to a first embodiment of the present invention and a connection state thereof.

FIG. 2 is a timing chart showing a signal waveform when a signal transmitted from a driver of a semiconductor chip is received by a receiver in the first embodiment of the present invention.

FIG. 3 is a schematic diagram showing an example in which the semiconductor device shown in FIG. 1 is constituted by a semiconductor chip having a pull-down resistor.

FIG. 4 is a timing chart showing a signal waveform received by a receiver when a pull-down resistor is used in the first embodiment of the present invention.

FIG. 5 is a schematic diagram showing a semiconductor device having an MCM structure including a boundary scan register according to a second embodiment of the present invention.

FIG. 6 is a timing chart showing a transition waveform of a signal received by a receiver and a state of a boundary scan in the second embodiment of the present invention.

FIG. 7 is a schematic diagram showing a connection state between two semiconductor chips in a second embodiment of the present invention.

FIG. 8 is a flowchart illustrating a procedure of a method for detecting a disconnection position according to the second embodiment of the present invention.

[Explanation of symbols]

Reference numerals 1 and 2 Semiconductor chip 3 Substrate 3a Wiring pattern 4 Driver 5 Receiver 6 Pull-up resistor 7, 8 Lead 9 Pull-down resistor 10 Flip-flop circuit 21, 22 Semiconductor chip 21a, 21a Internal logic 21b, 21b Boundary scan register cell group 21c, 21c Device pins 21d, 22d TAP controllers 21e, 21h, 21i, 21j, 22h, 22i, 2
2j Boundary scan register cell 21f TDO signal pin 21g TDI signal pin

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Fumio Ohno 4-1-1, Uedanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Hiroyuki Tate 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture No. 1 Inside Fujitsu Limited (72) Inventor Takeshi Yanase 4-1-1 Kamikodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (72) Koji Uesaka 4-1-1 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture No. 1 Fujitsu Limited F term (reference) 2G014 AA02 AB59 AC18 2G032 AA00 AC10 AD08 AK11 AK16 AL05 2G033 AA00 AC01

Claims (2)

[Claims] An electronic device comprising at least two electronic components electrically connected to each other, wherein at least one of the electronic components is transmitted from a transmission unit capable of high impedance control, and transmitted from the transmission unit. A receiving unit that receives the signal, and a pull-up unit or a pull-down unit that performs a transition by pulling up or pulling down the level of the signal transmitted from the transmitting unit, and performs high impedance control on the signal transmitted from the transmitting unit. An electronic device having a disconnection position detecting function, wherein a disconnection position of an electrical connection between the electronic components is detected in accordance with a level transition of a signal received by the receiving means. 2. A method for detecting a disconnection position of an electrical connection portion in an electronic device configured by electrically connecting at least two electronic components, comprising: outputting a signal from a specific electronic component; A first step of controlling a signal to high impedance; a second step of transitioning the level of the signal by pull-up or pull-down; and detecting a transition state of the level of the signal in the specific electronic component. And a third step of detecting the disconnection position.