JP2001284731A - Semiconductor laser device - Google Patents
Semiconductor laser deviceInfo
- Publication number
- JP2001284731A JP2001284731A JP2000098770A JP2000098770A JP2001284731A JP 2001284731 A JP2001284731 A JP 2001284731A JP 2000098770 A JP2000098770 A JP 2000098770A JP 2000098770 A JP2000098770 A JP 2000098770A JP 2001284731 A JP2001284731 A JP 2001284731A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor laser
- common electrode
- laser device
- submount
- laser light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Semiconductor Lasers (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は半導体レーザ装置に
関する。[0001] The present invention relates to a semiconductor laser device.
【0002】[0002]
【従来の技術】複数のレ−ザ発光部を一体に備えるモノ
リシックタイプの半導体レーザ素子をステム上にサブマ
ウントを介して装着した半導体レーザ装置は、半導体レ
ーザ素子の放熱特性を向上させるために、発光領域(活
性層)が下に位置するジャンクションダウンの形態で使
用される場合が多い(例えば特開平6―216468号
公報)。図4は、この様なジャンクションダウンの形態
で半導体レーザ素子100を用いる場合の断面図を示し
ている。この図に示すように、サブマウント101の上
面には各レーザ発光部100a、100bに対応した個
別の電極102a,102bが形成され、これらの電極
とリード(図示せず)間にワイヤボンド配線103a,
103bが施されている。また、半導体レーザ素子10
0の基板側に設けた共通の電極100cとステム104
の段差105上面の間にワイヤボンド配線103cが施
されている。2. Description of the Related Art A semiconductor laser device in which a monolithic type semiconductor laser device having a plurality of laser light-emitting portions integrally mounted on a stem via a submount is used to improve the heat radiation characteristics of the semiconductor laser device. It is often used in the form of a junction down in which a light emitting region (active layer) is located below (for example, JP-A-6-216468). FIG. 4 is a cross-sectional view of the case where the semiconductor laser device 100 is used in such a junction-down form. As shown in this figure, individual electrodes 102a, 102b corresponding to the respective laser light emitting portions 100a, 100b are formed on the upper surface of the submount 101, and a wire bond wiring 103a is provided between these electrodes and leads (not shown). ,
103b is applied. Further, the semiconductor laser device 10
0 common electrode 100c and stem 104 provided on the substrate side
A wire bond wiring 103c is provided between the upper surfaces of the steps 105.
【0003】[0003]
【発明が解決しようとする課題】従来の半導体レーザ装
置は、半導体レーザ素子の最上部からステムの段差上面
にワイヤボンド配線を施すので、ワイヤボンド配線の引
き回し長さが長くなり、近接した他のワイヤボンド配線
やサブマウントの角などと接触する危険性が高い。ま
た、ステムにワイヤボンド用と位置決め用を兼ねる段差
構造105を必要とし、その形成のための別の加工工程
が必要となる。段差構造を設けない場合は、ステム10
4にワイヤボンド用の平面領域を別途必要とするので、
小型化を図りにくいなどの課題が有った。In the conventional semiconductor laser device, wire bonding wiring is provided from the uppermost part of the semiconductor laser element to the upper surface of the step of the stem. There is a high risk of contact with wire bond wiring and corners of the submount. In addition, a step structure 105 for both wire bonding and positioning is required in the stem, and another processing step for forming the same is required. If no step structure is provided, the stem 10
4 requires a separate plane area for wire bonding.
There were problems such as difficulty in downsizing.
【0004】そこで本発明は、ワイヤの引き回しによる
短絡事故の発生を防止することを課題の1つとする。ま
た、ステムの加工工数の削減や形状の小型化を図ること
を課題の1つとする。また、光学特性の安定化を図るこ
とを課題の1つとする。[0004] Therefore, an object of the present invention is to prevent occurrence of a short circuit accident due to wire routing. Another object is to reduce the number of man-hours for processing the stem and to reduce the size of the stem. Another object is to stabilize optical characteristics.
【0005】[0005]
【課題を解決するための手段】本発明の半導体レーザ装
置は請求項1に記載のように、複数のレ−ザ発光部を一
体に備えるモノリシックタイプの半導体レーザ素子をサ
ブマウント上にジャンクションダウンで装着した半導体
レーザ装置において、前記サブマウントは、前記複数の
レーザ発光部に対応した複数の個別電極と前記各レーザ
発光部に共通の共通電極を同一面に配置したことを特徴
とする。According to a first aspect of the present invention, there is provided a semiconductor laser device comprising: a monolithic type semiconductor laser device having a plurality of laser light-emitting portions integrally formed on a submount by junction-down; In the semiconductor laser device mounted, the submount is characterized in that a plurality of individual electrodes corresponding to the plurality of laser light emitting units and a common electrode common to each of the laser light emitting units are arranged on the same surface.
【0006】本発明の半導体レーザ装置は請求項2に記
載のように、前記共通電極は、前記サブマウントを貫通
する金属ビアホールによって前記サブマウント裏面の金
属製ステムに接続していることを特徴とする。According to a second aspect of the present invention, the common electrode is connected to a metal stem on the back surface of the submount by a metal via hole penetrating the submount. I do.
【0007】本発明の半導体レーザ装置は請求項3に記
載のように、前記金属ビアホールは、前記各レーザ発光
部の光軸と平面的に重なる位置を避けて前記サブマウン
トに形成していることを特徴とする。According to a third aspect of the present invention, in the semiconductor laser device, the metal via hole is formed on the submount so as to avoid a position overlapping with the optical axis of each of the laser light emitting portions in a plane. It is characterized by.
【0008】本発明の半導体レーザ装置は請求項4に記
載のように、前記半導体レーザ素子から前記共通電極に
接続するワイヤボンド配線の位置を前記金属ビアホール
と平面的に重なる位置を避けた位置としたことを特徴と
する。According to a fourth aspect of the present invention, a position of a wire bond wiring connected from the semiconductor laser element to the common electrode is set at a position avoiding a position overlapping with the metal via hole in a plane. It is characterized by having done.
【0009】本発明の半導体レーザ装置は請求項5に記
載のように、前記共通電極は、前記複数のレ−ザ発光部
の光軸と平面的に一定の幅をもって交差するように形成
したことを特徴とする。In the semiconductor laser device according to the present invention, the common electrode is formed so as to intersect the optical axes of the plurality of laser light emitting portions with a constant width in a plane. It is characterized by.
【0010】[0010]
【発明の実施の形態】以下本発明の実施例について、図
面を参照して説明する。図1は半導体レーザ装置の要部
斜視図、図2は図1の要部の平面図である。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view of a main part of the semiconductor laser device, and FIG. 2 is a plan view of the main part of FIG.
【0011】この実施例の半導体レーザ装置1は、ステ
ム2の上面にサブマウント3を配置固定し、このサブマ
ウント3の上面にモノリシックタイプの半導体レーザ素
子4を配置固定して構成している。The semiconductor laser device 1 of this embodiment has a submount 3 disposed and fixed on the upper surface of a stem 2 and a monolithic semiconductor laser element 4 disposed and fixed on the upper surface of the submount 3.
【0012】ステム2は、熱伝導性、導電性が良い金属
製で、銅や鉄やその合金などを加工して柱状に形成して
いる。このステム2の近傍には、ステム2を挟むように
複数のリードピン5を配置している。The stem 2 is made of a metal having good heat conductivity and conductivity, and is formed into a column shape by processing copper, iron, an alloy thereof, or the like. A plurality of lead pins 5 are arranged near the stem 2 so as to sandwich the stem 2.
【0013】サブマウント3は、絶縁性の材料、例えば
窒化アルミニウム、炭化珪素,シリコンなどから選択し
た材料を用いることができ、中でも、熱伝導性が良い窒
化アルミニウムを用いるのが好ましい。このサブマウン
ト3の上面には、上面前半部分に個別電極6,7を左右
に区分けして形成し、上面後半部分に共通電極8を個別
電極6,7に跨るような長さをもって形成している。こ
のサブマウント3の下面には、下面を覆うように下面電
極9を形成している。The submount 3 can be made of an insulating material, for example, a material selected from aluminum nitride, silicon carbide, silicon and the like. Among them, it is preferable to use aluminum nitride having good thermal conductivity. On the upper surface of the submount 3, individual electrodes 6 and 7 are formed in the front half of the upper surface so as to be divided into right and left, and in the latter half of the upper surface, the common electrode 8 is formed so as to extend over the individual electrodes 6 and 7. I have. A lower surface electrode 9 is formed on the lower surface of the submount 3 so as to cover the lower surface.
【0014】前記サブマウント3には、その上下を貫通
するように金属ビアホール10を形成している。この金
属ビアホール10は。サブマウント内に形成したスルー
ホールを金属で充填したもので、モリブデン、タングス
テン、金、銀、銅、ニッケルなどの金属を充填金属とし
て用いることができる。この金属ビアホール10は、共
通電極8と下面電極9の電気的な接続を行なうために、
共通電極8と平面的な重なりを持った位置に形成してい
る。このサブマウント3は、金錫、鉛錫等の半田材を用
いてステム2の所定位置に固定される。A metal via hole 10 is formed in the submount 3 so as to penetrate the upper and lower portions. This metal via hole 10 is. The through hole formed in the submount is filled with a metal, and a metal such as molybdenum, tungsten, gold, silver, copper, or nickel can be used as the filling metal. The metal via hole 10 is used to electrically connect the common electrode 8 and the lower electrode 9.
The common electrode 8 is formed at a position having a planar overlap. The submount 3 is fixed to a predetermined position on the stem 2 using a solder material such as gold tin or lead tin.
【0015】前記半導体レーザ素子4は、共通の基板に
形成した複数の発光領域を溝によって分離することによ
り形成した複数(この例では2つ)のレーザ発光部4
a,4bを一体に備えるモノリシックタイプの素子で、
共通基板が上に位置し、発光領域が下に位置するジャン
クションダウンの形態で用いられている。このレーザ素
子4の共通基板側の一方の面には、共通電極11が形成
され、反対側の面にはレーザ発光部4a,4bに対応し
た個別電極12,13を形成している。この半導体レー
ザ素子4は、その個別電極12,13がサブマウント3
の個別電極6,7と対面するように位置決めされ、金
錫、鉛錫等の半田材を用いてサブマウント3の上面に固
定される。The semiconductor laser element 4 has a plurality of (two in this example) laser light emitting portions 4 formed by separating a plurality of light emitting regions formed on a common substrate by grooves.
This is a monolithic type element that integrates a and 4b,
It is used in a junction-down configuration in which a common substrate is located above and a light emitting region is located below. A common electrode 11 is formed on one surface of the laser element 4 on the common substrate side, and individual electrodes 12 and 13 corresponding to the laser light emitting portions 4a and 4b are formed on the opposite surface. In this semiconductor laser device 4, the individual electrodes 12, 13 are
And is fixed to the upper surface of the submount 3 using a solder material such as gold tin or lead tin.
【0016】上記のようにステム2上に固定されたサブ
マウント3、このサブマウント3上に固定された半導体
レーザ素子4に対して、金線を用いたワイヤボンド配線
14が施される。まず、サブマウント3の個別電極6と
リードピン5の間にワイヤボンド配線14aが施され、
個別電極7とリードピン5の間にワイヤボンド配線14
bが施される。また、レーザ素子4の共通電極11とサ
ブマウント3の共通電極8の間にワイヤボンド配線14
cが施される。As described above, the submount 3 fixed on the stem 2 and the semiconductor laser device 4 fixed on the submount 3 are subjected to wire bond wiring 14 using gold wire. First, a wire bond wiring 14a is provided between the individual electrode 6 of the submount 3 and the lead pin 5,
Wire bond wiring 14 between individual electrode 7 and lead pin 5
b is performed. A wire bond wiring 14 is provided between the common electrode 11 of the laser element 4 and the common electrode 8 of the submount 3.
c is performed.
【0017】ここで、ワイヤボンド配線14cは、半導
体レーザ素子4の光軸X1,X2をワイヤボンド配線1
4cが遮らないように光軸X1,X2の上方を迂回して
配置している。そのために、ワイヤボンド配線14cと
共通電極8の接点を、光軸X1,X2との平面的な重な
りを避けて共通電極8の左右方向(光軸X1と直交する
方向)の端に配置している。共通電極8に対するワイヤ
ボンドは、金属ビアホール10の真上に位置するように
行なっても良いが、この実施例では、共通電極8と金属
ビアホール10の接触状態に前記ワイヤボンドが悪影響
を与えないように、金属ビアホール10との平面的な重
なりを避けて、共通電極8に対するワイヤボンド配線を
行なっている。Here, the wire bond wiring 14c connects the optical axes X1 and X2 of the semiconductor laser device 4 with the wire bond wiring 1c.
4c is arranged so as to bypass the optical axes X1 and X2 so as not to be blocked. For this purpose, the contact point between the wire bond wiring 14c and the common electrode 8 is arranged at the end in the left-right direction (direction orthogonal to the optical axis X1) of the common electrode 8 while avoiding planar overlap with the optical axes X1 and X2. I have. The wire bond to the common electrode 8 may be performed so as to be located directly above the metal via hole 10. However, in this embodiment, the wire bond does not adversely affect the contact state between the common electrode 8 and the metal via hole 10. In addition, wire bonding wiring to the common electrode 8 is performed while avoiding a planar overlap with the metal via hole 10.
【0018】また、前記金属ビアホール10の上に位置
する電極8の表面は、金属ビアホール10の伸縮などの
影響を受けて凸凹面となりやすく、この凸凹面が後方レ
ーザ光に乱反射などの悪影響を与える可能性が有る。そ
こで、金属ビアホール10も光軸X1,X2との平面的
な重なりを避けて共通電極8の左右方向の端に配置して
いる。Further, the surface of the electrode 8 located on the metal via hole 10 tends to be uneven due to the influence of expansion and contraction of the metal via hole 10, and the uneven surface adversely affects the rear laser beam, such as irregular reflection. There is a possibility. Therefore, the metal via hole 10 is also disposed at the left and right ends of the common electrode 8 so as to avoid a planar overlap with the optical axes X1 and X2.
【0019】上記構成の半導体レーザ装置は、リードピ
ン5,5に選択的に所定の電圧を印加することによって
動作を開始する。すなわち、リードピン5に駆動電圧を
加えると、ワイヤボンド配線14a、個別電極6、1
2、レーザ発光部4a、共通電極11、ワイヤボンド配
線14c、共通電極8、金属ビアホール10、下面電極
9、ステム2を通る経路で電流が流れて光軸X1に沿っ
たレーザ光がレーザ発光部4aから出力する。レーザ発
光部4bも同様で、リードピン5、ワイヤボンド配線1
4bを経た経路で電流が流れて光軸X2に沿ったレーザ
光がレーザ発光部4bから出力する。レーザ素子4の前
方レーザ出力に比べて低出力の後方レーザ出力は、共通
電極8の上方空間を通ってモニター用の受光素子(図示
せず)に入射する。ここで、共通電極8は、光軸X1,
X2と平面的に重なる寸法が同じになるように、左右方
向に同一の幅を持って形成しているので、共通電極8に
よる後方モニター用光の反射状態を各レーザ発光部4
a、4bで共通な状態に保つことができる。The semiconductor laser device having the above-described structure starts operation by selectively applying a predetermined voltage to the lead pins 5 and 5. That is, when a driving voltage is applied to the lead pin 5, the wire bond wiring 14a, the individual electrodes 6, 1
2. A current flows through a path passing through the laser light emitting portion 4a, the common electrode 11, the wire bond wiring 14c, the common electrode 8, the metal via hole 10, the lower electrode 9, and the stem 2, and the laser light along the optical axis X1 is emitted by the laser light emitting portion. 4a. The same applies to the laser emitting section 4b.
The current flows along the path passing through 4b, and the laser light along the optical axis X2 is output from the laser emitting section 4b. The rear laser output having a lower output than the front laser output of the laser element 4 passes through the space above the common electrode 8 and enters a light receiving element for monitoring (not shown). Here, the common electrode 8 is connected to the optical axis X1,
Since it is formed so as to have the same width in the left-right direction so as to have the same size as the plane overlapped with X2, the reflection state of the rear monitor light by the common electrode 8 is set to
a and 4b can be maintained in a common state.
【0020】また、サブマウント3の同一面上に個別電
極6,7と共通電極8を配置しているので、半導体レー
ザ素子4の最上部に位置する電極11に対するワイヤボ
ンド配線14cの引き回し距離を短く設定することがで
きる。加えて、絶縁性サブマウント3の上下を金属ビア
ホール10によって貫通して共通電極8とステム2との
導通を図っているので、ワイヤボンド配線14の接触事
故の発生を未然に防止することができる。また、同一面
上に電極6,7,8を形成しているので、検査針を当て
ての通電テストを事前に行なって半導体レーザ素子4の
特性検査を行ない易くすることができる。Further, since the individual electrodes 6 and 7 and the common electrode 8 are arranged on the same surface of the submount 3, the wiring distance of the wire bond wiring 14c with respect to the electrode 11 located at the uppermost part of the semiconductor laser device 4 can be reduced. Can be set shorter. In addition, since the common electrode 8 and the stem 2 are electrically connected to each other by penetrating the upper and lower portions of the insulating submount 3 with the metal via holes 10, the occurrence of a contact accident of the wire bond wiring 14 can be prevented. . In addition, since the electrodes 6, 7, and 8 are formed on the same surface, it is possible to easily perform a characteristic test of the semiconductor laser element 4 by performing an energization test in advance with a test needle.
【0021】上記実施例は、サブマウント3として絶縁
性の材料を用い、その上下の導通を金属ビアホール10
を用いて行なう場合を示したが、サブマウントの上下の
導通を図るためにサブマウント材料に導電性のものを用
いても良い。例えばサブマウントとして良導電性のシリ
コンや金属を材料として用いることができ、この場合の
半導体レーザ装置は、図3に示すような構成となる。In the above-described embodiment, an insulating material is used for the submount 3 and the upper and lower continuities are connected to the metal via holes 10.
Has been described, but a conductive material may be used for the submount in order to achieve electrical conduction between the upper and lower parts of the submount. For example, highly conductive silicon or metal can be used as a material for the submount, and the semiconductor laser device in this case has a configuration as shown in FIG.
【0022】すなわち、導電性材料からなるサブマウン
ト20の上面前半部には絶縁膜21が形成され、この絶
縁膜21の上に、個別電極6,7が形成される。サブマ
ウント20の前記絶縁膜21が形成されていない領域が
共通電極8として機能する。下面電極は設けても良い
が、共通電極8と同様にサブマウント20の下面自体を
前記電極9として機能させる場合は省略することができ
る。その他の構成は、図1,2に示した先の実施例と同
様の構成とすることができる。That is, an insulating film 21 is formed on the front half of the upper surface of the submount 20 made of a conductive material, and the individual electrodes 6 and 7 are formed on the insulating film 21. A region of the submount 20 where the insulating film 21 is not formed functions as the common electrode 8. A lower surface electrode may be provided, but can be omitted when the lower surface itself of the submount 20 functions as the electrode 9 like the common electrode 8. Other configurations can be the same as the previous embodiment shown in FIGS.
【0023】[0023]
【発明の効果】以上のように本発明によれば、ワイヤボ
ンド用の配線の引き回し長さを短く設定でき、配線の接
触による短絡事故の発生を防止することができる。ま
た、ステムの加工工数の削減や形状の小型化を図ること
ができる。また、複数のレーザ発光部の出力状態を均一
化して光学特性の安定化を図ることができる。As described above, according to the present invention, the length of the wiring for wire bonding can be set short, and the occurrence of a short circuit accident due to the contact of the wiring can be prevented. In addition, it is possible to reduce the number of processing steps of the stem and to reduce the size of the stem. Further, the output state of the plurality of laser light emitting units can be made uniform to stabilize the optical characteristics.
【図1】本発明の実施例を示す要部斜視図である。FIG. 1 is a perspective view of a main part showing an embodiment of the present invention.
【図2】サブマウント周辺部分の拡大図である。FIG. 2 is an enlarged view of a portion around a submount.
【図3】本発明の他の実施例を示す要部斜視図である。FIG. 3 is a perspective view of a main part showing another embodiment of the present invention.
【図4】従来例を示す断面図である。FIG. 4 is a sectional view showing a conventional example.
1 半導体レーザ装置 2 ステム 3 サブマウント 4 半導体レーザ素子 10 金属ビアホール DESCRIPTION OF SYMBOLS 1 Semiconductor laser device 2 Stem 3 Submount 4 Semiconductor laser element 10 Metal via hole
Claims (5)
リシックタイプの半導体レーザ素子をサブマウント上に
ジャンクションダウンで装着した半導体レーザ装置にお
いて、前記サブマウントは、前記複数のレーザ発光部に
対応した複数の個別電極と前記各レーザ発光部に共通の
共通電極を同一面に配置したことを特徴とする半導体レ
ーザ装置。1. A semiconductor laser device in which a monolithic type semiconductor laser device integrally including a plurality of laser light emitting units is mounted on a submount in a junction-down manner, wherein the submount corresponds to the plurality of laser light emitting units. A plurality of individual electrodes and a common electrode common to the respective laser light emitting units are arranged on the same surface.
通する金属ビアホールによって前記サブマウント裏面の
金属製ステムに接続していることを特徴とする請求項1
記載の半導体レーザ装置。2. The sub-mount according to claim 1, wherein the common electrode is connected to a metal stem on a back surface of the sub-mount by a metal via hole penetrating the sub-mount.
13. The semiconductor laser device according to claim 1.
光部の光軸と平面的に重なる位置を避けて前記サブマウ
ントに形成していることを特徴とする請求項2記載の半
導体レーザ装置。3. The semiconductor laser device according to claim 2, wherein the metal via hole is formed in the submount so as to avoid a position overlapping with an optical axis of each of the laser light emitting units in a plane.
に接続するワイヤボンド配線の位置を前記金属ビアホー
ルと平面的に重なる位置を避けた位置としたことを特徴
とする請求項2記載の半導体レーザ装置。4. The semiconductor laser device according to claim 2, wherein a position of a wire bond wiring connected from said semiconductor laser element to said common electrode is a position avoiding a position overlapping with said metal via hole in a plane. .
部の光軸と平面的に一定の幅をもって交差するように形
成したことを特徴とする請求項1〜4記載の半導体レー
ザ装置。5. The semiconductor laser device according to claim 1, wherein said common electrode is formed so as to intersect the optical axes of said plurality of laser light emitting portions with a constant width in a plane. .
Priority Applications (1)
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JP2000098770A JP3639497B2 (en) | 2000-03-31 | 2000-03-31 | Semiconductor laser device |
Applications Claiming Priority (1)
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---|---|---|---|
JP2000098770A JP3639497B2 (en) | 2000-03-31 | 2000-03-31 | Semiconductor laser device |
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JP2001284731A true JP2001284731A (en) | 2001-10-12 |
JP3639497B2 JP3639497B2 (en) | 2005-04-20 |
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ID=18613218
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JP2000098770A Expired - Fee Related JP3639497B2 (en) | 2000-03-31 | 2000-03-31 | Semiconductor laser device |
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004146777A (en) * | 2002-08-26 | 2004-05-20 | Sumitomo Electric Ind Ltd | Semiconductor laser module and semiconductor laser |
US7113528B2 (en) | 2002-07-18 | 2006-09-26 | Nec Electronics Corporation | Semiconductor laser device |
EP2239823A1 (en) * | 2007-12-21 | 2010-10-13 | Mitsubishi Electric Corporation | Laser light source module |
JP2011040552A (en) * | 2009-08-11 | 2011-02-24 | Opnext Japan Inc | Multi-beam semiconductor laser device |
JP2013258434A (en) * | 2013-10-01 | 2013-12-26 | Japan Oclaro Inc | Multi-beam semiconductor laser device |
JP2020020861A (en) * | 2018-07-30 | 2020-02-06 | 奇景光電股▲ふん▼有限公司 | Projector, electronic device having the same, and associated manufacturing method |
US10714891B2 (en) | 2018-07-06 | 2020-07-14 | Himax Technologies Limited | Projector, electronic device having projector and associated manufacturing method |
JP2020136326A (en) * | 2019-02-13 | 2020-08-31 | 古河電気工業株式会社 | Optical module |
JP2021184501A (en) * | 2017-04-28 | 2021-12-02 | 日亜化学工業株式会社 | Laser device |
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2000
- 2000-03-31 JP JP2000098770A patent/JP3639497B2/en not_active Expired - Fee Related
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7113528B2 (en) | 2002-07-18 | 2006-09-26 | Nec Electronics Corporation | Semiconductor laser device |
JP2004146777A (en) * | 2002-08-26 | 2004-05-20 | Sumitomo Electric Ind Ltd | Semiconductor laser module and semiconductor laser |
JP4586337B2 (en) * | 2002-08-26 | 2010-11-24 | 住友電気工業株式会社 | Semiconductor laser module and semiconductor laser device |
EP2239823A1 (en) * | 2007-12-21 | 2010-10-13 | Mitsubishi Electric Corporation | Laser light source module |
EP2239823A4 (en) * | 2007-12-21 | 2013-07-17 | Mitsubishi Electric Corp | Laser light source module |
JP2011040552A (en) * | 2009-08-11 | 2011-02-24 | Opnext Japan Inc | Multi-beam semiconductor laser device |
JP2013258434A (en) * | 2013-10-01 | 2013-12-26 | Japan Oclaro Inc | Multi-beam semiconductor laser device |
JP2021184501A (en) * | 2017-04-28 | 2021-12-02 | 日亜化学工業株式会社 | Laser device |
JP7277811B2 (en) | 2017-04-28 | 2023-05-19 | 日亜化学工業株式会社 | laser device |
US10714891B2 (en) | 2018-07-06 | 2020-07-14 | Himax Technologies Limited | Projector, electronic device having projector and associated manufacturing method |
JP2020020861A (en) * | 2018-07-30 | 2020-02-06 | 奇景光電股▲ふん▼有限公司 | Projector, electronic device having the same, and associated manufacturing method |
JP2020136326A (en) * | 2019-02-13 | 2020-08-31 | 古河電気工業株式会社 | Optical module |
JP7178284B2 (en) | 2019-02-13 | 2022-11-25 | 古河電気工業株式会社 | optical module |
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